| stats.txt (11384:e3cbd2823210) | stats.txt (11388:bd4125134e77) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.079141 # Number of seconds simulated 4sim_ticks 79140979500 # Number of ticks simulated 5final_tick 79140979500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.079141 # Number of seconds simulated 4sim_ticks 79140979500 # Number of ticks simulated 5final_tick 79140979500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 48534 # Simulator instruction rate (inst/s) 8host_op_rate 81347 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 29082810 # Simulator tick rate (ticks/s) 10host_mem_usage 336912 # Number of bytes of host memory used 11host_seconds 2721.23 # Real time elapsed on the host | 7host_inst_rate 48369 # Simulator instruction rate (inst/s) 8host_op_rate 81071 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 28984226 # Simulator tick rate (ticks/s) 10host_mem_usage 336892 # Number of bytes of host memory used 11host_seconds 2730.48 # Real time elapsed on the host |
| 12sim_insts 132071192 # Number of instructions simulated 13sim_ops 221363384 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 221376 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 125056 # Number of bytes read from this memory 18system.physmem.bytes_read::total 346432 # Number of bytes read from this memory 19system.physmem.bytes_inst_read::cpu.inst 221376 # Number of instructions bytes read from this memory --- 241 unchanged lines hidden (view full) --- 261system.cpu.branchPred.RASInCorrect 16873 # Number of incorrect RAS predictions. 262system.cpu_clk_domain.clock 500 # Clock period in ticks 263system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks 264system.cpu.workload.num_syscalls 400 # Number of system calls 265system.cpu.numCycles 158281960 # number of cpu cycles simulated 266system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 267system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 268system.cpu.fetch.icacheStallCycles 25261186 # Number of cycles fetch is stalled on an Icache miss | 12sim_insts 132071192 # Number of instructions simulated 13sim_ops 221363384 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 221376 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 125056 # Number of bytes read from this memory 18system.physmem.bytes_read::total 346432 # Number of bytes read from this memory 19system.physmem.bytes_inst_read::cpu.inst 221376 # Number of instructions bytes read from this memory --- 241 unchanged lines hidden (view full) --- 261system.cpu.branchPred.RASInCorrect 16873 # Number of incorrect RAS predictions. 262system.cpu_clk_domain.clock 500 # Clock period in ticks 263system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks 264system.cpu.workload.num_syscalls 400 # Number of system calls 265system.cpu.numCycles 158281960 # number of cpu cycles simulated 266system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 267system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 268system.cpu.fetch.icacheStallCycles 25261186 # Number of cycles fetch is stalled on an Icache miss |
| 269system.cpu.fetch.Insts 227540230 # Number of instructions fetch has processed | 269system.cpu.fetch.Insts 227540228 # Number of instructions fetch has processed |
| 270system.cpu.fetch.Branches 20604097 # Number of branches that fetch encountered 271system.cpu.fetch.predictedBranches 13459793 # Number of branches that fetch has predicted taken 272system.cpu.fetch.Cycles 131194120 # Number of cycles fetch has run and was not squashing or blocked 273system.cpu.fetch.SquashCycles 3196201 # Number of cycles fetch has spent squashing 274system.cpu.fetch.TlbCycles 20 # Number of cycles fetch has spent waiting for tlb 275system.cpu.fetch.MiscStallCycles 1974 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs 276system.cpu.fetch.PendingTrapStallCycles 21216 # Number of stall cycles due to pending traps 277system.cpu.fetch.PendingQuiesceStallCycles 13 # Number of stall cycles due to pending quiesce instructions 278system.cpu.fetch.IcacheWaitRetryStallCycles 47 # Number of stall cycles due to full MSHR 279system.cpu.fetch.CacheLines 24267792 # Number of cache lines fetched 280system.cpu.fetch.IcacheSquashes 266999 # Number of outstanding Icache misses that were squashed 281system.cpu.fetch.rateDist::samples 158076676 # Number of instructions fetched each cycle (Total) 282system.cpu.fetch.rateDist::mean 2.380152 # Number of instructions fetched each cycle (Total) | 270system.cpu.fetch.Branches 20604097 # Number of branches that fetch encountered 271system.cpu.fetch.predictedBranches 13459793 # Number of branches that fetch has predicted taken 272system.cpu.fetch.Cycles 131194120 # Number of cycles fetch has run and was not squashing or blocked 273system.cpu.fetch.SquashCycles 3196201 # Number of cycles fetch has spent squashing 274system.cpu.fetch.TlbCycles 20 # Number of cycles fetch has spent waiting for tlb 275system.cpu.fetch.MiscStallCycles 1974 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs 276system.cpu.fetch.PendingTrapStallCycles 21216 # Number of stall cycles due to pending traps 277system.cpu.fetch.PendingQuiesceStallCycles 13 # Number of stall cycles due to pending quiesce instructions 278system.cpu.fetch.IcacheWaitRetryStallCycles 47 # Number of stall cycles due to full MSHR 279system.cpu.fetch.CacheLines 24267792 # Number of cache lines fetched 280system.cpu.fetch.IcacheSquashes 266999 # Number of outstanding Icache misses that were squashed 281system.cpu.fetch.rateDist::samples 158076676 # Number of instructions fetched each cycle (Total) 282system.cpu.fetch.rateDist::mean 2.380152 # Number of instructions fetched each cycle (Total) |
| 283system.cpu.fetch.rateDist::stdev 3.324972 # Number of instructions fetched each cycle (Total) | 283system.cpu.fetch.rateDist::stdev 3.324971 # Number of instructions fetched each cycle (Total) |
| 284system.cpu.fetch.rateDist::underflows 0 0.00% 0.00% # Number of instructions fetched each cycle (Total) | 284system.cpu.fetch.rateDist::underflows 0 0.00% 0.00% # Number of instructions fetched each cycle (Total) |
| 285system.cpu.fetch.rateDist::0 95737540 60.56% 60.56% # Number of instructions fetched each cycle (Total) | 285system.cpu.fetch.rateDist::0 95737539 60.56% 60.56% # Number of instructions fetched each cycle (Total) |
| 286system.cpu.fetch.rateDist::1 4758449 3.01% 63.57% # Number of instructions fetched each cycle (Total) | 286system.cpu.fetch.rateDist::1 4758449 3.01% 63.57% # Number of instructions fetched each cycle (Total) |
| 287system.cpu.fetch.rateDist::2 3804662 2.41% 65.98% # Number of instructions fetched each cycle (Total) | 287system.cpu.fetch.rateDist::2 3804663 2.41% 65.98% # Number of instructions fetched each cycle (Total) |
| 288system.cpu.fetch.rateDist::3 4365114 2.76% 68.74% # Number of instructions fetched each cycle (Total) 289system.cpu.fetch.rateDist::4 4234763 2.68% 71.42% # Number of instructions fetched each cycle (Total) 290system.cpu.fetch.rateDist::5 4816061 3.05% 74.47% # Number of instructions fetched each cycle (Total) | 288system.cpu.fetch.rateDist::3 4365114 2.76% 68.74% # Number of instructions fetched each cycle (Total) 289system.cpu.fetch.rateDist::4 4234763 2.68% 71.42% # Number of instructions fetched each cycle (Total) 290system.cpu.fetch.rateDist::5 4816061 3.05% 74.47% # Number of instructions fetched each cycle (Total) |
| 291system.cpu.fetch.rateDist::6 4706873 2.98% 77.45% # Number of instructions fetched each cycle (Total) | 291system.cpu.fetch.rateDist::6 4706874 2.98% 77.45% # Number of instructions fetched each cycle (Total) |
| 292system.cpu.fetch.rateDist::7 3702906 2.34% 79.79% # Number of instructions fetched each cycle (Total) | 292system.cpu.fetch.rateDist::7 3702906 2.34% 79.79% # Number of instructions fetched each cycle (Total) |
| 293system.cpu.fetch.rateDist::8 31950308 20.21% 100.00% # Number of instructions fetched each cycle (Total) | 293system.cpu.fetch.rateDist::8 31950307 20.21% 100.00% # Number of instructions fetched each cycle (Total) |
| 294system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Number of instructions fetched each cycle (Total) 295system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total) 296system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total) 297system.cpu.fetch.rateDist::total 158076676 # Number of instructions fetched each cycle (Total) 298system.cpu.fetch.branchRate 0.130173 # Number of branch fetches per cycle 299system.cpu.fetch.rate 1.437563 # Number of inst fetches per cycle 300system.cpu.decode.IdleCycles 15410588 # Number of cycles decode is idle 301system.cpu.decode.BlockedCycles 96165479 # Number of cycles decode is blocked | 294system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Number of instructions fetched each cycle (Total) 295system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total) 296system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total) 297system.cpu.fetch.rateDist::total 158076676 # Number of instructions fetched each cycle (Total) 298system.cpu.fetch.branchRate 0.130173 # Number of branch fetches per cycle 299system.cpu.fetch.rate 1.437563 # Number of inst fetches per cycle 300system.cpu.decode.IdleCycles 15410588 # Number of cycles decode is idle 301system.cpu.decode.BlockedCycles 96165479 # Number of cycles decode is blocked |
| 302system.cpu.decode.RunCycles 23286260 # Number of cycles decode is running 303system.cpu.decode.UnblockCycles 21616249 # Number of cycles decode is unblocking | 302system.cpu.decode.RunCycles 23286259 # Number of cycles decode is running 303system.cpu.decode.UnblockCycles 21616250 # Number of cycles decode is unblocking |
| 304system.cpu.decode.SquashCycles 1598100 # Number of cycles decode is squashing 305system.cpu.decode.DecodedInsts 336629364 # Number of instructions handled by decode 306system.cpu.rename.SquashCycles 1598100 # Number of cycles rename is squashing 307system.cpu.rename.IdleCycles 23294905 # Number of cycles rename is idle 308system.cpu.rename.BlockCycles 31785654 # Number of cycles rename is blocking 309system.cpu.rename.serializeStallCycles 30420 # count of cycles rename stalled for serializing inst 310system.cpu.rename.RunCycles 36005072 # Number of cycles rename is running 311system.cpu.rename.UnblockCycles 65362525 # Number of cycles rename is unblocking 312system.cpu.rename.RenamedInsts 328266719 # Number of instructions processed by rename 313system.cpu.rename.ROBFullEvents 1575 # Number of times rename has blocked due to ROB full 314system.cpu.rename.IQFullEvents 57713162 # Number of times rename has blocked due to IQ full 315system.cpu.rename.LQFullEvents 7745606 # Number of times rename has blocked due to LQ full 316system.cpu.rename.SQFullEvents 167786 # Number of times rename has blocked due to SQ full | 304system.cpu.decode.SquashCycles 1598100 # Number of cycles decode is squashing 305system.cpu.decode.DecodedInsts 336629364 # Number of instructions handled by decode 306system.cpu.rename.SquashCycles 1598100 # Number of cycles rename is squashing 307system.cpu.rename.IdleCycles 23294905 # Number of cycles rename is idle 308system.cpu.rename.BlockCycles 31785654 # Number of cycles rename is blocking 309system.cpu.rename.serializeStallCycles 30420 # count of cycles rename stalled for serializing inst 310system.cpu.rename.RunCycles 36005072 # Number of cycles rename is running 311system.cpu.rename.UnblockCycles 65362525 # Number of cycles rename is unblocking 312system.cpu.rename.RenamedInsts 328266719 # Number of instructions processed by rename 313system.cpu.rename.ROBFullEvents 1575 # Number of times rename has blocked due to ROB full 314system.cpu.rename.IQFullEvents 57713162 # Number of times rename has blocked due to IQ full 315system.cpu.rename.LQFullEvents 7745606 # Number of times rename has blocked due to LQ full 316system.cpu.rename.SQFullEvents 167786 # Number of times rename has blocked due to SQ full |
| 317system.cpu.rename.RenamedOperands 380441374 # Number of destination operands rename has renamed 318system.cpu.rename.RenameLookups 910027756 # Number of register rename lookups that rename has made 319system.cpu.rename.int_rename_lookups 600617832 # Number of integer rename lookups | 317system.cpu.rename.RenamedOperands 380441368 # Number of destination operands rename has renamed 318system.cpu.rename.RenameLookups 910027762 # Number of register rename lookups that rename has made 319system.cpu.rename.int_rename_lookups 600617825 # Number of integer rename lookups |
| 320system.cpu.rename.fp_rename_lookups 4182134 # Number of floating rename lookups 321system.cpu.rename.CommittedMaps 259429450 # Number of HB maps that are committed | 320system.cpu.rename.fp_rename_lookups 4182134 # Number of floating rename lookups 321system.cpu.rename.CommittedMaps 259429450 # Number of HB maps that are committed |
| 322system.cpu.rename.UndoneMaps 121011924 # Number of HB maps that are undone due to squashing | 322system.cpu.rename.UndoneMaps 121011918 # Number of HB maps that are undone due to squashing |
| 323system.cpu.rename.serializingInsts 1942 # count of serializing insts renamed 324system.cpu.rename.tempSerializingInsts 1920 # count of temporary serializing insts renamed 325system.cpu.rename.skidInsts 120996232 # count of insts added to the skid buffer | 323system.cpu.rename.serializingInsts 1942 # count of serializing insts renamed 324system.cpu.rename.tempSerializingInsts 1920 # count of temporary serializing insts renamed 325system.cpu.rename.skidInsts 120996232 # count of insts added to the skid buffer |
| 326system.cpu.memDep0.insertedLoads 82787392 # Number of loads inserted to the mem dependence unit. | 326system.cpu.memDep0.insertedLoads 82787391 # Number of loads inserted to the mem dependence unit. |
| 327system.cpu.memDep0.insertedStores 29790688 # Number of stores inserted to the mem dependence unit. 328system.cpu.memDep0.conflictingLoads 59618216 # Number of conflicting loads. 329system.cpu.memDep0.conflictingStores 20385329 # Number of conflicting stores. 330system.cpu.iq.iqInstsAdded 317847109 # Number of instructions added to the IQ (excludes non-spec) 331system.cpu.iq.iqNonSpecInstsAdded 5129 # Number of non-speculative instructions added to the IQ | 327system.cpu.memDep0.insertedStores 29790688 # Number of stores inserted to the mem dependence unit. 328system.cpu.memDep0.conflictingLoads 59618216 # Number of conflicting loads. 329system.cpu.memDep0.conflictingStores 20385329 # Number of conflicting stores. 330system.cpu.iq.iqInstsAdded 317847109 # Number of instructions added to the IQ (excludes non-spec) 331system.cpu.iq.iqNonSpecInstsAdded 5129 # Number of non-speculative instructions added to the IQ |
| 332system.cpu.iq.iqInstsIssued 259397690 # Number of instructions issued | 332system.cpu.iq.iqInstsIssued 259397692 # Number of instructions issued |
| 333system.cpu.iq.iqSquashedInstsIssued 74444 # Number of squashed instructions issued 334system.cpu.iq.iqSquashedInstsExamined 96488854 # Number of squashed instructions iterated over during squash; mainly for profiling 335system.cpu.iq.iqSquashedOperandsExamined 197170724 # Number of squashed operands that are examined and possibly removed from graph 336system.cpu.iq.iqSquashedNonSpecRemoved 3884 # Number of squashed non-spec instructions that were removed 337system.cpu.iq.issued_per_cycle::samples 158076676 # Number of insts issued each cycle 338system.cpu.iq.issued_per_cycle::mean 1.640961 # Number of insts issued each cycle 339system.cpu.iq.issued_per_cycle::stdev 1.524821 # Number of insts issued each cycle 340system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle | 333system.cpu.iq.iqSquashedInstsIssued 74444 # Number of squashed instructions issued 334system.cpu.iq.iqSquashedInstsExamined 96488854 # Number of squashed instructions iterated over during squash; mainly for profiling 335system.cpu.iq.iqSquashedOperandsExamined 197170724 # Number of squashed operands that are examined and possibly removed from graph 336system.cpu.iq.iqSquashedNonSpecRemoved 3884 # Number of squashed non-spec instructions that were removed 337system.cpu.iq.issued_per_cycle::samples 158076676 # Number of insts issued each cycle 338system.cpu.iq.issued_per_cycle::mean 1.640961 # Number of insts issued each cycle 339system.cpu.iq.issued_per_cycle::stdev 1.524821 # Number of insts issued each cycle 340system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle |
| 341system.cpu.iq.issued_per_cycle::0 40037946 25.33% 25.33% # Number of insts issued each cycle 342system.cpu.iq.issued_per_cycle::1 47502915 30.05% 55.38% # Number of insts issued each cycle | 341system.cpu.iq.issued_per_cycle::0 40037944 25.33% 25.33% # Number of insts issued each cycle 342system.cpu.iq.issued_per_cycle::1 47502917 30.05% 55.38% # Number of insts issued each cycle |
| 343system.cpu.iq.issued_per_cycle::2 33077309 20.92% 76.30% # Number of insts issued each cycle 344system.cpu.iq.issued_per_cycle::3 17993681 11.38% 87.69% # Number of insts issued each cycle 345system.cpu.iq.issued_per_cycle::4 10964078 6.94% 94.62% # Number of insts issued each cycle 346system.cpu.iq.issued_per_cycle::5 4766946 3.02% 97.64% # Number of insts issued each cycle 347system.cpu.iq.issued_per_cycle::6 2459939 1.56% 99.19% # Number of insts issued each cycle 348system.cpu.iq.issued_per_cycle::7 882458 0.56% 99.75% # Number of insts issued each cycle 349system.cpu.iq.issued_per_cycle::8 391404 0.25% 100.00% # Number of insts issued each cycle 350system.cpu.iq.issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle --- 30 unchanged lines hidden (view full) --- 381system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 7.31% # attempts to use FU when none available 382system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 7.31% # attempts to use FU when none available 383system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 7.31% # attempts to use FU when none available 384system.cpu.iq.fu_full::MemRead 2560752 80.62% 87.93% # attempts to use FU when none available 385system.cpu.iq.fu_full::MemWrite 383461 12.07% 100.00% # attempts to use FU when none available 386system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available 387system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available 388system.cpu.iq.FU_type_0::No_OpClass 1212757 0.47% 0.47% # Type of FU issued | 343system.cpu.iq.issued_per_cycle::2 33077309 20.92% 76.30% # Number of insts issued each cycle 344system.cpu.iq.issued_per_cycle::3 17993681 11.38% 87.69% # Number of insts issued each cycle 345system.cpu.iq.issued_per_cycle::4 10964078 6.94% 94.62% # Number of insts issued each cycle 346system.cpu.iq.issued_per_cycle::5 4766946 3.02% 97.64% # Number of insts issued each cycle 347system.cpu.iq.issued_per_cycle::6 2459939 1.56% 99.19% # Number of insts issued each cycle 348system.cpu.iq.issued_per_cycle::7 882458 0.56% 99.75% # Number of insts issued each cycle 349system.cpu.iq.issued_per_cycle::8 391404 0.25% 100.00% # Number of insts issued each cycle 350system.cpu.iq.issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle --- 30 unchanged lines hidden (view full) --- 381system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 7.31% # attempts to use FU when none available 382system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 7.31% # attempts to use FU when none available 383system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 7.31% # attempts to use FU when none available 384system.cpu.iq.fu_full::MemRead 2560752 80.62% 87.93% # attempts to use FU when none available 385system.cpu.iq.fu_full::MemWrite 383461 12.07% 100.00% # attempts to use FU when none available 386system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available 387system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available 388system.cpu.iq.FU_type_0::No_OpClass 1212757 0.47% 0.47% # Type of FU issued |
| 389system.cpu.iq.FU_type_0::IntAlu 161810980 62.38% 62.85% # Type of FU issued | 389system.cpu.iq.FU_type_0::IntAlu 161810982 62.38% 62.85% # Type of FU issued |
| 390system.cpu.iq.FU_type_0::IntMult 789695 0.30% 63.15% # Type of FU issued 391system.cpu.iq.FU_type_0::IntDiv 7037932 2.71% 65.86% # Type of FU issued 392system.cpu.iq.FU_type_0::FloatAdd 1186383 0.46% 66.32% # Type of FU issued 393system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 66.32% # Type of FU issued 394system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 66.32% # Type of FU issued 395system.cpu.iq.FU_type_0::FloatMult 0 0.00% 66.32% # Type of FU issued 396system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 66.32% # Type of FU issued 397system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 66.32% # Type of FU issued --- 16 unchanged lines hidden (view full) --- 414system.cpu.iq.FU_type_0::SimdFloatMisc 0 0.00% 66.32% # Type of FU issued 415system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 66.32% # Type of FU issued 416system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 66.32% # Type of FU issued 417system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 66.32% # Type of FU issued 418system.cpu.iq.FU_type_0::MemRead 64896242 25.02% 91.34% # Type of FU issued 419system.cpu.iq.FU_type_0::MemWrite 22463701 8.66% 100.00% # Type of FU issued 420system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued 421system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued | 390system.cpu.iq.FU_type_0::IntMult 789695 0.30% 63.15% # Type of FU issued 391system.cpu.iq.FU_type_0::IntDiv 7037932 2.71% 65.86% # Type of FU issued 392system.cpu.iq.FU_type_0::FloatAdd 1186383 0.46% 66.32% # Type of FU issued 393system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 66.32% # Type of FU issued 394system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 66.32% # Type of FU issued 395system.cpu.iq.FU_type_0::FloatMult 0 0.00% 66.32% # Type of FU issued 396system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 66.32% # Type of FU issued 397system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 66.32% # Type of FU issued --- 16 unchanged lines hidden (view full) --- 414system.cpu.iq.FU_type_0::SimdFloatMisc 0 0.00% 66.32% # Type of FU issued 415system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 66.32% # Type of FU issued 416system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 66.32% # Type of FU issued 417system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 66.32% # Type of FU issued 418system.cpu.iq.FU_type_0::MemRead 64896242 25.02% 91.34% # Type of FU issued 419system.cpu.iq.FU_type_0::MemWrite 22463701 8.66% 100.00% # Type of FU issued 420system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued 421system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued |
| 422system.cpu.iq.FU_type_0::total 259397690 # Type of FU issued | 422system.cpu.iq.FU_type_0::total 259397692 # Type of FU issued |
| 423system.cpu.iq.rate 1.638833 # Inst issue rate 424system.cpu.iq.fu_busy_cnt 3176512 # FU busy when requested 425system.cpu.iq.fu_busy_rate 0.012246 # FU busy rate (busy events/executed inst) | 423system.cpu.iq.rate 1.638833 # Inst issue rate 424system.cpu.iq.fu_busy_cnt 3176512 # FU busy when requested 425system.cpu.iq.fu_busy_rate 0.012246 # FU busy rate (busy events/executed inst) |
| 426system.cpu.iq.int_inst_queue_reads 675268343 # Number of integer instruction queue reads | 426system.cpu.iq.int_inst_queue_reads 675268347 # Number of integer instruction queue reads |
| 427system.cpu.iq.int_inst_queue_writes 410944123 # Number of integer instruction queue writes | 427system.cpu.iq.int_inst_queue_writes 410944123 # Number of integer instruction queue writes |
| 428system.cpu.iq.int_inst_queue_wakeup_accesses 253662317 # Number of integer instruction queue wakeup accesses | 428system.cpu.iq.int_inst_queue_wakeup_accesses 253662320 # Number of integer instruction queue wakeup accesses |
| 429system.cpu.iq.fp_inst_queue_reads 4854669 # Number of floating instruction queue reads 430system.cpu.iq.fp_inst_queue_writes 3693735 # Number of floating instruction queue writes 431system.cpu.iq.fp_inst_queue_wakeup_accesses 2339703 # Number of floating instruction queue wakeup accesses | 429system.cpu.iq.fp_inst_queue_reads 4854669 # Number of floating instruction queue reads 430system.cpu.iq.fp_inst_queue_writes 3693735 # Number of floating instruction queue writes 431system.cpu.iq.fp_inst_queue_wakeup_accesses 2339703 # Number of floating instruction queue wakeup accesses |
| 432system.cpu.iq.int_alu_accesses 258916834 # Number of integer alu accesses | 432system.cpu.iq.int_alu_accesses 258916836 # Number of integer alu accesses |
| 433system.cpu.iq.fp_alu_accesses 2444611 # Number of floating point alu accesses 434system.cpu.iew.lsq.thread0.forwLoads 18724074 # Number of loads that had data forwarded from stores 435system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address | 433system.cpu.iq.fp_alu_accesses 2444611 # Number of floating point alu accesses 434system.cpu.iew.lsq.thread0.forwLoads 18724074 # Number of loads that had data forwarded from stores 435system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address |
| 436system.cpu.iew.lsq.thread0.squashedLoads 26137805 # Number of loads squashed | 436system.cpu.iew.lsq.thread0.squashedLoads 26137804 # Number of loads squashed |
| 437system.cpu.iew.lsq.thread0.ignoredResponses 13130 # Number of memory responses ignored because the instruction is squashed 438system.cpu.iew.lsq.thread0.memOrderViolation 303242 # Number of memory ordering violations 439system.cpu.iew.lsq.thread0.squashedStores 9274971 # Number of stores squashed 440system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address 441system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding 442system.cpu.iew.lsq.thread0.rescheduledLoads 49888 # Number of loads that were rescheduled 443system.cpu.iew.lsq.thread0.cacheBlocked 39 # Number of times an access to memory failed due to the cache being blocked 444system.cpu.iew.iewIdleCycles 0 # Number of cycles IEW is idle 445system.cpu.iew.iewSquashCycles 1598100 # Number of cycles IEW is squashing 446system.cpu.iew.iewBlockCycles 12496396 # Number of cycles IEW is blocking 447system.cpu.iew.iewUnblockCycles 489060 # Number of cycles IEW is unblocking 448system.cpu.iew.iewDispatchedInsts 317852238 # Number of instructions dispatched to IQ 449system.cpu.iew.iewDispSquashedInsts 92568 # Number of squashed instructions skipped by dispatch | 437system.cpu.iew.lsq.thread0.ignoredResponses 13130 # Number of memory responses ignored because the instruction is squashed 438system.cpu.iew.lsq.thread0.memOrderViolation 303242 # Number of memory ordering violations 439system.cpu.iew.lsq.thread0.squashedStores 9274971 # Number of stores squashed 440system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address 441system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding 442system.cpu.iew.lsq.thread0.rescheduledLoads 49888 # Number of loads that were rescheduled 443system.cpu.iew.lsq.thread0.cacheBlocked 39 # Number of times an access to memory failed due to the cache being blocked 444system.cpu.iew.iewIdleCycles 0 # Number of cycles IEW is idle 445system.cpu.iew.iewSquashCycles 1598100 # Number of cycles IEW is squashing 446system.cpu.iew.iewBlockCycles 12496396 # Number of cycles IEW is blocking 447system.cpu.iew.iewUnblockCycles 489060 # Number of cycles IEW is unblocking 448system.cpu.iew.iewDispatchedInsts 317852238 # Number of instructions dispatched to IQ 449system.cpu.iew.iewDispSquashedInsts 92568 # Number of squashed instructions skipped by dispatch |
| 450system.cpu.iew.iewDispLoadInsts 82787392 # Number of dispatched load instructions | 450system.cpu.iew.iewDispLoadInsts 82787391 # Number of dispatched load instructions |
| 451system.cpu.iew.iewDispStoreInsts 29790688 # Number of dispatched store instructions 452system.cpu.iew.iewDispNonSpecInsts 2962 # Number of dispatched non-speculative instructions 453system.cpu.iew.iewIQFullEvents 383739 # Number of times the IQ has become full, causing a stall 454system.cpu.iew.iewLSQFullEvents 63074 # Number of times the LSQ has become full, causing a stall 455system.cpu.iew.memOrderViolationEvents 303242 # Number of memory order violations 456system.cpu.iew.predictedTakenIncorrect 551670 # Number of branches that were predicted taken incorrectly 457system.cpu.iew.predictedNotTakenIncorrect 826736 # Number of branches that were predicted not taken incorrectly 458system.cpu.iew.branchMispredicts 1378406 # Number of branch mispredicts detected at execute | 451system.cpu.iew.iewDispStoreInsts 29790688 # Number of dispatched store instructions 452system.cpu.iew.iewDispNonSpecInsts 2962 # Number of dispatched non-speculative instructions 453system.cpu.iew.iewIQFullEvents 383739 # Number of times the IQ has become full, causing a stall 454system.cpu.iew.iewLSQFullEvents 63074 # Number of times the LSQ has become full, causing a stall 455system.cpu.iew.memOrderViolationEvents 303242 # Number of memory order violations 456system.cpu.iew.predictedTakenIncorrect 551670 # Number of branches that were predicted taken incorrectly 457system.cpu.iew.predictedNotTakenIncorrect 826736 # Number of branches that were predicted not taken incorrectly 458system.cpu.iew.branchMispredicts 1378406 # Number of branch mispredicts detected at execute |
| 459system.cpu.iew.iewExecutedInsts 257339860 # Number of executed instructions | 459system.cpu.iew.iewExecutedInsts 257339863 # Number of executed instructions |
| 460system.cpu.iew.iewExecLoadInsts 64084690 # Number of load instructions executed | 460system.cpu.iew.iewExecLoadInsts 64084690 # Number of load instructions executed |
| 461system.cpu.iew.iewExecSquashedInsts 2057830 # Number of squashed instructions skipped in execute | 461system.cpu.iew.iewExecSquashedInsts 2057829 # Number of squashed instructions skipped in execute |
| 462system.cpu.iew.exec_swp 0 # number of swp insts executed 463system.cpu.iew.exec_nop 0 # number of nop insts executed | 462system.cpu.iew.exec_swp 0 # number of swp insts executed 463system.cpu.iew.exec_nop 0 # number of nop insts executed |
| 464system.cpu.iew.exec_refs 86369701 # number of memory reference insts executed | 464system.cpu.iew.exec_refs 86369702 # number of memory reference insts executed |
| 465system.cpu.iew.exec_branches 14330688 # Number of branches executed | 465system.cpu.iew.exec_branches 14330688 # Number of branches executed |
| 466system.cpu.iew.exec_stores 22285011 # Number of stores executed | 466system.cpu.iew.exec_stores 22285012 # Number of stores executed |
| 467system.cpu.iew.exec_rate 1.625832 # Inst execution rate | 467system.cpu.iew.exec_rate 1.625832 # Inst execution rate |
| 468system.cpu.iew.wb_sent 256690834 # cumulative count of insts sent to commit 469system.cpu.iew.wb_count 256002020 # cumulative count of insts written-back | 468system.cpu.iew.wb_sent 256690837 # cumulative count of insts sent to commit 469system.cpu.iew.wb_count 256002023 # cumulative count of insts written-back |
| 470system.cpu.iew.wb_producers 204396158 # num instructions producing a value | 470system.cpu.iew.wb_producers 204396158 # num instructions producing a value |
| 471system.cpu.iew.wb_consumers 369708067 # num instructions consuming a value | 471system.cpu.iew.wb_consumers 369708068 # num instructions consuming a value |
| 472system.cpu.iew.wb_rate 1.617380 # insts written-back per cycle 473system.cpu.iew.wb_fanout 0.552858 # average fanout of values written-back 474system.cpu.commit.commitSquashedInsts 96496531 # The number of squashed insts skipped by commit 475system.cpu.commit.commitNonSpecStalls 1245 # The number of times commit has been forced to stall to communicate backwards 476system.cpu.commit.branchMispredicts 1330625 # The number of times a branch was mispredicted 477system.cpu.commit.committed_per_cycle::samples 144920748 # Number of insts commited each cycle 478system.cpu.commit.committed_per_cycle::mean 1.527479 # Number of insts commited each cycle 479system.cpu.commit.committed_per_cycle::stdev 1.956907 # Number of insts commited each cycle --- 62 unchanged lines hidden (view full) --- 542system.cpu.timesIdled 2665 # Number of times that the entire CPU went into an idle state and unscheduled itself 543system.cpu.idleCycles 205284 # Total number of cycles that the CPU has spent unscheduled due to idling 544system.cpu.committedInsts 132071192 # Number of Instructions Simulated 545system.cpu.committedOps 221363384 # Number of Ops (including micro ops) Simulated 546system.cpu.cpi 1.198459 # CPI: Cycles Per Instruction 547system.cpu.cpi_total 1.198459 # CPI: Total CPI of All Threads 548system.cpu.ipc 0.834405 # IPC: Instructions Per Cycle 549system.cpu.ipc_total 0.834405 # IPC: Total IPC of All Threads | 472system.cpu.iew.wb_rate 1.617380 # insts written-back per cycle 473system.cpu.iew.wb_fanout 0.552858 # average fanout of values written-back 474system.cpu.commit.commitSquashedInsts 96496531 # The number of squashed insts skipped by commit 475system.cpu.commit.commitNonSpecStalls 1245 # The number of times commit has been forced to stall to communicate backwards 476system.cpu.commit.branchMispredicts 1330625 # The number of times a branch was mispredicted 477system.cpu.commit.committed_per_cycle::samples 144920748 # Number of insts commited each cycle 478system.cpu.commit.committed_per_cycle::mean 1.527479 # Number of insts commited each cycle 479system.cpu.commit.committed_per_cycle::stdev 1.956907 # Number of insts commited each cycle --- 62 unchanged lines hidden (view full) --- 542system.cpu.timesIdled 2665 # Number of times that the entire CPU went into an idle state and unscheduled itself 543system.cpu.idleCycles 205284 # Total number of cycles that the CPU has spent unscheduled due to idling 544system.cpu.committedInsts 132071192 # Number of Instructions Simulated 545system.cpu.committedOps 221363384 # Number of Ops (including micro ops) Simulated 546system.cpu.cpi 1.198459 # CPI: Cycles Per Instruction 547system.cpu.cpi_total 1.198459 # CPI: Total CPI of All Threads 548system.cpu.ipc 0.834405 # IPC: Instructions Per Cycle 549system.cpu.ipc_total 0.834405 # IPC: Total IPC of All Threads |
| 550system.cpu.int_regfile_reads 448575235 # number of integer regfile reads | 550system.cpu.int_regfile_reads 448575238 # number of integer regfile reads |
| 551system.cpu.int_regfile_writes 232602901 # number of integer regfile writes 552system.cpu.fp_regfile_reads 3212636 # number of floating regfile reads 553system.cpu.fp_regfile_writes 1997796 # number of floating regfile writes 554system.cpu.cc_regfile_reads 102540240 # number of cc regfile reads 555system.cpu.cc_regfile_writes 59516414 # number of cc regfile writes | 551system.cpu.int_regfile_writes 232602901 # number of integer regfile writes 552system.cpu.fp_regfile_reads 3212636 # number of floating regfile reads 553system.cpu.fp_regfile_writes 1997796 # number of floating regfile writes 554system.cpu.cc_regfile_reads 102540240 # number of cc regfile reads 555system.cpu.cc_regfile_writes 59516414 # number of cc regfile writes |
| 556system.cpu.misc_regfile_reads 132474844 # number of misc regfile reads | 556system.cpu.misc_regfile_reads 132474845 # number of misc regfile reads |
| 557system.cpu.misc_regfile_writes 1689 # number of misc regfile writes 558system.cpu.dcache.tags.replacements 51 # number of replacements 559system.cpu.dcache.tags.tagsinuse 1429.115986 # Cycle average of tags in use 560system.cpu.dcache.tags.total_refs 65747317 # Total number of references to valid blocks. 561system.cpu.dcache.tags.sampled_refs 1995 # Sample count of references to valid blocks. 562system.cpu.dcache.tags.avg_refs 32956.048622 # Average number of references to valid blocks. 563system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 564system.cpu.dcache.tags.occ_blocks::cpu.data 1429.115986 # Average occupied blocks per requestor --- 448 unchanged lines hidden --- | 557system.cpu.misc_regfile_writes 1689 # number of misc regfile writes 558system.cpu.dcache.tags.replacements 51 # number of replacements 559system.cpu.dcache.tags.tagsinuse 1429.115986 # Cycle average of tags in use 560system.cpu.dcache.tags.total_refs 65747317 # Total number of references to valid blocks. 561system.cpu.dcache.tags.sampled_refs 1995 # Sample count of references to valid blocks. 562system.cpu.dcache.tags.avg_refs 32956.048622 # Average number of references to valid blocks. 563system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 564system.cpu.dcache.tags.occ_blocks::cpu.data 1429.115986 # Average occupied blocks per requestor --- 448 unchanged lines hidden --- |