1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
--- 6 unchanged lines hidden (view full) ---
15cache_line_size=64
16clk_domain=system.clk_domain
17default_p_state=UNDEFINED
18eventq_index=0
19exit_on_work_items=false
20init_param=0
21kernel=
22kernel_addr_check=true
23load_addr_mask=1099511627775
24load_offset=0
25mem_mode=timing
26mem_ranges=
27memories=system.physmem
28mmap_using_noreserve=false
29multi_thread=false
30num_work_ids=16
--- 29 unchanged lines hidden (view full) ---
60LQEntries=32
61LSQCheckLoads=true
62LSQDepCheckShift=4
63SQEntries=32
64SSITSize=1024
65activity=0
66backComSize=5
67branchPred=system.cpu.branchPred
68cachePorts=200
69checker=Null
70clk_domain=system.cpu_clk_domain
71commitToDecodeDelay=1
72commitToFetchDelay=1
73commitToIEWDelay=1
74commitToRenameDelay=1
75commitWidth=8
76cpu_id=0
--- 57 unchanged lines hidden (view full) ---
134smtLSQThreshold=100
135smtNumFetchingThreads=1
136smtROBPolicy=Partitioned
137smtROBThreshold=100
138socket_id=0
139squashWidth=8
140store_set_clear_period=250000
141switched_out=false
142system=system
143tracer=system.cpu.tracer
144trapLatency=13
145wbWidth=8
146workload=system.cpu.workload
147dcache_port=system.cpu.dcache.cpu_side
148icache_port=system.cpu.icache.cpu_side
149
--- 28 unchanged lines hidden (view full) ---
178
179[system.cpu.dcache]
180type=Cache
181children=tags
182addr_ranges=0:18446744073709551615:0:0:0:0
183assoc=2
184clk_domain=system.cpu_clk_domain
185clusivity=mostly_incl
186default_p_state=UNDEFINED
187demand_mshr_reserve=1
188eventq_index=0
189hit_latency=2
190is_read_only=false
191max_miss_count=0
192mshrs=4
193p_state_clk_gate_bins=20
194p_state_clk_gate_max=1000000000000
195p_state_clk_gate_min=1000
196power_model=Null
197prefetch_on_access=false
198prefetcher=Null
199response_latency=2
200sequential_access=false
201size=262144
202system=system
203tags=system.cpu.dcache.tags
204tgts_per_mshr=20
205write_buffers=8
206writeback_clean=false
207cpu_side=system.cpu.dcache_port
208mem_side=system.cpu.toL2Bus.slave[1]
209
210[system.cpu.dcache.tags]
211type=LRU
212assoc=2
213block_size=64
214clk_domain=system.cpu_clk_domain
215default_p_state=UNDEFINED
216eventq_index=0
217hit_latency=2
218p_state_clk_gate_bins=20
219p_state_clk_gate_max=1000000000000
220p_state_clk_gate_min=1000
221power_model=Null
222sequential_access=false
223size=262144
224
225[system.cpu.dtb]
226type=X86TLB
227children=walker
228eventq_index=0
229size=64
230walker=system.cpu.dtb.walker
231
--- 76 unchanged lines hidden (view full) ---
308type=OpDesc
309eventq_index=0
310opClass=FloatCvt
311opLat=2
312pipelined=true
313
314[system.cpu.fuPool.FUList3]
315type=FUDesc
316children=opList0 opList1 opList2
317count=2
318eventq_index=0
319opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
320
321[system.cpu.fuPool.FUList3.opList0]
322type=OpDesc
323eventq_index=0
324opClass=FloatMult
325opLat=4
326pipelined=true
327
328[system.cpu.fuPool.FUList3.opList1]
329type=OpDesc
330eventq_index=0
331opClass=FloatDiv
332opLat=12
333pipelined=false
334
335[system.cpu.fuPool.FUList3.opList2]
336type=OpDesc
337eventq_index=0
338opClass=FloatSqrt
339opLat=24
340pipelined=false
341
342[system.cpu.fuPool.FUList4]
343type=FUDesc
344children=opList
345count=0
346eventq_index=0
347opList=system.cpu.fuPool.FUList4.opList
348
349[system.cpu.fuPool.FUList4.opList]
350type=OpDesc
351eventq_index=0
352opClass=MemRead
353opLat=1
354pipelined=true
355
356[system.cpu.fuPool.FUList5]
357type=FUDesc
358children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
359count=4
360eventq_index=0
361opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
362
363[system.cpu.fuPool.FUList5.opList00]
--- 133 unchanged lines hidden (view full) ---
497type=OpDesc
498eventq_index=0
499opClass=SimdFloatSqrt
500opLat=1
501pipelined=true
502
503[system.cpu.fuPool.FUList6]
504type=FUDesc
505children=opList
506count=0
507eventq_index=0
508opList=system.cpu.fuPool.FUList6.opList
509
510[system.cpu.fuPool.FUList6.opList]
511type=OpDesc
512eventq_index=0
513opClass=MemWrite
514opLat=1
515pipelined=true
516
517[system.cpu.fuPool.FUList7]
518type=FUDesc
519children=opList0 opList1
520count=4
521eventq_index=0
522opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
523
524[system.cpu.fuPool.FUList7.opList0]
525type=OpDesc
526eventq_index=0
527opClass=MemRead
528opLat=1
529pipelined=true
530
531[system.cpu.fuPool.FUList7.opList1]
532type=OpDesc
533eventq_index=0
534opClass=MemWrite
535opLat=1
536pipelined=true
537
538[system.cpu.fuPool.FUList8]
539type=FUDesc
540children=opList
541count=1
542eventq_index=0
543opList=system.cpu.fuPool.FUList8.opList
544
545[system.cpu.fuPool.FUList8.opList]
--- 5 unchanged lines hidden (view full) ---
551
552[system.cpu.icache]
553type=Cache
554children=tags
555addr_ranges=0:18446744073709551615:0:0:0:0
556assoc=2
557clk_domain=system.cpu_clk_domain
558clusivity=mostly_incl
559default_p_state=UNDEFINED
560demand_mshr_reserve=1
561eventq_index=0
562hit_latency=2
563is_read_only=true
564max_miss_count=0
565mshrs=4
566p_state_clk_gate_bins=20
567p_state_clk_gate_max=1000000000000
568p_state_clk_gate_min=1000
569power_model=Null
570prefetch_on_access=false
571prefetcher=Null
572response_latency=2
573sequential_access=false
574size=131072
575system=system
576tags=system.cpu.icache.tags
577tgts_per_mshr=20
578write_buffers=8
579writeback_clean=true
580cpu_side=system.cpu.icache_port
581mem_side=system.cpu.toL2Bus.slave[0]
582
583[system.cpu.icache.tags]
584type=LRU
585assoc=2
586block_size=64
587clk_domain=system.cpu_clk_domain
588default_p_state=UNDEFINED
589eventq_index=0
590hit_latency=2
591p_state_clk_gate_bins=20
592p_state_clk_gate_max=1000000000000
593p_state_clk_gate_min=1000
594power_model=Null
595sequential_access=false
596size=131072
597
598[system.cpu.interrupts]
599type=X86LocalApic
600clk_domain=system.cpu.apic_clk_domain
601default_p_state=UNDEFINED
602eventq_index=0
603int_latency=1000
604p_state_clk_gate_bins=20
--- 33 unchanged lines hidden (view full) ---
638
639[system.cpu.l2cache]
640type=Cache
641children=tags
642addr_ranges=0:18446744073709551615:0:0:0:0
643assoc=8
644clk_domain=system.cpu_clk_domain
645clusivity=mostly_incl
646default_p_state=UNDEFINED
647demand_mshr_reserve=1
648eventq_index=0
649hit_latency=20
650is_read_only=false
651max_miss_count=0
652mshrs=20
653p_state_clk_gate_bins=20
654p_state_clk_gate_max=1000000000000
655p_state_clk_gate_min=1000
656power_model=Null
657prefetch_on_access=false
658prefetcher=Null
659response_latency=20
660sequential_access=false
661size=2097152
662system=system
663tags=system.cpu.l2cache.tags
664tgts_per_mshr=12
665write_buffers=8
666writeback_clean=false
667cpu_side=system.cpu.toL2Bus.master[0]
668mem_side=system.membus.slave[1]
669
670[system.cpu.l2cache.tags]
671type=LRU
672assoc=8
673block_size=64
674clk_domain=system.cpu_clk_domain
675default_p_state=UNDEFINED
676eventq_index=0
677hit_latency=20
678p_state_clk_gate_bins=20
679p_state_clk_gate_max=1000000000000
680p_state_clk_gate_min=1000
681power_model=Null
682sequential_access=false
683size=2097152
684
685[system.cpu.toL2Bus]
686type=CoherentXBar
687children=snoop_filter
688clk_domain=system.cpu_clk_domain
689default_p_state=UNDEFINED
690eventq_index=0
691forward_latency=0
--- 19 unchanged lines hidden (view full) ---
711max_capacity=8388608
712system=system
713
714[system.cpu.tracer]
715type=ExeTracer
716eventq_index=0
717
718[system.cpu.workload]
719type=LiveProcess
720cmd=twolf smred
721cwd=build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing
722drivers=
723egid=100
724env=
725errout=cerr
726euid=100
727eventq_index=0
728executable=/arm/projectscratch/randd/systems/dist/cpu2000/binaries/x86/linux/twolf
729gid=100
730input=cin
731kvmInSE=false
732max_stack_size=67108864
733output=cout
734pid=100
735ppid=99
736simpoint=0
737system=system
738uid=100
739useArchPT=false
740
741[system.cpu_clk_domain]
742type=SrcClockDomain
743clock=500
--- 130 unchanged lines hidden ---
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
--- 6 unchanged lines hidden (view full) ---
15cache_line_size=64
16clk_domain=system.clk_domain
17default_p_state=UNDEFINED
18eventq_index=0
19exit_on_work_items=false
20init_param=0
21kernel=
22kernel_addr_check=true
23load_addr_mask=1099511627775
24load_offset=0
25mem_mode=timing
26mem_ranges=
27memories=system.physmem
28mmap_using_noreserve=false
29multi_thread=false
30num_work_ids=16
--- 29 unchanged lines hidden (view full) ---
60LQEntries=32
61LSQCheckLoads=true
62LSQDepCheckShift=4
63SQEntries=32
64SSITSize=1024
65activity=0
66backComSize=5
67branchPred=system.cpu.branchPred
68cachePorts=200
69checker=Null
70clk_domain=system.cpu_clk_domain
71commitToDecodeDelay=1
72commitToFetchDelay=1
73commitToIEWDelay=1
74commitToRenameDelay=1
75commitWidth=8
76cpu_id=0
--- 57 unchanged lines hidden (view full) ---
134smtLSQThreshold=100
135smtNumFetchingThreads=1
136smtROBPolicy=Partitioned
137smtROBThreshold=100
138socket_id=0
139squashWidth=8
140store_set_clear_period=250000
141switched_out=false
142system=system
143tracer=system.cpu.tracer
144trapLatency=13
145wbWidth=8
146workload=system.cpu.workload
147dcache_port=system.cpu.dcache.cpu_side
148icache_port=system.cpu.icache.cpu_side
149
--- 28 unchanged lines hidden (view full) ---
178
179[system.cpu.dcache]
180type=Cache
181children=tags
182addr_ranges=0:18446744073709551615:0:0:0:0
183assoc=2
184clk_domain=system.cpu_clk_domain
185clusivity=mostly_incl
186default_p_state=UNDEFINED
187demand_mshr_reserve=1
188eventq_index=0
189hit_latency=2
190is_read_only=false
191max_miss_count=0
192mshrs=4
193p_state_clk_gate_bins=20
194p_state_clk_gate_max=1000000000000
195p_state_clk_gate_min=1000
196power_model=Null
197prefetch_on_access=false
198prefetcher=Null
199response_latency=2
200sequential_access=false
201size=262144
202system=system
203tags=system.cpu.dcache.tags
204tgts_per_mshr=20
205write_buffers=8
206writeback_clean=false
207cpu_side=system.cpu.dcache_port
208mem_side=system.cpu.toL2Bus.slave[1]
209
210[system.cpu.dcache.tags]
211type=LRU
212assoc=2
213block_size=64
214clk_domain=system.cpu_clk_domain
215default_p_state=UNDEFINED
216eventq_index=0
217hit_latency=2
218p_state_clk_gate_bins=20
219p_state_clk_gate_max=1000000000000
220p_state_clk_gate_min=1000
221power_model=Null
222sequential_access=false
223size=262144
224
225[system.cpu.dtb]
226type=X86TLB
227children=walker
228eventq_index=0
229size=64
230walker=system.cpu.dtb.walker
231
--- 76 unchanged lines hidden (view full) ---
308type=OpDesc
309eventq_index=0
310opClass=FloatCvt
311opLat=2
312pipelined=true
313
314[system.cpu.fuPool.FUList3]
315type=FUDesc
316children=opList0 opList1 opList2
317count=2
318eventq_index=0
319opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
320
321[system.cpu.fuPool.FUList3.opList0]
322type=OpDesc
323eventq_index=0
324opClass=FloatMult
325opLat=4
326pipelined=true
327
328[system.cpu.fuPool.FUList3.opList1]
329type=OpDesc
330eventq_index=0
331opClass=FloatDiv
332opLat=12
333pipelined=false
334
335[system.cpu.fuPool.FUList3.opList2]
336type=OpDesc
337eventq_index=0
338opClass=FloatSqrt
339opLat=24
340pipelined=false
341
342[system.cpu.fuPool.FUList4]
343type=FUDesc
344children=opList
345count=0
346eventq_index=0
347opList=system.cpu.fuPool.FUList4.opList
348
349[system.cpu.fuPool.FUList4.opList]
350type=OpDesc
351eventq_index=0
352opClass=MemRead
353opLat=1
354pipelined=true
355
356[system.cpu.fuPool.FUList5]
357type=FUDesc
358children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
359count=4
360eventq_index=0
361opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
362
363[system.cpu.fuPool.FUList5.opList00]
--- 133 unchanged lines hidden (view full) ---
497type=OpDesc
498eventq_index=0
499opClass=SimdFloatSqrt
500opLat=1
501pipelined=true
502
503[system.cpu.fuPool.FUList6]
504type=FUDesc
505children=opList
506count=0
507eventq_index=0
508opList=system.cpu.fuPool.FUList6.opList
509
510[system.cpu.fuPool.FUList6.opList]
511type=OpDesc
512eventq_index=0
513opClass=MemWrite
514opLat=1
515pipelined=true
516
517[system.cpu.fuPool.FUList7]
518type=FUDesc
519children=opList0 opList1
520count=4
521eventq_index=0
522opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
523
524[system.cpu.fuPool.FUList7.opList0]
525type=OpDesc
526eventq_index=0
527opClass=MemRead
528opLat=1
529pipelined=true
530
531[system.cpu.fuPool.FUList7.opList1]
532type=OpDesc
533eventq_index=0
534opClass=MemWrite
535opLat=1
536pipelined=true
537
538[system.cpu.fuPool.FUList8]
539type=FUDesc
540children=opList
541count=1
542eventq_index=0
543opList=system.cpu.fuPool.FUList8.opList
544
545[system.cpu.fuPool.FUList8.opList]
--- 5 unchanged lines hidden (view full) ---
551
552[system.cpu.icache]
553type=Cache
554children=tags
555addr_ranges=0:18446744073709551615:0:0:0:0
556assoc=2
557clk_domain=system.cpu_clk_domain
558clusivity=mostly_incl
559default_p_state=UNDEFINED
560demand_mshr_reserve=1
561eventq_index=0
562hit_latency=2
563is_read_only=true
564max_miss_count=0
565mshrs=4
566p_state_clk_gate_bins=20
567p_state_clk_gate_max=1000000000000
568p_state_clk_gate_min=1000
569power_model=Null
570prefetch_on_access=false
571prefetcher=Null
572response_latency=2
573sequential_access=false
574size=131072
575system=system
576tags=system.cpu.icache.tags
577tgts_per_mshr=20
578write_buffers=8
579writeback_clean=true
580cpu_side=system.cpu.icache_port
581mem_side=system.cpu.toL2Bus.slave[0]
582
583[system.cpu.icache.tags]
584type=LRU
585assoc=2
586block_size=64
587clk_domain=system.cpu_clk_domain
588default_p_state=UNDEFINED
589eventq_index=0
590hit_latency=2
591p_state_clk_gate_bins=20
592p_state_clk_gate_max=1000000000000
593p_state_clk_gate_min=1000
594power_model=Null
595sequential_access=false
596size=131072
597
598[system.cpu.interrupts]
599type=X86LocalApic
600clk_domain=system.cpu.apic_clk_domain
601default_p_state=UNDEFINED
602eventq_index=0
603int_latency=1000
604p_state_clk_gate_bins=20
--- 33 unchanged lines hidden (view full) ---
638
639[system.cpu.l2cache]
640type=Cache
641children=tags
642addr_ranges=0:18446744073709551615:0:0:0:0
643assoc=8
644clk_domain=system.cpu_clk_domain
645clusivity=mostly_incl
646default_p_state=UNDEFINED
647demand_mshr_reserve=1
648eventq_index=0
649hit_latency=20
650is_read_only=false
651max_miss_count=0
652mshrs=20
653p_state_clk_gate_bins=20
654p_state_clk_gate_max=1000000000000
655p_state_clk_gate_min=1000
656power_model=Null
657prefetch_on_access=false
658prefetcher=Null
659response_latency=20
660sequential_access=false
661size=2097152
662system=system
663tags=system.cpu.l2cache.tags
664tgts_per_mshr=12
665write_buffers=8
666writeback_clean=false
667cpu_side=system.cpu.toL2Bus.master[0]
668mem_side=system.membus.slave[1]
669
670[system.cpu.l2cache.tags]
671type=LRU
672assoc=8
673block_size=64
674clk_domain=system.cpu_clk_domain
675default_p_state=UNDEFINED
676eventq_index=0
677hit_latency=20
678p_state_clk_gate_bins=20
679p_state_clk_gate_max=1000000000000
680p_state_clk_gate_min=1000
681power_model=Null
682sequential_access=false
683size=2097152
684
685[system.cpu.toL2Bus]
686type=CoherentXBar
687children=snoop_filter
688clk_domain=system.cpu_clk_domain
689default_p_state=UNDEFINED
690eventq_index=0
691forward_latency=0
--- 19 unchanged lines hidden (view full) ---
711max_capacity=8388608
712system=system
713
714[system.cpu.tracer]
715type=ExeTracer
716eventq_index=0
717
718[system.cpu.workload]
719type=LiveProcess
720cmd=twolf smred
721cwd=build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing
722drivers=
723egid=100
724env=
725errout=cerr
726euid=100
727eventq_index=0
728executable=/arm/projectscratch/randd/systems/dist/cpu2000/binaries/x86/linux/twolf
729gid=100
730input=cin
731kvmInSE=false
732max_stack_size=67108864
733output=cout
734pid=100
735ppid=99
736simpoint=0
737system=system
738uid=100
739useArchPT=false
740
741[system.cpu_clk_domain]
742type=SrcClockDomain
743clock=500
--- 130 unchanged lines hidden ---