| stats.txt (9797:9cd5f91e7a79) | stats.txt (9838:43d22d746e7a) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.074201 # Number of seconds simulated 4sim_ticks 74201024500 # Number of ticks simulated 5final_tick 74201024500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.074201 # Number of seconds simulated 4sim_ticks 74201024500 # Number of ticks simulated 5final_tick 74201024500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 81530 # Simulator instruction rate (inst/s) 8host_op_rate 89268 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 35110326 # Simulator tick rate (ticks/s) 10host_mem_usage 249620 # Number of bytes of host memory used 11host_seconds 2113.37 # Real time elapsed on the host | 7host_inst_rate 88798 # Simulator instruction rate (inst/s) 8host_op_rate 97225 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 38240010 # Simulator tick rate (ticks/s) 10host_mem_usage 245976 # Number of bytes of host memory used 11host_seconds 1940.40 # Real time elapsed on the host |
| 12sim_insts 172303021 # Number of instructions simulated 13sim_ops 188656503 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 131328 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 111872 # Number of bytes read from this memory 16system.physmem.bytes_read::total 243200 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 131328 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 131328 # Number of instructions bytes read from this memory 19system.physmem.num_reads::cpu.inst 2052 # Number of read requests responded to by this memory 20system.physmem.num_reads::cpu.data 1748 # Number of read requests responded to by this memory 21system.physmem.num_reads::total 3800 # Number of read requests responded to by this memory 22system.physmem.bw_read::cpu.inst 1769895 # Total read bandwidth from this memory (bytes/s) 23system.physmem.bw_read::cpu.data 1507688 # Total read bandwidth from this memory (bytes/s) 24system.physmem.bw_read::total 3277583 # Total read bandwidth from this memory (bytes/s) 25system.physmem.bw_inst_read::cpu.inst 1769895 # Instruction read bandwidth from this memory (bytes/s) 26system.physmem.bw_inst_read::total 1769895 # Instruction read bandwidth from this memory (bytes/s) 27system.physmem.bw_total::cpu.inst 1769895 # Total bandwidth to/from this memory (bytes/s) 28system.physmem.bw_total::cpu.data 1507688 # Total bandwidth to/from this memory (bytes/s) 29system.physmem.bw_total::total 3277583 # Total bandwidth to/from this memory (bytes/s) | 12sim_insts 172303021 # Number of instructions simulated 13sim_ops 188656503 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 131328 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 111872 # Number of bytes read from this memory 16system.physmem.bytes_read::total 243200 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 131328 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 131328 # Number of instructions bytes read from this memory 19system.physmem.num_reads::cpu.inst 2052 # Number of read requests responded to by this memory 20system.physmem.num_reads::cpu.data 1748 # Number of read requests responded to by this memory 21system.physmem.num_reads::total 3800 # Number of read requests responded to by this memory 22system.physmem.bw_read::cpu.inst 1769895 # Total read bandwidth from this memory (bytes/s) 23system.physmem.bw_read::cpu.data 1507688 # Total read bandwidth from this memory (bytes/s) 24system.physmem.bw_read::total 3277583 # Total read bandwidth from this memory (bytes/s) 25system.physmem.bw_inst_read::cpu.inst 1769895 # Instruction read bandwidth from this memory (bytes/s) 26system.physmem.bw_inst_read::total 1769895 # Instruction read bandwidth from this memory (bytes/s) 27system.physmem.bw_total::cpu.inst 1769895 # Total bandwidth to/from this memory (bytes/s) 28system.physmem.bw_total::cpu.data 1507688 # Total bandwidth to/from this memory (bytes/s) 29system.physmem.bw_total::total 3277583 # Total bandwidth to/from this memory (bytes/s) |
| 30system.physmem.readReqs 3801 # Total number of read requests seen 31system.physmem.writeReqs 0 # Total number of write requests seen 32system.physmem.cpureqs 3803 # Reqs generatd by CPU via cache - shady | 30system.physmem.readReqs 3801 # Total number of read requests accepted by DRAM controller 31system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller 32system.physmem.readBursts 3801 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts 33system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts |
| 33system.physmem.bytesRead 243200 # Total number of bytes read from memory 34system.physmem.bytesWritten 0 # Total number of bytes written to memory 35system.physmem.bytesConsumedRd 243200 # bytesRead derated as per pkt->getSize() 36system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() | 34system.physmem.bytesRead 243200 # Total number of bytes read from memory 35system.physmem.bytesWritten 0 # Total number of bytes written to memory 36system.physmem.bytesConsumedRd 243200 # bytesRead derated as per pkt->getSize() 37system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() |
| 37system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q | 38system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q |
| 38system.physmem.neitherReadNorWrite 2 # Reqs where no action is needed 39system.physmem.perBankRdReqs::0 308 # Track reads on a per bank basis 40system.physmem.perBankRdReqs::1 215 # Track reads on a per bank basis 41system.physmem.perBankRdReqs::2 134 # Track reads on a per bank basis 42system.physmem.perBankRdReqs::3 308 # Track reads on a per bank basis 43system.physmem.perBankRdReqs::4 298 # Track reads on a per bank basis 44system.physmem.perBankRdReqs::5 300 # Track reads on a per bank basis 45system.physmem.perBankRdReqs::6 261 # Track reads on a per bank basis --- 187 unchanged lines hidden (view full) --- 233system.physmem.avgGap 19521443.30 # Average gap between requests 234system.membus.throughput 3277583 # Throughput (bytes/s) 235system.membus.trans_dist::ReadReq 2726 # Transaction distribution 236system.membus.trans_dist::ReadResp 2725 # Transaction distribution 237system.membus.trans_dist::UpgradeReq 2 # Transaction distribution 238system.membus.trans_dist::UpgradeResp 2 # Transaction distribution 239system.membus.trans_dist::ReadExReq 1075 # Transaction distribution 240system.membus.trans_dist::ReadExResp 1075 # Transaction distribution | 39system.physmem.neitherReadNorWrite 2 # Reqs where no action is needed 40system.physmem.perBankRdReqs::0 308 # Track reads on a per bank basis 41system.physmem.perBankRdReqs::1 215 # Track reads on a per bank basis 42system.physmem.perBankRdReqs::2 134 # Track reads on a per bank basis 43system.physmem.perBankRdReqs::3 308 # Track reads on a per bank basis 44system.physmem.perBankRdReqs::4 298 # Track reads on a per bank basis 45system.physmem.perBankRdReqs::5 300 # Track reads on a per bank basis 46system.physmem.perBankRdReqs::6 261 # Track reads on a per bank basis --- 187 unchanged lines hidden (view full) --- 234system.physmem.avgGap 19521443.30 # Average gap between requests 235system.membus.throughput 3277583 # Throughput (bytes/s) 236system.membus.trans_dist::ReadReq 2726 # Transaction distribution 237system.membus.trans_dist::ReadResp 2725 # Transaction distribution 238system.membus.trans_dist::UpgradeReq 2 # Transaction distribution 239system.membus.trans_dist::UpgradeResp 2 # Transaction distribution 240system.membus.trans_dist::ReadExReq 1075 # Transaction distribution 241system.membus.trans_dist::ReadExResp 1075 # Transaction distribution |
| 241system.membus.pkt_count_system.cpu.l2cache.mem_side 7605 # Packet count per connected master and slave (bytes) 242system.membus.pkt_count 7605 # Packet count per connected master and slave (bytes) 243system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 243200 # Cumulative packet size per connected master and slave (bytes) 244system.membus.tot_pkt_size 243200 # Cumulative packet size per connected master and slave (bytes) | 242system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 7605 # Packet count per connected master and slave (bytes) 243system.membus.pkt_count::total 7605 # Packet count per connected master and slave (bytes) 244system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 243200 # Cumulative packet size per connected master and slave (bytes) 245system.membus.tot_pkt_size::total 243200 # Cumulative packet size per connected master and slave (bytes) |
| 245system.membus.data_through_bus 243200 # Total data (bytes) 246system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 247system.membus.reqLayer0.occupancy 4684500 # Layer occupancy (ticks) 248system.membus.reqLayer0.utilization 0.0 # Layer utilization (%) 249system.membus.respLayer1.occupancy 35707998 # Layer occupancy (ticks) 250system.membus.respLayer1.utilization 0.0 # Layer utilization (%) 251system.cpu.branchPred.lookups 94803777 # Number of BP lookups 252system.cpu.branchPred.condPredicted 74793629 # Number of conditional branches predicted --- 313 unchanged lines hidden (view full) --- 566system.cpu.toL2Bus.throughput 5172543 # Throughput (bytes/s) 567system.cpu.toL2Bus.trans_dist::ReadReq 4897 # Transaction distribution 568system.cpu.toL2Bus.trans_dist::ReadResp 4896 # Transaction distribution 569system.cpu.toL2Bus.trans_dist::Writeback 18 # Transaction distribution 570system.cpu.toL2Bus.trans_dist::UpgradeReq 2 # Transaction distribution 571system.cpu.toL2Bus.trans_dist::UpgradeResp 2 # Transaction distribution 572system.cpu.toL2Bus.trans_dist::ReadExReq 1083 # Transaction distribution 573system.cpu.toL2Bus.trans_dist::ReadExResp 1083 # Transaction distribution | 246system.membus.data_through_bus 243200 # Total data (bytes) 247system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 248system.membus.reqLayer0.occupancy 4684500 # Layer occupancy (ticks) 249system.membus.reqLayer0.utilization 0.0 # Layer utilization (%) 250system.membus.respLayer1.occupancy 35707998 # Layer occupancy (ticks) 251system.membus.respLayer1.utilization 0.0 # Layer utilization (%) 252system.cpu.branchPred.lookups 94803777 # Number of BP lookups 253system.cpu.branchPred.condPredicted 74793629 # Number of conditional branches predicted --- 313 unchanged lines hidden (view full) --- 567system.cpu.toL2Bus.throughput 5172543 # Throughput (bytes/s) 568system.cpu.toL2Bus.trans_dist::ReadReq 4897 # Transaction distribution 569system.cpu.toL2Bus.trans_dist::ReadResp 4896 # Transaction distribution 570system.cpu.toL2Bus.trans_dist::Writeback 18 # Transaction distribution 571system.cpu.toL2Bus.trans_dist::UpgradeReq 2 # Transaction distribution 572system.cpu.toL2Bus.trans_dist::UpgradeResp 2 # Transaction distribution 573system.cpu.toL2Bus.trans_dist::ReadExReq 1083 # Transaction distribution 574system.cpu.toL2Bus.trans_dist::ReadExResp 1083 # Transaction distribution |
| 574system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 8247 # Packet count per connected master and slave (bytes) 575system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 3732 # Packet count per connected master and slave (bytes) 576system.cpu.toL2Bus.pkt_count 11979 # Packet count per connected master and slave (bytes) 577system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 263808 # Cumulative packet size per connected master and slave (bytes) 578system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 119872 # Cumulative packet size per connected master and slave (bytes) 579system.cpu.toL2Bus.tot_pkt_size 383680 # Cumulative packet size per connected master and slave (bytes) | 575system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 8247 # Packet count per connected master and slave (bytes) 576system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 3732 # Packet count per connected master and slave (bytes) 577system.cpu.toL2Bus.pkt_count::total 11979 # Packet count per connected master and slave (bytes) 578system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 263808 # Cumulative packet size per connected master and slave (bytes) 579system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 119872 # Cumulative packet size per connected master and slave (bytes) 580system.cpu.toL2Bus.tot_pkt_size::total 383680 # Cumulative packet size per connected master and slave (bytes) |
| 580system.cpu.toL2Bus.data_through_bus 383680 # Total data (bytes) 581system.cpu.toL2Bus.snoop_data_through_bus 128 # Total snoop data (bytes) 582system.cpu.toL2Bus.reqLayer0.occupancy 3018000 # Layer occupancy (ticks) 583system.cpu.toL2Bus.reqLayer0.utilization 0.0 # Layer utilization (%) 584system.cpu.toL2Bus.respLayer0.occupancy 6609745 # Layer occupancy (ticks) 585system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 586system.cpu.toL2Bus.respLayer1.occupancy 3106490 # Layer occupancy (ticks) 587system.cpu.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%) | 581system.cpu.toL2Bus.data_through_bus 383680 # Total data (bytes) 582system.cpu.toL2Bus.snoop_data_through_bus 128 # Total snoop data (bytes) 583system.cpu.toL2Bus.reqLayer0.occupancy 3018000 # Layer occupancy (ticks) 584system.cpu.toL2Bus.reqLayer0.utilization 0.0 # Layer utilization (%) 585system.cpu.toL2Bus.respLayer0.occupancy 6609745 # Layer occupancy (ticks) 586system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 587system.cpu.toL2Bus.respLayer1.occupancy 3106490 # Layer occupancy (ticks) 588system.cpu.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%) |
| 588system.cpu.icache.tags.replacements 2391 # number of replacements 589system.cpu.icache.tags.tagsinuse 1346.456608 # Cycle average of tags in use 590system.cpu.icache.tags.total_refs 36834377 # Total number of references to valid blocks. 591system.cpu.icache.tags.sampled_refs 4122 # Sample count of references to valid blocks. 592system.cpu.icache.tags.avg_refs 8936.044881 # Average number of references to valid blocks. 593system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 594system.cpu.icache.tags.occ_blocks::cpu.inst 1346.456608 # Average occupied blocks per requestor 595system.cpu.icache.tags.occ_percent::cpu.inst 0.657450 # Average percentage of cache occupancy 596system.cpu.icache.tags.occ_percent::total 0.657450 # Average percentage of cache occupancy | 589system.cpu.icache.tags.replacements 2391 # number of replacements 590system.cpu.icache.tags.tagsinuse 1346.456608 # Cycle average of tags in use 591system.cpu.icache.tags.total_refs 36834377 # Total number of references to valid blocks. 592system.cpu.icache.tags.sampled_refs 4122 # Sample count of references to valid blocks. 593system.cpu.icache.tags.avg_refs 8936.044881 # Average number of references to valid blocks. 594system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 595system.cpu.icache.tags.occ_blocks::cpu.inst 1346.456608 # Average occupied blocks per requestor 596system.cpu.icache.tags.occ_percent::cpu.inst 0.657450 # Average percentage of cache occupancy 597system.cpu.icache.tags.occ_percent::total 0.657450 # Average percentage of cache occupancy |
| 597system.cpu.icache.ReadReq_hits::cpu.inst 36834377 # number of ReadReq hits 598system.cpu.icache.ReadReq_hits::total 36834377 # number of ReadReq hits 599system.cpu.icache.demand_hits::cpu.inst 36834377 # number of demand (read+write) hits 600system.cpu.icache.demand_hits::total 36834377 # number of demand (read+write) hits 601system.cpu.icache.overall_hits::cpu.inst 36834377 # number of overall hits 602system.cpu.icache.overall_hits::total 36834377 # number of overall hits 603system.cpu.icache.ReadReq_misses::cpu.inst 5330 # number of ReadReq misses 604system.cpu.icache.ReadReq_misses::total 5330 # number of ReadReq misses --- 59 unchanged lines hidden (view full) --- 664system.cpu.icache.overall_mshr_miss_rate::total 0.000112 # mshr miss rate for overall accesses 665system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 39366.607030 # average ReadReq mshr miss latency 666system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 39366.607030 # average ReadReq mshr miss latency 667system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 39366.607030 # average overall mshr miss latency 668system.cpu.icache.demand_avg_mshr_miss_latency::total 39366.607030 # average overall mshr miss latency 669system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 39366.607030 # average overall mshr miss latency 670system.cpu.icache.overall_avg_mshr_miss_latency::total 39366.607030 # average overall mshr miss latency 671system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate | 598system.cpu.icache.ReadReq_hits::cpu.inst 36834377 # number of ReadReq hits 599system.cpu.icache.ReadReq_hits::total 36834377 # number of ReadReq hits 600system.cpu.icache.demand_hits::cpu.inst 36834377 # number of demand (read+write) hits 601system.cpu.icache.demand_hits::total 36834377 # number of demand (read+write) hits 602system.cpu.icache.overall_hits::cpu.inst 36834377 # number of overall hits 603system.cpu.icache.overall_hits::total 36834377 # number of overall hits 604system.cpu.icache.ReadReq_misses::cpu.inst 5330 # number of ReadReq misses 605system.cpu.icache.ReadReq_misses::total 5330 # number of ReadReq misses --- 59 unchanged lines hidden (view full) --- 665system.cpu.icache.overall_mshr_miss_rate::total 0.000112 # mshr miss rate for overall accesses 666system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 39366.607030 # average ReadReq mshr miss latency 667system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 39366.607030 # average ReadReq mshr miss latency 668system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 39366.607030 # average overall mshr miss latency 669system.cpu.icache.demand_avg_mshr_miss_latency::total 39366.607030 # average overall mshr miss latency 670system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 39366.607030 # average overall mshr miss latency 671system.cpu.icache.overall_avg_mshr_miss_latency::total 39366.607030 # average overall mshr miss latency 672system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 672system.cpu.l2cache.tags.replacements 0 # number of replacements 673system.cpu.l2cache.tags.tagsinuse 1961.044100 # Cycle average of tags in use 674system.cpu.l2cache.tags.total_refs 2153 # Total number of references to valid blocks. 675system.cpu.l2cache.tags.sampled_refs 2735 # Sample count of references to valid blocks. 676system.cpu.l2cache.tags.avg_refs 0.787203 # Average number of references to valid blocks. 677system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. | 673system.cpu.l2cache.tags.replacements 0 # number of replacements 674system.cpu.l2cache.tags.tagsinuse 1961.044100 # Cycle average of tags in use 675system.cpu.l2cache.tags.total_refs 2153 # Total number of references to valid blocks. 676system.cpu.l2cache.tags.sampled_refs 2735 # Sample count of references to valid blocks. 677system.cpu.l2cache.tags.avg_refs 0.787203 # Average number of references to valid blocks. 678system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. |
| 678system.cpu.l2cache.tags.occ_blocks::writebacks 4.994051 # Average occupied blocks per requestor | 679system.cpu.l2cache.tags.occ_blocks::writebacks 4.994051 # Average occupied blocks per requestor |
| 679system.cpu.l2cache.tags.occ_blocks::cpu.inst 1423.034105 # Average occupied blocks per requestor 680system.cpu.l2cache.tags.occ_blocks::cpu.data 533.015945 # Average occupied blocks per requestor | 680system.cpu.l2cache.tags.occ_blocks::cpu.inst 1423.034105 # Average occupied blocks per requestor 681system.cpu.l2cache.tags.occ_blocks::cpu.data 533.015945 # Average occupied blocks per requestor |
| 681system.cpu.l2cache.tags.occ_percent::writebacks 0.000152 # Average percentage of cache occupancy 682system.cpu.l2cache.tags.occ_percent::cpu.inst 0.043428 # Average percentage of cache occupancy 683system.cpu.l2cache.tags.occ_percent::cpu.data 0.016266 # Average percentage of cache occupancy | 682system.cpu.l2cache.tags.occ_percent::writebacks 0.000152 # Average percentage of cache occupancy 683system.cpu.l2cache.tags.occ_percent::cpu.inst 0.043428 # Average percentage of cache occupancy 684system.cpu.l2cache.tags.occ_percent::cpu.data 0.016266 # Average percentage of cache occupancy |
| 684system.cpu.l2cache.tags.occ_percent::total 0.059846 # Average percentage of cache occupancy | 685system.cpu.l2cache.tags.occ_percent::total 0.059846 # Average percentage of cache occupancy |
| 685system.cpu.l2cache.ReadReq_hits::cpu.inst 2065 # number of ReadReq hits 686system.cpu.l2cache.ReadReq_hits::cpu.data 87 # number of ReadReq hits 687system.cpu.l2cache.ReadReq_hits::total 2152 # number of ReadReq hits 688system.cpu.l2cache.Writeback_hits::writebacks 18 # number of Writeback hits 689system.cpu.l2cache.Writeback_hits::total 18 # number of Writeback hits 690system.cpu.l2cache.ReadExReq_hits::cpu.data 8 # number of ReadExReq hits 691system.cpu.l2cache.ReadExReq_hits::total 8 # number of ReadExReq hits 692system.cpu.l2cache.demand_hits::cpu.inst 2065 # number of demand (read+write) hits --- 130 unchanged lines hidden (view full) --- 823system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 50782.093023 # average ReadExReq mshr miss latency 824system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 54266.682903 # average overall mshr miss latency 825system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 53045.480549 # average overall mshr miss latency 826system.cpu.l2cache.demand_avg_mshr_miss_latency::total 53705.077611 # average overall mshr miss latency 827system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54266.682903 # average overall mshr miss latency 828system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 53045.480549 # average overall mshr miss latency 829system.cpu.l2cache.overall_avg_mshr_miss_latency::total 53705.077611 # average overall mshr miss latency 830system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate | 686system.cpu.l2cache.ReadReq_hits::cpu.inst 2065 # number of ReadReq hits 687system.cpu.l2cache.ReadReq_hits::cpu.data 87 # number of ReadReq hits 688system.cpu.l2cache.ReadReq_hits::total 2152 # number of ReadReq hits 689system.cpu.l2cache.Writeback_hits::writebacks 18 # number of Writeback hits 690system.cpu.l2cache.Writeback_hits::total 18 # number of Writeback hits 691system.cpu.l2cache.ReadExReq_hits::cpu.data 8 # number of ReadExReq hits 692system.cpu.l2cache.ReadExReq_hits::total 8 # number of ReadExReq hits 693system.cpu.l2cache.demand_hits::cpu.inst 2065 # number of demand (read+write) hits --- 130 unchanged lines hidden (view full) --- 824system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 50782.093023 # average ReadExReq mshr miss latency 825system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 54266.682903 # average overall mshr miss latency 826system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 53045.480549 # average overall mshr miss latency 827system.cpu.l2cache.demand_avg_mshr_miss_latency::total 53705.077611 # average overall mshr miss latency 828system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54266.682903 # average overall mshr miss latency 829system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 53045.480549 # average overall mshr miss latency 830system.cpu.l2cache.overall_avg_mshr_miss_latency::total 53705.077611 # average overall mshr miss latency 831system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 831system.cpu.dcache.tags.replacements 57 # number of replacements 832system.cpu.dcache.tags.tagsinuse 1404.261851 # Cycle average of tags in use 833system.cpu.dcache.tags.total_refs 46798452 # Total number of references to valid blocks. 834system.cpu.dcache.tags.sampled_refs 1855 # Sample count of references to valid blocks. 835system.cpu.dcache.tags.avg_refs 25228.276011 # Average number of references to valid blocks. 836system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 837system.cpu.dcache.tags.occ_blocks::cpu.data 1404.261851 # Average occupied blocks per requestor 838system.cpu.dcache.tags.occ_percent::cpu.data 0.342837 # Average percentage of cache occupancy 839system.cpu.dcache.tags.occ_percent::total 0.342837 # Average percentage of cache occupancy | 832system.cpu.dcache.tags.replacements 57 # number of replacements 833system.cpu.dcache.tags.tagsinuse 1404.261851 # Cycle average of tags in use 834system.cpu.dcache.tags.total_refs 46798452 # Total number of references to valid blocks. 835system.cpu.dcache.tags.sampled_refs 1855 # Sample count of references to valid blocks. 836system.cpu.dcache.tags.avg_refs 25228.276011 # Average number of references to valid blocks. 837system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 838system.cpu.dcache.tags.occ_blocks::cpu.data 1404.261851 # Average occupied blocks per requestor 839system.cpu.dcache.tags.occ_percent::cpu.data 0.342837 # Average percentage of cache occupancy 840system.cpu.dcache.tags.occ_percent::total 0.342837 # Average percentage of cache occupancy |
| 840system.cpu.dcache.ReadReq_hits::cpu.data 34397014 # number of ReadReq hits 841system.cpu.dcache.ReadReq_hits::total 34397014 # number of ReadReq hits 842system.cpu.dcache.WriteReq_hits::cpu.data 12356557 # number of WriteReq hits 843system.cpu.dcache.WriteReq_hits::total 12356557 # number of WriteReq hits 844system.cpu.dcache.LoadLockedReq_hits::cpu.data 22472 # number of LoadLockedReq hits 845system.cpu.dcache.LoadLockedReq_hits::total 22472 # number of LoadLockedReq hits 846system.cpu.dcache.StoreCondReq_hits::cpu.data 22407 # number of StoreCondReq hits 847system.cpu.dcache.StoreCondReq_hits::total 22407 # number of StoreCondReq hits --- 111 unchanged lines hidden --- | 841system.cpu.dcache.ReadReq_hits::cpu.data 34397014 # number of ReadReq hits 842system.cpu.dcache.ReadReq_hits::total 34397014 # number of ReadReq hits 843system.cpu.dcache.WriteReq_hits::cpu.data 12356557 # number of WriteReq hits 844system.cpu.dcache.WriteReq_hits::total 12356557 # number of WriteReq hits 845system.cpu.dcache.LoadLockedReq_hits::cpu.data 22472 # number of LoadLockedReq hits 846system.cpu.dcache.LoadLockedReq_hits::total 22472 # number of LoadLockedReq hits 847system.cpu.dcache.StoreCondReq_hits::cpu.data 22407 # number of StoreCondReq hits 848system.cpu.dcache.StoreCondReq_hits::total 22407 # number of StoreCondReq hits --- 111 unchanged lines hidden --- |