Cross Reference: /gem5/tests/long/se/70.twolf/ref/arm/linux/minor-timing/stats.txt

Deleted Added

sdiff udiff text old ( 11680:b4d943429dc6 ) new ( 11687:b3d5f0e9e258 )

full compact

stats.txt (11680:b4d943429dc6)	stats.txt (11687:b3d5f0e9e258)
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.132539 # Number of seconds simulated 4sim_ticks 132538562500 # Number of ticks simulated 5final_tick 132538562500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks	1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.132539 # Number of seconds simulated 4sim_ticks 132538562500 # Number of ticks simulated 5final_tick 132538562500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 171463 # Simulator instruction rate (inst/s) 8host_op_rate 180750 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 131881088 # Simulator tick rate (ticks/s) 10host_mem_usage 273644 # Number of bytes of host memory used 11host_seconds 1004.99 # Real time elapsed on the host	7host_inst_rate 360845 # Simulator instruction rate (inst/s) 8host_op_rate 380389 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 277544932 # Simulator tick rate (ticks/s) 10host_mem_usage 274852 # Number of bytes of host memory used 11host_seconds 477.54 # Real time elapsed on the host
12sim_insts 172317810 # Number of instructions simulated 13sim_ops 181650743 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 132538562500 # Cumulative time (in ticks) in various power states 17system.physmem.bytes_read::cpu.inst 138240 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 109312 # Number of bytes read from this memory 19system.physmem.bytes_read::total 247552 # Number of bytes read from this memory --- 390 unchanged lines hidden (view full) --- 410system.cpu.op_class_0::No_OpClass 0 0.00% 0.00% # Class of committed instruction 411system.cpu.op_class_0::IntAlu 138988213 76.51% 76.51% # Class of committed instruction 412system.cpu.op_class_0::IntMult 908940 0.50% 77.01% # Class of committed instruction 413system.cpu.op_class_0::IntDiv 0 0.00% 77.01% # Class of committed instruction 414system.cpu.op_class_0::FloatAdd 0 0.00% 77.01% # Class of committed instruction 415system.cpu.op_class_0::FloatCmp 0 0.00% 77.01% # Class of committed instruction 416system.cpu.op_class_0::FloatCvt 0 0.00% 77.01% # Class of committed instruction 417system.cpu.op_class_0::FloatMult 0 0.00% 77.01% # Class of committed instruction	12sim_insts 172317810 # Number of instructions simulated 13sim_ops 181650743 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 132538562500 # Cumulative time (in ticks) in various power states 17system.physmem.bytes_read::cpu.inst 138240 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 109312 # Number of bytes read from this memory 19system.physmem.bytes_read::total 247552 # Number of bytes read from this memory --- 390 unchanged lines hidden (view full) --- 410system.cpu.op_class_0::No_OpClass 0 0.00% 0.00% # Class of committed instruction 411system.cpu.op_class_0::IntAlu 138988213 76.51% 76.51% # Class of committed instruction 412system.cpu.op_class_0::IntMult 908940 0.50% 77.01% # Class of committed instruction 413system.cpu.op_class_0::IntDiv 0 0.00% 77.01% # Class of committed instruction 414system.cpu.op_class_0::FloatAdd 0 0.00% 77.01% # Class of committed instruction 415system.cpu.op_class_0::FloatCmp 0 0.00% 77.01% # Class of committed instruction 416system.cpu.op_class_0::FloatCvt 0 0.00% 77.01% # Class of committed instruction 417system.cpu.op_class_0::FloatMult 0 0.00% 77.01% # Class of committed instruction
	418system.cpu.op_class_0::FloatMultAcc 0 0.00% 77.01% # Class of committed instruction
418system.cpu.op_class_0::FloatDiv 0 0.00% 77.01% # Class of committed instruction	419system.cpu.op_class_0::FloatDiv 0 0.00% 77.01% # Class of committed instruction
	420system.cpu.op_class_0::FloatMisc 0 0.00% 77.01% # Class of committed instruction
419system.cpu.op_class_0::FloatSqrt 0 0.00% 77.01% # Class of committed instruction 420system.cpu.op_class_0::SimdAdd 0 0.00% 77.01% # Class of committed instruction 421system.cpu.op_class_0::SimdAddAcc 0 0.00% 77.01% # Class of committed instruction 422system.cpu.op_class_0::SimdAlu 0 0.00% 77.01% # Class of committed instruction 423system.cpu.op_class_0::SimdCmp 0 0.00% 77.01% # Class of committed instruction 424system.cpu.op_class_0::SimdCvt 0 0.00% 77.01% # Class of committed instruction 425system.cpu.op_class_0::SimdMisc 0 0.00% 77.01% # Class of committed instruction 426system.cpu.op_class_0::SimdMult 0 0.00% 77.01% # Class of committed instruction --- 5 unchanged lines hidden (view full) --- 432system.cpu.op_class_0::SimdFloatAlu 0 0.00% 77.03% # Class of committed instruction 433system.cpu.op_class_0::SimdFloatCmp 154829 0.09% 77.12% # Class of committed instruction 434system.cpu.op_class_0::SimdFloatCvt 238880 0.13% 77.25% # Class of committed instruction 435system.cpu.op_class_0::SimdFloatDiv 76016 0.04% 77.29% # Class of committed instruction 436system.cpu.op_class_0::SimdFloatMisc 437591 0.24% 77.53% # Class of committed instruction 437system.cpu.op_class_0::SimdFloatMult 200806 0.11% 77.64% # Class of committed instruction 438system.cpu.op_class_0::SimdFloatMultAcc 71617 0.04% 77.68% # Class of committed instruction 439system.cpu.op_class_0::SimdFloatSqrt 318 0.00% 77.68% # Class of committed instruction	421system.cpu.op_class_0::FloatSqrt 0 0.00% 77.01% # Class of committed instruction 422system.cpu.op_class_0::SimdAdd 0 0.00% 77.01% # Class of committed instruction 423system.cpu.op_class_0::SimdAddAcc 0 0.00% 77.01% # Class of committed instruction 424system.cpu.op_class_0::SimdAlu 0 0.00% 77.01% # Class of committed instruction 425system.cpu.op_class_0::SimdCmp 0 0.00% 77.01% # Class of committed instruction 426system.cpu.op_class_0::SimdCvt 0 0.00% 77.01% # Class of committed instruction 427system.cpu.op_class_0::SimdMisc 0 0.00% 77.01% # Class of committed instruction 428system.cpu.op_class_0::SimdMult 0 0.00% 77.01% # Class of committed instruction --- 5 unchanged lines hidden (view full) --- 434system.cpu.op_class_0::SimdFloatAlu 0 0.00% 77.03% # Class of committed instruction 435system.cpu.op_class_0::SimdFloatCmp 154829 0.09% 77.12% # Class of committed instruction 436system.cpu.op_class_0::SimdFloatCvt 238880 0.13% 77.25% # Class of committed instruction 437system.cpu.op_class_0::SimdFloatDiv 76016 0.04% 77.29% # Class of committed instruction 438system.cpu.op_class_0::SimdFloatMisc 437591 0.24% 77.53% # Class of committed instruction 439system.cpu.op_class_0::SimdFloatMult 200806 0.11% 77.64% # Class of committed instruction 440system.cpu.op_class_0::SimdFloatMultAcc 71617 0.04% 77.68% # Class of committed instruction 441system.cpu.op_class_0::SimdFloatSqrt 318 0.00% 77.68% # Class of committed instruction
440system.cpu.op_class_0::MemRead 27896144 15.36% 93.04% # Class of committed instruction 441system.cpu.op_class_0::MemWrite 12644635 6.96% 100.00% # Class of committed instruction	442system.cpu.op_class_0::MemRead 27348059 15.06% 92.74% # Class of committed instruction 443system.cpu.op_class_0::MemWrite 12498389 6.88% 99.62% # Class of committed instruction 444system.cpu.op_class_0::FloatMemRead 548085 0.30% 99.92% # Class of committed instruction 445system.cpu.op_class_0::FloatMemWrite 146246 0.08% 100.00% # Class of committed instruction
442system.cpu.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 443system.cpu.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 444system.cpu.op_class_0::total 181650743 # Class of committed instruction 445system.cpu.tickCycles 256741537 # Number of cycles that the object actually ticked 446system.cpu.idleCycles 8335588 # Total number of cycles that the object has spent stopped 447system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 132538562500 # Cumulative time (in ticks) in various power states 448system.cpu.dcache.tags.replacements 42 # number of replacements 449system.cpu.dcache.tags.tagsinuse 1378.587934 # Cycle average of tags in use --- 464 unchanged lines hidden ---	446system.cpu.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 447system.cpu.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 448system.cpu.op_class_0::total 181650743 # Class of committed instruction 449system.cpu.tickCycles 256741537 # Number of cycles that the object actually ticked 450system.cpu.idleCycles 8335588 # Total number of cycles that the object has spent stopped 451system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 132538562500 # Cumulative time (in ticks) in various power states 452system.cpu.dcache.tags.replacements 42 # number of replacements 453system.cpu.dcache.tags.tagsinuse 1378.587934 # Cycle average of tags in use --- 464 unchanged lines hidden ---