1Redirecting stdout to build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing/simout 2Redirecting stderr to build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing/simerr
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3gem5 Simulator System. http://gem5.org 4gem5 is copyrighted software; use the --copyright option for details. 5
| 1gem5 Simulator System. http://gem5.org 2gem5 is copyrighted software; use the --copyright option for details. 3
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6gem5 compiled May 7 2014 10:57:46 7gem5 started May 7 2014 13:16:45 8gem5 executing on cz3211bhr8 9command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing -re tests/run.py build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing
| 4gem5 compiled Mar 15 2015 20:30:55 5gem5 started Mar 15 2015 20:31:14 6gem5 executing on zizzer2 7command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing -re /z/stever/hg/gem5/tests/run.py build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing
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10Couldn't unlink build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing/smred.sav 11Couldn't unlink build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing/smred.sv2 12Global frequency set at 1000000000000 ticks per second
| 8Couldn't unlink build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing/smred.sav 9Couldn't unlink build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing/smred.sv2 10Global frequency set at 1000000000000 ticks per second
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13 0: system.cpu.isa: ISA system set to: 0 0x1c024750
| 11 0: system.cpu.isa: ISA system set to: 0 0x3623b60
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14info: Entering event queue @ 0. Starting simulation... 15 16TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988 17Standard Cell Placement and Global Routing Program 18Authors: Carl Sechen, Bill Swartz 19 Yale University 20info: Increasing stack size by one page. 21 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 22 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 23 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 24 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 25 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 26 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 27 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 28106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
| 12info: Entering event queue @ 0. Starting simulation... 13 14TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988 15Standard Cell Placement and Global Routing Program 16Authors: Carl Sechen, Bill Swartz 17 Yale University 18info: Increasing stack size by one page. 19 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 20 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 21 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 22 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 23 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 24 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 25 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 26106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
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29122 123 124 Exiting @ tick 133578736500 because target called exit()
| 27122 123 124 Exiting @ tick 131756455500 because target called exit()
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