config.ini (10753:48a72150f82c) config.ini (10900:ac6617bf9967)
1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000

--- 97 unchanged lines hidden (view full) ---

106switched_out=false
107system=system
108tracer=system.cpu.tracer
109workload=system.cpu.workload
110dcache_port=system.cpu.dcache.cpu_side
111icache_port=system.cpu.icache.cpu_side
112
113[system.cpu.branchPred]
1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000

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106switched_out=false
107system=system
108tracer=system.cpu.tracer
109workload=system.cpu.workload
110dcache_port=system.cpu.dcache.cpu_side
111icache_port=system.cpu.icache.cpu_side
112
113[system.cpu.branchPred]
114type=BranchPredictor
114type=TournamentBP
115BTBEntries=4096
116BTBTagSize=16
117RASSize=16
118choiceCtrBits=2
119choicePredictorSize=8192
120eventq_index=0
121globalCtrBits=2
122globalPredictorSize=8192
123instShiftAmt=2
124localCtrBits=2
125localHistoryTableSize=2048
126localPredictorSize=2048
127numThreads=1
115BTBEntries=4096
116BTBTagSize=16
117RASSize=16
118choiceCtrBits=2
119choicePredictorSize=8192
120eventq_index=0
121globalCtrBits=2
122globalPredictorSize=8192
123instShiftAmt=2
124localCtrBits=2
125localHistoryTableSize=2048
126localPredictorSize=2048
127numThreads=1
128predType=tournament
129
130[system.cpu.dcache]
131type=BaseCache
132children=tags
133addr_ranges=0:18446744073709551615
134assoc=2
135clk_domain=system.cpu_clk_domain
136demand_mshr_reserve=1
137eventq_index=0
138forward_snoops=true
139hit_latency=2
128
129[system.cpu.dcache]
130type=BaseCache
131children=tags
132addr_ranges=0:18446744073709551615
133assoc=2
134clk_domain=system.cpu_clk_domain
135demand_mshr_reserve=1
136eventq_index=0
137forward_snoops=true
138hit_latency=2
140is_top_level=true
139is_read_only=false
141max_miss_count=0
142mshrs=4
143prefetch_on_access=false
144prefetcher=Null
145response_latency=2
146sequential_access=false
147size=262144
148system=system
149tags=system.cpu.dcache.tags
150tgts_per_mshr=20
140max_miss_count=0
141mshrs=4
142prefetch_on_access=false
143prefetcher=Null
144response_latency=2
145sequential_access=false
146size=262144
147system=system
148tags=system.cpu.dcache.tags
149tgts_per_mshr=20
151two_queue=false
152write_buffers=8
153cpu_side=system.cpu.dcache_port
154mem_side=system.cpu.toL2Bus.slave[1]
155
156[system.cpu.dcache.tags]
157type=LRU
158assoc=2
159block_size=64

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592children=tags
593addr_ranges=0:18446744073709551615
594assoc=2
595clk_domain=system.cpu_clk_domain
596demand_mshr_reserve=1
597eventq_index=0
598forward_snoops=true
599hit_latency=2
150write_buffers=8
151cpu_side=system.cpu.dcache_port
152mem_side=system.cpu.toL2Bus.slave[1]
153
154[system.cpu.dcache.tags]
155type=LRU
156assoc=2
157block_size=64

--- 432 unchanged lines hidden (view full) ---

590children=tags
591addr_ranges=0:18446744073709551615
592assoc=2
593clk_domain=system.cpu_clk_domain
594demand_mshr_reserve=1
595eventq_index=0
596forward_snoops=true
597hit_latency=2
600is_top_level=true
598is_read_only=true
601max_miss_count=0
602mshrs=4
603prefetch_on_access=false
604prefetcher=Null
605response_latency=2
606sequential_access=false
607size=131072
608system=system
609tags=system.cpu.icache.tags
610tgts_per_mshr=20
599max_miss_count=0
600mshrs=4
601prefetch_on_access=false
602prefetcher=Null
603response_latency=2
604sequential_access=false
605size=131072
606system=system
607tags=system.cpu.icache.tags
608tgts_per_mshr=20
611two_queue=false
612write_buffers=8
613cpu_side=system.cpu.icache_port
614mem_side=system.cpu.toL2Bus.slave[0]
615
616[system.cpu.icache.tags]
617type=LRU
618assoc=2
619block_size=64

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703children=tags
704addr_ranges=0:18446744073709551615
705assoc=8
706clk_domain=system.cpu_clk_domain
707demand_mshr_reserve=1
708eventq_index=0
709forward_snoops=true
710hit_latency=20
609write_buffers=8
610cpu_side=system.cpu.icache_port
611mem_side=system.cpu.toL2Bus.slave[0]
612
613[system.cpu.icache.tags]
614type=LRU
615assoc=2
616block_size=64

--- 83 unchanged lines hidden (view full) ---

700children=tags
701addr_ranges=0:18446744073709551615
702assoc=8
703clk_domain=system.cpu_clk_domain
704demand_mshr_reserve=1
705eventq_index=0
706forward_snoops=true
707hit_latency=20
711is_top_level=false
708is_read_only=false
712max_miss_count=0
713mshrs=20
714prefetch_on_access=false
715prefetcher=Null
716response_latency=20
717sequential_access=false
718size=2097152
719system=system
720tags=system.cpu.l2cache.tags
721tgts_per_mshr=12
709max_miss_count=0
710mshrs=20
711prefetch_on_access=false
712prefetcher=Null
713response_latency=20
714sequential_access=false
715size=2097152
716system=system
717tags=system.cpu.l2cache.tags
718tgts_per_mshr=12
722two_queue=false
723write_buffers=8
724cpu_side=system.cpu.toL2Bus.master[0]
725mem_side=system.membus.slave[1]
726
727[system.cpu.l2cache.tags]
728type=LRU
729assoc=8
730block_size=64

--- 161 unchanged lines hidden ---
719write_buffers=8
720cpu_side=system.cpu.toL2Bus.master[0]
721mem_side=system.membus.slave[1]
722
723[system.cpu.l2cache.tags]
724type=LRU
725assoc=8
726block_size=64

--- 161 unchanged lines hidden ---