Cross Reference: /gem5/tests/long/se/70.twolf/ref/arm/linux/minor-timing/config.ini

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config.ini (11103:38f6188421e0)	config.ini (11570:4aac82f10951)
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain	1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain
	17default_p_state=UNDEFINED
17eventq_index=0	18eventq_index=0
	19exit_on_work_items=false
18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem 26mmap_using_noreserve=false	20init_param=0 21kernel= 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges= 27memories=system.physmem 28mmap_using_noreserve=false
	29multi_thread=false
27num_work_ids=16	30num_work_ids=16
	31p_state_clk_gate_bins=20 32p_state_clk_gate_max=1000000000000 33p_state_clk_gate_min=1000 34power_model=Null
28readfile= 29symbolfile=	35readfile= 36symbolfile=
	37thermal_components= 38thermal_model=Null
30work_begin_ckpt_count=0 31work_begin_cpu_id_exit=-1 32work_begin_exit_count=0 33work_cpus_ckpt_count=0 34work_end_ckpt_count=0 35work_end_exit_count=0 36work_item_id=-1 37system_port=system.membus.slave[0] 38 39[system.clk_domain] 40type=SrcClockDomain 41clock=1000 42domain_id=-1 43eventq_index=0 44init_perf_level=0 45voltage_domain=system.voltage_domain 46 47[system.cpu] 48type=MinorCPU 49children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 50branchPred=system.cpu.branchPred 51checker=Null 52clk_domain=system.cpu_clk_domain 53cpu_id=0 54decodeCycleInput=true 55decodeInputBufferSize=3 56decodeInputWidth=2 57decodeToExecuteForwardDelay=1	39work_begin_ckpt_count=0 40work_begin_cpu_id_exit=-1 41work_begin_exit_count=0 42work_cpus_ckpt_count=0 43work_end_ckpt_count=0 44work_end_exit_count=0 45work_item_id=-1 46system_port=system.membus.slave[0] 47 48[system.clk_domain] 49type=SrcClockDomain 50clock=1000 51domain_id=-1 52eventq_index=0 53init_perf_level=0 54voltage_domain=system.voltage_domain 55 56[system.cpu] 57type=MinorCPU 58children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 59branchPred=system.cpu.branchPred 60checker=Null 61clk_domain=system.cpu_clk_domain 62cpu_id=0 63decodeCycleInput=true 64decodeInputBufferSize=3 65decodeInputWidth=2 66decodeToExecuteForwardDelay=1
	67default_p_state=UNDEFINED
58do_checkpoint_insts=true 59do_quiesce=true 60do_statistics_insts=true 61dstage2_mmu=system.cpu.dstage2_mmu 62dtb=system.cpu.dtb 63enableIdling=true 64eventq_index=0 65executeAllowEarlyMemoryIssue=true 66executeBranchDelay=1 67executeCommitLimit=2 68executeCycleInput=true 69executeFuncUnits=system.cpu.executeFuncUnits 70executeInputBufferSize=7 71executeInputWidth=2 72executeIssueLimit=2 73executeLSQMaxStoreBufferStoresPerCycle=2 74executeLSQRequestsQueueSize=1 75executeLSQStoreBufferSize=5 76executeLSQTransfersQueueSize=2 77executeMaxAccessesInMemory=2 78executeMemoryCommitLimit=1 79executeMemoryIssueLimit=1 80executeMemoryWidth=0 81executeSetTraceTimeOnCommit=true 82executeSetTraceTimeOnIssue=false 83fetch1FetchLimit=1 84fetch1LineSnapWidth=0 85fetch1LineWidth=0 86fetch1ToFetch2BackwardDelay=1 87fetch1ToFetch2ForwardDelay=1 88fetch2CycleInput=true 89fetch2InputBufferSize=2 90fetch2ToDecodeForwardDelay=1 91function_trace=false 92function_trace_start=0 93interrupts=system.cpu.interrupts 94isa=system.cpu.isa 95istage2_mmu=system.cpu.istage2_mmu 96itb=system.cpu.itb 97max_insts_all_threads=0 98max_insts_any_thread=0 99max_loads_all_threads=0 100max_loads_any_thread=0 101numThreads=1	68do_checkpoint_insts=true 69do_quiesce=true 70do_statistics_insts=true 71dstage2_mmu=system.cpu.dstage2_mmu 72dtb=system.cpu.dtb 73enableIdling=true 74eventq_index=0 75executeAllowEarlyMemoryIssue=true 76executeBranchDelay=1 77executeCommitLimit=2 78executeCycleInput=true 79executeFuncUnits=system.cpu.executeFuncUnits 80executeInputBufferSize=7 81executeInputWidth=2 82executeIssueLimit=2 83executeLSQMaxStoreBufferStoresPerCycle=2 84executeLSQRequestsQueueSize=1 85executeLSQStoreBufferSize=5 86executeLSQTransfersQueueSize=2 87executeMaxAccessesInMemory=2 88executeMemoryCommitLimit=1 89executeMemoryIssueLimit=1 90executeMemoryWidth=0 91executeSetTraceTimeOnCommit=true 92executeSetTraceTimeOnIssue=false 93fetch1FetchLimit=1 94fetch1LineSnapWidth=0 95fetch1LineWidth=0 96fetch1ToFetch2BackwardDelay=1 97fetch1ToFetch2ForwardDelay=1 98fetch2CycleInput=true 99fetch2InputBufferSize=2 100fetch2ToDecodeForwardDelay=1 101function_trace=false 102function_trace_start=0 103interrupts=system.cpu.interrupts 104isa=system.cpu.isa 105istage2_mmu=system.cpu.istage2_mmu 106itb=system.cpu.itb 107max_insts_all_threads=0 108max_insts_any_thread=0 109max_loads_all_threads=0 110max_loads_any_thread=0 111numThreads=1
	112p_state_clk_gate_bins=20 113p_state_clk_gate_max=1000000000000 114p_state_clk_gate_min=1000 115power_model=Null
102profile=0 103progress_interval=0 104simpoint_start_insts= 105socket_id=0 106switched_out=false 107system=system	116profile=0 117progress_interval=0 118simpoint_start_insts= 119socket_id=0 120switched_out=false 121system=system
	122threadPolicy=RoundRobin
108tracer=system.cpu.tracer 109workload=system.cpu.workload 110dcache_port=system.cpu.dcache.cpu_side 111icache_port=system.cpu.icache.cpu_side 112 113[system.cpu.branchPred] 114type=TournamentBP 115BTBEntries=4096 116BTBTagSize=16 117RASSize=16 118choiceCtrBits=2 119choicePredictorSize=8192 120eventq_index=0 121globalCtrBits=2 122globalPredictorSize=8192	123tracer=system.cpu.tracer 124workload=system.cpu.workload 125dcache_port=system.cpu.dcache.cpu_side 126icache_port=system.cpu.icache.cpu_side 127 128[system.cpu.branchPred] 129type=TournamentBP 130BTBEntries=4096 131BTBTagSize=16 132RASSize=16 133choiceCtrBits=2 134choicePredictorSize=8192 135eventq_index=0 136globalCtrBits=2 137globalPredictorSize=8192
	138indirectHashGHR=true 139indirectHashTargets=true 140indirectPathLength=3 141indirectSets=256 142indirectTagSize=16 143indirectWays=2
123instShiftAmt=2 124localCtrBits=2 125localHistoryTableSize=2048 126localPredictorSize=2048 127numThreads=1	144instShiftAmt=2 145localCtrBits=2 146localHistoryTableSize=2048 147localPredictorSize=2048 148numThreads=1
	149useIndirect=true
128 129[system.cpu.dcache] 130type=Cache 131children=tags 132addr_ranges=0:18446744073709551615 133assoc=2 134clk_domain=system.cpu_clk_domain	150 151[system.cpu.dcache] 152type=Cache 153children=tags 154addr_ranges=0:18446744073709551615 155assoc=2 156clk_domain=system.cpu_clk_domain
	157clusivity=mostly_incl 158default_p_state=UNDEFINED
135demand_mshr_reserve=1 136eventq_index=0	159demand_mshr_reserve=1 160eventq_index=0
137forward_snoops=true
138hit_latency=2 139is_read_only=false 140max_miss_count=0 141mshrs=4	161hit_latency=2 162is_read_only=false 163max_miss_count=0 164mshrs=4
	165p_state_clk_gate_bins=20 166p_state_clk_gate_max=1000000000000 167p_state_clk_gate_min=1000 168power_model=Null
142prefetch_on_access=false 143prefetcher=Null 144response_latency=2 145sequential_access=false 146size=262144 147system=system 148tags=system.cpu.dcache.tags 149tgts_per_mshr=20 150write_buffers=8	169prefetch_on_access=false 170prefetcher=Null 171response_latency=2 172sequential_access=false 173size=262144 174system=system 175tags=system.cpu.dcache.tags 176tgts_per_mshr=20 177write_buffers=8
	178writeback_clean=false
151cpu_side=system.cpu.dcache_port 152mem_side=system.cpu.toL2Bus.slave[1] 153 154[system.cpu.dcache.tags] 155type=LRU 156assoc=2 157block_size=64 158clk_domain=system.cpu_clk_domain	179cpu_side=system.cpu.dcache_port 180mem_side=system.cpu.toL2Bus.slave[1] 181 182[system.cpu.dcache.tags] 183type=LRU 184assoc=2 185block_size=64 186clk_domain=system.cpu_clk_domain
	187default_p_state=UNDEFINED
159eventq_index=0 160hit_latency=2	188eventq_index=0 189hit_latency=2
	190p_state_clk_gate_bins=20 191p_state_clk_gate_max=1000000000000 192p_state_clk_gate_min=1000 193power_model=Null
161sequential_access=false 162size=262144 163 164[system.cpu.dstage2_mmu] 165type=ArmStage2MMU 166children=stage2_tlb 167eventq_index=0 168stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 169sys=system 170tlb=system.cpu.dtb 171 172[system.cpu.dstage2_mmu.stage2_tlb] 173type=ArmTLB 174children=walker 175eventq_index=0 176is_stage2=true 177size=32 178walker=system.cpu.dstage2_mmu.stage2_tlb.walker 179 180[system.cpu.dstage2_mmu.stage2_tlb.walker] 181type=ArmTableWalker 182clk_domain=system.cpu_clk_domain	194sequential_access=false 195size=262144 196 197[system.cpu.dstage2_mmu] 198type=ArmStage2MMU 199children=stage2_tlb 200eventq_index=0 201stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 202sys=system 203tlb=system.cpu.dtb 204 205[system.cpu.dstage2_mmu.stage2_tlb] 206type=ArmTLB 207children=walker 208eventq_index=0 209is_stage2=true 210size=32 211walker=system.cpu.dstage2_mmu.stage2_tlb.walker 212 213[system.cpu.dstage2_mmu.stage2_tlb.walker] 214type=ArmTableWalker 215clk_domain=system.cpu_clk_domain
	216default_p_state=UNDEFINED
183eventq_index=0 184is_stage2=true 185num_squash_per_cycle=2	217eventq_index=0 218is_stage2=true 219num_squash_per_cycle=2
	220p_state_clk_gate_bins=20 221p_state_clk_gate_max=1000000000000 222p_state_clk_gate_min=1000 223power_model=Null
186sys=system 187 188[system.cpu.dtb] 189type=ArmTLB 190children=walker 191eventq_index=0 192is_stage2=false 193size=64 194walker=system.cpu.dtb.walker 195 196[system.cpu.dtb.walker] 197type=ArmTableWalker 198clk_domain=system.cpu_clk_domain	224sys=system 225 226[system.cpu.dtb] 227type=ArmTLB 228children=walker 229eventq_index=0 230is_stage2=false 231size=64 232walker=system.cpu.dtb.walker 233 234[system.cpu.dtb.walker] 235type=ArmTableWalker 236clk_domain=system.cpu_clk_domain
	237default_p_state=UNDEFINED
199eventq_index=0 200is_stage2=false 201num_squash_per_cycle=2	238eventq_index=0 239is_stage2=false 240num_squash_per_cycle=2
	241p_state_clk_gate_bins=20 242p_state_clk_gate_max=1000000000000 243p_state_clk_gate_min=1000 244power_model=Null
202sys=system 203port=system.cpu.toL2Bus.slave[3] 204 205[system.cpu.executeFuncUnits] 206type=MinorFUPool 207children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 208eventq_index=0 209funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 210 211[system.cpu.executeFuncUnits.funcUnits0] 212type=MinorFU 213children=opClasses timings 214cantForwardFromFUIndices= 215eventq_index=0 216issueLat=1 217opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses 218opLat=3 219timings=system.cpu.executeFuncUnits.funcUnits0.timings 220 221[system.cpu.executeFuncUnits.funcUnits0.opClasses] 222type=MinorOpClassSet 223children=opClasses 224eventq_index=0 225opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses 226 227[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] 228type=MinorOpClass 229eventq_index=0 230opClass=IntAlu 231 232[system.cpu.executeFuncUnits.funcUnits0.timings] 233type=MinorFUTiming 234children=opClasses 235description=Int 236eventq_index=0 237extraAssumedLat=0 238extraCommitLat=0 239extraCommitLatExpr=Null 240mask=0 241match=0 242opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses 243srcRegsRelativeLats=2 244suppress=false 245 246[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] 247type=MinorOpClassSet 248eventq_index=0 249opClasses= 250 251[system.cpu.executeFuncUnits.funcUnits1] 252type=MinorFU 253children=opClasses timings 254cantForwardFromFUIndices= 255eventq_index=0 256issueLat=1 257opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses 258opLat=3 259timings=system.cpu.executeFuncUnits.funcUnits1.timings 260 261[system.cpu.executeFuncUnits.funcUnits1.opClasses] 262type=MinorOpClassSet 263children=opClasses 264eventq_index=0 265opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses 266 267[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] 268type=MinorOpClass 269eventq_index=0 270opClass=IntAlu 271 272[system.cpu.executeFuncUnits.funcUnits1.timings] 273type=MinorFUTiming 274children=opClasses 275description=Int 276eventq_index=0 277extraAssumedLat=0 278extraCommitLat=0 279extraCommitLatExpr=Null 280mask=0 281match=0 282opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses 283srcRegsRelativeLats=2 284suppress=false 285 286[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] 287type=MinorOpClassSet 288eventq_index=0 289opClasses= 290 291[system.cpu.executeFuncUnits.funcUnits2] 292type=MinorFU 293children=opClasses timings 294cantForwardFromFUIndices= 295eventq_index=0 296issueLat=1 297opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses 298opLat=3 299timings=system.cpu.executeFuncUnits.funcUnits2.timings 300 301[system.cpu.executeFuncUnits.funcUnits2.opClasses] 302type=MinorOpClassSet 303children=opClasses 304eventq_index=0 305opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses 306 307[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] 308type=MinorOpClass 309eventq_index=0 310opClass=IntMult 311 312[system.cpu.executeFuncUnits.funcUnits2.timings] 313type=MinorFUTiming 314children=opClasses 315description=Mul 316eventq_index=0 317extraAssumedLat=0 318extraCommitLat=0 319extraCommitLatExpr=Null 320mask=0 321match=0 322opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses 323srcRegsRelativeLats=0 324suppress=false 325 326[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] 327type=MinorOpClassSet 328eventq_index=0 329opClasses= 330 331[system.cpu.executeFuncUnits.funcUnits3] 332type=MinorFU 333children=opClasses 334cantForwardFromFUIndices= 335eventq_index=0 336issueLat=9 337opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses 338opLat=9 339timings= 340 341[system.cpu.executeFuncUnits.funcUnits3.opClasses] 342type=MinorOpClassSet 343children=opClasses 344eventq_index=0 345opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses 346 347[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] 348type=MinorOpClass 349eventq_index=0 350opClass=IntDiv 351 352[system.cpu.executeFuncUnits.funcUnits4] 353type=MinorFU 354children=opClasses timings 355cantForwardFromFUIndices= 356eventq_index=0 357issueLat=1 358opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses 359opLat=6 360timings=system.cpu.executeFuncUnits.funcUnits4.timings 361 362[system.cpu.executeFuncUnits.funcUnits4.opClasses] 363type=MinorOpClassSet 364children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 365eventq_index=0 366opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 367 368[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] 369type=MinorOpClass 370eventq_index=0 371opClass=FloatAdd 372 373[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] 374type=MinorOpClass 375eventq_index=0 376opClass=FloatCmp 377 378[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] 379type=MinorOpClass 380eventq_index=0 381opClass=FloatCvt 382 383[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] 384type=MinorOpClass 385eventq_index=0 386opClass=FloatMult 387 388[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] 389type=MinorOpClass 390eventq_index=0 391opClass=FloatDiv 392 393[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] 394type=MinorOpClass 395eventq_index=0 396opClass=FloatSqrt 397 398[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] 399type=MinorOpClass 400eventq_index=0 401opClass=SimdAdd 402 403[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] 404type=MinorOpClass 405eventq_index=0 406opClass=SimdAddAcc 407 408[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] 409type=MinorOpClass 410eventq_index=0 411opClass=SimdAlu 412 413[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] 414type=MinorOpClass 415eventq_index=0 416opClass=SimdCmp 417 418[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] 419type=MinorOpClass 420eventq_index=0 421opClass=SimdCvt 422 423[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] 424type=MinorOpClass 425eventq_index=0 426opClass=SimdMisc 427 428[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] 429type=MinorOpClass 430eventq_index=0 431opClass=SimdMult 432 433[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] 434type=MinorOpClass 435eventq_index=0 436opClass=SimdMultAcc 437 438[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] 439type=MinorOpClass 440eventq_index=0 441opClass=SimdShift 442 443[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] 444type=MinorOpClass 445eventq_index=0 446opClass=SimdShiftAcc 447 448[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] 449type=MinorOpClass 450eventq_index=0 451opClass=SimdSqrt 452 453[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] 454type=MinorOpClass 455eventq_index=0 456opClass=SimdFloatAdd 457 458[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] 459type=MinorOpClass 460eventq_index=0 461opClass=SimdFloatAlu 462 463[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] 464type=MinorOpClass 465eventq_index=0 466opClass=SimdFloatCmp 467 468[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] 469type=MinorOpClass 470eventq_index=0 471opClass=SimdFloatCvt 472 473[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] 474type=MinorOpClass 475eventq_index=0 476opClass=SimdFloatDiv 477 478[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] 479type=MinorOpClass 480eventq_index=0 481opClass=SimdFloatMisc 482 483[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] 484type=MinorOpClass 485eventq_index=0 486opClass=SimdFloatMult 487 488[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] 489type=MinorOpClass 490eventq_index=0 491opClass=SimdFloatMultAcc 492 493[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] 494type=MinorOpClass 495eventq_index=0 496opClass=SimdFloatSqrt 497 498[system.cpu.executeFuncUnits.funcUnits4.timings] 499type=MinorFUTiming 500children=opClasses 501description=FloatSimd 502eventq_index=0 503extraAssumedLat=0 504extraCommitLat=0 505extraCommitLatExpr=Null 506mask=0 507match=0 508opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses 509srcRegsRelativeLats=2 510suppress=false 511 512[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] 513type=MinorOpClassSet 514eventq_index=0 515opClasses= 516 517[system.cpu.executeFuncUnits.funcUnits5] 518type=MinorFU 519children=opClasses timings 520cantForwardFromFUIndices= 521eventq_index=0 522issueLat=1 523opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses 524opLat=1 525timings=system.cpu.executeFuncUnits.funcUnits5.timings 526 527[system.cpu.executeFuncUnits.funcUnits5.opClasses] 528type=MinorOpClassSet 529children=opClasses0 opClasses1 530eventq_index=0 531opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 532 533[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] 534type=MinorOpClass 535eventq_index=0 536opClass=MemRead 537 538[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] 539type=MinorOpClass 540eventq_index=0 541opClass=MemWrite 542 543[system.cpu.executeFuncUnits.funcUnits5.timings] 544type=MinorFUTiming 545children=opClasses 546description=Mem 547eventq_index=0 548extraAssumedLat=2 549extraCommitLat=0 550extraCommitLatExpr=Null 551mask=0 552match=0 553opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses 554srcRegsRelativeLats=1 555suppress=false 556 557[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] 558type=MinorOpClassSet 559eventq_index=0 560opClasses= 561 562[system.cpu.executeFuncUnits.funcUnits6] 563type=MinorFU 564children=opClasses 565cantForwardFromFUIndices= 566eventq_index=0 567issueLat=1 568opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses 569opLat=1 570timings= 571 572[system.cpu.executeFuncUnits.funcUnits6.opClasses] 573type=MinorOpClassSet 574children=opClasses0 opClasses1 575eventq_index=0 576opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 577 578[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] 579type=MinorOpClass 580eventq_index=0 581opClass=IprAccess 582 583[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 584type=MinorOpClass 585eventq_index=0 586opClass=InstPrefetch 587 588[system.cpu.icache] 589type=Cache 590children=tags 591addr_ranges=0:18446744073709551615 592assoc=2 593clk_domain=system.cpu_clk_domain	245sys=system 246port=system.cpu.toL2Bus.slave[3] 247 248[system.cpu.executeFuncUnits] 249type=MinorFUPool 250children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 251eventq_index=0 252funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 253 254[system.cpu.executeFuncUnits.funcUnits0] 255type=MinorFU 256children=opClasses timings 257cantForwardFromFUIndices= 258eventq_index=0 259issueLat=1 260opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses 261opLat=3 262timings=system.cpu.executeFuncUnits.funcUnits0.timings 263 264[system.cpu.executeFuncUnits.funcUnits0.opClasses] 265type=MinorOpClassSet 266children=opClasses 267eventq_index=0 268opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses 269 270[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] 271type=MinorOpClass 272eventq_index=0 273opClass=IntAlu 274 275[system.cpu.executeFuncUnits.funcUnits0.timings] 276type=MinorFUTiming 277children=opClasses 278description=Int 279eventq_index=0 280extraAssumedLat=0 281extraCommitLat=0 282extraCommitLatExpr=Null 283mask=0 284match=0 285opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses 286srcRegsRelativeLats=2 287suppress=false 288 289[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] 290type=MinorOpClassSet 291eventq_index=0 292opClasses= 293 294[system.cpu.executeFuncUnits.funcUnits1] 295type=MinorFU 296children=opClasses timings 297cantForwardFromFUIndices= 298eventq_index=0 299issueLat=1 300opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses 301opLat=3 302timings=system.cpu.executeFuncUnits.funcUnits1.timings 303 304[system.cpu.executeFuncUnits.funcUnits1.opClasses] 305type=MinorOpClassSet 306children=opClasses 307eventq_index=0 308opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses 309 310[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] 311type=MinorOpClass 312eventq_index=0 313opClass=IntAlu 314 315[system.cpu.executeFuncUnits.funcUnits1.timings] 316type=MinorFUTiming 317children=opClasses 318description=Int 319eventq_index=0 320extraAssumedLat=0 321extraCommitLat=0 322extraCommitLatExpr=Null 323mask=0 324match=0 325opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses 326srcRegsRelativeLats=2 327suppress=false 328 329[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] 330type=MinorOpClassSet 331eventq_index=0 332opClasses= 333 334[system.cpu.executeFuncUnits.funcUnits2] 335type=MinorFU 336children=opClasses timings 337cantForwardFromFUIndices= 338eventq_index=0 339issueLat=1 340opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses 341opLat=3 342timings=system.cpu.executeFuncUnits.funcUnits2.timings 343 344[system.cpu.executeFuncUnits.funcUnits2.opClasses] 345type=MinorOpClassSet 346children=opClasses 347eventq_index=0 348opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses 349 350[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] 351type=MinorOpClass 352eventq_index=0 353opClass=IntMult 354 355[system.cpu.executeFuncUnits.funcUnits2.timings] 356type=MinorFUTiming 357children=opClasses 358description=Mul 359eventq_index=0 360extraAssumedLat=0 361extraCommitLat=0 362extraCommitLatExpr=Null 363mask=0 364match=0 365opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses 366srcRegsRelativeLats=0 367suppress=false 368 369[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] 370type=MinorOpClassSet 371eventq_index=0 372opClasses= 373 374[system.cpu.executeFuncUnits.funcUnits3] 375type=MinorFU 376children=opClasses 377cantForwardFromFUIndices= 378eventq_index=0 379issueLat=9 380opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses 381opLat=9 382timings= 383 384[system.cpu.executeFuncUnits.funcUnits3.opClasses] 385type=MinorOpClassSet 386children=opClasses 387eventq_index=0 388opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses 389 390[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] 391type=MinorOpClass 392eventq_index=0 393opClass=IntDiv 394 395[system.cpu.executeFuncUnits.funcUnits4] 396type=MinorFU 397children=opClasses timings 398cantForwardFromFUIndices= 399eventq_index=0 400issueLat=1 401opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses 402opLat=6 403timings=system.cpu.executeFuncUnits.funcUnits4.timings 404 405[system.cpu.executeFuncUnits.funcUnits4.opClasses] 406type=MinorOpClassSet 407children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 408eventq_index=0 409opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 410 411[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] 412type=MinorOpClass 413eventq_index=0 414opClass=FloatAdd 415 416[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] 417type=MinorOpClass 418eventq_index=0 419opClass=FloatCmp 420 421[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] 422type=MinorOpClass 423eventq_index=0 424opClass=FloatCvt 425 426[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] 427type=MinorOpClass 428eventq_index=0 429opClass=FloatMult 430 431[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] 432type=MinorOpClass 433eventq_index=0 434opClass=FloatDiv 435 436[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] 437type=MinorOpClass 438eventq_index=0 439opClass=FloatSqrt 440 441[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] 442type=MinorOpClass 443eventq_index=0 444opClass=SimdAdd 445 446[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] 447type=MinorOpClass 448eventq_index=0 449opClass=SimdAddAcc 450 451[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] 452type=MinorOpClass 453eventq_index=0 454opClass=SimdAlu 455 456[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] 457type=MinorOpClass 458eventq_index=0 459opClass=SimdCmp 460 461[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] 462type=MinorOpClass 463eventq_index=0 464opClass=SimdCvt 465 466[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] 467type=MinorOpClass 468eventq_index=0 469opClass=SimdMisc 470 471[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] 472type=MinorOpClass 473eventq_index=0 474opClass=SimdMult 475 476[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] 477type=MinorOpClass 478eventq_index=0 479opClass=SimdMultAcc 480 481[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] 482type=MinorOpClass 483eventq_index=0 484opClass=SimdShift 485 486[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] 487type=MinorOpClass 488eventq_index=0 489opClass=SimdShiftAcc 490 491[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] 492type=MinorOpClass 493eventq_index=0 494opClass=SimdSqrt 495 496[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] 497type=MinorOpClass 498eventq_index=0 499opClass=SimdFloatAdd 500 501[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] 502type=MinorOpClass 503eventq_index=0 504opClass=SimdFloatAlu 505 506[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] 507type=MinorOpClass 508eventq_index=0 509opClass=SimdFloatCmp 510 511[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] 512type=MinorOpClass 513eventq_index=0 514opClass=SimdFloatCvt 515 516[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] 517type=MinorOpClass 518eventq_index=0 519opClass=SimdFloatDiv 520 521[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] 522type=MinorOpClass 523eventq_index=0 524opClass=SimdFloatMisc 525 526[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] 527type=MinorOpClass 528eventq_index=0 529opClass=SimdFloatMult 530 531[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] 532type=MinorOpClass 533eventq_index=0 534opClass=SimdFloatMultAcc 535 536[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] 537type=MinorOpClass 538eventq_index=0 539opClass=SimdFloatSqrt 540 541[system.cpu.executeFuncUnits.funcUnits4.timings] 542type=MinorFUTiming 543children=opClasses 544description=FloatSimd 545eventq_index=0 546extraAssumedLat=0 547extraCommitLat=0 548extraCommitLatExpr=Null 549mask=0 550match=0 551opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses 552srcRegsRelativeLats=2 553suppress=false 554 555[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] 556type=MinorOpClassSet 557eventq_index=0 558opClasses= 559 560[system.cpu.executeFuncUnits.funcUnits5] 561type=MinorFU 562children=opClasses timings 563cantForwardFromFUIndices= 564eventq_index=0 565issueLat=1 566opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses 567opLat=1 568timings=system.cpu.executeFuncUnits.funcUnits5.timings 569 570[system.cpu.executeFuncUnits.funcUnits5.opClasses] 571type=MinorOpClassSet 572children=opClasses0 opClasses1 573eventq_index=0 574opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 575 576[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] 577type=MinorOpClass 578eventq_index=0 579opClass=MemRead 580 581[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] 582type=MinorOpClass 583eventq_index=0 584opClass=MemWrite 585 586[system.cpu.executeFuncUnits.funcUnits5.timings] 587type=MinorFUTiming 588children=opClasses 589description=Mem 590eventq_index=0 591extraAssumedLat=2 592extraCommitLat=0 593extraCommitLatExpr=Null 594mask=0 595match=0 596opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses 597srcRegsRelativeLats=1 598suppress=false 599 600[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] 601type=MinorOpClassSet 602eventq_index=0 603opClasses= 604 605[system.cpu.executeFuncUnits.funcUnits6] 606type=MinorFU 607children=opClasses 608cantForwardFromFUIndices= 609eventq_index=0 610issueLat=1 611opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses 612opLat=1 613timings= 614 615[system.cpu.executeFuncUnits.funcUnits6.opClasses] 616type=MinorOpClassSet 617children=opClasses0 opClasses1 618eventq_index=0 619opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 620 621[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] 622type=MinorOpClass 623eventq_index=0 624opClass=IprAccess 625 626[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 627type=MinorOpClass 628eventq_index=0 629opClass=InstPrefetch 630 631[system.cpu.icache] 632type=Cache 633children=tags 634addr_ranges=0:18446744073709551615 635assoc=2 636clk_domain=system.cpu_clk_domain
	637clusivity=mostly_incl 638default_p_state=UNDEFINED
594demand_mshr_reserve=1 595eventq_index=0	639demand_mshr_reserve=1 640eventq_index=0
596forward_snoops=true
597hit_latency=2 598is_read_only=true 599max_miss_count=0 600mshrs=4	641hit_latency=2 642is_read_only=true 643max_miss_count=0 644mshrs=4
	645p_state_clk_gate_bins=20 646p_state_clk_gate_max=1000000000000 647p_state_clk_gate_min=1000 648power_model=Null
601prefetch_on_access=false 602prefetcher=Null 603response_latency=2 604sequential_access=false 605size=131072 606system=system 607tags=system.cpu.icache.tags 608tgts_per_mshr=20 609write_buffers=8	649prefetch_on_access=false 650prefetcher=Null 651response_latency=2 652sequential_access=false 653size=131072 654system=system 655tags=system.cpu.icache.tags 656tgts_per_mshr=20 657write_buffers=8
	658writeback_clean=true
610cpu_side=system.cpu.icache_port 611mem_side=system.cpu.toL2Bus.slave[0] 612 613[system.cpu.icache.tags] 614type=LRU 615assoc=2 616block_size=64 617clk_domain=system.cpu_clk_domain	659cpu_side=system.cpu.icache_port 660mem_side=system.cpu.toL2Bus.slave[0] 661 662[system.cpu.icache.tags] 663type=LRU 664assoc=2 665block_size=64 666clk_domain=system.cpu_clk_domain
	667default_p_state=UNDEFINED
618eventq_index=0 619hit_latency=2	668eventq_index=0 669hit_latency=2
	670p_state_clk_gate_bins=20 671p_state_clk_gate_max=1000000000000 672p_state_clk_gate_min=1000 673power_model=Null
620sequential_access=false 621size=131072 622 623[system.cpu.interrupts] 624type=ArmInterrupts 625eventq_index=0 626 627[system.cpu.isa] 628type=ArmISA	674sequential_access=false 675size=131072 676 677[system.cpu.interrupts] 678type=ArmInterrupts 679eventq_index=0 680 681[system.cpu.isa] 682type=ArmISA
	683decoderFlavour=Generic
629eventq_index=0 630fpsid=1090793632 631id_aa64afr0_el1=0 632id_aa64afr1_el1=0 633id_aa64dfr0_el1=1052678 634id_aa64dfr1_el1=0 635id_aa64isar0_el1=0 636id_aa64isar1_el1=0 637id_aa64mmfr0_el1=15728642 638id_aa64mmfr1_el1=0 639id_aa64pfr0_el1=17 640id_aa64pfr1_el1=0 641id_isar0=34607377 642id_isar1=34677009 643id_isar2=555950401 644id_isar3=17899825 645id_isar4=268501314 646id_isar5=0 647id_mmfr0=270536963 648id_mmfr1=0 649id_mmfr2=19070976 650id_mmfr3=34611729 651id_pfr0=49 652id_pfr1=4113 653midr=1091551472 654pmu=Null 655system=system 656 657[system.cpu.istage2_mmu] 658type=ArmStage2MMU 659children=stage2_tlb 660eventq_index=0 661stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 662sys=system 663tlb=system.cpu.itb 664 665[system.cpu.istage2_mmu.stage2_tlb] 666type=ArmTLB 667children=walker 668eventq_index=0 669is_stage2=true 670size=32 671walker=system.cpu.istage2_mmu.stage2_tlb.walker 672 673[system.cpu.istage2_mmu.stage2_tlb.walker] 674type=ArmTableWalker 675clk_domain=system.cpu_clk_domain	684eventq_index=0 685fpsid=1090793632 686id_aa64afr0_el1=0 687id_aa64afr1_el1=0 688id_aa64dfr0_el1=1052678 689id_aa64dfr1_el1=0 690id_aa64isar0_el1=0 691id_aa64isar1_el1=0 692id_aa64mmfr0_el1=15728642 693id_aa64mmfr1_el1=0 694id_aa64pfr0_el1=17 695id_aa64pfr1_el1=0 696id_isar0=34607377 697id_isar1=34677009 698id_isar2=555950401 699id_isar3=17899825 700id_isar4=268501314 701id_isar5=0 702id_mmfr0=270536963 703id_mmfr1=0 704id_mmfr2=19070976 705id_mmfr3=34611729 706id_pfr0=49 707id_pfr1=4113 708midr=1091551472 709pmu=Null 710system=system 711 712[system.cpu.istage2_mmu] 713type=ArmStage2MMU 714children=stage2_tlb 715eventq_index=0 716stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 717sys=system 718tlb=system.cpu.itb 719 720[system.cpu.istage2_mmu.stage2_tlb] 721type=ArmTLB 722children=walker 723eventq_index=0 724is_stage2=true 725size=32 726walker=system.cpu.istage2_mmu.stage2_tlb.walker 727 728[system.cpu.istage2_mmu.stage2_tlb.walker] 729type=ArmTableWalker 730clk_domain=system.cpu_clk_domain
	731default_p_state=UNDEFINED
676eventq_index=0 677is_stage2=true 678num_squash_per_cycle=2	732eventq_index=0 733is_stage2=true 734num_squash_per_cycle=2
	735p_state_clk_gate_bins=20 736p_state_clk_gate_max=1000000000000 737p_state_clk_gate_min=1000 738power_model=Null
679sys=system 680 681[system.cpu.itb] 682type=ArmTLB 683children=walker 684eventq_index=0 685is_stage2=false 686size=64 687walker=system.cpu.itb.walker 688 689[system.cpu.itb.walker] 690type=ArmTableWalker 691clk_domain=system.cpu_clk_domain	739sys=system 740 741[system.cpu.itb] 742type=ArmTLB 743children=walker 744eventq_index=0 745is_stage2=false 746size=64 747walker=system.cpu.itb.walker 748 749[system.cpu.itb.walker] 750type=ArmTableWalker 751clk_domain=system.cpu_clk_domain
	752default_p_state=UNDEFINED
692eventq_index=0 693is_stage2=false 694num_squash_per_cycle=2	753eventq_index=0 754is_stage2=false 755num_squash_per_cycle=2
	756p_state_clk_gate_bins=20 757p_state_clk_gate_max=1000000000000 758p_state_clk_gate_min=1000 759power_model=Null
695sys=system 696port=system.cpu.toL2Bus.slave[2] 697 698[system.cpu.l2cache] 699type=Cache 700children=tags 701addr_ranges=0:18446744073709551615 702assoc=8 703clk_domain=system.cpu_clk_domain	760sys=system 761port=system.cpu.toL2Bus.slave[2] 762 763[system.cpu.l2cache] 764type=Cache 765children=tags 766addr_ranges=0:18446744073709551615 767assoc=8 768clk_domain=system.cpu_clk_domain
	769clusivity=mostly_incl 770default_p_state=UNDEFINED
704demand_mshr_reserve=1 705eventq_index=0	771demand_mshr_reserve=1 772eventq_index=0
706forward_snoops=true
707hit_latency=20 708is_read_only=false 709max_miss_count=0 710mshrs=20	773hit_latency=20 774is_read_only=false 775max_miss_count=0 776mshrs=20
	777p_state_clk_gate_bins=20 778p_state_clk_gate_max=1000000000000 779p_state_clk_gate_min=1000 780power_model=Null
711prefetch_on_access=false 712prefetcher=Null 713response_latency=20 714sequential_access=false 715size=2097152 716system=system 717tags=system.cpu.l2cache.tags 718tgts_per_mshr=12 719write_buffers=8	781prefetch_on_access=false 782prefetcher=Null 783response_latency=20 784sequential_access=false 785size=2097152 786system=system 787tags=system.cpu.l2cache.tags 788tgts_per_mshr=12 789write_buffers=8
	790writeback_clean=false
720cpu_side=system.cpu.toL2Bus.master[0] 721mem_side=system.membus.slave[1] 722 723[system.cpu.l2cache.tags] 724type=LRU 725assoc=8 726block_size=64 727clk_domain=system.cpu_clk_domain	791cpu_side=system.cpu.toL2Bus.master[0] 792mem_side=system.membus.slave[1] 793 794[system.cpu.l2cache.tags] 795type=LRU 796assoc=8 797block_size=64 798clk_domain=system.cpu_clk_domain
	799default_p_state=UNDEFINED
728eventq_index=0 729hit_latency=20	800eventq_index=0 801hit_latency=20
	802p_state_clk_gate_bins=20 803p_state_clk_gate_max=1000000000000 804p_state_clk_gate_min=1000 805power_model=Null
730sequential_access=false 731size=2097152 732 733[system.cpu.toL2Bus] 734type=CoherentXBar	806sequential_access=false 807size=2097152 808 809[system.cpu.toL2Bus] 810type=CoherentXBar
	811children=snoop_filter
735clk_domain=system.cpu_clk_domain	812clk_domain=system.cpu_clk_domain
	813default_p_state=UNDEFINED
736eventq_index=0 737forward_latency=0 738frontend_latency=1	814eventq_index=0 815forward_latency=0 816frontend_latency=1
	817p_state_clk_gate_bins=20 818p_state_clk_gate_max=1000000000000 819p_state_clk_gate_min=1000 820point_of_coherency=false 821power_model=Null
739response_latency=1	822response_latency=1
740snoop_filter=Null	823snoop_filter=system.cpu.toL2Bus.snoop_filter
741snoop_response_latency=1 742system=system 743use_default_range=false 744width=32 745master=system.cpu.l2cache.cpu_side 746slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 747	824snoop_response_latency=1 825system=system 826use_default_range=false 827width=32 828master=system.cpu.l2cache.cpu_side 829slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 830
	831[system.cpu.toL2Bus.snoop_filter] 832type=SnoopFilter 833eventq_index=0 834lookup_latency=0 835max_capacity=8388608 836system=system 837
748[system.cpu.tracer] 749type=ExeTracer 750eventq_index=0 751 752[system.cpu.workload] 753type=LiveProcess 754cmd=twolf smred 755cwd=build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing 756drivers= 757egid=100 758env= 759errout=cerr 760euid=100 761eventq_index=0	838[system.cpu.tracer] 839type=ExeTracer 840eventq_index=0 841 842[system.cpu.workload] 843type=LiveProcess 844cmd=twolf smred 845cwd=build/ARM/tests/opt/long/se/70.twolf/arm/linux/minor-timing 846drivers= 847egid=100 848env= 849errout=cerr 850euid=100 851eventq_index=0
762executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/twolf	852executable=/arm/projectscratch/randd/systems/dist/cpu2000/binaries/arm/linux/twolf
763gid=100 764input=cin 765kvmInSE=false 766max_stack_size=67108864 767output=cout 768pid=100 769ppid=99 770simpoint=0 771system=system 772uid=100 773useArchPT=false 774 775[system.cpu_clk_domain] 776type=SrcClockDomain 777clock=500 778domain_id=-1 779eventq_index=0 780init_perf_level=0 781voltage_domain=system.voltage_domain 782 783[system.dvfs_handler] 784type=DVFSHandler 785domains= 786enable=false 787eventq_index=0 788sys_clk_domain=system.clk_domain 789transition_latency=100000000 790 791[system.membus] 792type=CoherentXBar 793clk_domain=system.clk_domain	853gid=100 854input=cin 855kvmInSE=false 856max_stack_size=67108864 857output=cout 858pid=100 859ppid=99 860simpoint=0 861system=system 862uid=100 863useArchPT=false 864 865[system.cpu_clk_domain] 866type=SrcClockDomain 867clock=500 868domain_id=-1 869eventq_index=0 870init_perf_level=0 871voltage_domain=system.voltage_domain 872 873[system.dvfs_handler] 874type=DVFSHandler 875domains= 876enable=false 877eventq_index=0 878sys_clk_domain=system.clk_domain 879transition_latency=100000000 880 881[system.membus] 882type=CoherentXBar 883clk_domain=system.clk_domain
	884default_p_state=UNDEFINED
794eventq_index=0 795forward_latency=4 796frontend_latency=3	885eventq_index=0 886forward_latency=4 887frontend_latency=3
	888p_state_clk_gate_bins=20 889p_state_clk_gate_max=1000000000000 890p_state_clk_gate_min=1000 891point_of_coherency=true 892power_model=Null
797response_latency=2 798snoop_filter=Null 799snoop_response_latency=4 800system=system 801use_default_range=false 802width=16 803master=system.physmem.port 804slave=system.system_port system.cpu.l2cache.mem_side 805 806[system.physmem] 807type=DRAMCtrl 808IDD0=0.075000 809IDD02=0.000000 810IDD2N=0.050000 811IDD2N2=0.000000 812IDD2P0=0.000000 813IDD2P02=0.000000 814IDD2P1=0.000000 815IDD2P12=0.000000 816IDD3N=0.057000 817IDD3N2=0.000000 818IDD3P0=0.000000 819IDD3P02=0.000000 820IDD3P1=0.000000 821IDD3P12=0.000000 822IDD4R=0.187000 823IDD4R2=0.000000 824IDD4W=0.165000 825IDD4W2=0.000000 826IDD5=0.220000 827IDD52=0.000000 828IDD6=0.000000 829IDD62=0.000000 830VDD=1.500000 831VDD2=0.000000 832activation_limit=4 833addr_mapping=RoRaBaCoCh 834bank_groups_per_rank=0 835banks_per_rank=8 836burst_length=8 837channels=1 838clk_domain=system.clk_domain 839conf_table_reported=true	893response_latency=2 894snoop_filter=Null 895snoop_response_latency=4 896system=system 897use_default_range=false 898width=16 899master=system.physmem.port 900slave=system.system_port system.cpu.l2cache.mem_side 901 902[system.physmem] 903type=DRAMCtrl 904IDD0=0.075000 905IDD02=0.000000 906IDD2N=0.050000 907IDD2N2=0.000000 908IDD2P0=0.000000 909IDD2P02=0.000000 910IDD2P1=0.000000 911IDD2P12=0.000000 912IDD3N=0.057000 913IDD3N2=0.000000 914IDD3P0=0.000000 915IDD3P02=0.000000 916IDD3P1=0.000000 917IDD3P12=0.000000 918IDD4R=0.187000 919IDD4R2=0.000000 920IDD4W=0.165000 921IDD4W2=0.000000 922IDD5=0.220000 923IDD52=0.000000 924IDD6=0.000000 925IDD62=0.000000 926VDD=1.500000 927VDD2=0.000000 928activation_limit=4 929addr_mapping=RoRaBaCoCh 930bank_groups_per_rank=0 931banks_per_rank=8 932burst_length=8 933channels=1 934clk_domain=system.clk_domain 935conf_table_reported=true
	936default_p_state=UNDEFINED
840device_bus_width=8 841device_rowbuffer_size=1024 842device_size=536870912 843devices_per_rank=8 844dll=true 845eventq_index=0 846in_addr_map=true 847max_accesses_per_row=16 848mem_sched_policy=frfcfs 849min_writes_per_switch=16 850null=false	937device_bus_width=8 938device_rowbuffer_size=1024 939device_size=536870912 940devices_per_rank=8 941dll=true 942eventq_index=0 943in_addr_map=true 944max_accesses_per_row=16 945mem_sched_policy=frfcfs 946min_writes_per_switch=16 947null=false
	948p_state_clk_gate_bins=20 949p_state_clk_gate_max=1000000000000 950p_state_clk_gate_min=1000
851page_policy=open_adaptive	951page_policy=open_adaptive
	952power_model=Null
852range=0:134217727 853ranks_per_channel=2 854read_buffer_size=32 855static_backend_latency=10000 856static_frontend_latency=10000 857tBURST=5000 858tCCD_L=0 859tCK=1250 860tCL=13750 861tCS=2500 862tRAS=35000 863tRCD=13750 864tREFI=7800000 865tRFC=260000 866tRP=13750 867tRRD=6000 868tRRD_L=0 869tRTP=7500 870tRTW=2500 871tWR=15000 872tWTR=7500 873tXAW=30000 874tXP=0 875tXPDLL=0 876tXS=0 877tXSDLL=0 878write_buffer_size=64 879write_high_thresh_perc=85 880write_low_thresh_perc=50 881port=system.membus.master[0] 882 883[system.voltage_domain] 884type=VoltageDomain 885eventq_index=0 886voltage=1.000000 887	953range=0:134217727 954ranks_per_channel=2 955read_buffer_size=32 956static_backend_latency=10000 957static_frontend_latency=10000 958tBURST=5000 959tCCD_L=0 960tCK=1250 961tCL=13750 962tCS=2500 963tRAS=35000 964tRCD=13750 965tREFI=7800000 966tRFC=260000 967tRP=13750 968tRRD=6000 969tRRD_L=0 970tRTP=7500 971tRTW=2500 972tWR=15000 973tWTR=7500 974tXAW=30000 975tXP=0 976tXPDLL=0 977tXS=0 978tXSDLL=0 979write_buffer_size=64 980write_high_thresh_perc=85 981write_low_thresh_perc=50 982port=system.membus.master[0] 983 984[system.voltage_domain] 985type=VoltageDomain 986eventq_index=0 987voltage=1.000000 988