| stats.txt (10220:9eab5efc02e8) | stats.txt (10409:8c80b91944c5) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 5.882581 # Number of seconds simulated 4sim_ticks 5882580526000 # Number of ticks simulated 5final_tick 5882580526000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 5.882581 # Number of seconds simulated 4sim_ticks 5882580526000 # Number of ticks simulated 5final_tick 5882580526000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 693030 # Simulator instruction rate (inst/s) 8host_op_rate 1079804 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 1355284560 # Simulator tick rate (ticks/s) 10host_mem_usage 288492 # Number of bytes of host memory used 11host_seconds 4340.48 # Real time elapsed on the host | 7host_inst_rate 912016 # Simulator instruction rate (inst/s) 8host_op_rate 1421004 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 1783532526 # Simulator tick rate (ticks/s) 10host_mem_usage 308940 # Number of bytes of host memory used 11host_seconds 3298.27 # Real time elapsed on the host |
| 12sim_insts 3008081022 # Number of instructions simulated 13sim_ops 4686862596 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 43200 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 125326976 # Number of bytes read from this memory 18system.physmem.bytes_read::total 125370176 # Number of bytes read from this memory 19system.physmem.bytes_inst_read::cpu.inst 43200 # Number of instructions bytes read from this memory --- 11 unchanged lines hidden (view full) --- 31system.physmem.bw_inst_read::cpu.inst 7344 # Instruction read bandwidth from this memory (bytes/s) 32system.physmem.bw_inst_read::total 7344 # Instruction read bandwidth from this memory (bytes/s) 33system.physmem.bw_write::writebacks 11079992 # Write bandwidth from this memory (bytes/s) 34system.physmem.bw_write::total 11079992 # Write bandwidth from this memory (bytes/s) 35system.physmem.bw_total::writebacks 11079992 # Total bandwidth to/from this memory (bytes/s) 36system.physmem.bw_total::cpu.inst 7344 # Total bandwidth to/from this memory (bytes/s) 37system.physmem.bw_total::cpu.data 21304762 # Total bandwidth to/from this memory (bytes/s) 38system.physmem.bw_total::total 32392097 # Total bandwidth to/from this memory (bytes/s) | 12sim_insts 3008081022 # Number of instructions simulated 13sim_ops 4686862596 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 43200 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 125326976 # Number of bytes read from this memory 18system.physmem.bytes_read::total 125370176 # Number of bytes read from this memory 19system.physmem.bytes_inst_read::cpu.inst 43200 # Number of instructions bytes read from this memory --- 11 unchanged lines hidden (view full) --- 31system.physmem.bw_inst_read::cpu.inst 7344 # Instruction read bandwidth from this memory (bytes/s) 32system.physmem.bw_inst_read::total 7344 # Instruction read bandwidth from this memory (bytes/s) 33system.physmem.bw_write::writebacks 11079992 # Write bandwidth from this memory (bytes/s) 34system.physmem.bw_write::total 11079992 # Write bandwidth from this memory (bytes/s) 35system.physmem.bw_total::writebacks 11079992 # Total bandwidth to/from this memory (bytes/s) 36system.physmem.bw_total::cpu.inst 7344 # Total bandwidth to/from this memory (bytes/s) 37system.physmem.bw_total::cpu.data 21304762 # Total bandwidth to/from this memory (bytes/s) 38system.physmem.bw_total::total 32392097 # Total bandwidth to/from this memory (bytes/s) |
| 39system.membus.throughput 32392097 # Throughput (bytes/s) | |
| 40system.membus.trans_dist::ReadReq 1177614 # Transaction distribution 41system.membus.trans_dist::ReadResp 1177614 # Transaction distribution 42system.membus.trans_dist::Writeback 1018421 # Transaction distribution 43system.membus.trans_dist::ReadExReq 781295 # Transaction distribution 44system.membus.trans_dist::ReadExResp 781295 # Transaction distribution 45system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 4936239 # Packet count per connected master and slave (bytes) 46system.membus.pkt_count_system.cpu.l2cache.mem_side::total 4936239 # Packet count per connected master and slave (bytes) 47system.membus.pkt_count::total 4936239 # Packet count per connected master and slave (bytes) | 39system.membus.trans_dist::ReadReq 1177614 # Transaction distribution 40system.membus.trans_dist::ReadResp 1177614 # Transaction distribution 41system.membus.trans_dist::Writeback 1018421 # Transaction distribution 42system.membus.trans_dist::ReadExReq 781295 # Transaction distribution 43system.membus.trans_dist::ReadExResp 781295 # Transaction distribution 44system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 4936239 # Packet count per connected master and slave (bytes) 45system.membus.pkt_count_system.cpu.l2cache.mem_side::total 4936239 # Packet count per connected master and slave (bytes) 46system.membus.pkt_count::total 4936239 # Packet count per connected master and slave (bytes) |
| 48system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 190549120 # Cumulative packet size per connected master and slave (bytes) 49system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 190549120 # Cumulative packet size per connected master and slave (bytes) 50system.membus.tot_pkt_size::total 190549120 # Cumulative packet size per connected master and slave (bytes) 51system.membus.data_through_bus 190549120 # Total data (bytes) 52system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) | 47system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 190549120 # Cumulative packet size per connected master and slave (bytes) 48system.membus.pkt_size_system.cpu.l2cache.mem_side::total 190549120 # Cumulative packet size per connected master and slave (bytes) 49system.membus.pkt_size::total 190549120 # Cumulative packet size per connected master and slave (bytes) 50system.membus.snoops 0 # Total snoops (count) 51system.membus.snoop_fanout::samples 2977330 # Request fanout histogram 52system.membus.snoop_fanout::mean 0 # Request fanout histogram 53system.membus.snoop_fanout::stdev 0 # Request fanout histogram 54system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 55system.membus.snoop_fanout::0 2977330 100.00% 100.00% # Request fanout histogram 56system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram 57system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 58system.membus.snoop_fanout::min_value 0 # Request fanout histogram 59system.membus.snoop_fanout::max_value 0 # Request fanout histogram 60system.membus.snoop_fanout::total 2977330 # Request fanout histogram |
| 53system.membus.reqLayer0.occupancy 11124698000 # Layer occupancy (ticks) 54system.membus.reqLayer0.utilization 0.2 # Layer utilization (%) 55system.membus.respLayer1.occupancy 17630181000 # Layer occupancy (ticks) 56system.membus.respLayer1.utilization 0.3 # Layer utilization (%) 57system.cpu_clk_domain.clock 500 # Clock period in ticks 58system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks 59system.cpu.workload.num_syscalls 46 # Number of system calls 60system.cpu.numCycles 11765161052 # number of cpu cycles simulated --- 388 unchanged lines hidden (view full) --- 449system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 17843.765411 # average ReadReq mshr miss latency 450system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 28363.739644 # average WriteReq mshr miss latency 451system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 28363.739644 # average WriteReq mshr miss latency 452system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 20025.443895 # average overall mshr miss latency 453system.cpu.dcache.demand_avg_mshr_miss_latency::total 20025.443895 # average overall mshr miss latency 454system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 20025.443895 # average overall mshr miss latency 455system.cpu.dcache.overall_avg_mshr_miss_latency::total 20025.443895 # average overall mshr miss latency 456system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate | 61system.membus.reqLayer0.occupancy 11124698000 # Layer occupancy (ticks) 62system.membus.reqLayer0.utilization 0.2 # Layer utilization (%) 63system.membus.respLayer1.occupancy 17630181000 # Layer occupancy (ticks) 64system.membus.respLayer1.utilization 0.3 # Layer utilization (%) 65system.cpu_clk_domain.clock 500 # Clock period in ticks 66system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks 67system.cpu.workload.num_syscalls 46 # Number of system calls 68system.cpu.numCycles 11765161052 # number of cpu cycles simulated --- 388 unchanged lines hidden (view full) --- 457system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 17843.765411 # average ReadReq mshr miss latency 458system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 28363.739644 # average WriteReq mshr miss latency 459system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 28363.739644 # average WriteReq mshr miss latency 460system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 20025.443895 # average overall mshr miss latency 461system.cpu.dcache.demand_avg_mshr_miss_latency::total 20025.443895 # average overall mshr miss latency 462system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 20025.443895 # average overall mshr miss latency 463system.cpu.dcache.overall_avg_mshr_miss_latency::total 20025.443895 # average overall mshr miss latency 464system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 457system.cpu.toL2Bus.throughput 139381638 # Throughput (bytes/s) | |
| 458system.cpu.toL2Bus.trans_dist::ReadReq 7223525 # Transaction distribution 459system.cpu.toL2Bus.trans_dist::ReadResp 7223525 # Transaction distribution 460system.cpu.toL2Bus.trans_dist::Writeback 3697956 # Transaction distribution 461system.cpu.toL2Bus.trans_dist::ReadExReq 1889827 # Transaction distribution 462system.cpu.toL2Bus.trans_dist::ReadExResp 1889827 # Transaction distribution 463system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1350 # Packet count per connected master and slave (bytes) 464system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 21923310 # Packet count per connected master and slave (bytes) 465system.cpu.toL2Bus.pkt_count::total 21924660 # Packet count per connected master and slave (bytes) | 465system.cpu.toL2Bus.trans_dist::ReadReq 7223525 # Transaction distribution 466system.cpu.toL2Bus.trans_dist::ReadResp 7223525 # Transaction distribution 467system.cpu.toL2Bus.trans_dist::Writeback 3697956 # Transaction distribution 468system.cpu.toL2Bus.trans_dist::ReadExReq 1889827 # Transaction distribution 469system.cpu.toL2Bus.trans_dist::ReadExResp 1889827 # Transaction distribution 470system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1350 # Packet count per connected master and slave (bytes) 471system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 21923310 # Packet count per connected master and slave (bytes) 472system.cpu.toL2Bus.pkt_count::total 21924660 # Packet count per connected master and slave (bytes) |
| 466system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 43200 # Cumulative packet size per connected master and slave (bytes) 467system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 819880512 # Cumulative packet size per connected master and slave (bytes) 468system.cpu.toL2Bus.tot_pkt_size::total 819923712 # Cumulative packet size per connected master and slave (bytes) 469system.cpu.toL2Bus.data_through_bus 819923712 # Total data (bytes) 470system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) | 473system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 43200 # Cumulative packet size per connected master and slave (bytes) 474system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 819880512 # Cumulative packet size per connected master and slave (bytes) 475system.cpu.toL2Bus.pkt_size::total 819923712 # Cumulative packet size per connected master and slave (bytes) 476system.cpu.toL2Bus.snoops 0 # Total snoops (count) 477system.cpu.toL2Bus.snoop_fanout::samples 12811308 # Request fanout histogram 478system.cpu.toL2Bus.snoop_fanout::mean 3 # Request fanout histogram 479system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram 480system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 481system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 482system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 0.00% # Request fanout histogram 483system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 0.00% # Request fanout histogram 484system.cpu.toL2Bus.snoop_fanout::3 12811308 100.00% 100.00% # Request fanout histogram 485system.cpu.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram 486system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 487system.cpu.toL2Bus.snoop_fanout::min_value 3 # Request fanout histogram 488system.cpu.toL2Bus.snoop_fanout::max_value 3 # Request fanout histogram 489system.cpu.toL2Bus.snoop_fanout::total 12811308 # Request fanout histogram |
| 471system.cpu.toL2Bus.reqLayer0.occupancy 10103610000 # Layer occupancy (ticks) 472system.cpu.toL2Bus.reqLayer0.utilization 0.2 # Layer utilization (%) 473system.cpu.toL2Bus.respLayer0.occupancy 1012500 # Layer occupancy (ticks) 474system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 475system.cpu.toL2Bus.respLayer1.occupancy 13669015500 # Layer occupancy (ticks) 476system.cpu.toL2Bus.respLayer1.utilization 0.2 # Layer utilization (%) 477 478---------- End Simulation Statistics ---------- | 490system.cpu.toL2Bus.reqLayer0.occupancy 10103610000 # Layer occupancy (ticks) 491system.cpu.toL2Bus.reqLayer0.utilization 0.2 # Layer utilization (%) 492system.cpu.toL2Bus.respLayer0.occupancy 1012500 # Layer occupancy (ticks) 493system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 494system.cpu.toL2Bus.respLayer1.occupancy 13669015500 # Layer occupancy (ticks) 495system.cpu.toL2Bus.respLayer1.utilization 0.2 # Layer utilization (%) 496 497---------- End Simulation Statistics ---------- |