| stats.txt (9481:b0fa6b872f40) | stats.txt (9729:e2fafd224f43) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.391205 # Number of seconds simulated 4sim_ticks 2391205115000 # Number of ticks simulated 5final_tick 2391205115000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.391205 # Number of seconds simulated 4sim_ticks 2391205115000 # Number of ticks simulated 5final_tick 2391205115000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 809589 # Simulator instruction rate (inst/s) 8host_op_rate 903509 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 1258086461 # Simulator tick rate (ticks/s) 10host_mem_usage 287292 # Number of bytes of host memory used 11host_seconds 1900.67 # Real time elapsed on the host | 7host_inst_rate 1401168 # Simulator instruction rate (inst/s) 8host_op_rate 1563717 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 2177389973 # Simulator tick rate (ticks/s) 10host_mem_usage 243008 # Number of bytes of host memory used 11host_seconds 1098.20 # Real time elapsed on the host |
| 12sim_insts 1538759601 # Number of instructions simulated 13sim_ops 1717270334 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 39424 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 125322112 # Number of bytes read from this memory 16system.physmem.bytes_read::total 125361536 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 39424 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 39424 # Number of instructions bytes read from this memory 19system.physmem.bytes_written::writebacks 65100672 # Number of bytes written to this memory --- 9 unchanged lines hidden (view full) --- 29system.physmem.bw_inst_read::cpu.inst 16487 # Instruction read bandwidth from this memory (bytes/s) 30system.physmem.bw_inst_read::total 16487 # Instruction read bandwidth from this memory (bytes/s) 31system.physmem.bw_write::writebacks 27225047 # Write bandwidth from this memory (bytes/s) 32system.physmem.bw_write::total 27225047 # Write bandwidth from this memory (bytes/s) 33system.physmem.bw_total::writebacks 27225047 # Total bandwidth to/from this memory (bytes/s) 34system.physmem.bw_total::cpu.inst 16487 # Total bandwidth to/from this memory (bytes/s) 35system.physmem.bw_total::cpu.data 52409604 # Total bandwidth to/from this memory (bytes/s) 36system.physmem.bw_total::total 79651138 # Total bandwidth to/from this memory (bytes/s) | 12sim_insts 1538759601 # Number of instructions simulated 13sim_ops 1717270334 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 39424 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 125322112 # Number of bytes read from this memory 16system.physmem.bytes_read::total 125361536 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 39424 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 39424 # Number of instructions bytes read from this memory 19system.physmem.bytes_written::writebacks 65100672 # Number of bytes written to this memory --- 9 unchanged lines hidden (view full) --- 29system.physmem.bw_inst_read::cpu.inst 16487 # Instruction read bandwidth from this memory (bytes/s) 30system.physmem.bw_inst_read::total 16487 # Instruction read bandwidth from this memory (bytes/s) 31system.physmem.bw_write::writebacks 27225047 # Write bandwidth from this memory (bytes/s) 32system.physmem.bw_write::total 27225047 # Write bandwidth from this memory (bytes/s) 33system.physmem.bw_total::writebacks 27225047 # Total bandwidth to/from this memory (bytes/s) 34system.physmem.bw_total::cpu.inst 16487 # Total bandwidth to/from this memory (bytes/s) 35system.physmem.bw_total::cpu.data 52409604 # Total bandwidth to/from this memory (bytes/s) 36system.physmem.bw_total::total 79651138 # Total bandwidth to/from this memory (bytes/s) |
| 37system.membus.throughput 79651138 # Throughput (bytes/s) 38system.membus.trans_dist::ReadReq 1177898 # Transaction distribution 39system.membus.trans_dist::ReadResp 1177898 # Transaction distribution 40system.membus.trans_dist::Writeback 1017198 # Transaction distribution 41system.membus.trans_dist::ReadExReq 780876 # Transaction distribution 42system.membus.trans_dist::ReadExResp 780876 # Transaction distribution 43system.membus.pkt_count_system.cpu.l2cache.mem_side 4934746 # Packet count per connected master and slave (bytes) 44system.membus.pkt_count 4934746 # Packet count per connected master and slave (bytes) 45system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 190462208 # Cumulative packet size per connected master and slave (bytes) 46system.membus.tot_pkt_size 190462208 # Cumulative packet size per connected master and slave (bytes) 47system.membus.data_through_bus 190462208 # Total data (bytes) 48system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 49system.membus.reqLayer0.occupancy 11113556000 # Layer occupancy (ticks) 50system.membus.reqLayer0.utilization 0.5 # Layer utilization (%) 51system.membus.respLayer1.occupancy 17628966000 # Layer occupancy (ticks) 52system.membus.respLayer1.utilization 0.7 # Layer utilization (%) |
|
| 37system.cpu.dtb.inst_hits 0 # ITB inst hits 38system.cpu.dtb.inst_misses 0 # ITB inst misses 39system.cpu.dtb.read_hits 0 # DTB read hits 40system.cpu.dtb.read_misses 0 # DTB read misses 41system.cpu.dtb.write_hits 0 # DTB write hits 42system.cpu.dtb.write_misses 0 # DTB write misses 43system.cpu.dtb.flush_tlb 0 # Number of times complete TLB was flushed 44system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA --- 373 unchanged lines hidden (view full) --- 418system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 17843.639580 # average ReadReq mshr miss latency 419system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 28362.351514 # average WriteReq mshr miss latency 420system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 28362.351514 # average WriteReq mshr miss latency 421system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 20023.661483 # average overall mshr miss latency 422system.cpu.dcache.demand_avg_mshr_miss_latency::total 20023.661483 # average overall mshr miss latency 423system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 20023.661483 # average overall mshr miss latency 424system.cpu.dcache.overall_avg_mshr_miss_latency::total 20023.661483 # average overall mshr miss latency 425system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate | 53system.cpu.dtb.inst_hits 0 # ITB inst hits 54system.cpu.dtb.inst_misses 0 # ITB inst misses 55system.cpu.dtb.read_hits 0 # DTB read hits 56system.cpu.dtb.read_misses 0 # DTB read misses 57system.cpu.dtb.write_hits 0 # DTB write hits 58system.cpu.dtb.write_misses 0 # DTB write misses 59system.cpu.dtb.flush_tlb 0 # Number of times complete TLB was flushed 60system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA --- 373 unchanged lines hidden (view full) --- 434system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 17843.639580 # average ReadReq mshr miss latency 435system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 28362.351514 # average WriteReq mshr miss latency 436system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 28362.351514 # average WriteReq mshr miss latency 437system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 20023.661483 # average overall mshr miss latency 438system.cpu.dcache.demand_avg_mshr_miss_latency::total 20023.661483 # average overall mshr miss latency 439system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 20023.661483 # average overall mshr miss latency 440system.cpu.dcache.overall_avg_mshr_miss_latency::total 20023.661483 # average overall mshr miss latency 441system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 442system.cpu.toL2Bus.throughput 342944519 # Throughput (bytes/s) 443system.cpu.toL2Bus.trans_dist::ReadReq 7226725 # Transaction distribution 444system.cpu.toL2Bus.trans_dist::ReadResp 7226725 # Transaction distribution 445system.cpu.toL2Bus.trans_dist::Writeback 3697418 # Transaction distribution 446system.cpu.toL2Bus.trans_dist::ReadExReq 1889149 # Transaction distribution 447system.cpu.toL2Bus.trans_dist::ReadExResp 1889149 # Transaction distribution 448system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 1276 # Packet count per connected master and slave (bytes) 449system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 21927890 # Packet count per connected master and slave (bytes) 450system.cpu.toL2Bus.pkt_count 21929166 # Packet count per connected master and slave (bytes) 451system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 40832 # Cumulative packet size per connected master and slave (bytes) 452system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 820009856 # Cumulative packet size per connected master and slave (bytes) 453system.cpu.toL2Bus.tot_pkt_size 820050688 # Cumulative packet size per connected master and slave (bytes) 454system.cpu.toL2Bus.data_through_bus 820050688 # Total data (bytes) 455system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) 456system.cpu.toL2Bus.reqLayer0.occupancy 10104064000 # Layer occupancy (ticks) 457system.cpu.toL2Bus.reqLayer0.utilization 0.4 # Layer utilization (%) 458system.cpu.toL2Bus.respLayer0.occupancy 957000 # Layer occupancy (ticks) 459system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 460system.cpu.toL2Bus.respLayer1.occupancy 13672854000 # Layer occupancy (ticks) 461system.cpu.toL2Bus.respLayer1.utilization 0.6 # Layer utilization (%) |
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| 426 427---------- End Simulation Statistics ---------- | 462 463---------- End Simulation Statistics ---------- |