1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.391205 # Number of seconds simulated 4sim_ticks 2391205115000 # Number of ticks simulated 5final_tick 2391205115000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 1176543 # Simulator instruction rate (inst/s) 8host_op_rate 1313033 # Simulator op (including micro ops) rate (op/s) --- 146 unchanged lines hidden (view full) --- 155system.cpu.num_fp_register_writes 16 # number of times the floating registers were written 156system.cpu.num_mem_refs 660773815 # number of memory refs 157system.cpu.num_load_insts 485926769 # Number of load instructions 158system.cpu.num_store_insts 174847046 # Number of store instructions 159system.cpu.num_idle_cycles 0 # Number of idle cycles 160system.cpu.num_busy_cycles 4782410230 # Number of busy cycles 161system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 162system.cpu.idle_fraction 0 # Percentage of idle cycles |
163system.cpu.Branches 213462426 # Number of branches fetched |
164system.cpu.icache.tags.replacements 7 # number of replacements 165system.cpu.icache.tags.tagsinuse 514.976015 # Cycle average of tags in use 166system.cpu.icache.tags.total_refs 1544564952 # Total number of references to valid blocks. 167system.cpu.icache.tags.sampled_refs 638 # Sample count of references to valid blocks. 168system.cpu.icache.tags.avg_refs 2420948.200627 # Average number of references to valid blocks. 169system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 170system.cpu.icache.tags.occ_blocks::cpu.inst 514.976015 # Average occupied blocks per requestor 171system.cpu.icache.tags.occ_percent::cpu.inst 0.251453 # Average percentage of cache occupancy --- 363 unchanged lines hidden --- |