1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 66 unchanged lines hidden (view full) --- 75switched_out=false 76system=system 77tracer=system.cpu.tracer 78workload=system.cpu.workload 79dcache_port=system.cpu.dcache.cpu_side 80icache_port=system.cpu.icache.cpu_side 81 82[system.cpu.dcache] |
83type=Cache |
84children=tags 85addr_ranges=0:18446744073709551615 86assoc=2 87clk_domain=system.cpu_clk_domain 88demand_mshr_reserve=1 89eventq_index=0 90forward_snoops=true 91hit_latency=2 --- 59 unchanged lines hidden (view full) --- 151clk_domain=system.cpu_clk_domain 152eventq_index=0 153is_stage2=false 154num_squash_per_cycle=2 155sys=system 156port=system.cpu.toL2Bus.slave[3] 157 158[system.cpu.icache] |
159type=Cache |
160children=tags 161addr_ranges=0:18446744073709551615 162assoc=2 163clk_domain=system.cpu_clk_domain 164demand_mshr_reserve=1 165eventq_index=0 166forward_snoops=true 167hit_latency=2 --- 93 unchanged lines hidden (view full) --- 261clk_domain=system.cpu_clk_domain 262eventq_index=0 263is_stage2=false 264num_squash_per_cycle=2 265sys=system 266port=system.cpu.toL2Bus.slave[2] 267 268[system.cpu.l2cache] |
269type=Cache |
270children=tags 271addr_ranges=0:18446744073709551615 272assoc=8 273clk_domain=system.cpu_clk_domain 274demand_mshr_reserve=1 275eventq_index=0 276forward_snoops=true 277hit_latency=20 --- 116 unchanged lines hidden --- |