| stats.txt (9797:9cd5f91e7a79) | stats.txt (9838:43d22d746e7a) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.541686 # Number of seconds simulated 4sim_ticks 541686426500 # Number of ticks simulated 5final_tick 541686426500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.541686 # Number of seconds simulated 4sim_ticks 541686426500 # Number of ticks simulated 5final_tick 541686426500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 161069 # Simulator instruction rate (inst/s) 8host_op_rate 179684 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 56487595 # Simulator tick rate (ticks/s) 10host_mem_usage 246340 # Number of bytes of host memory used 11host_seconds 9589.48 # Real time elapsed on the host | 7host_inst_rate 146656 # Simulator instruction rate (inst/s) 8host_op_rate 163606 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 51433162 # Simulator tick rate (ticks/s) 10host_mem_usage 242412 # Number of bytes of host memory used 11host_seconds 10531.85 # Real time elapsed on the host |
| 12sim_insts 1544563023 # Number of instructions simulated 13sim_ops 1723073835 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 48128 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 143725568 # Number of bytes read from this memory 16system.physmem.bytes_read::total 143773696 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 48128 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 48128 # Number of instructions bytes read from this memory 19system.physmem.bytes_written::writebacks 70430528 # Number of bytes written to this memory --- 9 unchanged lines hidden (view full) --- 29system.physmem.bw_inst_read::cpu.inst 88848 # Instruction read bandwidth from this memory (bytes/s) 30system.physmem.bw_inst_read::total 88848 # Instruction read bandwidth from this memory (bytes/s) 31system.physmem.bw_write::writebacks 130020847 # Write bandwidth from this memory (bytes/s) 32system.physmem.bw_write::total 130020847 # Write bandwidth from this memory (bytes/s) 33system.physmem.bw_total::writebacks 130020847 # Total bandwidth to/from this memory (bytes/s) 34system.physmem.bw_total::cpu.inst 88848 # Total bandwidth to/from this memory (bytes/s) 35system.physmem.bw_total::cpu.data 265329831 # Total bandwidth to/from this memory (bytes/s) 36system.physmem.bw_total::total 395439526 # Total bandwidth to/from this memory (bytes/s) | 12sim_insts 1544563023 # Number of instructions simulated 13sim_ops 1723073835 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 48128 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 143725568 # Number of bytes read from this memory 16system.physmem.bytes_read::total 143773696 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 48128 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 48128 # Number of instructions bytes read from this memory 19system.physmem.bytes_written::writebacks 70430528 # Number of bytes written to this memory --- 9 unchanged lines hidden (view full) --- 29system.physmem.bw_inst_read::cpu.inst 88848 # Instruction read bandwidth from this memory (bytes/s) 30system.physmem.bw_inst_read::total 88848 # Instruction read bandwidth from this memory (bytes/s) 31system.physmem.bw_write::writebacks 130020847 # Write bandwidth from this memory (bytes/s) 32system.physmem.bw_write::total 130020847 # Write bandwidth from this memory (bytes/s) 33system.physmem.bw_total::writebacks 130020847 # Total bandwidth to/from this memory (bytes/s) 34system.physmem.bw_total::cpu.inst 88848 # Total bandwidth to/from this memory (bytes/s) 35system.physmem.bw_total::cpu.data 265329831 # Total bandwidth to/from this memory (bytes/s) 36system.physmem.bw_total::total 395439526 # Total bandwidth to/from this memory (bytes/s) |
| 37system.physmem.readReqs 2246464 # Total number of read requests seen 38system.physmem.writeReqs 1100477 # Total number of write requests seen 39system.physmem.cpureqs 3346951 # Reqs generatd by CPU via cache - shady | 37system.physmem.readReqs 2246464 # Total number of read requests accepted by DRAM controller 38system.physmem.writeReqs 1100477 # Total number of write requests accepted by DRAM controller 39system.physmem.readBursts 2246464 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts 40system.physmem.writeBursts 1100477 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts |
| 40system.physmem.bytesRead 143773696 # Total number of bytes read from memory 41system.physmem.bytesWritten 70430528 # Total number of bytes written to memory 42system.physmem.bytesConsumedRd 143773696 # bytesRead derated as per pkt->getSize() 43system.physmem.bytesConsumedWr 70430528 # bytesWritten derated as per pkt->getSize() | 41system.physmem.bytesRead 143773696 # Total number of bytes read from memory 42system.physmem.bytesWritten 70430528 # Total number of bytes written to memory 43system.physmem.bytesConsumedRd 143773696 # bytesRead derated as per pkt->getSize() 44system.physmem.bytesConsumedWr 70430528 # bytesWritten derated as per pkt->getSize() |
| 44system.physmem.servicedByWrQ 599 # Number of read reqs serviced by write Q | 45system.physmem.servicedByWrQ 599 # Number of DRAM read bursts serviced by write Q |
| 45system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed 46system.physmem.perBankRdReqs::0 139699 # Track reads on a per bank basis 47system.physmem.perBankRdReqs::1 136238 # Track reads on a per bank basis 48system.physmem.perBankRdReqs::2 133756 # Track reads on a per bank basis 49system.physmem.perBankRdReqs::3 136368 # Track reads on a per bank basis 50system.physmem.perBankRdReqs::4 134718 # Track reads on a per bank basis 51system.physmem.perBankRdReqs::5 135333 # Track reads on a per bank basis 52system.physmem.perBankRdReqs::6 136160 # Track reads on a per bank basis --- 258 unchanged lines hidden (view full) --- 311system.physmem.writeRowHitRate 31.17 # Row buffer hit rate for writes 312system.physmem.avgGap 161845.21 # Average gap between requests 313system.membus.throughput 395439408 # Throughput (bytes/s) 314system.membus.trans_dist::ReadReq 1420071 # Transaction distribution 315system.membus.trans_dist::ReadResp 1420070 # Transaction distribution 316system.membus.trans_dist::Writeback 1100477 # Transaction distribution 317system.membus.trans_dist::ReadExReq 826393 # Transaction distribution 318system.membus.trans_dist::ReadExResp 826393 # Transaction distribution | 46system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed 47system.physmem.perBankRdReqs::0 139699 # Track reads on a per bank basis 48system.physmem.perBankRdReqs::1 136238 # Track reads on a per bank basis 49system.physmem.perBankRdReqs::2 133756 # Track reads on a per bank basis 50system.physmem.perBankRdReqs::3 136368 # Track reads on a per bank basis 51system.physmem.perBankRdReqs::4 134718 # Track reads on a per bank basis 52system.physmem.perBankRdReqs::5 135333 # Track reads on a per bank basis 53system.physmem.perBankRdReqs::6 136160 # Track reads on a per bank basis --- 258 unchanged lines hidden (view full) --- 312system.physmem.writeRowHitRate 31.17 # Row buffer hit rate for writes 313system.physmem.avgGap 161845.21 # Average gap between requests 314system.membus.throughput 395439408 # Throughput (bytes/s) 315system.membus.trans_dist::ReadReq 1420071 # Transaction distribution 316system.membus.trans_dist::ReadResp 1420070 # Transaction distribution 317system.membus.trans_dist::Writeback 1100477 # Transaction distribution 318system.membus.trans_dist::ReadExReq 826393 # Transaction distribution 319system.membus.trans_dist::ReadExResp 826393 # Transaction distribution |
| 319system.membus.pkt_count_system.cpu.l2cache.mem_side 5593404 # Packet count per connected master and slave (bytes) 320system.membus.pkt_count 5593404 # Packet count per connected master and slave (bytes) 321system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 214204160 # Cumulative packet size per connected master and slave (bytes) 322system.membus.tot_pkt_size 214204160 # Cumulative packet size per connected master and slave (bytes) | 320system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 5593404 # Packet count per connected master and slave (bytes) 321system.membus.pkt_count::total 5593404 # Packet count per connected master and slave (bytes) 322system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 214204160 # Cumulative packet size per connected master and slave (bytes) 323system.membus.tot_pkt_size::total 214204160 # Cumulative packet size per connected master and slave (bytes) |
| 323system.membus.data_through_bus 214204160 # Total data (bytes) 324system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 325system.membus.reqLayer0.occupancy 12928469250 # Layer occupancy (ticks) 326system.membus.reqLayer0.utilization 2.4 # Layer utilization (%) 327system.membus.respLayer1.occupancy 21152142500 # Layer occupancy (ticks) 328system.membus.respLayer1.utilization 3.9 # Layer utilization (%) 329system.cpu.branchPred.lookups 304298989 # Number of BP lookups 330system.cpu.branchPred.condPredicted 250519406 # Number of conditional branches predicted --- 308 unchanged lines hidden (view full) --- 639system.cpu.misc_regfile_reads 737621013 # number of misc regfile reads 640system.cpu.misc_regfile_writes 124 # number of misc regfile writes 641system.cpu.toL2Bus.throughput 1581534685 # Throughput (bytes/s) 642system.cpu.toL2Bus.trans_dist::ReadReq 7709688 # Transaction distribution 643system.cpu.toL2Bus.trans_dist::ReadResp 7709687 # Transaction distribution 644system.cpu.toL2Bus.trans_dist::Writeback 3782769 # Transaction distribution 645system.cpu.toL2Bus.trans_dist::ReadExReq 1893417 # Transaction distribution 646system.cpu.toL2Bus.trans_dist::ReadExResp 1893417 # Transaction distribution | 324system.membus.data_through_bus 214204160 # Total data (bytes) 325system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 326system.membus.reqLayer0.occupancy 12928469250 # Layer occupancy (ticks) 327system.membus.reqLayer0.utilization 2.4 # Layer utilization (%) 328system.membus.respLayer1.occupancy 21152142500 # Layer occupancy (ticks) 329system.membus.respLayer1.utilization 3.9 # Layer utilization (%) 330system.cpu.branchPred.lookups 304298989 # Number of BP lookups 331system.cpu.branchPred.condPredicted 250519406 # Number of conditional branches predicted --- 308 unchanged lines hidden (view full) --- 640system.cpu.misc_regfile_reads 737621013 # number of misc regfile reads 641system.cpu.misc_regfile_writes 124 # number of misc regfile writes 642system.cpu.toL2Bus.throughput 1581534685 # Throughput (bytes/s) 643system.cpu.toL2Bus.trans_dist::ReadReq 7709688 # Transaction distribution 644system.cpu.toL2Bus.trans_dist::ReadResp 7709687 # Transaction distribution 645system.cpu.toL2Bus.trans_dist::Writeback 3782769 # Transaction distribution 646system.cpu.toL2Bus.trans_dist::ReadExReq 1893417 # Transaction distribution 647system.cpu.toL2Bus.trans_dist::ReadExResp 1893417 # Transaction distribution |
| 647system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 1564 # Packet count per connected master and slave (bytes) 648system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 22987414 # Packet count per connected master and slave (bytes) 649system.cpu.toL2Bus.pkt_count 22988978 # Packet count per connected master and slave (bytes) 650system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 50048 # Cumulative packet size per connected master and slave (bytes) 651system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 856645824 # Cumulative packet size per connected master and slave (bytes) 652system.cpu.toL2Bus.tot_pkt_size 856695872 # Cumulative packet size per connected master and slave (bytes) | 648system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1564 # Packet count per connected master and slave (bytes) 649system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 22987414 # Packet count per connected master and slave (bytes) 650system.cpu.toL2Bus.pkt_count::total 22988978 # Packet count per connected master and slave (bytes) 651system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 50048 # Cumulative packet size per connected master and slave (bytes) 652system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 856645824 # Cumulative packet size per connected master and slave (bytes) 653system.cpu.toL2Bus.tot_pkt_size::total 856695872 # Cumulative packet size per connected master and slave (bytes) |
| 653system.cpu.toL2Bus.data_through_bus 856695872 # Total data (bytes) 654system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) 655system.cpu.toL2Bus.reqLayer0.occupancy 10475876330 # Layer occupancy (ticks) 656system.cpu.toL2Bus.reqLayer0.utilization 1.9 # Layer utilization (%) 657system.cpu.toL2Bus.respLayer0.occupancy 1321749 # Layer occupancy (ticks) 658system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 659system.cpu.toL2Bus.respLayer1.occupancy 14846430743 # Layer occupancy (ticks) 660system.cpu.toL2Bus.respLayer1.utilization 2.7 # Layer utilization (%) | 654system.cpu.toL2Bus.data_through_bus 856695872 # Total data (bytes) 655system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) 656system.cpu.toL2Bus.reqLayer0.occupancy 10475876330 # Layer occupancy (ticks) 657system.cpu.toL2Bus.reqLayer0.utilization 1.9 # Layer utilization (%) 658system.cpu.toL2Bus.respLayer0.occupancy 1321749 # Layer occupancy (ticks) 659system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 660system.cpu.toL2Bus.respLayer1.occupancy 14846430743 # Layer occupancy (ticks) 661system.cpu.toL2Bus.respLayer1.utilization 2.7 # Layer utilization (%) |
| 661system.cpu.icache.tags.replacements 22 # number of replacements 662system.cpu.icache.tags.tagsinuse 629.635316 # Cycle average of tags in use 663system.cpu.icache.tags.total_refs 290622345 # Total number of references to valid blocks. 664system.cpu.icache.tags.sampled_refs 782 # Sample count of references to valid blocks. 665system.cpu.icache.tags.avg_refs 371639.827366 # Average number of references to valid blocks. 666system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 667system.cpu.icache.tags.occ_blocks::cpu.inst 629.635316 # Average occupied blocks per requestor 668system.cpu.icache.tags.occ_percent::cpu.inst 0.307439 # Average percentage of cache occupancy 669system.cpu.icache.tags.occ_percent::total 0.307439 # Average percentage of cache occupancy | 662system.cpu.icache.tags.replacements 22 # number of replacements 663system.cpu.icache.tags.tagsinuse 629.635316 # Cycle average of tags in use 664system.cpu.icache.tags.total_refs 290622345 # Total number of references to valid blocks. 665system.cpu.icache.tags.sampled_refs 782 # Sample count of references to valid blocks. 666system.cpu.icache.tags.avg_refs 371639.827366 # Average number of references to valid blocks. 667system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 668system.cpu.icache.tags.occ_blocks::cpu.inst 629.635316 # Average occupied blocks per requestor 669system.cpu.icache.tags.occ_percent::cpu.inst 0.307439 # Average percentage of cache occupancy 670system.cpu.icache.tags.occ_percent::total 0.307439 # Average percentage of cache occupancy |
| 670system.cpu.icache.ReadReq_hits::cpu.inst 290622345 # number of ReadReq hits 671system.cpu.icache.ReadReq_hits::total 290622345 # number of ReadReq hits 672system.cpu.icache.demand_hits::cpu.inst 290622345 # number of demand (read+write) hits 673system.cpu.icache.demand_hits::total 290622345 # number of demand (read+write) hits 674system.cpu.icache.overall_hits::cpu.inst 290622345 # number of overall hits 675system.cpu.icache.overall_hits::total 290622345 # number of overall hits 676system.cpu.icache.ReadReq_misses::cpu.inst 1216 # number of ReadReq misses 677system.cpu.icache.ReadReq_misses::total 1216 # number of ReadReq misses --- 59 unchanged lines hidden (view full) --- 737system.cpu.icache.overall_mshr_miss_rate::total 0.000003 # mshr miss rate for overall accesses 738system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 76009.911765 # average ReadReq mshr miss latency 739system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 76009.911765 # average ReadReq mshr miss latency 740system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 76009.911765 # average overall mshr miss latency 741system.cpu.icache.demand_avg_mshr_miss_latency::total 76009.911765 # average overall mshr miss latency 742system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 76009.911765 # average overall mshr miss latency 743system.cpu.icache.overall_avg_mshr_miss_latency::total 76009.911765 # average overall mshr miss latency 744system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate | 671system.cpu.icache.ReadReq_hits::cpu.inst 290622345 # number of ReadReq hits 672system.cpu.icache.ReadReq_hits::total 290622345 # number of ReadReq hits 673system.cpu.icache.demand_hits::cpu.inst 290622345 # number of demand (read+write) hits 674system.cpu.icache.demand_hits::total 290622345 # number of demand (read+write) hits 675system.cpu.icache.overall_hits::cpu.inst 290622345 # number of overall hits 676system.cpu.icache.overall_hits::total 290622345 # number of overall hits 677system.cpu.icache.ReadReq_misses::cpu.inst 1216 # number of ReadReq misses 678system.cpu.icache.ReadReq_misses::total 1216 # number of ReadReq misses --- 59 unchanged lines hidden (view full) --- 738system.cpu.icache.overall_mshr_miss_rate::total 0.000003 # mshr miss rate for overall accesses 739system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 76009.911765 # average ReadReq mshr miss latency 740system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 76009.911765 # average ReadReq mshr miss latency 741system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 76009.911765 # average overall mshr miss latency 742system.cpu.icache.demand_avg_mshr_miss_latency::total 76009.911765 # average overall mshr miss latency 743system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 76009.911765 # average overall mshr miss latency 744system.cpu.icache.overall_avg_mshr_miss_latency::total 76009.911765 # average overall mshr miss latency 745system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 745system.cpu.l2cache.tags.replacements 2213775 # number of replacements 746system.cpu.l2cache.tags.tagsinuse 31546.363307 # Cycle average of tags in use 747system.cpu.l2cache.tags.total_refs 9248170 # Total number of references to valid blocks. 748system.cpu.l2cache.tags.sampled_refs 2243553 # Sample count of references to valid blocks. 749system.cpu.l2cache.tags.avg_refs 4.122109 # Average number of references to valid blocks. 750system.cpu.l2cache.tags.warmup_cycle 21352949250 # Cycle when the warmup percentage was hit. | 746system.cpu.l2cache.tags.replacements 2213775 # number of replacements 747system.cpu.l2cache.tags.tagsinuse 31546.363307 # Cycle average of tags in use 748system.cpu.l2cache.tags.total_refs 9248170 # Total number of references to valid blocks. 749system.cpu.l2cache.tags.sampled_refs 2243553 # Sample count of references to valid blocks. 750system.cpu.l2cache.tags.avg_refs 4.122109 # Average number of references to valid blocks. 751system.cpu.l2cache.tags.warmup_cycle 21352949250 # Cycle when the warmup percentage was hit. |
| 751system.cpu.l2cache.tags.occ_blocks::writebacks 14312.491305 # Average occupied blocks per requestor | 752system.cpu.l2cache.tags.occ_blocks::writebacks 14312.491305 # Average occupied blocks per requestor |
| 752system.cpu.l2cache.tags.occ_blocks::cpu.inst 20.144724 # Average occupied blocks per requestor 753system.cpu.l2cache.tags.occ_blocks::cpu.data 17213.727277 # Average occupied blocks per requestor | 753system.cpu.l2cache.tags.occ_blocks::cpu.inst 20.144724 # Average occupied blocks per requestor 754system.cpu.l2cache.tags.occ_blocks::cpu.data 17213.727277 # Average occupied blocks per requestor |
| 754system.cpu.l2cache.tags.occ_percent::writebacks 0.436783 # Average percentage of cache occupancy 755system.cpu.l2cache.tags.occ_percent::cpu.inst 0.000615 # Average percentage of cache occupancy 756system.cpu.l2cache.tags.occ_percent::cpu.data 0.525321 # Average percentage of cache occupancy | 755system.cpu.l2cache.tags.occ_percent::writebacks 0.436783 # Average percentage of cache occupancy 756system.cpu.l2cache.tags.occ_percent::cpu.inst 0.000615 # Average percentage of cache occupancy 757system.cpu.l2cache.tags.occ_percent::cpu.data 0.525321 # Average percentage of cache occupancy |
| 757system.cpu.l2cache.tags.occ_percent::total 0.962719 # Average percentage of cache occupancy | 758system.cpu.l2cache.tags.occ_percent::total 0.962719 # Average percentage of cache occupancy |
| 758system.cpu.l2cache.ReadReq_hits::cpu.inst 29 # number of ReadReq hits 759system.cpu.l2cache.ReadReq_hits::cpu.data 6289580 # number of ReadReq hits 760system.cpu.l2cache.ReadReq_hits::total 6289609 # number of ReadReq hits 761system.cpu.l2cache.Writeback_hits::writebacks 3782769 # number of Writeback hits 762system.cpu.l2cache.Writeback_hits::total 3782769 # number of Writeback hits 763system.cpu.l2cache.ReadExReq_hits::cpu.data 1067024 # number of ReadExReq hits 764system.cpu.l2cache.ReadExReq_hits::total 1067024 # number of ReadExReq hits 765system.cpu.l2cache.demand_hits::cpu.inst 29 # number of demand (read+write) hits --- 118 unchanged lines hidden (view full) --- 884system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 89367.363651 # average ReadExReq mshr miss latency 885system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 64876.329787 # average overall mshr miss latency 886system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 86543.412735 # average overall mshr miss latency 887system.cpu.l2cache.demand_avg_mshr_miss_latency::total 86536.159716 # average overall mshr miss latency 888system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 64876.329787 # average overall mshr miss latency 889system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 86543.412735 # average overall mshr miss latency 890system.cpu.l2cache.overall_avg_mshr_miss_latency::total 86536.159716 # average overall mshr miss latency 891system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate | 759system.cpu.l2cache.ReadReq_hits::cpu.inst 29 # number of ReadReq hits 760system.cpu.l2cache.ReadReq_hits::cpu.data 6289580 # number of ReadReq hits 761system.cpu.l2cache.ReadReq_hits::total 6289609 # number of ReadReq hits 762system.cpu.l2cache.Writeback_hits::writebacks 3782769 # number of Writeback hits 763system.cpu.l2cache.Writeback_hits::total 3782769 # number of Writeback hits 764system.cpu.l2cache.ReadExReq_hits::cpu.data 1067024 # number of ReadExReq hits 765system.cpu.l2cache.ReadExReq_hits::total 1067024 # number of ReadExReq hits 766system.cpu.l2cache.demand_hits::cpu.inst 29 # number of demand (read+write) hits --- 118 unchanged lines hidden (view full) --- 885system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 89367.363651 # average ReadExReq mshr miss latency 886system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 64876.329787 # average overall mshr miss latency 887system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 86543.412735 # average overall mshr miss latency 888system.cpu.l2cache.demand_avg_mshr_miss_latency::total 86536.159716 # average overall mshr miss latency 889system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 64876.329787 # average overall mshr miss latency 890system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 86543.412735 # average overall mshr miss latency 891system.cpu.l2cache.overall_avg_mshr_miss_latency::total 86536.159716 # average overall mshr miss latency 892system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 892system.cpu.dcache.tags.replacements 9598226 # number of replacements 893system.cpu.dcache.tags.tagsinuse 4088.205485 # Cycle average of tags in use 894system.cpu.dcache.tags.total_refs 655929620 # Total number of references to valid blocks. 895system.cpu.dcache.tags.sampled_refs 9602322 # Sample count of references to valid blocks. 896system.cpu.dcache.tags.avg_refs 68.309480 # Average number of references to valid blocks. 897system.cpu.dcache.tags.warmup_cycle 3516509250 # Cycle when the warmup percentage was hit. 898system.cpu.dcache.tags.occ_blocks::cpu.data 4088.205485 # Average occupied blocks per requestor 899system.cpu.dcache.tags.occ_percent::cpu.data 0.998097 # Average percentage of cache occupancy 900system.cpu.dcache.tags.occ_percent::total 0.998097 # Average percentage of cache occupancy | 893system.cpu.dcache.tags.replacements 9598226 # number of replacements 894system.cpu.dcache.tags.tagsinuse 4088.205485 # Cycle average of tags in use 895system.cpu.dcache.tags.total_refs 655929620 # Total number of references to valid blocks. 896system.cpu.dcache.tags.sampled_refs 9602322 # Sample count of references to valid blocks. 897system.cpu.dcache.tags.avg_refs 68.309480 # Average number of references to valid blocks. 898system.cpu.dcache.tags.warmup_cycle 3516509250 # Cycle when the warmup percentage was hit. 899system.cpu.dcache.tags.occ_blocks::cpu.data 4088.205485 # Average occupied blocks per requestor 900system.cpu.dcache.tags.occ_percent::cpu.data 0.998097 # Average percentage of cache occupancy 901system.cpu.dcache.tags.occ_percent::total 0.998097 # Average percentage of cache occupancy |
| 901system.cpu.dcache.ReadReq_hits::cpu.data 488969047 # number of ReadReq hits 902system.cpu.dcache.ReadReq_hits::total 488969047 # number of ReadReq hits 903system.cpu.dcache.WriteReq_hits::cpu.data 166960447 # number of WriteReq hits 904system.cpu.dcache.WriteReq_hits::total 166960447 # number of WriteReq hits 905system.cpu.dcache.LoadLockedReq_hits::cpu.data 65 # number of LoadLockedReq hits 906system.cpu.dcache.LoadLockedReq_hits::total 65 # number of LoadLockedReq hits 907system.cpu.dcache.StoreCondReq_hits::cpu.data 61 # number of StoreCondReq hits 908system.cpu.dcache.StoreCondReq_hits::total 61 # number of StoreCondReq hits --- 111 unchanged lines hidden --- | 902system.cpu.dcache.ReadReq_hits::cpu.data 488969047 # number of ReadReq hits 903system.cpu.dcache.ReadReq_hits::total 488969047 # number of ReadReq hits 904system.cpu.dcache.WriteReq_hits::cpu.data 166960447 # number of WriteReq hits 905system.cpu.dcache.WriteReq_hits::total 166960447 # number of WriteReq hits 906system.cpu.dcache.LoadLockedReq_hits::cpu.data 65 # number of LoadLockedReq hits 907system.cpu.dcache.LoadLockedReq_hits::total 65 # number of LoadLockedReq hits 908system.cpu.dcache.StoreCondReq_hits::cpu.data 61 # number of StoreCondReq hits 909system.cpu.dcache.StoreCondReq_hits::total 61 # number of StoreCondReq hits --- 111 unchanged lines hidden --- |