| stats.txt (11507:be6065c1d8d2) | stats.txt (11515:c48c7cc5a522) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.767804 # Number of seconds simulated 4sim_ticks 767803843500 # Number of ticks simulated 5final_tick 767803843500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.767804 # Number of seconds simulated 4sim_ticks 767803843500 # Number of ticks simulated 5final_tick 767803843500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 196848 # Simulator instruction rate (inst/s) 8host_op_rate 212074 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 97853290 # Simulator tick rate (ticks/s) 10host_mem_usage 309012 # Number of bytes of host memory used 11host_seconds 7846.48 # Real time elapsed on the host | 7host_inst_rate 232866 # Simulator instruction rate (inst/s) 8host_op_rate 250878 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 115757951 # Simulator tick rate (ticks/s) 10host_mem_usage 355612 # Number of bytes of host memory used 11host_seconds 6632.84 # Real time elapsed on the host |
| 12sim_insts 1544563024 # Number of instructions simulated 13sim_ops 1664032416 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 65216 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 235320384 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.l2cache.prefetcher 63711040 # Number of bytes read from this memory 19system.physmem.bytes_read::total 299096640 # Number of bytes read from this memory --- 453 unchanged lines hidden (view full) --- 473system.cpu.rename.UnblockCycles 86124294 # Number of cycles rename is unblocking 474system.cpu.rename.RenamedInsts 1976468269 # Number of instructions processed by rename 475system.cpu.rename.SquashedInsts 26746953 # Number of squashed instructions processed by rename 476system.cpu.rename.ROBFullEvents 45300136 # Number of times rename has blocked due to ROB full 477system.cpu.rename.IQFullEvents 126625 # Number of times rename has blocked due to IQ full 478system.cpu.rename.LQFullEvents 1588286 # Number of times rename has blocked due to LQ full 479system.cpu.rename.SQFullEvents 25069373 # Number of times rename has blocked due to SQ full 480system.cpu.rename.RenamedOperands 1985943496 # Number of destination operands rename has renamed | 12sim_insts 1544563024 # Number of instructions simulated 13sim_ops 1664032416 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 65216 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 235320384 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.l2cache.prefetcher 63711040 # Number of bytes read from this memory 19system.physmem.bytes_read::total 299096640 # Number of bytes read from this memory --- 453 unchanged lines hidden (view full) --- 473system.cpu.rename.UnblockCycles 86124294 # Number of cycles rename is unblocking 474system.cpu.rename.RenamedInsts 1976468269 # Number of instructions processed by rename 475system.cpu.rename.SquashedInsts 26746953 # Number of squashed instructions processed by rename 476system.cpu.rename.ROBFullEvents 45300136 # Number of times rename has blocked due to ROB full 477system.cpu.rename.IQFullEvents 126625 # Number of times rename has blocked due to IQ full 478system.cpu.rename.LQFullEvents 1588286 # Number of times rename has blocked due to LQ full 479system.cpu.rename.SQFullEvents 25069373 # Number of times rename has blocked due to SQ full 480system.cpu.rename.RenamedOperands 1985943496 # Number of destination operands rename has renamed |
| 481system.cpu.rename.RenameLookups 9128568325 # Number of register rename lookups that rename has made | 481system.cpu.rename.RenameLookups 9128568020 # Number of register rename lookups that rename has made |
| 482system.cpu.rename.int_rename_lookups 2432995559 # Number of integer rename lookups 483system.cpu.rename.fp_rename_lookups 145 # Number of floating rename lookups 484system.cpu.rename.CommittedMaps 1674898945 # Number of HB maps that are committed 485system.cpu.rename.UndoneMaps 311044551 # Number of HB maps that are undone due to squashing 486system.cpu.rename.serializingInsts 174 # count of serializing insts renamed 487system.cpu.rename.tempSerializingInsts 175 # count of temporary serializing insts renamed 488system.cpu.rename.skidInsts 111502635 # count of insts added to the skid buffer 489system.cpu.memDep0.insertedLoads 542585286 # Number of loads inserted to the mem dependence unit. 490system.cpu.memDep0.insertedStores 199312070 # Number of stores inserted to the mem dependence unit. 491system.cpu.memDep0.conflictingLoads 26927303 # Number of conflicting loads. 492system.cpu.memDep0.conflictingStores 29234152 # Number of conflicting stores. 493system.cpu.iq.iqInstsAdded 1948047142 # Number of instructions added to the IQ (excludes non-spec) 494system.cpu.iq.iqNonSpecInstsAdded 231 # Number of non-speculative instructions added to the IQ 495system.cpu.iq.iqInstsIssued 1857492479 # Number of instructions issued 496system.cpu.iq.iqSquashedInstsIssued 13497229 # Number of squashed instructions issued 497system.cpu.iq.iqSquashedInstsExamined 284014957 # Number of squashed instructions iterated over during squash; mainly for profiling | 482system.cpu.rename.int_rename_lookups 2432995559 # Number of integer rename lookups 483system.cpu.rename.fp_rename_lookups 145 # Number of floating rename lookups 484system.cpu.rename.CommittedMaps 1674898945 # Number of HB maps that are committed 485system.cpu.rename.UndoneMaps 311044551 # Number of HB maps that are undone due to squashing 486system.cpu.rename.serializingInsts 174 # count of serializing insts renamed 487system.cpu.rename.tempSerializingInsts 175 # count of temporary serializing insts renamed 488system.cpu.rename.skidInsts 111502635 # count of insts added to the skid buffer 489system.cpu.memDep0.insertedLoads 542585286 # Number of loads inserted to the mem dependence unit. 490system.cpu.memDep0.insertedStores 199312070 # Number of stores inserted to the mem dependence unit. 491system.cpu.memDep0.conflictingLoads 26927303 # Number of conflicting loads. 492system.cpu.memDep0.conflictingStores 29234152 # Number of conflicting stores. 493system.cpu.iq.iqInstsAdded 1948047142 # Number of instructions added to the IQ (excludes non-spec) 494system.cpu.iq.iqNonSpecInstsAdded 231 # Number of non-speculative instructions added to the IQ 495system.cpu.iq.iqInstsIssued 1857492479 # Number of instructions issued 496system.cpu.iq.iqSquashedInstsIssued 13497229 # Number of squashed instructions issued 497system.cpu.iq.iqSquashedInstsExamined 284014957 # Number of squashed instructions iterated over during squash; mainly for profiling |
| 498system.cpu.iq.iqSquashedOperandsExamined 647584155 # Number of squashed operands that are examined and possibly removed from graph | 498system.cpu.iq.iqSquashedOperandsExamined 647584065 # Number of squashed operands that are examined and possibly removed from graph |
| 499system.cpu.iq.iqSquashedNonSpecRemoved 61 # Number of squashed non-spec instructions that were removed 500system.cpu.iq.issued_per_cycle::samples 1535531474 # Number of insts issued each cycle 501system.cpu.iq.issued_per_cycle::mean 1.209674 # Number of insts issued each cycle 502system.cpu.iq.issued_per_cycle::stdev 1.150607 # Number of insts issued each cycle 503system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle 504system.cpu.iq.issued_per_cycle::0 582548107 37.94% 37.94% # Number of insts issued each cycle 505system.cpu.iq.issued_per_cycle::1 326134076 21.24% 59.18% # Number of insts issued each cycle 506system.cpu.iq.issued_per_cycle::2 378190631 24.63% 83.81% # Number of insts issued each cycle --- 204 unchanged lines hidden (view full) --- 711system.cpu.ipc 1.005832 # IPC: Instructions Per Cycle 712system.cpu.ipc_total 1.005832 # IPC: Total IPC of All Threads 713system.cpu.int_regfile_reads 2175815840 # number of integer regfile reads 714system.cpu.int_regfile_writes 1261595611 # number of integer regfile writes 715system.cpu.fp_regfile_reads 42 # number of floating regfile reads 716system.cpu.fp_regfile_writes 54 # number of floating regfile writes 717system.cpu.cc_regfile_reads 6965778765 # number of cc regfile reads 718system.cpu.cc_regfile_writes 551854660 # number of cc regfile writes | 499system.cpu.iq.iqSquashedNonSpecRemoved 61 # Number of squashed non-spec instructions that were removed 500system.cpu.iq.issued_per_cycle::samples 1535531474 # Number of insts issued each cycle 501system.cpu.iq.issued_per_cycle::mean 1.209674 # Number of insts issued each cycle 502system.cpu.iq.issued_per_cycle::stdev 1.150607 # Number of insts issued each cycle 503system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle 504system.cpu.iq.issued_per_cycle::0 582548107 37.94% 37.94% # Number of insts issued each cycle 505system.cpu.iq.issued_per_cycle::1 326134076 21.24% 59.18% # Number of insts issued each cycle 506system.cpu.iq.issued_per_cycle::2 378190631 24.63% 83.81% # Number of insts issued each cycle --- 204 unchanged lines hidden (view full) --- 711system.cpu.ipc 1.005832 # IPC: Instructions Per Cycle 712system.cpu.ipc_total 1.005832 # IPC: Total IPC of All Threads 713system.cpu.int_regfile_reads 2175815840 # number of integer regfile reads 714system.cpu.int_regfile_writes 1261595611 # number of integer regfile writes 715system.cpu.fp_regfile_reads 42 # number of floating regfile reads 716system.cpu.fp_regfile_writes 54 # number of floating regfile writes 717system.cpu.cc_regfile_reads 6965778765 # number of cc regfile reads 718system.cpu.cc_regfile_writes 551854660 # number of cc regfile writes |
| 719system.cpu.misc_regfile_reads 675853693 # number of misc regfile reads | 719system.cpu.misc_regfile_reads 675853616 # number of misc regfile reads |
| 720system.cpu.misc_regfile_writes 124 # number of misc regfile writes 721system.cpu.dcache.tags.replacements 17003710 # number of replacements 722system.cpu.dcache.tags.tagsinuse 511.964650 # Cycle average of tags in use 723system.cpu.dcache.tags.total_refs 638076364 # Total number of references to valid blocks. 724system.cpu.dcache.tags.sampled_refs 17004222 # Sample count of references to valid blocks. 725system.cpu.dcache.tags.avg_refs 37.524584 # Average number of references to valid blocks. 726system.cpu.dcache.tags.warmup_cycle 78426500 # Cycle when the warmup percentage was hit. 727system.cpu.dcache.tags.occ_blocks::cpu.data 511.964650 # Average occupied blocks per requestor --- 510 unchanged lines hidden --- | 720system.cpu.misc_regfile_writes 124 # number of misc regfile writes 721system.cpu.dcache.tags.replacements 17003710 # number of replacements 722system.cpu.dcache.tags.tagsinuse 511.964650 # Cycle average of tags in use 723system.cpu.dcache.tags.total_refs 638076364 # Total number of references to valid blocks. 724system.cpu.dcache.tags.sampled_refs 17004222 # Sample count of references to valid blocks. 725system.cpu.dcache.tags.avg_refs 37.524584 # Average number of references to valid blocks. 726system.cpu.dcache.tags.warmup_cycle 78426500 # Cycle when the warmup percentage was hit. 727system.cpu.dcache.tags.occ_blocks::cpu.data 511.964650 # Average occupied blocks per requestor --- 510 unchanged lines hidden --- |