1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20load_addr_mask=1099511627775
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20load_addr_mask=1099511627775
|
| 21load_offset=0
|
21mem_mode=timing 22mem_ranges= 23memories=system.physmem 24num_work_ids=16 25readfile= 26symbolfile= 27work_begin_ckpt_count=0 28work_begin_cpu_id_exit=-1 29work_begin_exit_count=0 30work_cpus_ckpt_count=0 31work_end_ckpt_count=0 32work_end_exit_count=0 33work_item_id=-1 34system_port=system.membus.slave[0] 35 36[system.clk_domain] 37type=SrcClockDomain 38clock=1000 39eventq_index=0 40voltage_domain=system.voltage_domain 41 42[system.cpu] 43type=TimingSimpleCPU
| 22mem_mode=timing 23mem_ranges= 24memories=system.physmem 25num_work_ids=16 26readfile= 27symbolfile= 28work_begin_ckpt_count=0 29work_begin_cpu_id_exit=-1 30work_begin_exit_count=0 31work_cpus_ckpt_count=0 32work_end_ckpt_count=0 33work_end_exit_count=0 34work_item_id=-1 35system_port=system.membus.slave[0] 36 37[system.clk_domain] 38type=SrcClockDomain 39clock=1000 40eventq_index=0 41voltage_domain=system.voltage_domain 42 43[system.cpu] 44type=TimingSimpleCPU
|
44children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
| 45children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload
|
45checker=Null 46clk_domain=system.cpu_clk_domain 47cpu_id=0 48do_checkpoint_insts=true 49do_quiesce=true 50do_statistics_insts=true
| 46checker=Null 47clk_domain=system.cpu_clk_domain 48cpu_id=0 49do_checkpoint_insts=true 50do_quiesce=true 51do_statistics_insts=true
|
| 52dstage2_mmu=system.cpu.dstage2_mmu
|
51dtb=system.cpu.dtb 52eventq_index=0 53function_trace=false 54function_trace_start=0 55interrupts=system.cpu.interrupts 56isa=system.cpu.isa
| 53dtb=system.cpu.dtb 54eventq_index=0 55function_trace=false 56function_trace_start=0 57interrupts=system.cpu.interrupts 58isa=system.cpu.isa
|
| 59istage2_mmu=system.cpu.istage2_mmu
|
57itb=system.cpu.itb 58max_insts_all_threads=0 59max_insts_any_thread=0 60max_loads_all_threads=0 61max_loads_any_thread=0 62numThreads=1 63profile=0 64progress_interval=0 65simpoint_start_insts= 66switched_out=false 67system=system 68tracer=system.cpu.tracer 69workload=system.cpu.workload 70dcache_port=system.cpu.dcache.cpu_side 71icache_port=system.cpu.icache.cpu_side 72 73[system.cpu.dcache] 74type=BaseCache 75children=tags 76addr_ranges=0:18446744073709551615 77assoc=2 78clk_domain=system.cpu_clk_domain 79eventq_index=0 80forward_snoops=true 81hit_latency=2 82is_top_level=true 83max_miss_count=0 84mshrs=4 85prefetch_on_access=false 86prefetcher=Null 87response_latency=2 88sequential_access=false 89size=262144 90system=system 91tags=system.cpu.dcache.tags 92tgts_per_mshr=20 93two_queue=false 94write_buffers=8 95cpu_side=system.cpu.dcache_port 96mem_side=system.cpu.toL2Bus.slave[1] 97 98[system.cpu.dcache.tags] 99type=LRU 100assoc=2 101block_size=64 102clk_domain=system.cpu_clk_domain 103eventq_index=0 104hit_latency=2 105sequential_access=false 106size=262144 107
| 60itb=system.cpu.itb 61max_insts_all_threads=0 62max_insts_any_thread=0 63max_loads_all_threads=0 64max_loads_any_thread=0 65numThreads=1 66profile=0 67progress_interval=0 68simpoint_start_insts= 69switched_out=false 70system=system 71tracer=system.cpu.tracer 72workload=system.cpu.workload 73dcache_port=system.cpu.dcache.cpu_side 74icache_port=system.cpu.icache.cpu_side 75 76[system.cpu.dcache] 77type=BaseCache 78children=tags 79addr_ranges=0:18446744073709551615 80assoc=2 81clk_domain=system.cpu_clk_domain 82eventq_index=0 83forward_snoops=true 84hit_latency=2 85is_top_level=true 86max_miss_count=0 87mshrs=4 88prefetch_on_access=false 89prefetcher=Null 90response_latency=2 91sequential_access=false 92size=262144 93system=system 94tags=system.cpu.dcache.tags 95tgts_per_mshr=20 96two_queue=false 97write_buffers=8 98cpu_side=system.cpu.dcache_port 99mem_side=system.cpu.toL2Bus.slave[1] 100 101[system.cpu.dcache.tags] 102type=LRU 103assoc=2 104block_size=64 105clk_domain=system.cpu_clk_domain 106eventq_index=0 107hit_latency=2 108sequential_access=false 109size=262144 110
|
| 111[system.cpu.dstage2_mmu] 112type=ArmStage2MMU 113children=stage2_tlb 114eventq_index=0 115stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 116tlb=system.cpu.dtb 117 118[system.cpu.dstage2_mmu.stage2_tlb] 119type=ArmTLB 120children=walker 121eventq_index=0 122is_stage2=true 123size=32 124walker=system.cpu.dstage2_mmu.stage2_tlb.walker 125 126[system.cpu.dstage2_mmu.stage2_tlb.walker] 127type=ArmTableWalker 128clk_domain=system.cpu_clk_domain 129eventq_index=0 130is_stage2=true 131num_squash_per_cycle=2 132sys=system 133port=system.cpu.toL2Bus.slave[5] 134
|
108[system.cpu.dtb] 109type=ArmTLB 110children=walker 111eventq_index=0
| 135[system.cpu.dtb] 136type=ArmTLB 137children=walker 138eventq_index=0
|
| 139is_stage2=false
|
112size=64 113walker=system.cpu.dtb.walker 114 115[system.cpu.dtb.walker] 116type=ArmTableWalker 117clk_domain=system.cpu_clk_domain 118eventq_index=0
| 140size=64 141walker=system.cpu.dtb.walker 142 143[system.cpu.dtb.walker] 144type=ArmTableWalker 145clk_domain=system.cpu_clk_domain 146eventq_index=0
|
| 147is_stage2=false
|
119num_squash_per_cycle=2 120sys=system 121port=system.cpu.toL2Bus.slave[3] 122 123[system.cpu.icache] 124type=BaseCache 125children=tags 126addr_ranges=0:18446744073709551615 127assoc=2 128clk_domain=system.cpu_clk_domain 129eventq_index=0 130forward_snoops=true 131hit_latency=2 132is_top_level=true 133max_miss_count=0 134mshrs=4 135prefetch_on_access=false 136prefetcher=Null 137response_latency=2 138sequential_access=false 139size=131072 140system=system 141tags=system.cpu.icache.tags 142tgts_per_mshr=20 143two_queue=false 144write_buffers=8 145cpu_side=system.cpu.icache_port 146mem_side=system.cpu.toL2Bus.slave[0] 147 148[system.cpu.icache.tags] 149type=LRU 150assoc=2 151block_size=64 152clk_domain=system.cpu_clk_domain 153eventq_index=0 154hit_latency=2 155sequential_access=false 156size=131072 157 158[system.cpu.interrupts] 159type=ArmInterrupts 160eventq_index=0 161 162[system.cpu.isa] 163type=ArmISA 164eventq_index=0 165fpsid=1090793632
| 148num_squash_per_cycle=2 149sys=system 150port=system.cpu.toL2Bus.slave[3] 151 152[system.cpu.icache] 153type=BaseCache 154children=tags 155addr_ranges=0:18446744073709551615 156assoc=2 157clk_domain=system.cpu_clk_domain 158eventq_index=0 159forward_snoops=true 160hit_latency=2 161is_top_level=true 162max_miss_count=0 163mshrs=4 164prefetch_on_access=false 165prefetcher=Null 166response_latency=2 167sequential_access=false 168size=131072 169system=system 170tags=system.cpu.icache.tags 171tgts_per_mshr=20 172two_queue=false 173write_buffers=8 174cpu_side=system.cpu.icache_port 175mem_side=system.cpu.toL2Bus.slave[0] 176 177[system.cpu.icache.tags] 178type=LRU 179assoc=2 180block_size=64 181clk_domain=system.cpu_clk_domain 182eventq_index=0 183hit_latency=2 184sequential_access=false 185size=131072 186 187[system.cpu.interrupts] 188type=ArmInterrupts 189eventq_index=0 190 191[system.cpu.isa] 192type=ArmISA 193eventq_index=0 194fpsid=1090793632
|
| 195id_aa64afr0_el1=0 196id_aa64afr1_el1=0 197id_aa64dfr0_el1=1052678 198id_aa64dfr1_el1=0 199id_aa64isar0_el1=0 200id_aa64isar1_el1=0 201id_aa64mmfr0_el1=15728642 202id_aa64mmfr1_el1=0 203id_aa64pfr0_el1=17 204id_aa64pfr1_el1=0
|
166id_isar0=34607377 167id_isar1=34677009 168id_isar2=555950401 169id_isar3=17899825 170id_isar4=268501314 171id_isar5=0
| 205id_isar0=34607377 206id_isar1=34677009 207id_isar2=555950401 208id_isar3=17899825 209id_isar4=268501314 210id_isar5=0
|
172id_mmfr0=3
| 211id_mmfr0=270536963
|
173id_mmfr1=0 174id_mmfr2=19070976
| 212id_mmfr1=0 213id_mmfr2=19070976
|
175id_mmfr3=4027589137
| 214id_mmfr3=34611729
|
176id_pfr0=49
| 215id_pfr0=49
|
177id_pfr1=1 178midr=890224640
| 216id_pfr1=4113 217midr=1091551472 218system=system
|
179
| 219
|
| 220[system.cpu.istage2_mmu] 221type=ArmStage2MMU 222children=stage2_tlb 223eventq_index=0 224stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 225tlb=system.cpu.itb 226 227[system.cpu.istage2_mmu.stage2_tlb] 228type=ArmTLB 229children=walker 230eventq_index=0 231is_stage2=true 232size=32 233walker=system.cpu.istage2_mmu.stage2_tlb.walker 234 235[system.cpu.istage2_mmu.stage2_tlb.walker] 236type=ArmTableWalker 237clk_domain=system.cpu_clk_domain 238eventq_index=0 239is_stage2=true 240num_squash_per_cycle=2 241sys=system 242port=system.cpu.toL2Bus.slave[4] 243
|
180[system.cpu.itb] 181type=ArmTLB 182children=walker 183eventq_index=0
| 244[system.cpu.itb] 245type=ArmTLB 246children=walker 247eventq_index=0
|
| 248is_stage2=false
|
184size=64 185walker=system.cpu.itb.walker 186 187[system.cpu.itb.walker] 188type=ArmTableWalker 189clk_domain=system.cpu_clk_domain 190eventq_index=0
| 249size=64 250walker=system.cpu.itb.walker 251 252[system.cpu.itb.walker] 253type=ArmTableWalker 254clk_domain=system.cpu_clk_domain 255eventq_index=0
|
| 256is_stage2=false
|
191num_squash_per_cycle=2 192sys=system 193port=system.cpu.toL2Bus.slave[2] 194 195[system.cpu.l2cache] 196type=BaseCache 197children=tags 198addr_ranges=0:18446744073709551615 199assoc=8 200clk_domain=system.cpu_clk_domain 201eventq_index=0 202forward_snoops=true 203hit_latency=20 204is_top_level=false 205max_miss_count=0 206mshrs=20 207prefetch_on_access=false 208prefetcher=Null 209response_latency=20 210sequential_access=false 211size=2097152 212system=system 213tags=system.cpu.l2cache.tags 214tgts_per_mshr=12 215two_queue=false 216write_buffers=8 217cpu_side=system.cpu.toL2Bus.master[0] 218mem_side=system.membus.slave[1] 219 220[system.cpu.l2cache.tags] 221type=LRU 222assoc=8 223block_size=64 224clk_domain=system.cpu_clk_domain 225eventq_index=0 226hit_latency=20 227sequential_access=false 228size=2097152 229 230[system.cpu.toL2Bus] 231type=CoherentBus 232clk_domain=system.cpu_clk_domain 233eventq_index=0 234header_cycles=1 235system=system 236use_default_range=false 237width=32 238master=system.cpu.l2cache.cpu_side
| 257num_squash_per_cycle=2 258sys=system 259port=system.cpu.toL2Bus.slave[2] 260 261[system.cpu.l2cache] 262type=BaseCache 263children=tags 264addr_ranges=0:18446744073709551615 265assoc=8 266clk_domain=system.cpu_clk_domain 267eventq_index=0 268forward_snoops=true 269hit_latency=20 270is_top_level=false 271max_miss_count=0 272mshrs=20 273prefetch_on_access=false 274prefetcher=Null 275response_latency=20 276sequential_access=false 277size=2097152 278system=system 279tags=system.cpu.l2cache.tags 280tgts_per_mshr=12 281two_queue=false 282write_buffers=8 283cpu_side=system.cpu.toL2Bus.master[0] 284mem_side=system.membus.slave[1] 285 286[system.cpu.l2cache.tags] 287type=LRU 288assoc=8 289block_size=64 290clk_domain=system.cpu_clk_domain 291eventq_index=0 292hit_latency=20 293sequential_access=false 294size=2097152 295 296[system.cpu.toL2Bus] 297type=CoherentBus 298clk_domain=system.cpu_clk_domain 299eventq_index=0 300header_cycles=1 301system=system 302use_default_range=false 303width=32 304master=system.cpu.l2cache.cpu_side
|
239slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
| 305slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port
|
240 241[system.cpu.tracer] 242type=ExeTracer 243eventq_index=0 244 245[system.cpu.workload] 246type=LiveProcess 247cmd=perlbmk -I. -I lib lgred.makerand.pl 248cwd=build/ARM/tests/opt/long/se/40.perlbmk/arm/linux/simple-timing 249egid=100 250env= 251errout=cerr 252euid=100 253eventq_index=0 254executable=/dist/cpu2000/binaries/arm/linux/perlbmk 255gid=100 256input=cin 257max_stack_size=67108864 258output=cout 259pid=100 260ppid=99 261simpoint=0 262system=system 263uid=100 264 265[system.cpu_clk_domain] 266type=SrcClockDomain 267clock=500 268eventq_index=0 269voltage_domain=system.voltage_domain 270 271[system.membus] 272type=CoherentBus 273clk_domain=system.clk_domain 274eventq_index=0 275header_cycles=1 276system=system 277use_default_range=false 278width=8 279master=system.physmem.port 280slave=system.system_port system.cpu.l2cache.mem_side 281 282[system.physmem] 283type=SimpleMemory 284bandwidth=73.000000 285clk_domain=system.clk_domain 286conf_table_reported=true 287eventq_index=0 288in_addr_map=true 289latency=30000 290latency_var=0 291null=false 292range=0:134217727 293port=system.membus.master[0] 294 295[system.voltage_domain] 296type=VoltageDomain 297eventq_index=0 298voltage=1.000000 299
| 306 307[system.cpu.tracer] 308type=ExeTracer 309eventq_index=0 310 311[system.cpu.workload] 312type=LiveProcess 313cmd=perlbmk -I. -I lib lgred.makerand.pl 314cwd=build/ARM/tests/opt/long/se/40.perlbmk/arm/linux/simple-timing 315egid=100 316env= 317errout=cerr 318euid=100 319eventq_index=0 320executable=/dist/cpu2000/binaries/arm/linux/perlbmk 321gid=100 322input=cin 323max_stack_size=67108864 324output=cout 325pid=100 326ppid=99 327simpoint=0 328system=system 329uid=100 330 331[system.cpu_clk_domain] 332type=SrcClockDomain 333clock=500 334eventq_index=0 335voltage_domain=system.voltage_domain 336 337[system.membus] 338type=CoherentBus 339clk_domain=system.clk_domain 340eventq_index=0 341header_cycles=1 342system=system 343use_default_range=false 344width=8 345master=system.physmem.port 346slave=system.system_port system.cpu.l2cache.mem_side 347 348[system.physmem] 349type=SimpleMemory 350bandwidth=73.000000 351clk_domain=system.clk_domain 352conf_table_reported=true 353eventq_index=0 354in_addr_map=true 355latency=30000 356latency_var=0 357null=false 358range=0:134217727 359port=system.membus.master[0] 360 361[system.voltage_domain] 362type=VoltageDomain 363eventq_index=0 364voltage=1.000000 365
|