| config.ini (10036:80e84beef3bb) | config.ini (10038:7eccd14e2610) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 4 unchanged lines hidden (view full) --- 13children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20load_addr_mask=1099511627775 | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 4 unchanged lines hidden (view full) --- 13children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20load_addr_mask=1099511627775 |
| 21load_offset=0 |
|
| 21mem_mode=atomic 22mem_ranges= 23memories=system.physmem 24num_work_ids=16 25readfile= 26symbolfile= 27work_begin_ckpt_count=0 28work_begin_cpu_id_exit=-1 --- 7 unchanged lines hidden (view full) --- 36[system.clk_domain] 37type=SrcClockDomain 38clock=1000 39eventq_index=0 40voltage_domain=system.voltage_domain 41 42[system.cpu] 43type=AtomicSimpleCPU | 22mem_mode=atomic 23mem_ranges= 24memories=system.physmem 25num_work_ids=16 26readfile= 27symbolfile= 28work_begin_ckpt_count=0 29work_begin_cpu_id_exit=-1 --- 7 unchanged lines hidden (view full) --- 37[system.clk_domain] 38type=SrcClockDomain 39clock=1000 40eventq_index=0 41voltage_domain=system.voltage_domain 42 43[system.cpu] 44type=AtomicSimpleCPU |
| 44children=dtb interrupts isa itb tracer workload | 45children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload |
| 45checker=Null 46clk_domain=system.cpu_clk_domain 47cpu_id=0 48do_checkpoint_insts=true 49do_quiesce=true 50do_statistics_insts=true | 46checker=Null 47clk_domain=system.cpu_clk_domain 48cpu_id=0 49do_checkpoint_insts=true 50do_quiesce=true 51do_statistics_insts=true |
| 52dstage2_mmu=system.cpu.dstage2_mmu |
|
| 51dtb=system.cpu.dtb 52eventq_index=0 53fastmem=false 54function_trace=false 55function_trace_start=0 56interrupts=system.cpu.interrupts 57isa=system.cpu.isa | 53dtb=system.cpu.dtb 54eventq_index=0 55fastmem=false 56function_trace=false 57function_trace_start=0 58interrupts=system.cpu.interrupts 59isa=system.cpu.isa |
| 60istage2_mmu=system.cpu.istage2_mmu |
|
| 58itb=system.cpu.itb 59max_insts_all_threads=0 60max_insts_any_thread=0 61max_loads_all_threads=0 62max_loads_any_thread=0 63numThreads=1 64profile=0 65progress_interval=0 --- 6 unchanged lines hidden (view full) --- 72switched_out=false 73system=system 74tracer=system.cpu.tracer 75width=1 76workload=system.cpu.workload 77dcache_port=system.membus.slave[2] 78icache_port=system.membus.slave[1] 79 | 61itb=system.cpu.itb 62max_insts_all_threads=0 63max_insts_any_thread=0 64max_loads_all_threads=0 65max_loads_any_thread=0 66numThreads=1 67profile=0 68progress_interval=0 --- 6 unchanged lines hidden (view full) --- 75switched_out=false 76system=system 77tracer=system.cpu.tracer 78width=1 79workload=system.cpu.workload 80dcache_port=system.membus.slave[2] 81icache_port=system.membus.slave[1] 82 |
| 83[system.cpu.dstage2_mmu] 84type=ArmStage2MMU 85children=stage2_tlb 86eventq_index=0 87stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 88tlb=system.cpu.dtb 89 90[system.cpu.dstage2_mmu.stage2_tlb] 91type=ArmTLB 92children=walker 93eventq_index=0 94is_stage2=true 95size=32 96walker=system.cpu.dstage2_mmu.stage2_tlb.walker 97 98[system.cpu.dstage2_mmu.stage2_tlb.walker] 99type=ArmTableWalker 100clk_domain=system.cpu_clk_domain 101eventq_index=0 102is_stage2=true 103num_squash_per_cycle=2 104sys=system 105port=system.membus.slave[6] 106 |
|
| 80[system.cpu.dtb] 81type=ArmTLB 82children=walker 83eventq_index=0 | 107[system.cpu.dtb] 108type=ArmTLB 109children=walker 110eventq_index=0 |
| 111is_stage2=false |
|
| 84size=64 85walker=system.cpu.dtb.walker 86 87[system.cpu.dtb.walker] 88type=ArmTableWalker 89clk_domain=system.cpu_clk_domain 90eventq_index=0 | 112size=64 113walker=system.cpu.dtb.walker 114 115[system.cpu.dtb.walker] 116type=ArmTableWalker 117clk_domain=system.cpu_clk_domain 118eventq_index=0 |
| 119is_stage2=false |
|
| 91num_squash_per_cycle=2 92sys=system 93port=system.membus.slave[4] 94 95[system.cpu.interrupts] 96type=ArmInterrupts 97eventq_index=0 98 99[system.cpu.isa] 100type=ArmISA 101eventq_index=0 102fpsid=1090793632 | 120num_squash_per_cycle=2 121sys=system 122port=system.membus.slave[4] 123 124[system.cpu.interrupts] 125type=ArmInterrupts 126eventq_index=0 127 128[system.cpu.isa] 129type=ArmISA 130eventq_index=0 131fpsid=1090793632 |
| 132id_aa64afr0_el1=0 133id_aa64afr1_el1=0 134id_aa64dfr0_el1=1052678 135id_aa64dfr1_el1=0 136id_aa64isar0_el1=0 137id_aa64isar1_el1=0 138id_aa64mmfr0_el1=15728642 139id_aa64mmfr1_el1=0 140id_aa64pfr0_el1=17 141id_aa64pfr1_el1=0 |
|
| 103id_isar0=34607377 104id_isar1=34677009 105id_isar2=555950401 106id_isar3=17899825 107id_isar4=268501314 108id_isar5=0 | 142id_isar0=34607377 143id_isar1=34677009 144id_isar2=555950401 145id_isar3=17899825 146id_isar4=268501314 147id_isar5=0 |
| 109id_mmfr0=3 | 148id_mmfr0=270536963 |
| 110id_mmfr1=0 111id_mmfr2=19070976 | 149id_mmfr1=0 150id_mmfr2=19070976 |
| 112id_mmfr3=4027589137 | 151id_mmfr3=34611729 |
| 113id_pfr0=49 | 152id_pfr0=49 |
| 114id_pfr1=1 115midr=890224640 | 153id_pfr1=4113 154midr=1091551472 155system=system |
| 116 | 156 |
| 157[system.cpu.istage2_mmu] 158type=ArmStage2MMU 159children=stage2_tlb 160eventq_index=0 161stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 162tlb=system.cpu.itb 163 164[system.cpu.istage2_mmu.stage2_tlb] 165type=ArmTLB 166children=walker 167eventq_index=0 168is_stage2=true 169size=32 170walker=system.cpu.istage2_mmu.stage2_tlb.walker 171 172[system.cpu.istage2_mmu.stage2_tlb.walker] 173type=ArmTableWalker 174clk_domain=system.cpu_clk_domain 175eventq_index=0 176is_stage2=true 177num_squash_per_cycle=2 178sys=system 179port=system.membus.slave[5] 180 |
|
| 117[system.cpu.itb] 118type=ArmTLB 119children=walker 120eventq_index=0 | 181[system.cpu.itb] 182type=ArmTLB 183children=walker 184eventq_index=0 |
| 185is_stage2=false |
|
| 121size=64 122walker=system.cpu.itb.walker 123 124[system.cpu.itb.walker] 125type=ArmTableWalker 126clk_domain=system.cpu_clk_domain 127eventq_index=0 | 186size=64 187walker=system.cpu.itb.walker 188 189[system.cpu.itb.walker] 190type=ArmTableWalker 191clk_domain=system.cpu_clk_domain 192eventq_index=0 |
| 193is_stage2=false |
|
| 128num_squash_per_cycle=2 129sys=system 130port=system.membus.slave[3] 131 132[system.cpu.tracer] 133type=ExeTracer 134eventq_index=0 135 --- 27 unchanged lines hidden (view full) --- 163type=CoherentBus 164clk_domain=system.clk_domain 165eventq_index=0 166header_cycles=1 167system=system 168use_default_range=false 169width=8 170master=system.physmem.port | 194num_squash_per_cycle=2 195sys=system 196port=system.membus.slave[3] 197 198[system.cpu.tracer] 199type=ExeTracer 200eventq_index=0 201 --- 27 unchanged lines hidden (view full) --- 229type=CoherentBus 230clk_domain=system.clk_domain 231eventq_index=0 232header_cycles=1 233system=system 234use_default_range=false 235width=8 236master=system.physmem.port |
| 171slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port | 237slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port |
| 172 173[system.physmem] 174type=SimpleMemory 175bandwidth=73.000000 176clk_domain=system.clk_domain 177conf_table_reported=true 178eventq_index=0 179in_addr_map=true 180latency=30000 181latency_var=0 182null=false 183range=0:134217727 184port=system.membus.master[0] 185 186[system.voltage_domain] 187type=VoltageDomain 188eventq_index=0 189voltage=1.000000 190 | 238 239[system.physmem] 240type=SimpleMemory 241bandwidth=73.000000 242clk_domain=system.clk_domain 243conf_table_reported=true 244eventq_index=0 245in_addr_map=true 246latency=30000 247latency_var=0 248null=false 249range=0:134217727 250port=system.membus.master[0] 251 252[system.voltage_domain] 253type=VoltageDomain 254eventq_index=0 255voltage=1.000000 256 |