| stats.txt (10726:8a20e2a1562d) | stats.txt (10736:4433fb00fa7d) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.409399 # Number of seconds simulated 4sim_ticks 409399480000 # Number of ticks simulated 5final_tick 409399480000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 93383 # Simulator instruction rate (inst/s) 8host_op_rate 114967 # Simulator op (including micro ops) rate (op/s) --- 678 unchanged lines hidden (view full) --- 687system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 51.67% # Class of committed instruction 688system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 51.67% # Class of committed instruction 689system.cpu.commit.op_class_0::MemRead 252240938 31.98% 83.65% # Class of committed instruction 690system.cpu.commit.op_class_0::MemWrite 128980496 16.35% 100.00% # Class of committed instruction 691system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 692system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 693system.cpu.commit.op_class_0::total 788730069 # Class of committed instruction 694system.cpu.commit.bw_lim_events 22360483 # number cycles where commit BW limit reached | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.409399 # Number of seconds simulated 4sim_ticks 409399480000 # Number of ticks simulated 5final_tick 409399480000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 93383 # Simulator instruction rate (inst/s) 8host_op_rate 114967 # Simulator op (including micro ops) rate (op/s) --- 678 unchanged lines hidden (view full) --- 687system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 51.67% # Class of committed instruction 688system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 51.67% # Class of committed instruction 689system.cpu.commit.op_class_0::MemRead 252240938 31.98% 83.65% # Class of committed instruction 690system.cpu.commit.op_class_0::MemWrite 128980496 16.35% 100.00% # Class of committed instruction 691system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 692system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 693system.cpu.commit.op_class_0::total 788730069 # Class of committed instruction 694system.cpu.commit.bw_lim_events 22360483 # number cycles where commit BW limit reached |
| 695system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits | |
| 696system.cpu.rob.rob_reads 1891410858 # The number of ROB reads 697system.cpu.rob.rob_writes 2343104087 # The number of ROB writes 698system.cpu.timesIdled 647398 # Number of times that the entire CPU went into an idle state and unscheduled itself 699system.cpu.idleCycles 338168 # Total number of cycles that the CPU has spent unscheduled due to idling 700system.cpu.committedInsts 640649298 # Number of Instructions Simulated 701system.cpu.committedOps 788724957 # Number of Ops (including micro ops) Simulated 702system.cpu.cpi 1.278077 # CPI: Cycles Per Instruction 703system.cpu.cpi_total 1.278077 # CPI: Total CPI of All Threads --- 514 unchanged lines hidden --- | 695system.cpu.rob.rob_reads 1891410858 # The number of ROB reads 696system.cpu.rob.rob_writes 2343104087 # The number of ROB writes 697system.cpu.timesIdled 647398 # Number of times that the entire CPU went into an idle state and unscheduled itself 698system.cpu.idleCycles 338168 # Total number of cycles that the CPU has spent unscheduled due to idling 699system.cpu.committedInsts 640649298 # Number of Instructions Simulated 700system.cpu.committedOps 788724957 # Number of Ops (including micro ops) Simulated 701system.cpu.cpi 1.278077 # CPI: Cycles Per Instruction 702system.cpu.cpi_total 1.278077 # CPI: Total CPI of All Threads --- 514 unchanged lines hidden --- |