| stats.txt (10452:be23c690f8c0) | stats.txt (10488:7c27480a5031) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.407884 # Number of seconds simulated 4sim_ticks 407883784500 # Number of ticks simulated 5final_tick 407883784500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 135225 # Simulator instruction rate (inst/s) 8host_op_rate 166480 # Simulator op (including micro ops) rate (op/s) --- 406 unchanged lines hidden (view full) --- 415system.cpu.itb.hits 0 # DTB hits 416system.cpu.itb.misses 0 # DTB misses 417system.cpu.itb.accesses 0 # DTB accesses 418system.cpu.workload.num_syscalls 673 # Number of system calls 419system.cpu.numCycles 815767570 # number of cpu cycles simulated 420system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 421system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 422system.cpu.fetch.icacheStallCycles 84062545 # Number of cycles fetch is stalled on an Icache miss | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.407884 # Number of seconds simulated 4sim_ticks 407883784500 # Number of ticks simulated 5final_tick 407883784500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 135225 # Simulator instruction rate (inst/s) 8host_op_rate 166480 # Simulator op (including micro ops) rate (op/s) --- 406 unchanged lines hidden (view full) --- 415system.cpu.itb.hits 0 # DTB hits 416system.cpu.itb.misses 0 # DTB misses 417system.cpu.itb.accesses 0 # DTB accesses 418system.cpu.workload.num_syscalls 673 # Number of system calls 419system.cpu.numCycles 815767570 # number of cpu cycles simulated 420system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 421system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 422system.cpu.fetch.icacheStallCycles 84062545 # Number of cycles fetch is stalled on an Icache miss |
| 423system.cpu.fetch.Insts 1200075863 # Number of instructions fetch has processed | 423system.cpu.fetch.Insts 1200075862 # Number of instructions fetch has processed |
| 424system.cpu.fetch.Branches 233961455 # Number of branches that fetch encountered 425system.cpu.fetch.predictedBranches 133292629 # Number of branches that fetch has predicted taken 426system.cpu.fetch.Cycles 716015819 # Number of cycles fetch has run and was not squashing or blocked | 424system.cpu.fetch.Branches 233961455 # Number of branches that fetch encountered 425system.cpu.fetch.predictedBranches 133292629 # Number of branches that fetch has predicted taken 426system.cpu.fetch.Cycles 716015819 # Number of cycles fetch has run and was not squashing or blocked |
| 427system.cpu.fetch.SquashCycles 31064710 # Number of cycles fetch has spent squashing | 427system.cpu.fetch.SquashCycles 31064711 # Number of cycles fetch has spent squashing |
| 428system.cpu.fetch.MiscStallCycles 216 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs 429system.cpu.fetch.PendingTrapStallCycles 31 # Number of stall cycles due to pending traps 430system.cpu.fetch.IcacheWaitRetryStallCycles 1031 # Number of stall cycles due to full MSHR 431system.cpu.fetch.CacheLines 370072724 # Number of cache lines fetched 432system.cpu.fetch.IcacheSquashes 652087 # Number of outstanding Icache misses that were squashed 433system.cpu.fetch.rateDist::samples 815611997 # Number of instructions fetched each cycle (Total) 434system.cpu.fetch.rateDist::mean 1.839157 # Number of instructions fetched each cycle (Total) 435system.cpu.fetch.rateDist::stdev 1.161407 # Number of instructions fetched each cycle (Total) --- 251 unchanged lines hidden (view full) --- 687system.cpu.commit.op_class_0::MemRead 252240938 31.98% 83.65% # Class of committed instruction 688system.cpu.commit.op_class_0::MemWrite 128980496 16.35% 100.00% # Class of committed instruction 689system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 690system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 691system.cpu.commit.op_class_0::total 788730069 # Class of committed instruction 692system.cpu.commit.bw_lim_events 22360845 # number cycles where commit BW limit reached 693system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits 694system.cpu.rob.rob_reads 1888573713 # The number of ROB reads | 428system.cpu.fetch.MiscStallCycles 216 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs 429system.cpu.fetch.PendingTrapStallCycles 31 # Number of stall cycles due to pending traps 430system.cpu.fetch.IcacheWaitRetryStallCycles 1031 # Number of stall cycles due to full MSHR 431system.cpu.fetch.CacheLines 370072724 # Number of cache lines fetched 432system.cpu.fetch.IcacheSquashes 652087 # Number of outstanding Icache misses that were squashed 433system.cpu.fetch.rateDist::samples 815611997 # Number of instructions fetched each cycle (Total) 434system.cpu.fetch.rateDist::mean 1.839157 # Number of instructions fetched each cycle (Total) 435system.cpu.fetch.rateDist::stdev 1.161407 # Number of instructions fetched each cycle (Total) --- 251 unchanged lines hidden (view full) --- 687system.cpu.commit.op_class_0::MemRead 252240938 31.98% 83.65% # Class of committed instruction 688system.cpu.commit.op_class_0::MemWrite 128980496 16.35% 100.00% # Class of committed instruction 689system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 690system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 691system.cpu.commit.op_class_0::total 788730069 # Class of committed instruction 692system.cpu.commit.bw_lim_events 22360845 # number cycles where commit BW limit reached 693system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits 694system.cpu.rob.rob_reads 1888573713 # The number of ROB reads |
| 695system.cpu.rob.rob_writes 2343133825 # The number of ROB writes | 695system.cpu.rob.rob_writes 2343133826 # The number of ROB writes |
| 696system.cpu.timesIdled 646395 # Number of times that the entire CPU went into an idle state and unscheduled itself 697system.cpu.idleCycles 155573 # Total number of cycles that the CPU has spent unscheduled due to idling 698system.cpu.committedInsts 640649298 # Number of Instructions Simulated 699system.cpu.committedOps 788724957 # Number of Ops (including micro ops) Simulated 700system.cpu.cpi 1.273345 # CPI: Cycles Per Instruction 701system.cpu.cpi_total 1.273345 # CPI: Total CPI of All Threads 702system.cpu.ipc 0.785333 # IPC: Instructions Per Cycle 703system.cpu.ipc_total 0.785333 # IPC: Total IPC of All Threads | 696system.cpu.timesIdled 646395 # Number of times that the entire CPU went into an idle state and unscheduled itself 697system.cpu.idleCycles 155573 # Total number of cycles that the CPU has spent unscheduled due to idling 698system.cpu.committedInsts 640649298 # Number of Instructions Simulated 699system.cpu.committedOps 788724957 # Number of Ops (including micro ops) Simulated 700system.cpu.cpi 1.273345 # CPI: Cycles Per Instruction 701system.cpu.cpi_total 1.273345 # CPI: Total CPI of All Threads 702system.cpu.ipc 0.785333 # IPC: Instructions Per Cycle 703system.cpu.ipc_total 0.785333 # IPC: Total IPC of All Threads |
| 704system.cpu.int_regfile_reads 995802638 # number of integer regfile reads | 704system.cpu.int_regfile_reads 995802642 # number of integer regfile reads |
| 705system.cpu.int_regfile_writes 567917186 # number of integer regfile writes 706system.cpu.fp_regfile_reads 31889847 # number of floating regfile reads 707system.cpu.fp_regfile_writes 22959506 # number of floating regfile writes 708system.cpu.cc_regfile_reads 3794452598 # number of cc regfile reads 709system.cpu.cc_regfile_writes 384905504 # number of cc regfile writes 710system.cpu.misc_regfile_reads 715806131 # number of misc regfile reads 711system.cpu.misc_regfile_writes 6386808 # number of misc regfile writes 712system.cpu.toL2Bus.trans_dist::ReadReq 7205652 # Transaction distribution --- 483 unchanged lines hidden --- | 705system.cpu.int_regfile_writes 567917186 # number of integer regfile writes 706system.cpu.fp_regfile_reads 31889847 # number of floating regfile reads 707system.cpu.fp_regfile_writes 22959506 # number of floating regfile writes 708system.cpu.cc_regfile_reads 3794452598 # number of cc regfile reads 709system.cpu.cc_regfile_writes 384905504 # number of cc regfile writes 710system.cpu.misc_regfile_reads 715806131 # number of misc regfile reads 711system.cpu.misc_regfile_writes 6386808 # number of misc regfile writes 712system.cpu.toL2Bus.trans_dist::ReadReq 7205652 # Transaction distribution --- 483 unchanged lines hidden --- |