1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.628792 # Number of seconds simulated 4sim_ticks 628791732500 # Number of ticks simulated 5final_tick 628791732500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 86286 # Simulator instruction rate (inst/s) 8host_op_rate 117510 # Simulator op (including micro ops) rate (op/s) --- 637 unchanged lines hidden (view full) --- 646system.cpu.commit.bw_lim_events 90891697 # number cycles where commit BW limit reached 647system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits 648system.cpu.rob.rob_reads 3792141440 # The number of ROB reads 649system.cpu.rob.rob_writes 5711980108 # The number of ROB writes 650system.cpu.timesIdled 352856 # Number of times that the entire CPU went into an idle state and unscheduled itself 651system.cpu.idleCycles 41281940 # Total number of cycles that the CPU has spent unscheduled due to idling 652system.cpu.committedInsts 1384370590 # Number of Instructions Simulated 653system.cpu.committedOps 1885325342 # Number of Ops (including micro ops) Simulated |
654system.cpu.cpi 0.908415 # CPI: Cycles Per Instruction 655system.cpu.cpi_total 0.908415 # CPI: Total CPI of All Threads 656system.cpu.ipc 1.100818 # IPC: Instructions Per Cycle 657system.cpu.ipc_total 1.100818 # IPC: Total IPC of All Threads 658system.cpu.int_regfile_reads 11756762903 # number of integer regfile reads 659system.cpu.int_regfile_writes 2218718479 # number of integer regfile writes 660system.cpu.fp_regfile_reads 68795802 # number of floating regfile reads 661system.cpu.fp_regfile_writes 49537143 # number of floating regfile writes --- 426 unchanged lines hidden --- |