| config.ini (10451:3a87241adfb8) | config.ini (10798:74e3c7359393) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 9 unchanged lines hidden (view full) --- 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 9 unchanged lines hidden (view full) --- 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem |
| 26mmap_using_noreserve=false |
|
| 26num_work_ids=16 27readfile= 28symbolfile= 29work_begin_ckpt_count=0 30work_begin_cpu_id_exit=-1 31work_begin_exit_count=0 32work_cpus_ckpt_count=0 33work_end_ckpt_count=0 --- 96 unchanged lines hidden (view full) --- 130tracer=system.cpu.tracer 131trapLatency=13 132wbWidth=8 133workload=system.cpu.workload 134dcache_port=system.cpu.dcache.cpu_side 135icache_port=system.cpu.icache.cpu_side 136 137[system.cpu.branchPred] | 27num_work_ids=16 28readfile= 29symbolfile= 30work_begin_ckpt_count=0 31work_begin_cpu_id_exit=-1 32work_begin_exit_count=0 33work_cpus_ckpt_count=0 34work_end_ckpt_count=0 --- 96 unchanged lines hidden (view full) --- 131tracer=system.cpu.tracer 132trapLatency=13 133wbWidth=8 134workload=system.cpu.workload 135dcache_port=system.cpu.dcache.cpu_side 136icache_port=system.cpu.icache.cpu_side 137 138[system.cpu.branchPred] |
| 138type=BranchPredictor | 139type=BiModeBP |
| 139BTBEntries=2048 140BTBTagSize=18 141RASSize=16 142choiceCtrBits=2 143choicePredictorSize=8192 144eventq_index=0 145globalCtrBits=2 146globalPredictorSize=8192 147instShiftAmt=2 | 140BTBEntries=2048 141BTBTagSize=18 142RASSize=16 143choiceCtrBits=2 144choicePredictorSize=8192 145eventq_index=0 146globalCtrBits=2 147globalPredictorSize=8192 148instShiftAmt=2 |
| 148localCtrBits=2 149localHistoryTableSize=2048 150localPredictorSize=2048 | |
| 151numThreads=1 | 149numThreads=1 |
| 152predType=bi-mode | |
| 153 154[system.cpu.dcache] 155type=BaseCache 156children=tags 157addr_ranges=0:18446744073709551615 158assoc=2 159clk_domain=system.cpu_clk_domain | 150 151[system.cpu.dcache] 152type=BaseCache 153children=tags 154addr_ranges=0:18446744073709551615 155assoc=2 156clk_domain=system.cpu_clk_domain |
| 157demand_mshr_reserve=1 |
|
| 160eventq_index=0 161forward_snoops=true 162hit_latency=2 163is_top_level=true 164max_miss_count=0 165mshrs=6 166prefetch_on_access=false 167prefetcher=Null --- 18 unchanged lines hidden (view full) --- 186sequential_access=false 187size=32768 188 189[system.cpu.dstage2_mmu] 190type=ArmStage2MMU 191children=stage2_tlb 192eventq_index=0 193stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb | 158eventq_index=0 159forward_snoops=true 160hit_latency=2 161is_top_level=true 162max_miss_count=0 163mshrs=6 164prefetch_on_access=false 165prefetcher=Null --- 18 unchanged lines hidden (view full) --- 184sequential_access=false 185size=32768 186 187[system.cpu.dstage2_mmu] 188type=ArmStage2MMU 189children=stage2_tlb 190eventq_index=0 191stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb |
| 192sys=system |
|
| 194tlb=system.cpu.dtb 195 196[system.cpu.dstage2_mmu.stage2_tlb] 197type=ArmTLB 198children=walker 199eventq_index=0 200is_stage2=true 201size=32 202walker=system.cpu.dstage2_mmu.stage2_tlb.walker 203 204[system.cpu.dstage2_mmu.stage2_tlb.walker] 205type=ArmTableWalker 206clk_domain=system.cpu_clk_domain 207eventq_index=0 208is_stage2=true 209num_squash_per_cycle=2 210sys=system | 193tlb=system.cpu.dtb 194 195[system.cpu.dstage2_mmu.stage2_tlb] 196type=ArmTLB 197children=walker 198eventq_index=0 199is_stage2=true 200size=32 201walker=system.cpu.dstage2_mmu.stage2_tlb.walker 202 203[system.cpu.dstage2_mmu.stage2_tlb.walker] 204type=ArmTableWalker 205clk_domain=system.cpu_clk_domain 206eventq_index=0 207is_stage2=true 208num_squash_per_cycle=2 209sys=system |
| 211port=system.cpu.toL2Bus.slave[5] | |
| 212 213[system.cpu.dtb] 214type=ArmTLB 215children=walker 216eventq_index=0 217is_stage2=false 218size=64 219walker=system.cpu.dtb.walker --- 273 unchanged lines hidden (view full) --- 493opLat=4 494 495[system.cpu.icache] 496type=BaseCache 497children=tags 498addr_ranges=0:18446744073709551615 499assoc=2 500clk_domain=system.cpu_clk_domain | 210 211[system.cpu.dtb] 212type=ArmTLB 213children=walker 214eventq_index=0 215is_stage2=false 216size=64 217walker=system.cpu.dtb.walker --- 273 unchanged lines hidden (view full) --- 491opLat=4 492 493[system.cpu.icache] 494type=BaseCache 495children=tags 496addr_ranges=0:18446744073709551615 497assoc=2 498clk_domain=system.cpu_clk_domain |
| 499demand_mshr_reserve=1 |
|
| 501eventq_index=0 | 500eventq_index=0 |
| 502forward_snoops=true | 501forward_snoops=false |
| 503hit_latency=1 504is_top_level=true 505max_miss_count=0 506mshrs=2 507prefetch_on_access=false 508prefetcher=Null 509response_latency=1 510sequential_access=false --- 42 unchanged lines hidden (view full) --- 553id_isar5=0 554id_mmfr0=270536963 555id_mmfr1=0 556id_mmfr2=19070976 557id_mmfr3=34611729 558id_pfr0=49 559id_pfr1=4113 560midr=1091551472 | 502hit_latency=1 503is_top_level=true 504max_miss_count=0 505mshrs=2 506prefetch_on_access=false 507prefetcher=Null 508response_latency=1 509sequential_access=false --- 42 unchanged lines hidden (view full) --- 552id_isar5=0 553id_mmfr0=270536963 554id_mmfr1=0 555id_mmfr2=19070976 556id_mmfr3=34611729 557id_pfr0=49 558id_pfr1=4113 559midr=1091551472 |
| 560pmu=Null |
|
| 561system=system 562 563[system.cpu.istage2_mmu] 564type=ArmStage2MMU 565children=stage2_tlb 566eventq_index=0 567stage2_tlb=system.cpu.istage2_mmu.stage2_tlb | 561system=system 562 563[system.cpu.istage2_mmu] 564type=ArmStage2MMU 565children=stage2_tlb 566eventq_index=0 567stage2_tlb=system.cpu.istage2_mmu.stage2_tlb |
| 568sys=system |
|
| 568tlb=system.cpu.itb 569 570[system.cpu.istage2_mmu.stage2_tlb] 571type=ArmTLB 572children=walker 573eventq_index=0 574is_stage2=true 575size=32 576walker=system.cpu.istage2_mmu.stage2_tlb.walker 577 578[system.cpu.istage2_mmu.stage2_tlb.walker] 579type=ArmTableWalker 580clk_domain=system.cpu_clk_domain 581eventq_index=0 582is_stage2=true 583num_squash_per_cycle=2 584sys=system | 569tlb=system.cpu.itb 570 571[system.cpu.istage2_mmu.stage2_tlb] 572type=ArmTLB 573children=walker 574eventq_index=0 575is_stage2=true 576size=32 577walker=system.cpu.istage2_mmu.stage2_tlb.walker 578 579[system.cpu.istage2_mmu.stage2_tlb.walker] 580type=ArmTableWalker 581clk_domain=system.cpu_clk_domain 582eventq_index=0 583is_stage2=true 584num_squash_per_cycle=2 585sys=system |
| 585port=system.cpu.toL2Bus.slave[4] | |
| 586 587[system.cpu.itb] 588type=ArmTLB 589children=walker 590eventq_index=0 591is_stage2=false 592size=64 593walker=system.cpu.itb.walker --- 8 unchanged lines hidden (view full) --- 602port=system.cpu.toL2Bus.slave[2] 603 604[system.cpu.l2cache] 605type=BaseCache 606children=prefetcher tags 607addr_ranges=0:18446744073709551615 608assoc=16 609clk_domain=system.cpu_clk_domain | 586 587[system.cpu.itb] 588type=ArmTLB 589children=walker 590eventq_index=0 591is_stage2=false 592size=64 593walker=system.cpu.itb.walker --- 8 unchanged lines hidden (view full) --- 602port=system.cpu.toL2Bus.slave[2] 603 604[system.cpu.l2cache] 605type=BaseCache 606children=prefetcher tags 607addr_ranges=0:18446744073709551615 608assoc=16 609clk_domain=system.cpu_clk_domain |
| 610demand_mshr_reserve=1 |
|
| 610eventq_index=0 611forward_snoops=true 612hit_latency=12 613is_top_level=false 614max_miss_count=0 615mshrs=16 616prefetch_on_access=true 617prefetcher=system.cpu.l2cache.prefetcher --- 5 unchanged lines hidden (view full) --- 623tgts_per_mshr=8 624two_queue=false 625write_buffers=8 626cpu_side=system.cpu.toL2Bus.master[0] 627mem_side=system.membus.slave[1] 628 629[system.cpu.l2cache.prefetcher] 630type=StridePrefetcher | 611eventq_index=0 612forward_snoops=true 613hit_latency=12 614is_top_level=false 615max_miss_count=0 616mshrs=16 617prefetch_on_access=true 618prefetcher=system.cpu.l2cache.prefetcher --- 5 unchanged lines hidden (view full) --- 624tgts_per_mshr=8 625two_queue=false 626write_buffers=8 627cpu_side=system.cpu.toL2Bus.master[0] 628mem_side=system.membus.slave[1] 629 630[system.cpu.l2cache.prefetcher] 631type=StridePrefetcher |
| 632cache_snoop=false |
|
| 631clk_domain=system.cpu_clk_domain | 633clk_domain=system.cpu_clk_domain |
| 632cross_pages=false 633data_accesses_only=false | |
| 634degree=8 635eventq_index=0 | 634degree=8 635eventq_index=0 |
| 636inst_tagged=true | |
| 637latency=1 | 636latency=1 |
| 638on_miss_only=false 639on_prefetch=true 640on_read_only=false 641serial_squash=false 642size=100 | 637max_conf=7 638min_conf=0 639on_data=true 640on_inst=true 641on_miss=false 642on_read=true 643on_write=true 644queue_filter=true 645queue_size=32 646queue_squash=true 647start_conf=4 |
| 643sys=system | 648sys=system |
| 649table_assoc=4 650table_sets=16 651tag_prefetch=true 652thresh_conf=4 |
|
| 644use_master_id=true 645 646[system.cpu.l2cache.tags] 647type=RandomRepl 648assoc=16 649block_size=64 650clk_domain=system.cpu_clk_domain 651eventq_index=0 652hit_latency=12 653sequential_access=false 654size=1048576 655 656[system.cpu.toL2Bus] 657type=CoherentXBar 658clk_domain=system.cpu_clk_domain 659eventq_index=0 | 653use_master_id=true 654 655[system.cpu.l2cache.tags] 656type=RandomRepl 657assoc=16 658block_size=64 659clk_domain=system.cpu_clk_domain 660eventq_index=0 661hit_latency=12 662sequential_access=false 663size=1048576 664 665[system.cpu.toL2Bus] 666type=CoherentXBar 667clk_domain=system.cpu_clk_domain 668eventq_index=0 |
| 660header_cycles=1 | 669forward_latency=0 670frontend_latency=1 671response_latency=1 |
| 661snoop_filter=Null | 672snoop_filter=Null |
| 673snoop_response_latency=1 |
|
| 662system=system 663use_default_range=false 664width=32 665master=system.cpu.l2cache.cpu_side | 674system=system 675use_default_range=false 676width=32 677master=system.cpu.l2cache.cpu_side |
| 666slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port | 678slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port |
| 667 668[system.cpu.tracer] 669type=ExeTracer 670eventq_index=0 671 672[system.cpu.workload] 673type=LiveProcess 674cmd=perlbmk -I. -I lib mdred.makerand.pl 675cwd=build/ARM/tests/opt/long/se/40.perlbmk/arm/linux/o3-timing | 679 680[system.cpu.tracer] 681type=ExeTracer 682eventq_index=0 683 684[system.cpu.workload] 685type=LiveProcess 686cmd=perlbmk -I. -I lib mdred.makerand.pl 687cwd=build/ARM/tests/opt/long/se/40.perlbmk/arm/linux/o3-timing |
| 688drivers= |
|
| 676egid=100 677env= 678errout=cerr 679euid=100 680eventq_index=0 | 689egid=100 690env= 691errout=cerr 692euid=100 693eventq_index=0 |
| 681executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/perlbmk | 694executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/perlbmk |
| 682gid=100 683input=cin | 695gid=100 696input=cin |
| 697kvmInSE=false |
|
| 684max_stack_size=67108864 685output=cout 686pid=100 687ppid=99 688simpoint=0 689system=system 690uid=100 691useArchPT=false --- 13 unchanged lines hidden (view full) --- 705eventq_index=0 706sys_clk_domain=system.clk_domain 707transition_latency=100000000 708 709[system.membus] 710type=CoherentXBar 711clk_domain=system.clk_domain 712eventq_index=0 | 698max_stack_size=67108864 699output=cout 700pid=100 701ppid=99 702simpoint=0 703system=system 704uid=100 705useArchPT=false --- 13 unchanged lines hidden (view full) --- 719eventq_index=0 720sys_clk_domain=system.clk_domain 721transition_latency=100000000 722 723[system.membus] 724type=CoherentXBar 725clk_domain=system.clk_domain 726eventq_index=0 |
| 713header_cycles=1 | 727forward_latency=4 728frontend_latency=3 729response_latency=2 |
| 714snoop_filter=Null | 730snoop_filter=Null |
| 731snoop_response_latency=4 |
|
| 715system=system 716use_default_range=false | 732system=system 733use_default_range=false |
| 717width=8 | 734width=16 |
| 718master=system.physmem.port 719slave=system.system_port system.cpu.l2cache.mem_side 720 721[system.physmem] 722type=DRAMCtrl 723IDD0=0.075000 724IDD02=0.000000 725IDD2N=0.050000 --- 14 unchanged lines hidden (view full) --- 740IDD4W2=0.000000 741IDD5=0.220000 742IDD52=0.000000 743IDD6=0.000000 744IDD62=0.000000 745VDD=1.500000 746VDD2=0.000000 747activation_limit=4 | 735master=system.physmem.port 736slave=system.system_port system.cpu.l2cache.mem_side 737 738[system.physmem] 739type=DRAMCtrl 740IDD0=0.075000 741IDD02=0.000000 742IDD2N=0.050000 --- 14 unchanged lines hidden (view full) --- 757IDD4W2=0.000000 758IDD5=0.220000 759IDD52=0.000000 760IDD6=0.000000 761IDD62=0.000000 762VDD=1.500000 763VDD2=0.000000 764activation_limit=4 |
| 748addr_mapping=RoRaBaChCo | 765addr_mapping=RoRaBaCoCh |
| 749bank_groups_per_rank=0 750banks_per_rank=8 751burst_length=8 752channels=1 753clk_domain=system.clk_domain 754conf_table_reported=true 755device_bus_width=8 756device_rowbuffer_size=1024 | 766bank_groups_per_rank=0 767banks_per_rank=8 768burst_length=8 769channels=1 770clk_domain=system.clk_domain 771conf_table_reported=true 772device_bus_width=8 773device_rowbuffer_size=1024 |
| 774device_size=536870912 |
|
| 757devices_per_rank=8 758dll=true 759eventq_index=0 760in_addr_map=true 761max_accesses_per_row=16 762mem_sched_policy=frfcfs 763min_writes_per_switch=16 764null=false --- 37 unchanged lines hidden --- | 775devices_per_rank=8 776dll=true 777eventq_index=0 778in_addr_map=true 779max_accesses_per_row=16 780mem_sched_policy=frfcfs 781min_writes_per_switch=16 782null=false --- 37 unchanged lines hidden --- |