stats.txt (9481:b0fa6b872f40) | stats.txt (9729:e2fafd224f43) |
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1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.525834 # Number of seconds simulated 4sim_ticks 525834342000 # Number of ticks simulated 5final_tick 525834342000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.525834 # Number of seconds simulated 4sim_ticks 525834342000 # Number of ticks simulated 5final_tick 525834342000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
7host_inst_rate 589682 # Simulator instruction rate (inst/s) 8host_op_rate 753887 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 1136891744 # Simulator tick rate (ticks/s) 10host_mem_usage 294668 # Number of bytes of host memory used 11host_seconds 462.52 # Real time elapsed on the host | 7host_inst_rate 442791 # Simulator instruction rate (inst/s) 8host_op_rate 566092 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 853689730 # Simulator tick rate (ticks/s) 10host_mem_usage 250392 # Number of bytes of host memory used 11host_seconds 615.96 # Real time elapsed on the host |
12sim_insts 272739283 # Number of instructions simulated 13sim_ops 348687122 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 166976 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 270272 # Number of bytes read from this memory 16system.physmem.bytes_read::total 437248 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 166976 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 166976 # Number of instructions bytes read from this memory 19system.physmem.num_reads::cpu.inst 2609 # Number of read requests responded to by this memory 20system.physmem.num_reads::cpu.data 4223 # Number of read requests responded to by this memory 21system.physmem.num_reads::total 6832 # Number of read requests responded to by this memory 22system.physmem.bw_read::cpu.inst 317545 # Total read bandwidth from this memory (bytes/s) 23system.physmem.bw_read::cpu.data 513987 # Total read bandwidth from this memory (bytes/s) 24system.physmem.bw_read::total 831532 # Total read bandwidth from this memory (bytes/s) 25system.physmem.bw_inst_read::cpu.inst 317545 # Instruction read bandwidth from this memory (bytes/s) 26system.physmem.bw_inst_read::total 317545 # Instruction read bandwidth from this memory (bytes/s) 27system.physmem.bw_total::cpu.inst 317545 # Total bandwidth to/from this memory (bytes/s) 28system.physmem.bw_total::cpu.data 513987 # Total bandwidth to/from this memory (bytes/s) 29system.physmem.bw_total::total 831532 # Total bandwidth to/from this memory (bytes/s) | 12sim_insts 272739283 # Number of instructions simulated 13sim_ops 348687122 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 166976 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 270272 # Number of bytes read from this memory 16system.physmem.bytes_read::total 437248 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 166976 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 166976 # Number of instructions bytes read from this memory 19system.physmem.num_reads::cpu.inst 2609 # Number of read requests responded to by this memory 20system.physmem.num_reads::cpu.data 4223 # Number of read requests responded to by this memory 21system.physmem.num_reads::total 6832 # Number of read requests responded to by this memory 22system.physmem.bw_read::cpu.inst 317545 # Total read bandwidth from this memory (bytes/s) 23system.physmem.bw_read::cpu.data 513987 # Total read bandwidth from this memory (bytes/s) 24system.physmem.bw_read::total 831532 # Total read bandwidth from this memory (bytes/s) 25system.physmem.bw_inst_read::cpu.inst 317545 # Instruction read bandwidth from this memory (bytes/s) 26system.physmem.bw_inst_read::total 317545 # Instruction read bandwidth from this memory (bytes/s) 27system.physmem.bw_total::cpu.inst 317545 # Total bandwidth to/from this memory (bytes/s) 28system.physmem.bw_total::cpu.data 513987 # Total bandwidth to/from this memory (bytes/s) 29system.physmem.bw_total::total 831532 # Total bandwidth to/from this memory (bytes/s) |
30system.membus.throughput 831532 # Throughput (bytes/s) 31system.membus.trans_dist::ReadReq 3976 # Transaction distribution 32system.membus.trans_dist::ReadResp 3976 # Transaction distribution 33system.membus.trans_dist::ReadExReq 2856 # Transaction distribution 34system.membus.trans_dist::ReadExResp 2856 # Transaction distribution 35system.membus.pkt_count_system.cpu.l2cache.mem_side 13664 # Packet count per connected master and slave (bytes) 36system.membus.pkt_count 13664 # Packet count per connected master and slave (bytes) 37system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 437248 # Cumulative packet size per connected master and slave (bytes) 38system.membus.tot_pkt_size 437248 # Cumulative packet size per connected master and slave (bytes) 39system.membus.data_through_bus 437248 # Total data (bytes) 40system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 41system.membus.reqLayer0.occupancy 6832000 # Layer occupancy (ticks) 42system.membus.reqLayer0.utilization 0.0 # Layer utilization (%) 43system.membus.respLayer1.occupancy 61488000 # Layer occupancy (ticks) 44system.membus.respLayer1.utilization 0.0 # Layer utilization (%) |
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30system.cpu.dtb.inst_hits 0 # ITB inst hits 31system.cpu.dtb.inst_misses 0 # ITB inst misses 32system.cpu.dtb.read_hits 0 # DTB read hits 33system.cpu.dtb.read_misses 0 # DTB read misses 34system.cpu.dtb.write_hits 0 # DTB write hits 35system.cpu.dtb.write_misses 0 # DTB write misses 36system.cpu.dtb.flush_tlb 0 # Number of times complete TLB was flushed 37system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA --- 371 unchanged lines hidden (view full) --- 409system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 46749.688667 # average ReadReq mshr miss latency 410system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 52766.016713 # average WriteReq mshr miss latency 411system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 52766.016713 # average WriteReq mshr miss latency 412system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 50608.307280 # average overall mshr miss latency 413system.cpu.dcache.demand_avg_mshr_miss_latency::total 50608.307280 # average overall mshr miss latency 414system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 50608.307280 # average overall mshr miss latency 415system.cpu.dcache.overall_avg_mshr_miss_latency::total 50608.307280 # average overall mshr miss latency 416system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate | 45system.cpu.dtb.inst_hits 0 # ITB inst hits 46system.cpu.dtb.inst_misses 0 # ITB inst misses 47system.cpu.dtb.read_hits 0 # DTB read hits 48system.cpu.dtb.read_misses 0 # DTB read misses 49system.cpu.dtb.write_hits 0 # DTB write hits 50system.cpu.dtb.write_misses 0 # DTB write misses 51system.cpu.dtb.flush_tlb 0 # Number of times complete TLB was flushed 52system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA --- 371 unchanged lines hidden (view full) --- 424system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 46749.688667 # average ReadReq mshr miss latency 425system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 52766.016713 # average WriteReq mshr miss latency 426system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 52766.016713 # average WriteReq mshr miss latency 427system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 50608.307280 # average overall mshr miss latency 428system.cpu.dcache.demand_avg_mshr_miss_latency::total 50608.307280 # average overall mshr miss latency 429system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 50608.307280 # average overall mshr miss latency 430system.cpu.dcache.overall_avg_mshr_miss_latency::total 50608.307280 # average overall mshr miss latency 431system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate |
432system.cpu.toL2Bus.throughput 2565553 # Throughput (bytes/s) 433system.cpu.toL2Bus.trans_dist::ReadReq 17209 # Transaction distribution 434system.cpu.toL2Bus.trans_dist::ReadResp 17209 # Transaction distribution 435system.cpu.toL2Bus.trans_dist::Writeback 998 # Transaction distribution 436system.cpu.toL2Bus.trans_dist::ReadExReq 2872 # Transaction distribution 437system.cpu.toL2Bus.trans_dist::ReadExResp 2872 # Transaction distribution 438system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 31206 # Packet count per connected master and slave (bytes) 439system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 9954 # Packet count per connected master and slave (bytes) 440system.cpu.toL2Bus.pkt_count 41160 # Packet count per connected master and slave (bytes) 441system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 998592 # Cumulative packet size per connected master and slave (bytes) 442system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 350464 # Cumulative packet size per connected master and slave (bytes) 443system.cpu.toL2Bus.tot_pkt_size 1349056 # Cumulative packet size per connected master and slave (bytes) 444system.cpu.toL2Bus.data_through_bus 1349056 # Total data (bytes) 445system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) 446system.cpu.toL2Bus.reqLayer0.occupancy 11537500 # Layer occupancy (ticks) 447system.cpu.toL2Bus.reqLayer0.utilization 0.0 # Layer utilization (%) 448system.cpu.toL2Bus.respLayer0.occupancy 23404500 # Layer occupancy (ticks) 449system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 450system.cpu.toL2Bus.respLayer1.occupancy 6717000 # Layer occupancy (ticks) 451system.cpu.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%) |
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417 418---------- End Simulation Statistics ---------- | 452 453---------- End Simulation Statistics ---------- |