| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 9 unchanged lines hidden (view full) --- 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem |
| 26mmap_using_noreserve=false |
| 27num_work_ids=16 28readfile= 29symbolfile= 30work_begin_ckpt_count=0 31work_begin_cpu_id_exit=-1 32work_begin_exit_count=0 33work_cpus_ckpt_count=0 34work_end_ckpt_count=0 --- 45 unchanged lines hidden (view full) --- 80icache_port=system.cpu.icache.cpu_side 81 82[system.cpu.dcache] 83type=BaseCache 84children=tags 85addr_ranges=0:18446744073709551615 86assoc=2 87clk_domain=system.cpu_clk_domain |
| 88demand_mshr_reserve=1 |
| 89eventq_index=0 90forward_snoops=true 91hit_latency=2 |
| 92is_read_only=false |
| 93max_miss_count=0 94mshrs=4 95prefetch_on_access=false 96prefetcher=Null 97response_latency=2 98sequential_access=false 99size=262144 100system=system 101tags=system.cpu.dcache.tags 102tgts_per_mshr=20 |
| 103write_buffers=8 104cpu_side=system.cpu.dcache_port 105mem_side=system.cpu.toL2Bus.slave[1] 106 107[system.cpu.dcache.tags] 108type=LRU 109assoc=2 110block_size=64 111clk_domain=system.cpu_clk_domain 112eventq_index=0 113hit_latency=2 114sequential_access=false 115size=262144 116 117[system.cpu.dstage2_mmu] 118type=ArmStage2MMU 119children=stage2_tlb 120eventq_index=0 121stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb |
| 122sys=system |
| 123tlb=system.cpu.dtb 124 125[system.cpu.dstage2_mmu.stage2_tlb] 126type=ArmTLB 127children=walker 128eventq_index=0 129is_stage2=true 130size=32 131walker=system.cpu.dstage2_mmu.stage2_tlb.walker 132 133[system.cpu.dstage2_mmu.stage2_tlb.walker] 134type=ArmTableWalker 135clk_domain=system.cpu_clk_domain 136eventq_index=0 137is_stage2=true 138num_squash_per_cycle=2 139sys=system |
| 140 141[system.cpu.dtb] 142type=ArmTLB 143children=walker 144eventq_index=0 145is_stage2=false 146size=64 147walker=system.cpu.dtb.walker --- 8 unchanged lines hidden (view full) --- 156port=system.cpu.toL2Bus.slave[3] 157 158[system.cpu.icache] 159type=BaseCache 160children=tags 161addr_ranges=0:18446744073709551615 162assoc=2 163clk_domain=system.cpu_clk_domain |
| 164demand_mshr_reserve=1 |
| 165eventq_index=0 166forward_snoops=true 167hit_latency=2 |
| 168is_read_only=true |
| 169max_miss_count=0 170mshrs=4 171prefetch_on_access=false 172prefetcher=Null 173response_latency=2 174sequential_access=false 175size=131072 176system=system 177tags=system.cpu.icache.tags 178tgts_per_mshr=20 |
| 179write_buffers=8 180cpu_side=system.cpu.icache_port 181mem_side=system.cpu.toL2Bus.slave[0] 182 183[system.cpu.icache.tags] 184type=LRU 185assoc=2 186block_size=64 --- 29 unchanged lines hidden (view full) --- 216id_isar5=0 217id_mmfr0=270536963 218id_mmfr1=0 219id_mmfr2=19070976 220id_mmfr3=34611729 221id_pfr0=49 222id_pfr1=4113 223midr=1091551472 |
| 224pmu=Null |
| 225system=system 226 227[system.cpu.istage2_mmu] 228type=ArmStage2MMU 229children=stage2_tlb 230eventq_index=0 231stage2_tlb=system.cpu.istage2_mmu.stage2_tlb |
| 232sys=system |
| 233tlb=system.cpu.itb 234 235[system.cpu.istage2_mmu.stage2_tlb] 236type=ArmTLB 237children=walker 238eventq_index=0 239is_stage2=true 240size=32 241walker=system.cpu.istage2_mmu.stage2_tlb.walker 242 243[system.cpu.istage2_mmu.stage2_tlb.walker] 244type=ArmTableWalker 245clk_domain=system.cpu_clk_domain 246eventq_index=0 247is_stage2=true 248num_squash_per_cycle=2 249sys=system |
| 250 251[system.cpu.itb] 252type=ArmTLB 253children=walker 254eventq_index=0 255is_stage2=false 256size=64 257walker=system.cpu.itb.walker --- 8 unchanged lines hidden (view full) --- 266port=system.cpu.toL2Bus.slave[2] 267 268[system.cpu.l2cache] 269type=BaseCache 270children=tags 271addr_ranges=0:18446744073709551615 272assoc=8 273clk_domain=system.cpu_clk_domain |
| 274demand_mshr_reserve=1 |
| 275eventq_index=0 276forward_snoops=true 277hit_latency=20 |
| 278is_read_only=false |
| 279max_miss_count=0 280mshrs=20 281prefetch_on_access=false 282prefetcher=Null 283response_latency=20 284sequential_access=false 285size=2097152 286system=system 287tags=system.cpu.l2cache.tags 288tgts_per_mshr=12 |
| 289write_buffers=8 290cpu_side=system.cpu.toL2Bus.master[0] 291mem_side=system.membus.slave[1] 292 293[system.cpu.l2cache.tags] 294type=LRU 295assoc=8 296block_size=64 297clk_domain=system.cpu_clk_domain 298eventq_index=0 299hit_latency=20 300sequential_access=false 301size=2097152 302 303[system.cpu.toL2Bus] 304type=CoherentXBar 305clk_domain=system.cpu_clk_domain 306eventq_index=0 |
| 307forward_latency=0 308frontend_latency=1 309response_latency=1 |
| 310snoop_filter=Null |
| 311snoop_response_latency=1 |
| 312system=system 313use_default_range=false 314width=32 315master=system.cpu.l2cache.cpu_side |
| 316slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port |
| 317 318[system.cpu.tracer] 319type=ExeTracer 320eventq_index=0 321 322[system.cpu.workload] 323type=LiveProcess 324cmd=eon chair.control.cook chair.camera chair.surfaces chair.cook.ppm ppm pixels_out.cook 325cwd=build/ARM/tests/opt/long/se/30.eon/arm/linux/simple-timing |
| 326drivers= |
| 327egid=100 328env= 329errout=cerr 330euid=100 331eventq_index=0 332executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/eon 333gid=100 334input=cin |
| 335kvmInSE=false |
| 336max_stack_size=67108864 337output=cout 338pid=100 339ppid=99 340simpoint=0 341system=system 342uid=100 343useArchPT=false --- 13 unchanged lines hidden (view full) --- 357eventq_index=0 358sys_clk_domain=system.clk_domain 359transition_latency=100000000 360 361[system.membus] 362type=CoherentXBar 363clk_domain=system.clk_domain 364eventq_index=0 |
| 365forward_latency=4 366frontend_latency=3 367response_latency=2 |
| 368snoop_filter=Null |
| 369snoop_response_latency=4 |
| 370system=system 371use_default_range=false |
| 372width=16 |
| 373master=system.physmem.port 374slave=system.system_port system.cpu.l2cache.mem_side 375 376[system.physmem] 377type=SimpleMemory 378bandwidth=73.000000 379clk_domain=system.clk_domain 380conf_table_reported=true --- 13 unchanged lines hidden --- |