Cross Reference: /gem5/tests/long/se/30.eon/ref/arm/linux/simple-timing/config.ini

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config.ini (10451:3a87241adfb8)	config.ini (10900:ac6617bf9967)
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem	1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem
	26mmap_using_noreserve=false
26num_work_ids=16 27readfile= 28symbolfile= 29work_begin_ckpt_count=0 30work_begin_cpu_id_exit=-1 31work_begin_exit_count=0 32work_cpus_ckpt_count=0 33work_end_ckpt_count=0 34work_end_exit_count=0 35work_item_id=-1 36system_port=system.membus.slave[0] 37 38[system.clk_domain] 39type=SrcClockDomain 40clock=1000 41domain_id=-1 42eventq_index=0 43init_perf_level=0 44voltage_domain=system.voltage_domain 45 46[system.cpu] 47type=TimingSimpleCPU 48children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 49branchPred=Null 50checker=Null 51clk_domain=system.cpu_clk_domain 52cpu_id=0 53do_checkpoint_insts=true 54do_quiesce=true 55do_statistics_insts=true 56dstage2_mmu=system.cpu.dstage2_mmu 57dtb=system.cpu.dtb 58eventq_index=0 59function_trace=false 60function_trace_start=0 61interrupts=system.cpu.interrupts 62isa=system.cpu.isa 63istage2_mmu=system.cpu.istage2_mmu 64itb=system.cpu.itb 65max_insts_all_threads=0 66max_insts_any_thread=0 67max_loads_all_threads=0 68max_loads_any_thread=0 69numThreads=1 70profile=0 71progress_interval=0 72simpoint_start_insts= 73socket_id=0 74switched_out=false 75system=system 76tracer=system.cpu.tracer 77workload=system.cpu.workload 78dcache_port=system.cpu.dcache.cpu_side 79icache_port=system.cpu.icache.cpu_side 80 81[system.cpu.dcache] 82type=BaseCache 83children=tags 84addr_ranges=0:18446744073709551615 85assoc=2 86clk_domain=system.cpu_clk_domain	27num_work_ids=16 28readfile= 29symbolfile= 30work_begin_ckpt_count=0 31work_begin_cpu_id_exit=-1 32work_begin_exit_count=0 33work_cpus_ckpt_count=0 34work_end_ckpt_count=0 35work_end_exit_count=0 36work_item_id=-1 37system_port=system.membus.slave[0] 38 39[system.clk_domain] 40type=SrcClockDomain 41clock=1000 42domain_id=-1 43eventq_index=0 44init_perf_level=0 45voltage_domain=system.voltage_domain 46 47[system.cpu] 48type=TimingSimpleCPU 49children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 50branchPred=Null 51checker=Null 52clk_domain=system.cpu_clk_domain 53cpu_id=0 54do_checkpoint_insts=true 55do_quiesce=true 56do_statistics_insts=true 57dstage2_mmu=system.cpu.dstage2_mmu 58dtb=system.cpu.dtb 59eventq_index=0 60function_trace=false 61function_trace_start=0 62interrupts=system.cpu.interrupts 63isa=system.cpu.isa 64istage2_mmu=system.cpu.istage2_mmu 65itb=system.cpu.itb 66max_insts_all_threads=0 67max_insts_any_thread=0 68max_loads_all_threads=0 69max_loads_any_thread=0 70numThreads=1 71profile=0 72progress_interval=0 73simpoint_start_insts= 74socket_id=0 75switched_out=false 76system=system 77tracer=system.cpu.tracer 78workload=system.cpu.workload 79dcache_port=system.cpu.dcache.cpu_side 80icache_port=system.cpu.icache.cpu_side 81 82[system.cpu.dcache] 83type=BaseCache 84children=tags 85addr_ranges=0:18446744073709551615 86assoc=2 87clk_domain=system.cpu_clk_domain
	88demand_mshr_reserve=1
87eventq_index=0 88forward_snoops=true 89hit_latency=2	89eventq_index=0 90forward_snoops=true 91hit_latency=2
90is_top_level=true	92is_read_only=false
91max_miss_count=0 92mshrs=4 93prefetch_on_access=false 94prefetcher=Null 95response_latency=2 96sequential_access=false 97size=262144 98system=system 99tags=system.cpu.dcache.tags 100tgts_per_mshr=20	93max_miss_count=0 94mshrs=4 95prefetch_on_access=false 96prefetcher=Null 97response_latency=2 98sequential_access=false 99size=262144 100system=system 101tags=system.cpu.dcache.tags 102tgts_per_mshr=20
101two_queue=false
102write_buffers=8 103cpu_side=system.cpu.dcache_port 104mem_side=system.cpu.toL2Bus.slave[1] 105 106[system.cpu.dcache.tags] 107type=LRU 108assoc=2 109block_size=64 110clk_domain=system.cpu_clk_domain 111eventq_index=0 112hit_latency=2 113sequential_access=false 114size=262144 115 116[system.cpu.dstage2_mmu] 117type=ArmStage2MMU 118children=stage2_tlb 119eventq_index=0 120stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb	103write_buffers=8 104cpu_side=system.cpu.dcache_port 105mem_side=system.cpu.toL2Bus.slave[1] 106 107[system.cpu.dcache.tags] 108type=LRU 109assoc=2 110block_size=64 111clk_domain=system.cpu_clk_domain 112eventq_index=0 113hit_latency=2 114sequential_access=false 115size=262144 116 117[system.cpu.dstage2_mmu] 118type=ArmStage2MMU 119children=stage2_tlb 120eventq_index=0 121stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
	122sys=system
121tlb=system.cpu.dtb 122 123[system.cpu.dstage2_mmu.stage2_tlb] 124type=ArmTLB 125children=walker 126eventq_index=0 127is_stage2=true 128size=32 129walker=system.cpu.dstage2_mmu.stage2_tlb.walker 130 131[system.cpu.dstage2_mmu.stage2_tlb.walker] 132type=ArmTableWalker 133clk_domain=system.cpu_clk_domain 134eventq_index=0 135is_stage2=true 136num_squash_per_cycle=2 137sys=system	123tlb=system.cpu.dtb 124 125[system.cpu.dstage2_mmu.stage2_tlb] 126type=ArmTLB 127children=walker 128eventq_index=0 129is_stage2=true 130size=32 131walker=system.cpu.dstage2_mmu.stage2_tlb.walker 132 133[system.cpu.dstage2_mmu.stage2_tlb.walker] 134type=ArmTableWalker 135clk_domain=system.cpu_clk_domain 136eventq_index=0 137is_stage2=true 138num_squash_per_cycle=2 139sys=system
138port=system.cpu.toL2Bus.slave[5]
139 140[system.cpu.dtb] 141type=ArmTLB 142children=walker 143eventq_index=0 144is_stage2=false 145size=64 146walker=system.cpu.dtb.walker 147 148[system.cpu.dtb.walker] 149type=ArmTableWalker 150clk_domain=system.cpu_clk_domain 151eventq_index=0 152is_stage2=false 153num_squash_per_cycle=2 154sys=system 155port=system.cpu.toL2Bus.slave[3] 156 157[system.cpu.icache] 158type=BaseCache 159children=tags 160addr_ranges=0:18446744073709551615 161assoc=2 162clk_domain=system.cpu_clk_domain	140 141[system.cpu.dtb] 142type=ArmTLB 143children=walker 144eventq_index=0 145is_stage2=false 146size=64 147walker=system.cpu.dtb.walker 148 149[system.cpu.dtb.walker] 150type=ArmTableWalker 151clk_domain=system.cpu_clk_domain 152eventq_index=0 153is_stage2=false 154num_squash_per_cycle=2 155sys=system 156port=system.cpu.toL2Bus.slave[3] 157 158[system.cpu.icache] 159type=BaseCache 160children=tags 161addr_ranges=0:18446744073709551615 162assoc=2 163clk_domain=system.cpu_clk_domain
	164demand_mshr_reserve=1
163eventq_index=0 164forward_snoops=true 165hit_latency=2	165eventq_index=0 166forward_snoops=true 167hit_latency=2
166is_top_level=true	168is_read_only=true
167max_miss_count=0 168mshrs=4 169prefetch_on_access=false 170prefetcher=Null 171response_latency=2 172sequential_access=false 173size=131072 174system=system 175tags=system.cpu.icache.tags 176tgts_per_mshr=20	169max_miss_count=0 170mshrs=4 171prefetch_on_access=false 172prefetcher=Null 173response_latency=2 174sequential_access=false 175size=131072 176system=system 177tags=system.cpu.icache.tags 178tgts_per_mshr=20
177two_queue=false
178write_buffers=8 179cpu_side=system.cpu.icache_port 180mem_side=system.cpu.toL2Bus.slave[0] 181 182[system.cpu.icache.tags] 183type=LRU 184assoc=2 185block_size=64 186clk_domain=system.cpu_clk_domain 187eventq_index=0 188hit_latency=2 189sequential_access=false 190size=131072 191 192[system.cpu.interrupts] 193type=ArmInterrupts 194eventq_index=0 195 196[system.cpu.isa] 197type=ArmISA 198eventq_index=0 199fpsid=1090793632 200id_aa64afr0_el1=0 201id_aa64afr1_el1=0 202id_aa64dfr0_el1=1052678 203id_aa64dfr1_el1=0 204id_aa64isar0_el1=0 205id_aa64isar1_el1=0 206id_aa64mmfr0_el1=15728642 207id_aa64mmfr1_el1=0 208id_aa64pfr0_el1=17 209id_aa64pfr1_el1=0 210id_isar0=34607377 211id_isar1=34677009 212id_isar2=555950401 213id_isar3=17899825 214id_isar4=268501314 215id_isar5=0 216id_mmfr0=270536963 217id_mmfr1=0 218id_mmfr2=19070976 219id_mmfr3=34611729 220id_pfr0=49 221id_pfr1=4113 222midr=1091551472	179write_buffers=8 180cpu_side=system.cpu.icache_port 181mem_side=system.cpu.toL2Bus.slave[0] 182 183[system.cpu.icache.tags] 184type=LRU 185assoc=2 186block_size=64 187clk_domain=system.cpu_clk_domain 188eventq_index=0 189hit_latency=2 190sequential_access=false 191size=131072 192 193[system.cpu.interrupts] 194type=ArmInterrupts 195eventq_index=0 196 197[system.cpu.isa] 198type=ArmISA 199eventq_index=0 200fpsid=1090793632 201id_aa64afr0_el1=0 202id_aa64afr1_el1=0 203id_aa64dfr0_el1=1052678 204id_aa64dfr1_el1=0 205id_aa64isar0_el1=0 206id_aa64isar1_el1=0 207id_aa64mmfr0_el1=15728642 208id_aa64mmfr1_el1=0 209id_aa64pfr0_el1=17 210id_aa64pfr1_el1=0 211id_isar0=34607377 212id_isar1=34677009 213id_isar2=555950401 214id_isar3=17899825 215id_isar4=268501314 216id_isar5=0 217id_mmfr0=270536963 218id_mmfr1=0 219id_mmfr2=19070976 220id_mmfr3=34611729 221id_pfr0=49 222id_pfr1=4113 223midr=1091551472
	224pmu=Null
223system=system 224 225[system.cpu.istage2_mmu] 226type=ArmStage2MMU 227children=stage2_tlb 228eventq_index=0 229stage2_tlb=system.cpu.istage2_mmu.stage2_tlb	225system=system 226 227[system.cpu.istage2_mmu] 228type=ArmStage2MMU 229children=stage2_tlb 230eventq_index=0 231stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
	232sys=system
230tlb=system.cpu.itb 231 232[system.cpu.istage2_mmu.stage2_tlb] 233type=ArmTLB 234children=walker 235eventq_index=0 236is_stage2=true 237size=32 238walker=system.cpu.istage2_mmu.stage2_tlb.walker 239 240[system.cpu.istage2_mmu.stage2_tlb.walker] 241type=ArmTableWalker 242clk_domain=system.cpu_clk_domain 243eventq_index=0 244is_stage2=true 245num_squash_per_cycle=2 246sys=system	233tlb=system.cpu.itb 234 235[system.cpu.istage2_mmu.stage2_tlb] 236type=ArmTLB 237children=walker 238eventq_index=0 239is_stage2=true 240size=32 241walker=system.cpu.istage2_mmu.stage2_tlb.walker 242 243[system.cpu.istage2_mmu.stage2_tlb.walker] 244type=ArmTableWalker 245clk_domain=system.cpu_clk_domain 246eventq_index=0 247is_stage2=true 248num_squash_per_cycle=2 249sys=system
247port=system.cpu.toL2Bus.slave[4]
248 249[system.cpu.itb] 250type=ArmTLB 251children=walker 252eventq_index=0 253is_stage2=false 254size=64 255walker=system.cpu.itb.walker 256 257[system.cpu.itb.walker] 258type=ArmTableWalker 259clk_domain=system.cpu_clk_domain 260eventq_index=0 261is_stage2=false 262num_squash_per_cycle=2 263sys=system 264port=system.cpu.toL2Bus.slave[2] 265 266[system.cpu.l2cache] 267type=BaseCache 268children=tags 269addr_ranges=0:18446744073709551615 270assoc=8 271clk_domain=system.cpu_clk_domain	250 251[system.cpu.itb] 252type=ArmTLB 253children=walker 254eventq_index=0 255is_stage2=false 256size=64 257walker=system.cpu.itb.walker 258 259[system.cpu.itb.walker] 260type=ArmTableWalker 261clk_domain=system.cpu_clk_domain 262eventq_index=0 263is_stage2=false 264num_squash_per_cycle=2 265sys=system 266port=system.cpu.toL2Bus.slave[2] 267 268[system.cpu.l2cache] 269type=BaseCache 270children=tags 271addr_ranges=0:18446744073709551615 272assoc=8 273clk_domain=system.cpu_clk_domain
	274demand_mshr_reserve=1
272eventq_index=0 273forward_snoops=true 274hit_latency=20	275eventq_index=0 276forward_snoops=true 277hit_latency=20
275is_top_level=false	278is_read_only=false
276max_miss_count=0 277mshrs=20 278prefetch_on_access=false 279prefetcher=Null 280response_latency=20 281sequential_access=false 282size=2097152 283system=system 284tags=system.cpu.l2cache.tags 285tgts_per_mshr=12	279max_miss_count=0 280mshrs=20 281prefetch_on_access=false 282prefetcher=Null 283response_latency=20 284sequential_access=false 285size=2097152 286system=system 287tags=system.cpu.l2cache.tags 288tgts_per_mshr=12
286two_queue=false
287write_buffers=8 288cpu_side=system.cpu.toL2Bus.master[0] 289mem_side=system.membus.slave[1] 290 291[system.cpu.l2cache.tags] 292type=LRU 293assoc=8 294block_size=64 295clk_domain=system.cpu_clk_domain 296eventq_index=0 297hit_latency=20 298sequential_access=false 299size=2097152 300 301[system.cpu.toL2Bus] 302type=CoherentXBar 303clk_domain=system.cpu_clk_domain 304eventq_index=0	289write_buffers=8 290cpu_side=system.cpu.toL2Bus.master[0] 291mem_side=system.membus.slave[1] 292 293[system.cpu.l2cache.tags] 294type=LRU 295assoc=8 296block_size=64 297clk_domain=system.cpu_clk_domain 298eventq_index=0 299hit_latency=20 300sequential_access=false 301size=2097152 302 303[system.cpu.toL2Bus] 304type=CoherentXBar 305clk_domain=system.cpu_clk_domain 306eventq_index=0
305header_cycles=1	307forward_latency=0 308frontend_latency=1 309response_latency=1
306snoop_filter=Null	310snoop_filter=Null
	311snoop_response_latency=1
307system=system 308use_default_range=false 309width=32 310master=system.cpu.l2cache.cpu_side	312system=system 313use_default_range=false 314width=32 315master=system.cpu.l2cache.cpu_side
311slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port	316slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
312 313[system.cpu.tracer] 314type=ExeTracer 315eventq_index=0 316 317[system.cpu.workload] 318type=LiveProcess 319cmd=eon chair.control.cook chair.camera chair.surfaces chair.cook.ppm ppm pixels_out.cook 320cwd=build/ARM/tests/opt/long/se/30.eon/arm/linux/simple-timing	317 318[system.cpu.tracer] 319type=ExeTracer 320eventq_index=0 321 322[system.cpu.workload] 323type=LiveProcess 324cmd=eon chair.control.cook chair.camera chair.surfaces chair.cook.ppm ppm pixels_out.cook 325cwd=build/ARM/tests/opt/long/se/30.eon/arm/linux/simple-timing
	326drivers=
321egid=100 322env= 323errout=cerr 324euid=100 325eventq_index=0 326executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/eon 327gid=100 328input=cin	327egid=100 328env= 329errout=cerr 330euid=100 331eventq_index=0 332executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/eon 333gid=100 334input=cin
	335kvmInSE=false
329max_stack_size=67108864 330output=cout 331pid=100 332ppid=99 333simpoint=0 334system=system 335uid=100 336useArchPT=false 337 338[system.cpu_clk_domain] 339type=SrcClockDomain 340clock=500 341domain_id=-1 342eventq_index=0 343init_perf_level=0 344voltage_domain=system.voltage_domain 345 346[system.dvfs_handler] 347type=DVFSHandler 348domains= 349enable=false 350eventq_index=0 351sys_clk_domain=system.clk_domain 352transition_latency=100000000 353 354[system.membus] 355type=CoherentXBar 356clk_domain=system.clk_domain 357eventq_index=0	336max_stack_size=67108864 337output=cout 338pid=100 339ppid=99 340simpoint=0 341system=system 342uid=100 343useArchPT=false 344 345[system.cpu_clk_domain] 346type=SrcClockDomain 347clock=500 348domain_id=-1 349eventq_index=0 350init_perf_level=0 351voltage_domain=system.voltage_domain 352 353[system.dvfs_handler] 354type=DVFSHandler 355domains= 356enable=false 357eventq_index=0 358sys_clk_domain=system.clk_domain 359transition_latency=100000000 360 361[system.membus] 362type=CoherentXBar 363clk_domain=system.clk_domain 364eventq_index=0
358header_cycles=1	365forward_latency=4 366frontend_latency=3 367response_latency=2
359snoop_filter=Null	368snoop_filter=Null
	369snoop_response_latency=4
360system=system 361use_default_range=false	370system=system 371use_default_range=false
362width=8	372width=16
363master=system.physmem.port 364slave=system.system_port system.cpu.l2cache.mem_side 365 366[system.physmem] 367type=SimpleMemory 368bandwidth=73.000000 369clk_domain=system.clk_domain 370conf_table_reported=true 371eventq_index=0 372in_addr_map=true 373latency=30000 374latency_var=0 375null=false 376range=0:134217727 377port=system.membus.master[0] 378 379[system.voltage_domain] 380type=VoltageDomain 381eventq_index=0 382voltage=1.000000 383	373master=system.physmem.port 374slave=system.system_port system.cpu.l2cache.mem_side 375 376[system.physmem] 377type=SimpleMemory 378bandwidth=73.000000 379clk_domain=system.clk_domain 380conf_table_reported=true 381eventq_index=0 382in_addr_map=true 383latency=30000 384latency_var=0 385null=false 386range=0:134217727 387port=system.membus.master[0] 388 389[system.voltage_domain] 390type=VoltageDomain 391eventq_index=0 392voltage=1.000000 393