| stats.txt (9797:9cd5f91e7a79) | stats.txt (9838:43d22d746e7a) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.068375 # Number of seconds simulated 4sim_ticks 68375005500 # Number of ticks simulated 5final_tick 68375005500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.068375 # Number of seconds simulated 4sim_ticks 68375005500 # Number of ticks simulated 5final_tick 68375005500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 171790 # Simulator instruction rate (inst/s) 8host_op_rate 219625 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 43020256 # Simulator tick rate (ticks/s) 10host_mem_usage 254724 # Number of bytes of host memory used 11host_seconds 1589.37 # Real time elapsed on the host | 7host_inst_rate 121198 # Simulator instruction rate (inst/s) 8host_op_rate 154946 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 30350947 # Simulator tick rate (ticks/s) 10host_mem_usage 251080 # Number of bytes of host memory used 11host_seconds 2252.81 # Real time elapsed on the host |
| 12sim_insts 273036725 # Number of instructions simulated 13sim_ops 349064449 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 194176 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 272256 # Number of bytes read from this memory 16system.physmem.bytes_read::total 466432 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 194176 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 194176 # Number of instructions bytes read from this memory 19system.physmem.num_reads::cpu.inst 3034 # Number of read requests responded to by this memory 20system.physmem.num_reads::cpu.data 4254 # Number of read requests responded to by this memory 21system.physmem.num_reads::total 7288 # Number of read requests responded to by this memory 22system.physmem.bw_read::cpu.inst 2839868 # Total read bandwidth from this memory (bytes/s) 23system.physmem.bw_read::cpu.data 3981806 # Total read bandwidth from this memory (bytes/s) 24system.physmem.bw_read::total 6821674 # Total read bandwidth from this memory (bytes/s) 25system.physmem.bw_inst_read::cpu.inst 2839868 # Instruction read bandwidth from this memory (bytes/s) 26system.physmem.bw_inst_read::total 2839868 # Instruction read bandwidth from this memory (bytes/s) 27system.physmem.bw_total::cpu.inst 2839868 # Total bandwidth to/from this memory (bytes/s) 28system.physmem.bw_total::cpu.data 3981806 # Total bandwidth to/from this memory (bytes/s) 29system.physmem.bw_total::total 6821674 # Total bandwidth to/from this memory (bytes/s) | 12sim_insts 273036725 # Number of instructions simulated 13sim_ops 349064449 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 194176 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 272256 # Number of bytes read from this memory 16system.physmem.bytes_read::total 466432 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 194176 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 194176 # Number of instructions bytes read from this memory 19system.physmem.num_reads::cpu.inst 3034 # Number of read requests responded to by this memory 20system.physmem.num_reads::cpu.data 4254 # Number of read requests responded to by this memory 21system.physmem.num_reads::total 7288 # Number of read requests responded to by this memory 22system.physmem.bw_read::cpu.inst 2839868 # Total read bandwidth from this memory (bytes/s) 23system.physmem.bw_read::cpu.data 3981806 # Total read bandwidth from this memory (bytes/s) 24system.physmem.bw_read::total 6821674 # Total read bandwidth from this memory (bytes/s) 25system.physmem.bw_inst_read::cpu.inst 2839868 # Instruction read bandwidth from this memory (bytes/s) 26system.physmem.bw_inst_read::total 2839868 # Instruction read bandwidth from this memory (bytes/s) 27system.physmem.bw_total::cpu.inst 2839868 # Total bandwidth to/from this memory (bytes/s) 28system.physmem.bw_total::cpu.data 3981806 # Total bandwidth to/from this memory (bytes/s) 29system.physmem.bw_total::total 6821674 # Total bandwidth to/from this memory (bytes/s) |
| 30system.physmem.readReqs 7288 # Total number of read requests seen 31system.physmem.writeReqs 0 # Total number of write requests seen 32system.physmem.cpureqs 7293 # Reqs generatd by CPU via cache - shady | 30system.physmem.readReqs 7288 # Total number of read requests accepted by DRAM controller 31system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller 32system.physmem.readBursts 7288 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts 33system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts |
| 33system.physmem.bytesRead 466432 # Total number of bytes read from memory 34system.physmem.bytesWritten 0 # Total number of bytes written to memory 35system.physmem.bytesConsumedRd 466432 # bytesRead derated as per pkt->getSize() 36system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() | 34system.physmem.bytesRead 466432 # Total number of bytes read from memory 35system.physmem.bytesWritten 0 # Total number of bytes written to memory 36system.physmem.bytesConsumedRd 466432 # bytesRead derated as per pkt->getSize() 37system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() |
| 37system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q | 38system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q |
| 38system.physmem.neitherReadNorWrite 5 # Reqs where no action is needed 39system.physmem.perBankRdReqs::0 605 # Track reads on a per bank basis 40system.physmem.perBankRdReqs::1 802 # Track reads on a per bank basis 41system.physmem.perBankRdReqs::2 608 # Track reads on a per bank basis 42system.physmem.perBankRdReqs::3 526 # Track reads on a per bank basis 43system.physmem.perBankRdReqs::4 442 # Track reads on a per bank basis 44system.physmem.perBankRdReqs::5 353 # Track reads on a per bank basis 45system.physmem.perBankRdReqs::6 163 # Track reads on a per bank basis --- 192 unchanged lines hidden (view full) --- 238system.physmem.avgGap 9381835.07 # Average gap between requests 239system.membus.throughput 6821674 # Throughput (bytes/s) 240system.membus.trans_dist::ReadReq 4467 # Transaction distribution 241system.membus.trans_dist::ReadResp 4467 # Transaction distribution 242system.membus.trans_dist::UpgradeReq 5 # Transaction distribution 243system.membus.trans_dist::UpgradeResp 5 # Transaction distribution 244system.membus.trans_dist::ReadExReq 2821 # Transaction distribution 245system.membus.trans_dist::ReadExResp 2821 # Transaction distribution | 39system.physmem.neitherReadNorWrite 5 # Reqs where no action is needed 40system.physmem.perBankRdReqs::0 605 # Track reads on a per bank basis 41system.physmem.perBankRdReqs::1 802 # Track reads on a per bank basis 42system.physmem.perBankRdReqs::2 608 # Track reads on a per bank basis 43system.physmem.perBankRdReqs::3 526 # Track reads on a per bank basis 44system.physmem.perBankRdReqs::4 442 # Track reads on a per bank basis 45system.physmem.perBankRdReqs::5 353 # Track reads on a per bank basis 46system.physmem.perBankRdReqs::6 163 # Track reads on a per bank basis --- 192 unchanged lines hidden (view full) --- 239system.physmem.avgGap 9381835.07 # Average gap between requests 240system.membus.throughput 6821674 # Throughput (bytes/s) 241system.membus.trans_dist::ReadReq 4467 # Transaction distribution 242system.membus.trans_dist::ReadResp 4467 # Transaction distribution 243system.membus.trans_dist::UpgradeReq 5 # Transaction distribution 244system.membus.trans_dist::UpgradeResp 5 # Transaction distribution 245system.membus.trans_dist::ReadExReq 2821 # Transaction distribution 246system.membus.trans_dist::ReadExResp 2821 # Transaction distribution |
| 246system.membus.pkt_count_system.cpu.l2cache.mem_side 14586 # Packet count per connected master and slave (bytes) 247system.membus.pkt_count 14586 # Packet count per connected master and slave (bytes) 248system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 466432 # Cumulative packet size per connected master and slave (bytes) 249system.membus.tot_pkt_size 466432 # Cumulative packet size per connected master and slave (bytes) | 247system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 14586 # Packet count per connected master and slave (bytes) 248system.membus.pkt_count::total 14586 # Packet count per connected master and slave (bytes) 249system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 466432 # Cumulative packet size per connected master and slave (bytes) 250system.membus.tot_pkt_size::total 466432 # Cumulative packet size per connected master and slave (bytes) |
| 250system.membus.data_through_bus 466432 # Total data (bytes) 251system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 252system.membus.reqLayer0.occupancy 8910500 # Layer occupancy (ticks) 253system.membus.reqLayer0.utilization 0.0 # Layer utilization (%) 254system.membus.respLayer1.occupancy 68010245 # Layer occupancy (ticks) 255system.membus.respLayer1.utilization 0.1 # Layer utilization (%) 256system.cpu.branchPred.lookups 35388733 # Number of BP lookups 257system.cpu.branchPred.condPredicted 21200896 # Number of conditional branches predicted --- 312 unchanged lines hidden (view full) --- 570system.cpu.toL2Bus.throughput 20110273 # Throughput (bytes/s) 571system.cpu.toL2Bus.trans_dist::ReadReq 17610 # Transaction distribution 572system.cpu.toL2Bus.trans_dist::ReadResp 17610 # Transaction distribution 573system.cpu.toL2Bus.trans_dist::Writeback 1037 # Transaction distribution 574system.cpu.toL2Bus.trans_dist::UpgradeReq 5 # Transaction distribution 575system.cpu.toL2Bus.trans_dist::UpgradeResp 5 # Transaction distribution 576system.cpu.toL2Bus.trans_dist::ReadExReq 2838 # Transaction distribution 577system.cpu.toL2Bus.trans_dist::ReadExResp 2838 # Transaction distribution | 251system.membus.data_through_bus 466432 # Total data (bytes) 252system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 253system.membus.reqLayer0.occupancy 8910500 # Layer occupancy (ticks) 254system.membus.reqLayer0.utilization 0.0 # Layer utilization (%) 255system.membus.respLayer1.occupancy 68010245 # Layer occupancy (ticks) 256system.membus.respLayer1.utilization 0.1 # Layer utilization (%) 257system.cpu.branchPred.lookups 35388733 # Number of BP lookups 258system.cpu.branchPred.condPredicted 21200896 # Number of conditional branches predicted --- 312 unchanged lines hidden (view full) --- 571system.cpu.toL2Bus.throughput 20110273 # Throughput (bytes/s) 572system.cpu.toL2Bus.trans_dist::ReadReq 17610 # Transaction distribution 573system.cpu.toL2Bus.trans_dist::ReadResp 17610 # Transaction distribution 574system.cpu.toL2Bus.trans_dist::Writeback 1037 # Transaction distribution 575system.cpu.toL2Bus.trans_dist::UpgradeReq 5 # Transaction distribution 576system.cpu.toL2Bus.trans_dist::UpgradeResp 5 # Transaction distribution 577system.cpu.toL2Bus.trans_dist::ReadExReq 2838 # Transaction distribution 578system.cpu.toL2Bus.trans_dist::ReadExResp 2838 # Transaction distribution |
| 578system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 31674 # Packet count per connected master and slave (bytes) 579system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 10263 # Packet count per connected master and slave (bytes) 580system.cpu.toL2Bus.pkt_count 41937 # Packet count per connected master and slave (bytes) 581system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 1013376 # Cumulative packet size per connected master and slave (bytes) 582system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 361280 # Cumulative packet size per connected master and slave (bytes) 583system.cpu.toL2Bus.tot_pkt_size 1374656 # Cumulative packet size per connected master and slave (bytes) | 579system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 31674 # Packet count per connected master and slave (bytes) 580system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 10263 # Packet count per connected master and slave (bytes) 581system.cpu.toL2Bus.pkt_count::total 41937 # Packet count per connected master and slave (bytes) 582system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1013376 # Cumulative packet size per connected master and slave (bytes) 583system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 361280 # Cumulative packet size per connected master and slave (bytes) 584system.cpu.toL2Bus.tot_pkt_size::total 1374656 # Cumulative packet size per connected master and slave (bytes) |
| 584system.cpu.toL2Bus.data_through_bus 1374656 # Total data (bytes) 585system.cpu.toL2Bus.snoop_data_through_bus 384 # Total snoop data (bytes) 586system.cpu.toL2Bus.reqLayer0.occupancy 11782000 # Layer occupancy (ticks) 587system.cpu.toL2Bus.reqLayer0.utilization 0.0 # Layer utilization (%) 588system.cpu.toL2Bus.respLayer0.occupancy 24379238 # Layer occupancy (ticks) 589system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 590system.cpu.toL2Bus.respLayer1.occupancy 7509966 # Layer occupancy (ticks) 591system.cpu.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%) | 585system.cpu.toL2Bus.data_through_bus 1374656 # Total data (bytes) 586system.cpu.toL2Bus.snoop_data_through_bus 384 # Total snoop data (bytes) 587system.cpu.toL2Bus.reqLayer0.occupancy 11782000 # Layer occupancy (ticks) 588system.cpu.toL2Bus.reqLayer0.utilization 0.0 # Layer utilization (%) 589system.cpu.toL2Bus.respLayer0.occupancy 24379238 # Layer occupancy (ticks) 590system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 591system.cpu.toL2Bus.respLayer1.occupancy 7509966 # Layer occupancy (ticks) 592system.cpu.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%) |
| 592system.cpu.icache.tags.replacements 13946 # number of replacements 593system.cpu.icache.tags.tagsinuse 1848.498389 # Cycle average of tags in use 594system.cpu.icache.tags.total_refs 37543488 # Total number of references to valid blocks. 595system.cpu.icache.tags.sampled_refs 15836 # Sample count of references to valid blocks. 596system.cpu.icache.tags.avg_refs 2370.768376 # Average number of references to valid blocks. 597system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 598system.cpu.icache.tags.occ_blocks::cpu.inst 1848.498389 # Average occupied blocks per requestor 599system.cpu.icache.tags.occ_percent::cpu.inst 0.902587 # Average percentage of cache occupancy 600system.cpu.icache.tags.occ_percent::total 0.902587 # Average percentage of cache occupancy | 593system.cpu.icache.tags.replacements 13946 # number of replacements 594system.cpu.icache.tags.tagsinuse 1848.498389 # Cycle average of tags in use 595system.cpu.icache.tags.total_refs 37543488 # Total number of references to valid blocks. 596system.cpu.icache.tags.sampled_refs 15836 # Sample count of references to valid blocks. 597system.cpu.icache.tags.avg_refs 2370.768376 # Average number of references to valid blocks. 598system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 599system.cpu.icache.tags.occ_blocks::cpu.inst 1848.498389 # Average occupied blocks per requestor 600system.cpu.icache.tags.occ_percent::cpu.inst 0.902587 # Average percentage of cache occupancy 601system.cpu.icache.tags.occ_percent::total 0.902587 # Average percentage of cache occupancy |
| 601system.cpu.icache.ReadReq_hits::cpu.inst 37543488 # number of ReadReq hits 602system.cpu.icache.ReadReq_hits::total 37543488 # number of ReadReq hits 603system.cpu.icache.demand_hits::cpu.inst 37543488 # number of demand (read+write) hits 604system.cpu.icache.demand_hits::total 37543488 # number of demand (read+write) hits 605system.cpu.icache.overall_hits::cpu.inst 37543488 # number of overall hits 606system.cpu.icache.overall_hits::total 37543488 # number of overall hits 607system.cpu.icache.ReadReq_misses::cpu.inst 17326 # number of ReadReq misses 608system.cpu.icache.ReadReq_misses::total 17326 # number of ReadReq misses --- 59 unchanged lines hidden (view full) --- 668system.cpu.icache.overall_mshr_miss_rate::total 0.000422 # mshr miss rate for overall accesses 669system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 22057.528977 # average ReadReq mshr miss latency 670system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 22057.528977 # average ReadReq mshr miss latency 671system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 22057.528977 # average overall mshr miss latency 672system.cpu.icache.demand_avg_mshr_miss_latency::total 22057.528977 # average overall mshr miss latency 673system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 22057.528977 # average overall mshr miss latency 674system.cpu.icache.overall_avg_mshr_miss_latency::total 22057.528977 # average overall mshr miss latency 675system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate | 602system.cpu.icache.ReadReq_hits::cpu.inst 37543488 # number of ReadReq hits 603system.cpu.icache.ReadReq_hits::total 37543488 # number of ReadReq hits 604system.cpu.icache.demand_hits::cpu.inst 37543488 # number of demand (read+write) hits 605system.cpu.icache.demand_hits::total 37543488 # number of demand (read+write) hits 606system.cpu.icache.overall_hits::cpu.inst 37543488 # number of overall hits 607system.cpu.icache.overall_hits::total 37543488 # number of overall hits 608system.cpu.icache.ReadReq_misses::cpu.inst 17326 # number of ReadReq misses 609system.cpu.icache.ReadReq_misses::total 17326 # number of ReadReq misses --- 59 unchanged lines hidden (view full) --- 669system.cpu.icache.overall_mshr_miss_rate::total 0.000422 # mshr miss rate for overall accesses 670system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 22057.528977 # average ReadReq mshr miss latency 671system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 22057.528977 # average ReadReq mshr miss latency 672system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 22057.528977 # average overall mshr miss latency 673system.cpu.icache.demand_avg_mshr_miss_latency::total 22057.528977 # average overall mshr miss latency 674system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 22057.528977 # average overall mshr miss latency 675system.cpu.icache.overall_avg_mshr_miss_latency::total 22057.528977 # average overall mshr miss latency 676system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 676system.cpu.l2cache.tags.replacements 0 # number of replacements 677system.cpu.l2cache.tags.tagsinuse 3937.726706 # Cycle average of tags in use 678system.cpu.l2cache.tags.total_refs 13182 # Total number of references to valid blocks. 679system.cpu.l2cache.tags.sampled_refs 5389 # Sample count of references to valid blocks. 680system.cpu.l2cache.tags.avg_refs 2.446094 # Average number of references to valid blocks. 681system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. | 677system.cpu.l2cache.tags.replacements 0 # number of replacements 678system.cpu.l2cache.tags.tagsinuse 3937.726706 # Cycle average of tags in use 679system.cpu.l2cache.tags.total_refs 13182 # Total number of references to valid blocks. 680system.cpu.l2cache.tags.sampled_refs 5389 # Sample count of references to valid blocks. 681system.cpu.l2cache.tags.avg_refs 2.446094 # Average number of references to valid blocks. 682system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. |
| 682system.cpu.l2cache.tags.occ_blocks::writebacks 375.051576 # Average occupied blocks per requestor | 683system.cpu.l2cache.tags.occ_blocks::writebacks 375.051576 # Average occupied blocks per requestor |
| 683system.cpu.l2cache.tags.occ_blocks::cpu.inst 2781.709770 # Average occupied blocks per requestor 684system.cpu.l2cache.tags.occ_blocks::cpu.data 780.965360 # Average occupied blocks per requestor | 684system.cpu.l2cache.tags.occ_blocks::cpu.inst 2781.709770 # Average occupied blocks per requestor 685system.cpu.l2cache.tags.occ_blocks::cpu.data 780.965360 # Average occupied blocks per requestor |
| 685system.cpu.l2cache.tags.occ_percent::writebacks 0.011446 # Average percentage of cache occupancy 686system.cpu.l2cache.tags.occ_percent::cpu.inst 0.084891 # Average percentage of cache occupancy 687system.cpu.l2cache.tags.occ_percent::cpu.data 0.023833 # Average percentage of cache occupancy | 686system.cpu.l2cache.tags.occ_percent::writebacks 0.011446 # Average percentage of cache occupancy 687system.cpu.l2cache.tags.occ_percent::cpu.inst 0.084891 # Average percentage of cache occupancy 688system.cpu.l2cache.tags.occ_percent::cpu.data 0.023833 # Average percentage of cache occupancy |
| 688system.cpu.l2cache.tags.occ_percent::total 0.120170 # Average percentage of cache occupancy | 689system.cpu.l2cache.tags.occ_percent::total 0.120170 # Average percentage of cache occupancy |
| 689system.cpu.l2cache.ReadReq_hits::cpu.inst 12788 # number of ReadReq hits 690system.cpu.l2cache.ReadReq_hits::cpu.data 298 # number of ReadReq hits 691system.cpu.l2cache.ReadReq_hits::total 13086 # number of ReadReq hits 692system.cpu.l2cache.Writeback_hits::writebacks 1037 # number of Writeback hits 693system.cpu.l2cache.Writeback_hits::total 1037 # number of Writeback hits 694system.cpu.l2cache.ReadExReq_hits::cpu.data 17 # number of ReadExReq hits 695system.cpu.l2cache.ReadExReq_hits::total 17 # number of ReadExReq hits 696system.cpu.l2cache.demand_hits::cpu.inst 12788 # number of demand (read+write) hits --- 130 unchanged lines hidden (view full) --- 827system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 54420.684155 # average ReadExReq mshr miss latency 828system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 54944.133158 # average overall mshr miss latency 829system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 55178.479079 # average overall mshr miss latency 830system.cpu.l2cache.demand_avg_mshr_miss_latency::total 55080.920692 # average overall mshr miss latency 831system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54944.133158 # average overall mshr miss latency 832system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 55178.479079 # average overall mshr miss latency 833system.cpu.l2cache.overall_avg_mshr_miss_latency::total 55080.920692 # average overall mshr miss latency 834system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate | 690system.cpu.l2cache.ReadReq_hits::cpu.inst 12788 # number of ReadReq hits 691system.cpu.l2cache.ReadReq_hits::cpu.data 298 # number of ReadReq hits 692system.cpu.l2cache.ReadReq_hits::total 13086 # number of ReadReq hits 693system.cpu.l2cache.Writeback_hits::writebacks 1037 # number of Writeback hits 694system.cpu.l2cache.Writeback_hits::total 1037 # number of Writeback hits 695system.cpu.l2cache.ReadExReq_hits::cpu.data 17 # number of ReadExReq hits 696system.cpu.l2cache.ReadExReq_hits::total 17 # number of ReadExReq hits 697system.cpu.l2cache.demand_hits::cpu.inst 12788 # number of demand (read+write) hits --- 130 unchanged lines hidden (view full) --- 828system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 54420.684155 # average ReadExReq mshr miss latency 829system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 54944.133158 # average overall mshr miss latency 830system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 55178.479079 # average overall mshr miss latency 831system.cpu.l2cache.demand_avg_mshr_miss_latency::total 55080.920692 # average overall mshr miss latency 832system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54944.133158 # average overall mshr miss latency 833system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 55178.479079 # average overall mshr miss latency 834system.cpu.l2cache.overall_avg_mshr_miss_latency::total 55080.920692 # average overall mshr miss latency 835system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 835system.cpu.dcache.tags.replacements 1414 # number of replacements 836system.cpu.dcache.tags.tagsinuse 3101.863625 # Cycle average of tags in use 837system.cpu.dcache.tags.total_refs 170862922 # Total number of references to valid blocks. 838system.cpu.dcache.tags.sampled_refs 4608 # Sample count of references to valid blocks. 839system.cpu.dcache.tags.avg_refs 37079.627170 # Average number of references to valid blocks. 840system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 841system.cpu.dcache.tags.occ_blocks::cpu.data 3101.863625 # Average occupied blocks per requestor 842system.cpu.dcache.tags.occ_percent::cpu.data 0.757291 # Average percentage of cache occupancy 843system.cpu.dcache.tags.occ_percent::total 0.757291 # Average percentage of cache occupancy | 836system.cpu.dcache.tags.replacements 1414 # number of replacements 837system.cpu.dcache.tags.tagsinuse 3101.863625 # Cycle average of tags in use 838system.cpu.dcache.tags.total_refs 170862922 # Total number of references to valid blocks. 839system.cpu.dcache.tags.sampled_refs 4608 # Sample count of references to valid blocks. 840system.cpu.dcache.tags.avg_refs 37079.627170 # Average number of references to valid blocks. 841system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 842system.cpu.dcache.tags.occ_blocks::cpu.data 3101.863625 # Average occupied blocks per requestor 843system.cpu.dcache.tags.occ_percent::cpu.data 0.757291 # Average percentage of cache occupancy 844system.cpu.dcache.tags.occ_percent::total 0.757291 # Average percentage of cache occupancy |
| 844system.cpu.dcache.ReadReq_hits::cpu.data 88809743 # number of ReadReq hits 845system.cpu.dcache.ReadReq_hits::total 88809743 # number of ReadReq hits 846system.cpu.dcache.WriteReq_hits::cpu.data 82031242 # number of WriteReq hits 847system.cpu.dcache.WriteReq_hits::total 82031242 # number of WriteReq hits 848system.cpu.dcache.LoadLockedReq_hits::cpu.data 11022 # number of LoadLockedReq hits 849system.cpu.dcache.LoadLockedReq_hits::total 11022 # number of LoadLockedReq hits 850system.cpu.dcache.StoreCondReq_hits::cpu.data 10895 # number of StoreCondReq hits 851system.cpu.dcache.StoreCondReq_hits::total 10895 # number of StoreCondReq hits --- 111 unchanged lines hidden --- | 845system.cpu.dcache.ReadReq_hits::cpu.data 88809743 # number of ReadReq hits 846system.cpu.dcache.ReadReq_hits::total 88809743 # number of ReadReq hits 847system.cpu.dcache.WriteReq_hits::cpu.data 82031242 # number of WriteReq hits 848system.cpu.dcache.WriteReq_hits::total 82031242 # number of WriteReq hits 849system.cpu.dcache.LoadLockedReq_hits::cpu.data 11022 # number of LoadLockedReq hits 850system.cpu.dcache.LoadLockedReq_hits::total 11022 # number of LoadLockedReq hits 851system.cpu.dcache.StoreCondReq_hits::cpu.data 10895 # number of StoreCondReq hits 852system.cpu.dcache.StoreCondReq_hits::total 10895 # number of StoreCondReq hits --- 111 unchanged lines hidden --- |