| stats.txt (9285:9901180cd573) | stats.txt (9289:a31a1243a3ed) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.070882 # Number of seconds simulated 4sim_ticks 70882487500 # Number of ticks simulated 5final_tick 70882487500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.070882 # Number of seconds simulated 4sim_ticks 70882487500 # Number of ticks simulated 5final_tick 70882487500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 119635 # Simulator instruction rate (inst/s) 8host_op_rate 152946 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 31056895 # Simulator tick rate (ticks/s) 10host_mem_usage 243232 # Number of bytes of host memory used 11host_seconds 2282.34 # Real time elapsed on the host | 7host_inst_rate 146290 # Simulator instruction rate (inst/s) 8host_op_rate 187023 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 37976354 # Simulator tick rate (ticks/s) 10host_mem_usage 236976 # Number of bytes of host memory used 11host_seconds 1866.49 # Real time elapsed on the host |
| 12sim_insts 273048441 # Number of instructions simulated 13sim_ops 349076165 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 194880 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 272768 # Number of bytes read from this memory 16system.physmem.bytes_read::total 467648 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 194880 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 194880 # Number of instructions bytes read from this memory 19system.physmem.num_reads::cpu.inst 3045 # Number of read requests responded to by this memory --- 472 unchanged lines hidden (view full) --- 492system.cpu.dcache.WriteReq_avg_miss_latency::total 33119.259329 # average WriteReq miss latency 493system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data 37000 # average LoadLockedReq miss latency 494system.cpu.dcache.LoadLockedReq_avg_miss_latency::total 37000 # average LoadLockedReq miss latency 495system.cpu.dcache.demand_avg_miss_latency::cpu.data 32843.594242 # average overall miss latency 496system.cpu.dcache.demand_avg_miss_latency::total 32843.594242 # average overall miss latency 497system.cpu.dcache.overall_avg_miss_latency::cpu.data 32843.594242 # average overall miss latency 498system.cpu.dcache.overall_avg_miss_latency::total 32843.594242 # average overall miss latency 499system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked | 12sim_insts 273048441 # Number of instructions simulated 13sim_ops 349076165 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 194880 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 272768 # Number of bytes read from this memory 16system.physmem.bytes_read::total 467648 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 194880 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 194880 # Number of instructions bytes read from this memory 19system.physmem.num_reads::cpu.inst 3045 # Number of read requests responded to by this memory --- 472 unchanged lines hidden (view full) --- 492system.cpu.dcache.WriteReq_avg_miss_latency::total 33119.259329 # average WriteReq miss latency 493system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data 37000 # average LoadLockedReq miss latency 494system.cpu.dcache.LoadLockedReq_avg_miss_latency::total 37000 # average LoadLockedReq miss latency 495system.cpu.dcache.demand_avg_miss_latency::cpu.data 32843.594242 # average overall miss latency 496system.cpu.dcache.demand_avg_miss_latency::total 32843.594242 # average overall miss latency 497system.cpu.dcache.overall_avg_miss_latency::cpu.data 32843.594242 # average overall miss latency 498system.cpu.dcache.overall_avg_miss_latency::total 32843.594242 # average overall miss latency 499system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked |
| 500system.cpu.dcache.blocked_cycles::no_targets 313000 # number of cycles access was blocked | 500system.cpu.dcache.blocked_cycles::no_targets 626 # number of cycles access was blocked |
| 501system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 502system.cpu.dcache.blocked::no_targets 16 # number of cycles access was blocked 503system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked | 501system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 502system.cpu.dcache.blocked::no_targets 16 # number of cycles access was blocked 503system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked |
| 504system.cpu.dcache.avg_blocked_cycles::no_targets 19562.500000 # average number of cycles each access was blocked | 504system.cpu.dcache.avg_blocked_cycles::no_targets 39.125000 # average number of cycles each access was blocked |
| 505system.cpu.dcache.fast_writes 0 # number of fast writes performed 506system.cpu.dcache.cache_copies 0 # number of cache copies performed 507system.cpu.dcache.writebacks::writebacks 1041 # number of writebacks 508system.cpu.dcache.writebacks::total 1041 # number of writebacks 509system.cpu.dcache.ReadReq_mshr_hits::cpu.data 2130 # number of ReadReq MSHR hits 510system.cpu.dcache.ReadReq_mshr_hits::total 2130 # number of ReadReq MSHR hits 511system.cpu.dcache.WriteReq_mshr_hits::cpu.data 18331 # number of WriteReq MSHR hits 512system.cpu.dcache.WriteReq_mshr_hits::total 18331 # number of WriteReq MSHR hits --- 186 unchanged lines hidden --- | 505system.cpu.dcache.fast_writes 0 # number of fast writes performed 506system.cpu.dcache.cache_copies 0 # number of cache copies performed 507system.cpu.dcache.writebacks::writebacks 1041 # number of writebacks 508system.cpu.dcache.writebacks::total 1041 # number of writebacks 509system.cpu.dcache.ReadReq_mshr_hits::cpu.data 2130 # number of ReadReq MSHR hits 510system.cpu.dcache.ReadReq_mshr_hits::total 2130 # number of ReadReq MSHR hits 511system.cpu.dcache.WriteReq_mshr_hits::cpu.data 18331 # number of WriteReq MSHR hits 512system.cpu.dcache.WriteReq_mshr_hits::total 18331 # number of WriteReq MSHR hits --- 186 unchanged lines hidden --- |