| stats.txt (10220:9eab5efc02e8) | stats.txt (10409:8c80b91944c5) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.647873 # Number of seconds simulated 4sim_ticks 1647872849000 # Number of ticks simulated 5final_tick 1647872849000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.647873 # Number of seconds simulated 4sim_ticks 1647872849000 # Number of ticks simulated 5final_tick 1647872849000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 654522 # Simulator instruction rate (inst/s) 8host_op_rate 1210285 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 1304389188 # Simulator tick rate (ticks/s) 10host_mem_usage 297832 # Number of bytes of host memory used 11host_seconds 1263.33 # Real time elapsed on the host | 7host_inst_rate 845545 # Simulator instruction rate (inst/s) 8host_op_rate 1563508 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 1685075999 # Simulator tick rate (ticks/s) 10host_mem_usage 318276 # Number of bytes of host memory used 11host_seconds 977.92 # Real time elapsed on the host |
| 12sim_insts 826877110 # Number of instructions simulated 13sim_ops 1528988702 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 120704 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 24272448 # Number of bytes read from this memory 18system.physmem.bytes_read::total 24393152 # Number of bytes read from this memory 19system.physmem.bytes_inst_read::cpu.inst 120704 # Number of instructions bytes read from this memory --- 11 unchanged lines hidden (view full) --- 31system.physmem.bw_inst_read::cpu.inst 73248 # Instruction read bandwidth from this memory (bytes/s) 32system.physmem.bw_inst_read::total 73248 # Instruction read bandwidth from this memory (bytes/s) 33system.physmem.bw_write::writebacks 11351788 # Write bandwidth from this memory (bytes/s) 34system.physmem.bw_write::total 11351788 # Write bandwidth from this memory (bytes/s) 35system.physmem.bw_total::writebacks 11351788 # Total bandwidth to/from this memory (bytes/s) 36system.physmem.bw_total::cpu.inst 73248 # Total bandwidth to/from this memory (bytes/s) 37system.physmem.bw_total::cpu.data 14729564 # Total bandwidth to/from this memory (bytes/s) 38system.physmem.bw_total::total 26154600 # Total bandwidth to/from this memory (bytes/s) | 12sim_insts 826877110 # Number of instructions simulated 13sim_ops 1528988702 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 120704 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 24272448 # Number of bytes read from this memory 18system.physmem.bytes_read::total 24393152 # Number of bytes read from this memory 19system.physmem.bytes_inst_read::cpu.inst 120704 # Number of instructions bytes read from this memory --- 11 unchanged lines hidden (view full) --- 31system.physmem.bw_inst_read::cpu.inst 73248 # Instruction read bandwidth from this memory (bytes/s) 32system.physmem.bw_inst_read::total 73248 # Instruction read bandwidth from this memory (bytes/s) 33system.physmem.bw_write::writebacks 11351788 # Write bandwidth from this memory (bytes/s) 34system.physmem.bw_write::total 11351788 # Write bandwidth from this memory (bytes/s) 35system.physmem.bw_total::writebacks 11351788 # Total bandwidth to/from this memory (bytes/s) 36system.physmem.bw_total::cpu.inst 73248 # Total bandwidth to/from this memory (bytes/s) 37system.physmem.bw_total::cpu.data 14729564 # Total bandwidth to/from this memory (bytes/s) 38system.physmem.bw_total::total 26154600 # Total bandwidth to/from this memory (bytes/s) |
| 39system.membus.throughput 26154600 # Throughput (bytes/s) | |
| 40system.membus.trans_dist::ReadReq 174452 # Transaction distribution 41system.membus.trans_dist::ReadResp 174452 # Transaction distribution 42system.membus.trans_dist::Writeback 292286 # Transaction distribution 43system.membus.trans_dist::ReadExReq 206691 # Transaction distribution 44system.membus.trans_dist::ReadExResp 206691 # Transaction distribution 45system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1054572 # Packet count per connected master and slave (bytes) 46system.membus.pkt_count_system.cpu.l2cache.mem_side::total 1054572 # Packet count per connected master and slave (bytes) 47system.membus.pkt_count::total 1054572 # Packet count per connected master and slave (bytes) | 39system.membus.trans_dist::ReadReq 174452 # Transaction distribution 40system.membus.trans_dist::ReadResp 174452 # Transaction distribution 41system.membus.trans_dist::Writeback 292286 # Transaction distribution 42system.membus.trans_dist::ReadExReq 206691 # Transaction distribution 43system.membus.trans_dist::ReadExResp 206691 # Transaction distribution 44system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1054572 # Packet count per connected master and slave (bytes) 45system.membus.pkt_count_system.cpu.l2cache.mem_side::total 1054572 # Packet count per connected master and slave (bytes) 46system.membus.pkt_count::total 1054572 # Packet count per connected master and slave (bytes) |
| 48system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 43099456 # Cumulative packet size per connected master and slave (bytes) 49system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 43099456 # Cumulative packet size per connected master and slave (bytes) 50system.membus.tot_pkt_size::total 43099456 # Cumulative packet size per connected master and slave (bytes) 51system.membus.data_through_bus 43099456 # Total data (bytes) 52system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) | 47system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 43099456 # Cumulative packet size per connected master and slave (bytes) 48system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43099456 # Cumulative packet size per connected master and slave (bytes) 49system.membus.pkt_size::total 43099456 # Cumulative packet size per connected master and slave (bytes) 50system.membus.snoops 0 # Total snoops (count) 51system.membus.snoop_fanout::samples 673429 # Request fanout histogram 52system.membus.snoop_fanout::mean 0 # Request fanout histogram 53system.membus.snoop_fanout::stdev 0 # Request fanout histogram 54system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 55system.membus.snoop_fanout::0 673429 100.00% 100.00% # Request fanout histogram 56system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram 57system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 58system.membus.snoop_fanout::min_value 0 # Request fanout histogram 59system.membus.snoop_fanout::max_value 0 # Request fanout histogram 60system.membus.snoop_fanout::total 673429 # Request fanout histogram |
| 53system.membus.reqLayer0.occupancy 3011737000 # Layer occupancy (ticks) 54system.membus.reqLayer0.utilization 0.2 # Layer utilization (%) 55system.membus.respLayer1.occupancy 3430300500 # Layer occupancy (ticks) 56system.membus.respLayer1.utilization 0.2 # Layer utilization (%) 57system.cpu_clk_domain.clock 500 # Clock period in ticks 58system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks 59system.cpu.workload.num_syscalls 551 # Number of system calls 60system.cpu.numCycles 3295745698 # number of cpu cycles simulated --- 393 unchanged lines hidden (view full) --- 454system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 15195.810037 # average ReadReq mshr miss latency 455system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 21974.142399 # average WriteReq mshr miss latency 456system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 21974.142399 # average WriteReq mshr miss latency 457system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 17324.874387 # average overall mshr miss latency 458system.cpu.dcache.demand_avg_mshr_miss_latency::total 17324.874387 # average overall mshr miss latency 459system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 17324.874387 # average overall mshr miss latency 460system.cpu.dcache.overall_avg_mshr_miss_latency::total 17324.874387 # average overall mshr miss latency 461system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate | 61system.membus.reqLayer0.occupancy 3011737000 # Layer occupancy (ticks) 62system.membus.reqLayer0.utilization 0.2 # Layer utilization (%) 63system.membus.respLayer1.occupancy 3430300500 # Layer occupancy (ticks) 64system.membus.respLayer1.utilization 0.2 # Layer utilization (%) 65system.cpu_clk_domain.clock 500 # Clock period in ticks 66system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks 67system.cpu.workload.num_syscalls 551 # Number of system calls 68system.cpu.numCycles 3295745698 # number of cpu cycles simulated --- 393 unchanged lines hidden (view full) --- 462system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 15195.810037 # average ReadReq mshr miss latency 463system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 21974.142399 # average WriteReq mshr miss latency 464system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 21974.142399 # average WriteReq mshr miss latency 465system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 17324.874387 # average overall mshr miss latency 466system.cpu.dcache.demand_avg_mshr_miss_latency::total 17324.874387 # average overall mshr miss latency 467system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 17324.874387 # average overall mshr miss latency 468system.cpu.dcache.overall_avg_mshr_miss_latency::total 17324.874387 # average overall mshr miss latency 469system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 462system.cpu.toL2Bus.throughput 188161896 # Throughput (bytes/s) | |
| 463system.cpu.toL2Bus.trans_dist::ReadReq 1730228 # Transaction distribution 464system.cpu.toL2Bus.trans_dist::ReadResp 1730228 # Transaction distribution 465system.cpu.toL2Bus.trans_dist::Writeback 2323523 # Transaction distribution 466system.cpu.toL2Bus.trans_dist::ReadExReq 791044 # Transaction distribution 467system.cpu.toL2Bus.trans_dist::ReadExResp 791044 # Transaction distribution 468system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 5628 # Packet count per connected master and slave (bytes) 469system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 7360439 # Packet count per connected master and slave (bytes) 470system.cpu.toL2Bus.pkt_count::total 7366067 # Packet count per connected master and slave (bytes) | 470system.cpu.toL2Bus.trans_dist::ReadReq 1730228 # Transaction distribution 471system.cpu.toL2Bus.trans_dist::ReadResp 1730228 # Transaction distribution 472system.cpu.toL2Bus.trans_dist::Writeback 2323523 # Transaction distribution 473system.cpu.toL2Bus.trans_dist::ReadExReq 791044 # Transaction distribution 474system.cpu.toL2Bus.trans_dist::ReadExResp 791044 # Transaction distribution 475system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 5628 # Packet count per connected master and slave (bytes) 476system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 7360439 # Packet count per connected master and slave (bytes) 477system.cpu.toL2Bus.pkt_count::total 7366067 # Packet count per connected master and slave (bytes) |
| 471system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 180096 # Cumulative packet size per connected master and slave (bytes) 472system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 309886784 # Cumulative packet size per connected master and slave (bytes) 473system.cpu.toL2Bus.tot_pkt_size::total 310066880 # Cumulative packet size per connected master and slave (bytes) 474system.cpu.toL2Bus.data_through_bus 310066880 # Total data (bytes) 475system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) | 478system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 180096 # Cumulative packet size per connected master and slave (bytes) 479system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 309886784 # Cumulative packet size per connected master and slave (bytes) 480system.cpu.toL2Bus.pkt_size::total 310066880 # Cumulative packet size per connected master and slave (bytes) 481system.cpu.toL2Bus.snoops 0 # Total snoops (count) 482system.cpu.toL2Bus.snoop_fanout::samples 4844795 # Request fanout histogram 483system.cpu.toL2Bus.snoop_fanout::mean 3 # Request fanout histogram 484system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram 485system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 486system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 487system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 0.00% # Request fanout histogram 488system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 0.00% # Request fanout histogram 489system.cpu.toL2Bus.snoop_fanout::3 4844795 100.00% 100.00% # Request fanout histogram 490system.cpu.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram 491system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 492system.cpu.toL2Bus.snoop_fanout::min_value 3 # Request fanout histogram 493system.cpu.toL2Bus.snoop_fanout::max_value 3 # Request fanout histogram 494system.cpu.toL2Bus.snoop_fanout::total 4844795 # Request fanout histogram |
| 476system.cpu.toL2Bus.reqLayer0.occupancy 4745920500 # Layer occupancy (ticks) 477system.cpu.toL2Bus.reqLayer0.utilization 0.3 # Layer utilization (%) 478system.cpu.toL2Bus.respLayer0.occupancy 4221000 # Layer occupancy (ticks) 479system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 480system.cpu.toL2Bus.respLayer1.occupancy 3777687000 # Layer occupancy (ticks) 481system.cpu.toL2Bus.respLayer1.utilization 0.2 # Layer utilization (%) 482 483---------- End Simulation Statistics ---------- | 495system.cpu.toL2Bus.reqLayer0.occupancy 4745920500 # Layer occupancy (ticks) 496system.cpu.toL2Bus.reqLayer0.utilization 0.3 # Layer utilization (%) 497system.cpu.toL2Bus.respLayer0.occupancy 4221000 # Layer occupancy (ticks) 498system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 499system.cpu.toL2Bus.respLayer1.occupancy 3777687000 # Layer occupancy (ticks) 500system.cpu.toL2Bus.respLayer1.utilization 0.2 # Layer utilization (%) 501 502---------- End Simulation Statistics ---------- |