| stats.txt (10036:80e84beef3bb) | stats.txt (10063:9595c7a1d837) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.647873 # Number of seconds simulated 4sim_ticks 1647872849000 # Number of ticks simulated 5final_tick 1647872849000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 782951 # Simulator instruction rate (inst/s) 8host_op_rate 1447764 # Simulator op (including micro ops) rate (op/s) --- 67 unchanged lines hidden (view full) --- 76system.cpu.num_cc_register_writes 376685745 # number of times the CC registers were written 77system.cpu.num_mem_refs 533262343 # number of memory refs 78system.cpu.num_load_insts 384102157 # Number of load instructions 79system.cpu.num_store_insts 149160186 # Number of store instructions 80system.cpu.num_idle_cycles 0 # Number of idle cycles 81system.cpu.num_busy_cycles 3295745698 # Number of busy cycles 82system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 83system.cpu.idle_fraction 0 # Percentage of idle cycles | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.647873 # Number of seconds simulated 4sim_ticks 1647872849000 # Number of ticks simulated 5final_tick 1647872849000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 782951 # Simulator instruction rate (inst/s) 8host_op_rate 1447764 # Simulator op (including micro ops) rate (op/s) --- 67 unchanged lines hidden (view full) --- 76system.cpu.num_cc_register_writes 376685745 # number of times the CC registers were written 77system.cpu.num_mem_refs 533262343 # number of memory refs 78system.cpu.num_load_insts 384102157 # Number of load instructions 79system.cpu.num_store_insts 149160186 # Number of store instructions 80system.cpu.num_idle_cycles 0 # Number of idle cycles 81system.cpu.num_busy_cycles 3295745698 # Number of busy cycles 82system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 83system.cpu.idle_fraction 0 # Percentage of idle cycles |
| 84system.cpu.Branches 149758583 # Number of branches fetched |
|
| 84system.cpu.icache.tags.replacements 1253 # number of replacements 85system.cpu.icache.tags.tagsinuse 881.356491 # Cycle average of tags in use 86system.cpu.icache.tags.total_refs 1068344252 # Total number of references to valid blocks. 87system.cpu.icache.tags.sampled_refs 2814 # Sample count of references to valid blocks. 88system.cpu.icache.tags.avg_refs 379653.252310 # Average number of references to valid blocks. 89system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 90system.cpu.icache.tags.occ_blocks::cpu.inst 881.356491 # Average occupied blocks per requestor 91system.cpu.icache.tags.occ_percent::cpu.inst 0.430350 # Average percentage of cache occupancy --- 356 unchanged lines hidden --- | 85system.cpu.icache.tags.replacements 1253 # number of replacements 86system.cpu.icache.tags.tagsinuse 881.356491 # Cycle average of tags in use 87system.cpu.icache.tags.total_refs 1068344252 # Total number of references to valid blocks. 88system.cpu.icache.tags.sampled_refs 2814 # Sample count of references to valid blocks. 89system.cpu.icache.tags.avg_refs 379653.252310 # Average number of references to valid blocks. 90system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 91system.cpu.icache.tags.occ_blocks::cpu.inst 881.356491 # Average occupied blocks per requestor 92system.cpu.icache.tags.occ_percent::cpu.inst 0.430350 # Average percentage of cache occupancy --- 356 unchanged lines hidden --- |