| config.ini (9079:9a244ebdc3c9) | config.ini (9096:8971a998190a) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 155 unchanged lines hidden (view full) --- 164mem_side=system.membus.slave[1] 165 166[system.cpu.toL2Bus] 167type=CoherentBus 168block_size=64 169clock=1000 170header_cycles=1 171use_default_range=false | 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 155 unchanged lines hidden (view full) --- 164mem_side=system.membus.slave[1] 165 166[system.cpu.toL2Bus] 167type=CoherentBus 168block_size=64 169clock=1000 170header_cycles=1 171use_default_range=false |
| 172width=64 | 172width=8 |
| 173master=system.cpu.l2cache.cpu_side 174slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 175 176[system.cpu.tracer] 177type=ExeTracer 178 179[system.cpu.workload] 180type=LiveProcess --- 15 unchanged lines hidden (view full) --- 196uid=100 197 198[system.membus] 199type=CoherentBus 200block_size=64 201clock=1000 202header_cycles=1 203use_default_range=false | 173master=system.cpu.l2cache.cpu_side 174slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 175 176[system.cpu.tracer] 177type=ExeTracer 178 179[system.cpu.workload] 180type=LiveProcess --- 15 unchanged lines hidden (view full) --- 196uid=100 197 198[system.membus] 199type=CoherentBus 200block_size=64 201clock=1000 202header_cycles=1 203use_default_range=false |
| 204width=64 | 204width=8 |
| 205master=system.physmem.port[0] system.cpu.interrupts.pio system.cpu.interrupts.int_slave 206slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master 207 208[system.physmem] 209type=SimpleMemory 210conf_table_reported=false 211file= 212in_addr_map=true 213latency=30000 214latency_var=0 215null=false 216range=0:134217727 217zero=false 218port=system.membus.master[0] 219 | 205master=system.physmem.port[0] system.cpu.interrupts.pio system.cpu.interrupts.int_slave 206slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master 207 208[system.physmem] 209type=SimpleMemory 210conf_table_reported=false 211file= 212in_addr_map=true 213latency=30000 214latency_var=0 215null=false 216range=0:134217727 217zero=false 218port=system.membus.master[0] 219 |