19d18
< physmem=system.physmem
29c28
< system_port=system.membus.port[0]
---
> system_port=system.membus.slave[0]
41a41
> fastmem=false
60,61c60,61
< dcache_port=system.membus.port[3]
< icache_port=system.membus.port[2]
---
> dcache_port=system.membus.slave[2]
> icache_port=system.membus.slave[1]
72c72
< port=system.membus.port[5]
---
> port=system.membus.slave[4]
80,81c80,82
< int_port=system.membus.port[7]
< pio=system.membus.port[6]
---
> int_master=system.membus.slave[5]
> int_slave=system.membus.master[2]
> pio=system.membus.master[1]
92c93
< port=system.membus.port[4]
---
> port=system.membus.slave[3]
100c101
< cwd=build/X86/tests/fast/long/se/20.parser/x86/linux/simple-atomic
---
> cwd=build/X86/tests/opt/long/se/20.parser/x86/linux/simple-atomic
124c125,126
< port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.interrupts.pio system.cpu.interrupts.int_port
---
> master=system.physmem.port[0] system.cpu.interrupts.pio system.cpu.interrupts.int_slave
> slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.interrupts.int_master
127c129,130
< type=PhysicalMemory
---
> type=SimpleMemory
> conf_table_reported=false
128a132
> in_addr_map=true
134c138
< port=system.membus.port[1]
---
> port=system.membus.master[0]