stats.txt (9481:b0fa6b872f40) | stats.txt (9729:e2fafd224f43) |
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1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.717366 # Number of seconds simulated 4sim_ticks 717366012000 # Number of ticks simulated 5final_tick 717366012000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.717366 # Number of seconds simulated 4sim_ticks 717366012000 # Number of ticks simulated 5final_tick 717366012000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
7host_inst_rate 858996 # Simulator instruction rate (inst/s) 8host_op_rate 967944 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 1220258898 # Simulator tick rate (ticks/s) 10host_mem_usage 290524 # Number of bytes of host memory used 11host_seconds 587.88 # Real time elapsed on the host | 7host_inst_rate 611042 # Simulator instruction rate (inst/s) 8host_op_rate 688541 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 868024183 # Simulator tick rate (ticks/s) 10host_mem_usage 246240 # Number of bytes of host memory used 11host_seconds 826.44 # Real time elapsed on the host |
12sim_insts 504986853 # Number of instructions simulated 13sim_ops 569034839 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 177280 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 8952256 # Number of bytes read from this memory 16system.physmem.bytes_read::total 9129536 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 177280 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 177280 # Number of instructions bytes read from this memory 19system.physmem.bytes_written::writebacks 6140992 # Number of bytes written to this memory --- 9 unchanged lines hidden (view full) --- 29system.physmem.bw_inst_read::cpu.inst 247126 # Instruction read bandwidth from this memory (bytes/s) 30system.physmem.bw_inst_read::total 247126 # Instruction read bandwidth from this memory (bytes/s) 31system.physmem.bw_write::writebacks 8560472 # Write bandwidth from this memory (bytes/s) 32system.physmem.bw_write::total 8560472 # Write bandwidth from this memory (bytes/s) 33system.physmem.bw_total::writebacks 8560472 # Total bandwidth to/from this memory (bytes/s) 34system.physmem.bw_total::cpu.inst 247126 # Total bandwidth to/from this memory (bytes/s) 35system.physmem.bw_total::cpu.data 12479342 # Total bandwidth to/from this memory (bytes/s) 36system.physmem.bw_total::total 21286941 # Total bandwidth to/from this memory (bytes/s) | 12sim_insts 504986853 # Number of instructions simulated 13sim_ops 569034839 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 177280 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 8952256 # Number of bytes read from this memory 16system.physmem.bytes_read::total 9129536 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 177280 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 177280 # Number of instructions bytes read from this memory 19system.physmem.bytes_written::writebacks 6140992 # Number of bytes written to this memory --- 9 unchanged lines hidden (view full) --- 29system.physmem.bw_inst_read::cpu.inst 247126 # Instruction read bandwidth from this memory (bytes/s) 30system.physmem.bw_inst_read::total 247126 # Instruction read bandwidth from this memory (bytes/s) 31system.physmem.bw_write::writebacks 8560472 # Write bandwidth from this memory (bytes/s) 32system.physmem.bw_write::total 8560472 # Write bandwidth from this memory (bytes/s) 33system.physmem.bw_total::writebacks 8560472 # Total bandwidth to/from this memory (bytes/s) 34system.physmem.bw_total::cpu.inst 247126 # Total bandwidth to/from this memory (bytes/s) 35system.physmem.bw_total::cpu.data 12479342 # Total bandwidth to/from this memory (bytes/s) 36system.physmem.bw_total::total 21286941 # Total bandwidth to/from this memory (bytes/s) |
37system.membus.throughput 21286941 # Throughput (bytes/s) 38system.membus.trans_dist::ReadReq 41855 # Transaction distribution 39system.membus.trans_dist::ReadResp 41855 # Transaction distribution 40system.membus.trans_dist::Writeback 95953 # Transaction distribution 41system.membus.trans_dist::ReadExReq 100794 # Transaction distribution 42system.membus.trans_dist::ReadExResp 100794 # Transaction distribution 43system.membus.pkt_count_system.cpu.l2cache.mem_side 381251 # Packet count per connected master and slave (bytes) 44system.membus.pkt_count 381251 # Packet count per connected master and slave (bytes) 45system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 15270528 # Cumulative packet size per connected master and slave (bytes) 46system.membus.tot_pkt_size 15270528 # Cumulative packet size per connected master and slave (bytes) 47system.membus.data_through_bus 15270528 # Total data (bytes) 48system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 49system.membus.reqLayer0.occupancy 1006226000 # Layer occupancy (ticks) 50system.membus.reqLayer0.utilization 0.1 # Layer utilization (%) 51system.membus.respLayer1.occupancy 1283841000 # Layer occupancy (ticks) 52system.membus.respLayer1.utilization 0.2 # Layer utilization (%) |
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37system.cpu.dtb.inst_hits 0 # ITB inst hits 38system.cpu.dtb.inst_misses 0 # ITB inst misses 39system.cpu.dtb.read_hits 0 # DTB read hits 40system.cpu.dtb.read_misses 0 # DTB read misses 41system.cpu.dtb.write_hits 0 # DTB write hits 42system.cpu.dtb.write_misses 0 # DTB write misses 43system.cpu.dtb.flush_tlb 0 # Number of times complete TLB was flushed 44system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA --- 373 unchanged lines hidden (view full) --- 418system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 13099.102034 # average ReadReq mshr miss latency 419system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 22882.793465 # average WriteReq mshr miss latency 420system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 22882.793465 # average WriteReq mshr miss latency 421system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 16159.496118 # average overall mshr miss latency 422system.cpu.dcache.demand_avg_mshr_miss_latency::total 16159.496118 # average overall mshr miss latency 423system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 16159.496118 # average overall mshr miss latency 424system.cpu.dcache.overall_avg_mshr_miss_latency::total 16159.496118 # average overall mshr miss latency 425system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate | 53system.cpu.dtb.inst_hits 0 # ITB inst hits 54system.cpu.dtb.inst_misses 0 # ITB inst misses 55system.cpu.dtb.read_hits 0 # DTB read hits 56system.cpu.dtb.read_misses 0 # DTB read misses 57system.cpu.dtb.write_hits 0 # DTB write hits 58system.cpu.dtb.write_misses 0 # DTB write misses 59system.cpu.dtb.flush_tlb 0 # Number of times complete TLB was flushed 60system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA --- 373 unchanged lines hidden (view full) --- 434system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 13099.102034 # average ReadReq mshr miss latency 435system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 22882.793465 # average WriteReq mshr miss latency 436system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 22882.793465 # average WriteReq mshr miss latency 437system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 16159.496118 # average overall mshr miss latency 438system.cpu.dcache.demand_avg_mshr_miss_latency::total 16159.496118 # average overall mshr miss latency 439system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 16159.496118 # average overall mshr miss latency 440system.cpu.dcache.overall_avg_mshr_miss_latency::total 16159.496118 # average overall mshr miss latency 441system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate |
442system.cpu.toL2Bus.throughput 197642506 # Throughput (bytes/s) 443system.cpu.toL2Bus.trans_dist::ReadReq 794179 # Transaction distribution 444system.cpu.toL2Bus.trans_dist::ReadResp 794179 # Transaction distribution 445system.cpu.toL2Bus.trans_dist::Writeback 1064905 # Transaction distribution 446system.cpu.toL2Bus.trans_dist::ReadExReq 356260 # Transaction distribution 447system.cpu.toL2Bus.trans_dist::ReadExResp 356260 # Transaction distribution 448system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 23042 # Packet count per connected master and slave (bytes) 449system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 3342741 # Packet count per connected master and slave (bytes) 450system.cpu.toL2Bus.pkt_count 3365783 # Packet count per connected master and slave (bytes) 451system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 737344 # Cumulative packet size per connected master and slave (bytes) 452system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 141044672 # Cumulative packet size per connected master and slave (bytes) 453system.cpu.toL2Bus.tot_pkt_size 141782016 # Cumulative packet size per connected master and slave (bytes) 454system.cpu.toL2Bus.data_through_bus 141782016 # Total data (bytes) 455system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) 456system.cpu.toL2Bus.reqLayer0.occupancy 2172577000 # Layer occupancy (ticks) 457system.cpu.toL2Bus.reqLayer0.utilization 0.3 # Layer utilization (%) 458system.cpu.toL2Bus.respLayer0.occupancy 17281500 # Layer occupancy (ticks) 459system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 460system.cpu.toL2Bus.respLayer1.occupancy 1708377000 # Layer occupancy (ticks) 461system.cpu.toL2Bus.respLayer1.utilization 0.2 # Layer utilization (%) |
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426 427---------- End Simulation Statistics ---------- | 462 463---------- End Simulation Statistics ---------- |