| stats.txt (11687:b3d5f0e9e258) | stats.txt (11955:1170d039b31e) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.708700 # Number of seconds simulated 4sim_ticks 708700329500 # Number of ticks simulated 5final_tick 708700329500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 1580290 # Simulator instruction rate (inst/s) 8host_op_rate 1711383 # Simulator op (including micro ops) rate (op/s) --- 145 unchanged lines hidden (view full) --- 154system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions 155system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions 156system.cpu.itb.read_accesses 0 # DTB read accesses 157system.cpu.itb.write_accesses 0 # DTB write accesses 158system.cpu.itb.inst_accesses 0 # ITB inst accesses 159system.cpu.itb.hits 0 # DTB hits 160system.cpu.itb.misses 0 # DTB misses 161system.cpu.itb.accesses 0 # DTB accesses | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.708700 # Number of seconds simulated 4sim_ticks 708700329500 # Number of ticks simulated 5final_tick 708700329500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 1580290 # Simulator instruction rate (inst/s) 8host_op_rate 1711383 # Simulator op (including micro ops) rate (op/s) --- 145 unchanged lines hidden (view full) --- 154system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions 155system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions 156system.cpu.itb.read_accesses 0 # DTB read accesses 157system.cpu.itb.write_accesses 0 # DTB write accesses 158system.cpu.itb.inst_accesses 0 # ITB inst accesses 159system.cpu.itb.hits 0 # DTB hits 160system.cpu.itb.misses 0 # DTB misses 161system.cpu.itb.accesses 0 # DTB accesses |
| 162system.cpu.workload.num_syscalls 548 # Number of system calls | 162system.cpu.workload.numSyscalls 548 # Number of system calls |
| 163system.cpu.pwrStateResidencyTicks::ON 708700329500 # Cumulative time (in ticks) in various power states 164system.cpu.numCycles 1417400659 # number of cpu cycles simulated 165system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 166system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 167system.cpu.committedInsts 504984064 # Number of instructions committed 168system.cpu.committedOps 546875315 # Number of ops (including micro ops) committed 169system.cpu.num_int_alu_accesses 448447005 # Number of integer alu accesses 170system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses --- 515 unchanged lines hidden --- | 163system.cpu.pwrStateResidencyTicks::ON 708700329500 # Cumulative time (in ticks) in various power states 164system.cpu.numCycles 1417400659 # number of cpu cycles simulated 165system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 166system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 167system.cpu.committedInsts 504984064 # Number of instructions committed 168system.cpu.committedOps 546875315 # Number of ops (including micro ops) committed 169system.cpu.num_int_alu_accesses 448447005 # Number of integer alu accesses 170system.cpu.num_fp_alu_accesses 16 # Number of float alu accesses --- 515 unchanged lines hidden --- |