| stats.txt (9797:9cd5f91e7a79) | stats.txt (9838:43d22d746e7a) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.202350 # Number of seconds simulated 4sim_ticks 202349747500 # Number of ticks simulated 5final_tick 202349747500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.202350 # Number of seconds simulated 4sim_ticks 202349747500 # Number of ticks simulated 5final_tick 202349747500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 166059 # Simulator instruction rate (inst/s) 8host_op_rate 187221 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 66507382 # Simulator tick rate (ticks/s) 10host_mem_usage 250660 # Number of bytes of host memory used 11host_seconds 3042.52 # Real time elapsed on the host | 7host_inst_rate 95439 # Simulator instruction rate (inst/s) 8host_op_rate 107602 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 38223736 # Simulator tick rate (ticks/s) 10host_mem_usage 246676 # Number of bytes of host memory used 11host_seconds 5293.82 # Real time elapsed on the host |
| 12sim_insts 505237723 # Number of instructions simulated 13sim_ops 569624283 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 216896 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 9268224 # Number of bytes read from this memory 16system.physmem.bytes_read::total 9485120 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 216896 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 216896 # Number of instructions bytes read from this memory 19system.physmem.bytes_written::writebacks 6250688 # Number of bytes written to this memory --- 9 unchanged lines hidden (view full) --- 29system.physmem.bw_inst_read::cpu.inst 1071887 # Instruction read bandwidth from this memory (bytes/s) 30system.physmem.bw_inst_read::total 1071887 # Instruction read bandwidth from this memory (bytes/s) 31system.physmem.bw_write::writebacks 30890515 # Write bandwidth from this memory (bytes/s) 32system.physmem.bw_write::total 30890515 # Write bandwidth from this memory (bytes/s) 33system.physmem.bw_total::writebacks 30890515 # Total bandwidth to/from this memory (bytes/s) 34system.physmem.bw_total::cpu.inst 1071887 # Total bandwidth to/from this memory (bytes/s) 35system.physmem.bw_total::cpu.data 45802993 # Total bandwidth to/from this memory (bytes/s) 36system.physmem.bw_total::total 77765395 # Total bandwidth to/from this memory (bytes/s) | 12sim_insts 505237723 # Number of instructions simulated 13sim_ops 569624283 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 216896 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 9268224 # Number of bytes read from this memory 16system.physmem.bytes_read::total 9485120 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 216896 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 216896 # Number of instructions bytes read from this memory 19system.physmem.bytes_written::writebacks 6250688 # Number of bytes written to this memory --- 9 unchanged lines hidden (view full) --- 29system.physmem.bw_inst_read::cpu.inst 1071887 # Instruction read bandwidth from this memory (bytes/s) 30system.physmem.bw_inst_read::total 1071887 # Instruction read bandwidth from this memory (bytes/s) 31system.physmem.bw_write::writebacks 30890515 # Write bandwidth from this memory (bytes/s) 32system.physmem.bw_write::total 30890515 # Write bandwidth from this memory (bytes/s) 33system.physmem.bw_total::writebacks 30890515 # Total bandwidth to/from this memory (bytes/s) 34system.physmem.bw_total::cpu.inst 1071887 # Total bandwidth to/from this memory (bytes/s) 35system.physmem.bw_total::cpu.data 45802993 # Total bandwidth to/from this memory (bytes/s) 36system.physmem.bw_total::total 77765395 # Total bandwidth to/from this memory (bytes/s) |
| 37system.physmem.readReqs 148206 # Total number of read requests seen 38system.physmem.writeReqs 97667 # Total number of write requests seen 39system.physmem.cpureqs 245886 # Reqs generatd by CPU via cache - shady | 37system.physmem.readReqs 148206 # Total number of read requests accepted by DRAM controller 38system.physmem.writeReqs 97667 # Total number of write requests accepted by DRAM controller 39system.physmem.readBursts 148206 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts 40system.physmem.writeBursts 97667 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts |
| 40system.physmem.bytesRead 9485120 # Total number of bytes read from memory 41system.physmem.bytesWritten 6250688 # Total number of bytes written to memory 42system.physmem.bytesConsumedRd 9485120 # bytesRead derated as per pkt->getSize() 43system.physmem.bytesConsumedWr 6250688 # bytesWritten derated as per pkt->getSize() | 41system.physmem.bytesRead 9485120 # Total number of bytes read from memory 42system.physmem.bytesWritten 6250688 # Total number of bytes written to memory 43system.physmem.bytesConsumedRd 9485120 # bytesRead derated as per pkt->getSize() 44system.physmem.bytesConsumedWr 6250688 # bytesWritten derated as per pkt->getSize() |
| 44system.physmem.servicedByWrQ 73 # Number of read reqs serviced by write Q | 45system.physmem.servicedByWrQ 73 # Number of DRAM read bursts serviced by write Q |
| 45system.physmem.neitherReadNorWrite 7 # Reqs where no action is needed 46system.physmem.perBankRdReqs::0 9580 # Track reads on a per bank basis 47system.physmem.perBankRdReqs::1 9220 # Track reads on a per bank basis 48system.physmem.perBankRdReqs::2 9246 # Track reads on a per bank basis 49system.physmem.perBankRdReqs::3 8983 # Track reads on a per bank basis 50system.physmem.perBankRdReqs::4 9807 # Track reads on a per bank basis 51system.physmem.perBankRdReqs::5 9644 # Track reads on a per bank basis 52system.physmem.perBankRdReqs::6 9117 # Track reads on a per bank basis --- 239 unchanged lines hidden (view full) --- 292system.membus.throughput 77765395 # Throughput (bytes/s) 293system.membus.trans_dist::ReadReq 46900 # Transaction distribution 294system.membus.trans_dist::ReadResp 46899 # Transaction distribution 295system.membus.trans_dist::Writeback 97667 # Transaction distribution 296system.membus.trans_dist::UpgradeReq 7 # Transaction distribution 297system.membus.trans_dist::UpgradeResp 7 # Transaction distribution 298system.membus.trans_dist::ReadExReq 101306 # Transaction distribution 299system.membus.trans_dist::ReadExResp 101306 # Transaction distribution | 46system.physmem.neitherReadNorWrite 7 # Reqs where no action is needed 47system.physmem.perBankRdReqs::0 9580 # Track reads on a per bank basis 48system.physmem.perBankRdReqs::1 9220 # Track reads on a per bank basis 49system.physmem.perBankRdReqs::2 9246 # Track reads on a per bank basis 50system.physmem.perBankRdReqs::3 8983 # Track reads on a per bank basis 51system.physmem.perBankRdReqs::4 9807 # Track reads on a per bank basis 52system.physmem.perBankRdReqs::5 9644 # Track reads on a per bank basis 53system.physmem.perBankRdReqs::6 9117 # Track reads on a per bank basis --- 239 unchanged lines hidden (view full) --- 293system.membus.throughput 77765395 # Throughput (bytes/s) 294system.membus.trans_dist::ReadReq 46900 # Transaction distribution 295system.membus.trans_dist::ReadResp 46899 # Transaction distribution 296system.membus.trans_dist::Writeback 97667 # Transaction distribution 297system.membus.trans_dist::UpgradeReq 7 # Transaction distribution 298system.membus.trans_dist::UpgradeResp 7 # Transaction distribution 299system.membus.trans_dist::ReadExReq 101306 # Transaction distribution 300system.membus.trans_dist::ReadExResp 101306 # Transaction distribution |
| 300system.membus.pkt_count_system.cpu.l2cache.mem_side 394092 # Packet count per connected master and slave (bytes) 301system.membus.pkt_count 394092 # Packet count per connected master and slave (bytes) 302system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 15735808 # Cumulative packet size per connected master and slave (bytes) 303system.membus.tot_pkt_size 15735808 # Cumulative packet size per connected master and slave (bytes) | 301system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 394092 # Packet count per connected master and slave (bytes) 302system.membus.pkt_count::total 394092 # Packet count per connected master and slave (bytes) 303system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 15735808 # Cumulative packet size per connected master and slave (bytes) 304system.membus.tot_pkt_size::total 15735808 # Cumulative packet size per connected master and slave (bytes) |
| 304system.membus.data_through_bus 15735808 # Total data (bytes) 305system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 306system.membus.reqLayer0.occupancy 1084180500 # Layer occupancy (ticks) 307system.membus.reqLayer0.utilization 0.5 # Layer utilization (%) 308system.membus.respLayer1.occupancy 1402154244 # Layer occupancy (ticks) 309system.membus.respLayer1.utilization 0.7 # Layer utilization (%) 310system.cpu.branchPred.lookups 182791904 # Number of BP lookups 311system.cpu.branchPred.condPredicted 143107699 # Number of conditional branches predicted --- 311 unchanged lines hidden (view full) --- 623system.cpu.toL2Bus.throughput 735301298 # Throughput (bytes/s) 624system.cpu.toL2Bus.trans_dist::ReadReq 864913 # Transaction distribution 625system.cpu.toL2Bus.trans_dist::ReadResp 864912 # Transaction distribution 626system.cpu.toL2Bus.trans_dist::Writeback 1111058 # Transaction distribution 627system.cpu.toL2Bus.trans_dist::UpgradeReq 69 # Transaction distribution 628system.cpu.toL2Bus.trans_dist::UpgradeResp 69 # Transaction distribution 629system.cpu.toL2Bus.trans_dist::ReadExReq 348843 # Transaction distribution 630system.cpu.toL2Bus.trans_dist::ReadExResp 348843 # Transaction distribution | 305system.membus.data_through_bus 15735808 # Total data (bytes) 306system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 307system.membus.reqLayer0.occupancy 1084180500 # Layer occupancy (ticks) 308system.membus.reqLayer0.utilization 0.5 # Layer utilization (%) 309system.membus.respLayer1.occupancy 1402154244 # Layer occupancy (ticks) 310system.membus.respLayer1.utilization 0.7 # Layer utilization (%) 311system.cpu.branchPred.lookups 182791904 # Number of BP lookups 312system.cpu.branchPred.condPredicted 143107699 # Number of conditional branches predicted --- 311 unchanged lines hidden (view full) --- 624system.cpu.toL2Bus.throughput 735301298 # Throughput (bytes/s) 625system.cpu.toL2Bus.trans_dist::ReadReq 864913 # Transaction distribution 626system.cpu.toL2Bus.trans_dist::ReadResp 864912 # Transaction distribution 627system.cpu.toL2Bus.trans_dist::Writeback 1111058 # Transaction distribution 628system.cpu.toL2Bus.trans_dist::UpgradeReq 69 # Transaction distribution 629system.cpu.toL2Bus.trans_dist::UpgradeResp 69 # Transaction distribution 630system.cpu.toL2Bus.trans_dist::ReadExReq 348843 # Transaction distribution 631system.cpu.toL2Bus.trans_dist::ReadExResp 348843 # Transaction distribution |
| 631system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 33804 # Packet count per connected master and slave (bytes) 632system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 3504826 # Packet count per connected master and slave (bytes) 633system.cpu.toL2Bus.pkt_count 3538630 # Packet count per connected master and slave (bytes) 634system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 1079232 # Cumulative packet size per connected master and slave (bytes) 635system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 147703872 # Cumulative packet size per connected master and slave (bytes) 636system.cpu.toL2Bus.tot_pkt_size 148783104 # Cumulative packet size per connected master and slave (bytes) | 632system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 33804 # Packet count per connected master and slave (bytes) 633system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 3504826 # Packet count per connected master and slave (bytes) 634system.cpu.toL2Bus.pkt_count::total 3538630 # Packet count per connected master and slave (bytes) 635system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1079232 # Cumulative packet size per connected master and slave (bytes) 636system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 147703872 # Cumulative packet size per connected master and slave (bytes) 637system.cpu.toL2Bus.tot_pkt_size::total 148783104 # Cumulative packet size per connected master and slave (bytes) |
| 637system.cpu.toL2Bus.data_through_bus 148783104 # Total data (bytes) 638system.cpu.toL2Bus.snoop_data_through_bus 4928 # Total snoop data (bytes) 639system.cpu.toL2Bus.reqLayer0.occupancy 2273504243 # Layer occupancy (ticks) 640system.cpu.toL2Bus.reqLayer0.utilization 1.1 # Layer utilization (%) 641system.cpu.toL2Bus.respLayer0.occupancy 26125731 # Layer occupancy (ticks) 642system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 643system.cpu.toL2Bus.respLayer1.occupancy 1828577727 # Layer occupancy (ticks) 644system.cpu.toL2Bus.respLayer1.utilization 0.9 # Layer utilization (%) | 638system.cpu.toL2Bus.data_through_bus 148783104 # Total data (bytes) 639system.cpu.toL2Bus.snoop_data_through_bus 4928 # Total snoop data (bytes) 640system.cpu.toL2Bus.reqLayer0.occupancy 2273504243 # Layer occupancy (ticks) 641system.cpu.toL2Bus.reqLayer0.utilization 1.1 # Layer utilization (%) 642system.cpu.toL2Bus.respLayer0.occupancy 26125731 # Layer occupancy (ticks) 643system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) 644system.cpu.toL2Bus.respLayer1.occupancy 1828577727 # Layer occupancy (ticks) 645system.cpu.toL2Bus.respLayer1.utilization 0.9 # Layer utilization (%) |
| 645system.cpu.icache.tags.replacements 15008 # number of replacements 646system.cpu.icache.tags.tagsinuse 1099.436561 # Cycle average of tags in use 647system.cpu.icache.tags.total_refs 114505770 # Total number of references to valid blocks. 648system.cpu.icache.tags.sampled_refs 16868 # Sample count of references to valid blocks. 649system.cpu.icache.tags.avg_refs 6788.343016 # Average number of references to valid blocks. 650system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 651system.cpu.icache.tags.occ_blocks::cpu.inst 1099.436561 # Average occupied blocks per requestor 652system.cpu.icache.tags.occ_percent::cpu.inst 0.536834 # Average percentage of cache occupancy 653system.cpu.icache.tags.occ_percent::total 0.536834 # Average percentage of cache occupancy | 646system.cpu.icache.tags.replacements 15008 # number of replacements 647system.cpu.icache.tags.tagsinuse 1099.436561 # Cycle average of tags in use 648system.cpu.icache.tags.total_refs 114505770 # Total number of references to valid blocks. 649system.cpu.icache.tags.sampled_refs 16868 # Sample count of references to valid blocks. 650system.cpu.icache.tags.avg_refs 6788.343016 # Average number of references to valid blocks. 651system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 652system.cpu.icache.tags.occ_blocks::cpu.inst 1099.436561 # Average occupied blocks per requestor 653system.cpu.icache.tags.occ_percent::cpu.inst 0.536834 # Average percentage of cache occupancy 654system.cpu.icache.tags.occ_percent::total 0.536834 # Average percentage of cache occupancy |
| 654system.cpu.icache.ReadReq_hits::cpu.inst 114505770 # number of ReadReq hits 655system.cpu.icache.ReadReq_hits::total 114505770 # number of ReadReq hits 656system.cpu.icache.demand_hits::cpu.inst 114505770 # number of demand (read+write) hits 657system.cpu.icache.demand_hits::total 114505770 # number of demand (read+write) hits 658system.cpu.icache.overall_hits::cpu.inst 114505770 # number of overall hits 659system.cpu.icache.overall_hits::total 114505770 # number of overall hits 660system.cpu.icache.ReadReq_misses::cpu.inst 21115 # number of ReadReq misses 661system.cpu.icache.ReadReq_misses::total 21115 # number of ReadReq misses --- 59 unchanged lines hidden (view full) --- 721system.cpu.icache.overall_mshr_miss_rate::total 0.000148 # mshr miss rate for overall accesses 722system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 25103.227023 # average ReadReq mshr miss latency 723system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 25103.227023 # average ReadReq mshr miss latency 724system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 25103.227023 # average overall mshr miss latency 725system.cpu.icache.demand_avg_mshr_miss_latency::total 25103.227023 # average overall mshr miss latency 726system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 25103.227023 # average overall mshr miss latency 727system.cpu.icache.overall_avg_mshr_miss_latency::total 25103.227023 # average overall mshr miss latency 728system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate | 655system.cpu.icache.ReadReq_hits::cpu.inst 114505770 # number of ReadReq hits 656system.cpu.icache.ReadReq_hits::total 114505770 # number of ReadReq hits 657system.cpu.icache.demand_hits::cpu.inst 114505770 # number of demand (read+write) hits 658system.cpu.icache.demand_hits::total 114505770 # number of demand (read+write) hits 659system.cpu.icache.overall_hits::cpu.inst 114505770 # number of overall hits 660system.cpu.icache.overall_hits::total 114505770 # number of overall hits 661system.cpu.icache.ReadReq_misses::cpu.inst 21115 # number of ReadReq misses 662system.cpu.icache.ReadReq_misses::total 21115 # number of ReadReq misses --- 59 unchanged lines hidden (view full) --- 722system.cpu.icache.overall_mshr_miss_rate::total 0.000148 # mshr miss rate for overall accesses 723system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 25103.227023 # average ReadReq mshr miss latency 724system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 25103.227023 # average ReadReq mshr miss latency 725system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 25103.227023 # average overall mshr miss latency 726system.cpu.icache.demand_avg_mshr_miss_latency::total 25103.227023 # average overall mshr miss latency 727system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 25103.227023 # average overall mshr miss latency 728system.cpu.icache.overall_avg_mshr_miss_latency::total 25103.227023 # average overall mshr miss latency 729system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 729system.cpu.l2cache.tags.replacements 115462 # number of replacements 730system.cpu.l2cache.tags.tagsinuse 27105.054655 # Cycle average of tags in use 731system.cpu.l2cache.tags.total_refs 1782175 # Total number of references to valid blocks. 732system.cpu.l2cache.tags.sampled_refs 146717 # Sample count of references to valid blocks. 733system.cpu.l2cache.tags.avg_refs 12.147025 # Average number of references to valid blocks. 734system.cpu.l2cache.tags.warmup_cycle 102215583000 # Cycle when the warmup percentage was hit. | 730system.cpu.l2cache.tags.replacements 115462 # number of replacements 731system.cpu.l2cache.tags.tagsinuse 27105.054655 # Cycle average of tags in use 732system.cpu.l2cache.tags.total_refs 1782175 # Total number of references to valid blocks. 733system.cpu.l2cache.tags.sampled_refs 146717 # Sample count of references to valid blocks. 734system.cpu.l2cache.tags.avg_refs 12.147025 # Average number of references to valid blocks. 735system.cpu.l2cache.tags.warmup_cycle 102215583000 # Cycle when the warmup percentage was hit. |
| 735system.cpu.l2cache.tags.occ_blocks::writebacks 23019.815136 # Average occupied blocks per requestor | 736system.cpu.l2cache.tags.occ_blocks::writebacks 23019.815136 # Average occupied blocks per requestor |
| 736system.cpu.l2cache.tags.occ_blocks::cpu.inst 365.213065 # Average occupied blocks per requestor 737system.cpu.l2cache.tags.occ_blocks::cpu.data 3720.026454 # Average occupied blocks per requestor | 737system.cpu.l2cache.tags.occ_blocks::cpu.inst 365.213065 # Average occupied blocks per requestor 738system.cpu.l2cache.tags.occ_blocks::cpu.data 3720.026454 # Average occupied blocks per requestor |
| 738system.cpu.l2cache.tags.occ_percent::writebacks 0.702509 # Average percentage of cache occupancy 739system.cpu.l2cache.tags.occ_percent::cpu.inst 0.011145 # Average percentage of cache occupancy 740system.cpu.l2cache.tags.occ_percent::cpu.data 0.113526 # Average percentage of cache occupancy | 739system.cpu.l2cache.tags.occ_percent::writebacks 0.702509 # Average percentage of cache occupancy 740system.cpu.l2cache.tags.occ_percent::cpu.inst 0.011145 # Average percentage of cache occupancy 741system.cpu.l2cache.tags.occ_percent::cpu.data 0.113526 # Average percentage of cache occupancy |
| 741system.cpu.l2cache.tags.occ_percent::total 0.827181 # Average percentage of cache occupancy | 742system.cpu.l2cache.tags.occ_percent::total 0.827181 # Average percentage of cache occupancy |
| 742system.cpu.l2cache.ReadReq_hits::cpu.inst 13469 # number of ReadReq hits 743system.cpu.l2cache.ReadReq_hits::cpu.data 804438 # number of ReadReq hits 744system.cpu.l2cache.ReadReq_hits::total 817907 # number of ReadReq hits 745system.cpu.l2cache.Writeback_hits::writebacks 1111058 # number of Writeback hits 746system.cpu.l2cache.Writeback_hits::total 1111058 # number of Writeback hits 747system.cpu.l2cache.UpgradeReq_hits::cpu.data 63 # number of UpgradeReq hits 748system.cpu.l2cache.UpgradeReq_hits::total 63 # number of UpgradeReq hits 749system.cpu.l2cache.ReadExReq_hits::cpu.data 247536 # number of ReadExReq hits --- 134 unchanged lines hidden (view full) --- 884system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 57195.245649 # average ReadExReq mshr miss latency 885system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 67880.014749 # average overall mshr miss latency 886system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 61549.679948 # average overall mshr miss latency 887system.cpu.l2cache.demand_avg_mshr_miss_latency::total 61694.476314 # average overall mshr miss latency 888system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 67880.014749 # average overall mshr miss latency 889system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 61549.679948 # average overall mshr miss latency 890system.cpu.l2cache.overall_avg_mshr_miss_latency::total 61694.476314 # average overall mshr miss latency 891system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate | 743system.cpu.l2cache.ReadReq_hits::cpu.inst 13469 # number of ReadReq hits 744system.cpu.l2cache.ReadReq_hits::cpu.data 804438 # number of ReadReq hits 745system.cpu.l2cache.ReadReq_hits::total 817907 # number of ReadReq hits 746system.cpu.l2cache.Writeback_hits::writebacks 1111058 # number of Writeback hits 747system.cpu.l2cache.Writeback_hits::total 1111058 # number of Writeback hits 748system.cpu.l2cache.UpgradeReq_hits::cpu.data 63 # number of UpgradeReq hits 749system.cpu.l2cache.UpgradeReq_hits::total 63 # number of UpgradeReq hits 750system.cpu.l2cache.ReadExReq_hits::cpu.data 247536 # number of ReadExReq hits --- 134 unchanged lines hidden (view full) --- 885system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 57195.245649 # average ReadExReq mshr miss latency 886system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 67880.014749 # average overall mshr miss latency 887system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 61549.679948 # average overall mshr miss latency 888system.cpu.l2cache.demand_avg_mshr_miss_latency::total 61694.476314 # average overall mshr miss latency 889system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 67880.014749 # average overall mshr miss latency 890system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 61549.679948 # average overall mshr miss latency 891system.cpu.l2cache.overall_avg_mshr_miss_latency::total 61694.476314 # average overall mshr miss latency 892system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 892system.cpu.dcache.tags.replacements 1192719 # number of replacements 893system.cpu.dcache.tags.tagsinuse 4057.784175 # Cycle average of tags in use 894system.cpu.dcache.tags.total_refs 190184088 # Total number of references to valid blocks. 895system.cpu.dcache.tags.sampled_refs 1196815 # Sample count of references to valid blocks. 896system.cpu.dcache.tags.avg_refs 158.908510 # Average number of references to valid blocks. 897system.cpu.dcache.tags.warmup_cycle 4223544250 # Cycle when the warmup percentage was hit. 898system.cpu.dcache.tags.occ_blocks::cpu.data 4057.784175 # Average occupied blocks per requestor 899system.cpu.dcache.tags.occ_percent::cpu.data 0.990670 # Average percentage of cache occupancy 900system.cpu.dcache.tags.occ_percent::total 0.990670 # Average percentage of cache occupancy | 893system.cpu.dcache.tags.replacements 1192719 # number of replacements 894system.cpu.dcache.tags.tagsinuse 4057.784175 # Cycle average of tags in use 895system.cpu.dcache.tags.total_refs 190184088 # Total number of references to valid blocks. 896system.cpu.dcache.tags.sampled_refs 1196815 # Sample count of references to valid blocks. 897system.cpu.dcache.tags.avg_refs 158.908510 # Average number of references to valid blocks. 898system.cpu.dcache.tags.warmup_cycle 4223544250 # Cycle when the warmup percentage was hit. 899system.cpu.dcache.tags.occ_blocks::cpu.data 4057.784175 # Average occupied blocks per requestor 900system.cpu.dcache.tags.occ_percent::cpu.data 0.990670 # Average percentage of cache occupancy 901system.cpu.dcache.tags.occ_percent::total 0.990670 # Average percentage of cache occupancy |
| 901system.cpu.dcache.ReadReq_hits::cpu.data 136217061 # number of ReadReq hits 902system.cpu.dcache.ReadReq_hits::total 136217061 # number of ReadReq hits 903system.cpu.dcache.WriteReq_hits::cpu.data 50989456 # number of WriteReq hits 904system.cpu.dcache.WriteReq_hits::total 50989456 # number of WriteReq hits 905system.cpu.dcache.LoadLockedReq_hits::cpu.data 1488807 # number of LoadLockedReq hits 906system.cpu.dcache.LoadLockedReq_hits::total 1488807 # number of LoadLockedReq hits 907system.cpu.dcache.StoreCondReq_hits::cpu.data 1488541 # number of StoreCondReq hits 908system.cpu.dcache.StoreCondReq_hits::total 1488541 # number of StoreCondReq hits --- 111 unchanged lines hidden --- | 902system.cpu.dcache.ReadReq_hits::cpu.data 136217061 # number of ReadReq hits 903system.cpu.dcache.ReadReq_hits::total 136217061 # number of ReadReq hits 904system.cpu.dcache.WriteReq_hits::cpu.data 50989456 # number of WriteReq hits 905system.cpu.dcache.WriteReq_hits::total 50989456 # number of WriteReq hits 906system.cpu.dcache.LoadLockedReq_hits::cpu.data 1488807 # number of LoadLockedReq hits 907system.cpu.dcache.LoadLockedReq_hits::total 1488807 # number of LoadLockedReq hits 908system.cpu.dcache.StoreCondReq_hits::cpu.data 1488541 # number of StoreCondReq hits 909system.cpu.dcache.StoreCondReq_hits::total 1488541 # number of StoreCondReq hits --- 111 unchanged lines hidden --- |