| config.ini (8983:8800b05e1cb3) | config.ini (9055:38f1926fb599) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 478 unchanged lines hidden (view full) --- 487tgts_per_mshr=5 488trace_addr=0 489two_queue=false 490write_buffers=8 491cpu_side=system.cpu.toL2Bus.master[0] 492mem_side=system.membus.slave[1] 493 494[system.cpu.toL2Bus] | 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 478 unchanged lines hidden (view full) --- 487tgts_per_mshr=5 488trace_addr=0 489two_queue=false 490write_buffers=8 491cpu_side=system.cpu.toL2Bus.master[0] 492mem_side=system.membus.slave[1] 493 494[system.cpu.toL2Bus] |
| 495type=Bus | 495type=CoherentBus |
| 496block_size=64 | 496block_size=64 |
| 497bus_id=0 | |
| 498clock=1000 499header_cycles=1 500use_default_range=false 501width=64 502master=system.cpu.l2cache.cpu_side 503slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 504 505[system.cpu.tracer] --- 14 unchanged lines hidden (view full) --- 520output=cout 521pid=100 522ppid=99 523simpoint=114600000000 524system=system 525uid=100 526 527[system.membus] | 497clock=1000 498header_cycles=1 499use_default_range=false 500width=64 501master=system.cpu.l2cache.cpu_side 502slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 503 504[system.cpu.tracer] --- 14 unchanged lines hidden (view full) --- 519output=cout 520pid=100 521ppid=99 522simpoint=114600000000 523system=system 524uid=100 525 526[system.membus] |
| 528type=Bus | 527type=CoherentBus |
| 529block_size=64 | 528block_size=64 |
| 530bus_id=0 | |
| 531clock=1000 532header_cycles=1 533use_default_range=false 534width=64 535master=system.physmem.port[0] 536slave=system.system_port system.cpu.l2cache.mem_side 537 538[system.physmem] 539type=SimpleMemory 540conf_table_reported=false 541file= 542in_addr_map=true 543latency=30000 544latency_var=0 545null=false 546range=0:134217727 547zero=false 548port=system.membus.master[0] 549 | 529clock=1000 530header_cycles=1 531use_default_range=false 532width=64 533master=system.physmem.port[0] 534slave=system.system_port system.cpu.l2cache.mem_side 535 536[system.physmem] 537type=SimpleMemory 538conf_table_reported=false 539file= 540in_addr_map=true 541latency=30000 542latency_var=0 543null=false 544range=0:134217727 545zero=false 546port=system.membus.master[0] 547 |