Cross Reference: /gem5/tests/long/se/20.parser/ref/arm/linux/minor-timing/config.ini

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config.ini (11103:38f6188421e0)	config.ini (11388:bd4125134e77)
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0	1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0
	18exit_on_work_items=false
18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem 26mmap_using_noreserve=false	19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges= 26memories=system.physmem 27mmap_using_noreserve=false
	28multi_thread=false
27num_work_ids=16 28readfile= 29symbolfile= 30work_begin_ckpt_count=0 31work_begin_cpu_id_exit=-1 32work_begin_exit_count=0 33work_cpus_ckpt_count=0 34work_end_ckpt_count=0 35work_end_exit_count=0 36work_item_id=-1 37system_port=system.membus.slave[0] 38 39[system.clk_domain] 40type=SrcClockDomain 41clock=1000 42domain_id=-1 43eventq_index=0 44init_perf_level=0 45voltage_domain=system.voltage_domain 46 47[system.cpu] 48type=MinorCPU 49children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 50branchPred=system.cpu.branchPred 51checker=Null 52clk_domain=system.cpu_clk_domain 53cpu_id=0 54decodeCycleInput=true 55decodeInputBufferSize=3 56decodeInputWidth=2 57decodeToExecuteForwardDelay=1 58do_checkpoint_insts=true 59do_quiesce=true 60do_statistics_insts=true 61dstage2_mmu=system.cpu.dstage2_mmu 62dtb=system.cpu.dtb 63enableIdling=true 64eventq_index=0 65executeAllowEarlyMemoryIssue=true 66executeBranchDelay=1 67executeCommitLimit=2 68executeCycleInput=true 69executeFuncUnits=system.cpu.executeFuncUnits 70executeInputBufferSize=7 71executeInputWidth=2 72executeIssueLimit=2 73executeLSQMaxStoreBufferStoresPerCycle=2 74executeLSQRequestsQueueSize=1 75executeLSQStoreBufferSize=5 76executeLSQTransfersQueueSize=2 77executeMaxAccessesInMemory=2 78executeMemoryCommitLimit=1 79executeMemoryIssueLimit=1 80executeMemoryWidth=0 81executeSetTraceTimeOnCommit=true 82executeSetTraceTimeOnIssue=false 83fetch1FetchLimit=1 84fetch1LineSnapWidth=0 85fetch1LineWidth=0 86fetch1ToFetch2BackwardDelay=1 87fetch1ToFetch2ForwardDelay=1 88fetch2CycleInput=true 89fetch2InputBufferSize=2 90fetch2ToDecodeForwardDelay=1 91function_trace=false 92function_trace_start=0 93interrupts=system.cpu.interrupts 94isa=system.cpu.isa 95istage2_mmu=system.cpu.istage2_mmu 96itb=system.cpu.itb 97max_insts_all_threads=0 98max_insts_any_thread=0 99max_loads_all_threads=0 100max_loads_any_thread=0 101numThreads=1 102profile=0 103progress_interval=0 104simpoint_start_insts= 105socket_id=0 106switched_out=false 107system=system 108tracer=system.cpu.tracer 109workload=system.cpu.workload 110dcache_port=system.cpu.dcache.cpu_side 111icache_port=system.cpu.icache.cpu_side 112 113[system.cpu.branchPred] 114type=TournamentBP 115BTBEntries=4096 116BTBTagSize=16 117RASSize=16 118choiceCtrBits=2 119choicePredictorSize=8192 120eventq_index=0 121globalCtrBits=2 122globalPredictorSize=8192 123instShiftAmt=2 124localCtrBits=2 125localHistoryTableSize=2048 126localPredictorSize=2048 127numThreads=1 128 129[system.cpu.dcache] 130type=Cache 131children=tags 132addr_ranges=0:18446744073709551615 133assoc=2 134clk_domain=system.cpu_clk_domain	29num_work_ids=16 30readfile= 31symbolfile= 32work_begin_ckpt_count=0 33work_begin_cpu_id_exit=-1 34work_begin_exit_count=0 35work_cpus_ckpt_count=0 36work_end_ckpt_count=0 37work_end_exit_count=0 38work_item_id=-1 39system_port=system.membus.slave[0] 40 41[system.clk_domain] 42type=SrcClockDomain 43clock=1000 44domain_id=-1 45eventq_index=0 46init_perf_level=0 47voltage_domain=system.voltage_domain 48 49[system.cpu] 50type=MinorCPU 51children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload 52branchPred=system.cpu.branchPred 53checker=Null 54clk_domain=system.cpu_clk_domain 55cpu_id=0 56decodeCycleInput=true 57decodeInputBufferSize=3 58decodeInputWidth=2 59decodeToExecuteForwardDelay=1 60do_checkpoint_insts=true 61do_quiesce=true 62do_statistics_insts=true 63dstage2_mmu=system.cpu.dstage2_mmu 64dtb=system.cpu.dtb 65enableIdling=true 66eventq_index=0 67executeAllowEarlyMemoryIssue=true 68executeBranchDelay=1 69executeCommitLimit=2 70executeCycleInput=true 71executeFuncUnits=system.cpu.executeFuncUnits 72executeInputBufferSize=7 73executeInputWidth=2 74executeIssueLimit=2 75executeLSQMaxStoreBufferStoresPerCycle=2 76executeLSQRequestsQueueSize=1 77executeLSQStoreBufferSize=5 78executeLSQTransfersQueueSize=2 79executeMaxAccessesInMemory=2 80executeMemoryCommitLimit=1 81executeMemoryIssueLimit=1 82executeMemoryWidth=0 83executeSetTraceTimeOnCommit=true 84executeSetTraceTimeOnIssue=false 85fetch1FetchLimit=1 86fetch1LineSnapWidth=0 87fetch1LineWidth=0 88fetch1ToFetch2BackwardDelay=1 89fetch1ToFetch2ForwardDelay=1 90fetch2CycleInput=true 91fetch2InputBufferSize=2 92fetch2ToDecodeForwardDelay=1 93function_trace=false 94function_trace_start=0 95interrupts=system.cpu.interrupts 96isa=system.cpu.isa 97istage2_mmu=system.cpu.istage2_mmu 98itb=system.cpu.itb 99max_insts_all_threads=0 100max_insts_any_thread=0 101max_loads_all_threads=0 102max_loads_any_thread=0 103numThreads=1 104profile=0 105progress_interval=0 106simpoint_start_insts= 107socket_id=0 108switched_out=false 109system=system 110tracer=system.cpu.tracer 111workload=system.cpu.workload 112dcache_port=system.cpu.dcache.cpu_side 113icache_port=system.cpu.icache.cpu_side 114 115[system.cpu.branchPred] 116type=TournamentBP 117BTBEntries=4096 118BTBTagSize=16 119RASSize=16 120choiceCtrBits=2 121choicePredictorSize=8192 122eventq_index=0 123globalCtrBits=2 124globalPredictorSize=8192 125instShiftAmt=2 126localCtrBits=2 127localHistoryTableSize=2048 128localPredictorSize=2048 129numThreads=1 130 131[system.cpu.dcache] 132type=Cache 133children=tags 134addr_ranges=0:18446744073709551615 135assoc=2 136clk_domain=system.cpu_clk_domain
	137clusivity=mostly_incl
135demand_mshr_reserve=1 136eventq_index=0	138demand_mshr_reserve=1 139eventq_index=0
137forward_snoops=true
138hit_latency=2 139is_read_only=false 140max_miss_count=0 141mshrs=4 142prefetch_on_access=false 143prefetcher=Null 144response_latency=2 145sequential_access=false 146size=262144 147system=system 148tags=system.cpu.dcache.tags 149tgts_per_mshr=20 150write_buffers=8	140hit_latency=2 141is_read_only=false 142max_miss_count=0 143mshrs=4 144prefetch_on_access=false 145prefetcher=Null 146response_latency=2 147sequential_access=false 148size=262144 149system=system 150tags=system.cpu.dcache.tags 151tgts_per_mshr=20 152write_buffers=8
	153writeback_clean=false
151cpu_side=system.cpu.dcache_port 152mem_side=system.cpu.toL2Bus.slave[1] 153 154[system.cpu.dcache.tags] 155type=LRU 156assoc=2 157block_size=64 158clk_domain=system.cpu_clk_domain 159eventq_index=0 160hit_latency=2 161sequential_access=false 162size=262144 163 164[system.cpu.dstage2_mmu] 165type=ArmStage2MMU 166children=stage2_tlb 167eventq_index=0 168stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 169sys=system 170tlb=system.cpu.dtb 171 172[system.cpu.dstage2_mmu.stage2_tlb] 173type=ArmTLB 174children=walker 175eventq_index=0 176is_stage2=true 177size=32 178walker=system.cpu.dstage2_mmu.stage2_tlb.walker 179 180[system.cpu.dstage2_mmu.stage2_tlb.walker] 181type=ArmTableWalker 182clk_domain=system.cpu_clk_domain 183eventq_index=0 184is_stage2=true 185num_squash_per_cycle=2 186sys=system 187 188[system.cpu.dtb] 189type=ArmTLB 190children=walker 191eventq_index=0 192is_stage2=false 193size=64 194walker=system.cpu.dtb.walker 195 196[system.cpu.dtb.walker] 197type=ArmTableWalker 198clk_domain=system.cpu_clk_domain 199eventq_index=0 200is_stage2=false 201num_squash_per_cycle=2 202sys=system 203port=system.cpu.toL2Bus.slave[3] 204 205[system.cpu.executeFuncUnits] 206type=MinorFUPool 207children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 208eventq_index=0 209funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 210 211[system.cpu.executeFuncUnits.funcUnits0] 212type=MinorFU 213children=opClasses timings 214cantForwardFromFUIndices= 215eventq_index=0 216issueLat=1 217opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses 218opLat=3 219timings=system.cpu.executeFuncUnits.funcUnits0.timings 220 221[system.cpu.executeFuncUnits.funcUnits0.opClasses] 222type=MinorOpClassSet 223children=opClasses 224eventq_index=0 225opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses 226 227[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] 228type=MinorOpClass 229eventq_index=0 230opClass=IntAlu 231 232[system.cpu.executeFuncUnits.funcUnits0.timings] 233type=MinorFUTiming 234children=opClasses 235description=Int 236eventq_index=0 237extraAssumedLat=0 238extraCommitLat=0 239extraCommitLatExpr=Null 240mask=0 241match=0 242opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses 243srcRegsRelativeLats=2 244suppress=false 245 246[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] 247type=MinorOpClassSet 248eventq_index=0 249opClasses= 250 251[system.cpu.executeFuncUnits.funcUnits1] 252type=MinorFU 253children=opClasses timings 254cantForwardFromFUIndices= 255eventq_index=0 256issueLat=1 257opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses 258opLat=3 259timings=system.cpu.executeFuncUnits.funcUnits1.timings 260 261[system.cpu.executeFuncUnits.funcUnits1.opClasses] 262type=MinorOpClassSet 263children=opClasses 264eventq_index=0 265opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses 266 267[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] 268type=MinorOpClass 269eventq_index=0 270opClass=IntAlu 271 272[system.cpu.executeFuncUnits.funcUnits1.timings] 273type=MinorFUTiming 274children=opClasses 275description=Int 276eventq_index=0 277extraAssumedLat=0 278extraCommitLat=0 279extraCommitLatExpr=Null 280mask=0 281match=0 282opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses 283srcRegsRelativeLats=2 284suppress=false 285 286[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] 287type=MinorOpClassSet 288eventq_index=0 289opClasses= 290 291[system.cpu.executeFuncUnits.funcUnits2] 292type=MinorFU 293children=opClasses timings 294cantForwardFromFUIndices= 295eventq_index=0 296issueLat=1 297opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses 298opLat=3 299timings=system.cpu.executeFuncUnits.funcUnits2.timings 300 301[system.cpu.executeFuncUnits.funcUnits2.opClasses] 302type=MinorOpClassSet 303children=opClasses 304eventq_index=0 305opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses 306 307[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] 308type=MinorOpClass 309eventq_index=0 310opClass=IntMult 311 312[system.cpu.executeFuncUnits.funcUnits2.timings] 313type=MinorFUTiming 314children=opClasses 315description=Mul 316eventq_index=0 317extraAssumedLat=0 318extraCommitLat=0 319extraCommitLatExpr=Null 320mask=0 321match=0 322opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses 323srcRegsRelativeLats=0 324suppress=false 325 326[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] 327type=MinorOpClassSet 328eventq_index=0 329opClasses= 330 331[system.cpu.executeFuncUnits.funcUnits3] 332type=MinorFU 333children=opClasses 334cantForwardFromFUIndices= 335eventq_index=0 336issueLat=9 337opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses 338opLat=9 339timings= 340 341[system.cpu.executeFuncUnits.funcUnits3.opClasses] 342type=MinorOpClassSet 343children=opClasses 344eventq_index=0 345opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses 346 347[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] 348type=MinorOpClass 349eventq_index=0 350opClass=IntDiv 351 352[system.cpu.executeFuncUnits.funcUnits4] 353type=MinorFU 354children=opClasses timings 355cantForwardFromFUIndices= 356eventq_index=0 357issueLat=1 358opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses 359opLat=6 360timings=system.cpu.executeFuncUnits.funcUnits4.timings 361 362[system.cpu.executeFuncUnits.funcUnits4.opClasses] 363type=MinorOpClassSet 364children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 365eventq_index=0 366opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 367 368[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] 369type=MinorOpClass 370eventq_index=0 371opClass=FloatAdd 372 373[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] 374type=MinorOpClass 375eventq_index=0 376opClass=FloatCmp 377 378[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] 379type=MinorOpClass 380eventq_index=0 381opClass=FloatCvt 382 383[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] 384type=MinorOpClass 385eventq_index=0 386opClass=FloatMult 387 388[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] 389type=MinorOpClass 390eventq_index=0 391opClass=FloatDiv 392 393[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] 394type=MinorOpClass 395eventq_index=0 396opClass=FloatSqrt 397 398[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] 399type=MinorOpClass 400eventq_index=0 401opClass=SimdAdd 402 403[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] 404type=MinorOpClass 405eventq_index=0 406opClass=SimdAddAcc 407 408[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] 409type=MinorOpClass 410eventq_index=0 411opClass=SimdAlu 412 413[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] 414type=MinorOpClass 415eventq_index=0 416opClass=SimdCmp 417 418[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] 419type=MinorOpClass 420eventq_index=0 421opClass=SimdCvt 422 423[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] 424type=MinorOpClass 425eventq_index=0 426opClass=SimdMisc 427 428[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] 429type=MinorOpClass 430eventq_index=0 431opClass=SimdMult 432 433[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] 434type=MinorOpClass 435eventq_index=0 436opClass=SimdMultAcc 437 438[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] 439type=MinorOpClass 440eventq_index=0 441opClass=SimdShift 442 443[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] 444type=MinorOpClass 445eventq_index=0 446opClass=SimdShiftAcc 447 448[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] 449type=MinorOpClass 450eventq_index=0 451opClass=SimdSqrt 452 453[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] 454type=MinorOpClass 455eventq_index=0 456opClass=SimdFloatAdd 457 458[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] 459type=MinorOpClass 460eventq_index=0 461opClass=SimdFloatAlu 462 463[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] 464type=MinorOpClass 465eventq_index=0 466opClass=SimdFloatCmp 467 468[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] 469type=MinorOpClass 470eventq_index=0 471opClass=SimdFloatCvt 472 473[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] 474type=MinorOpClass 475eventq_index=0 476opClass=SimdFloatDiv 477 478[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] 479type=MinorOpClass 480eventq_index=0 481opClass=SimdFloatMisc 482 483[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] 484type=MinorOpClass 485eventq_index=0 486opClass=SimdFloatMult 487 488[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] 489type=MinorOpClass 490eventq_index=0 491opClass=SimdFloatMultAcc 492 493[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] 494type=MinorOpClass 495eventq_index=0 496opClass=SimdFloatSqrt 497 498[system.cpu.executeFuncUnits.funcUnits4.timings] 499type=MinorFUTiming 500children=opClasses 501description=FloatSimd 502eventq_index=0 503extraAssumedLat=0 504extraCommitLat=0 505extraCommitLatExpr=Null 506mask=0 507match=0 508opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses 509srcRegsRelativeLats=2 510suppress=false 511 512[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] 513type=MinorOpClassSet 514eventq_index=0 515opClasses= 516 517[system.cpu.executeFuncUnits.funcUnits5] 518type=MinorFU 519children=opClasses timings 520cantForwardFromFUIndices= 521eventq_index=0 522issueLat=1 523opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses 524opLat=1 525timings=system.cpu.executeFuncUnits.funcUnits5.timings 526 527[system.cpu.executeFuncUnits.funcUnits5.opClasses] 528type=MinorOpClassSet 529children=opClasses0 opClasses1 530eventq_index=0 531opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 532 533[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] 534type=MinorOpClass 535eventq_index=0 536opClass=MemRead 537 538[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] 539type=MinorOpClass 540eventq_index=0 541opClass=MemWrite 542 543[system.cpu.executeFuncUnits.funcUnits5.timings] 544type=MinorFUTiming 545children=opClasses 546description=Mem 547eventq_index=0 548extraAssumedLat=2 549extraCommitLat=0 550extraCommitLatExpr=Null 551mask=0 552match=0 553opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses 554srcRegsRelativeLats=1 555suppress=false 556 557[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] 558type=MinorOpClassSet 559eventq_index=0 560opClasses= 561 562[system.cpu.executeFuncUnits.funcUnits6] 563type=MinorFU 564children=opClasses 565cantForwardFromFUIndices= 566eventq_index=0 567issueLat=1 568opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses 569opLat=1 570timings= 571 572[system.cpu.executeFuncUnits.funcUnits6.opClasses] 573type=MinorOpClassSet 574children=opClasses0 opClasses1 575eventq_index=0 576opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 577 578[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] 579type=MinorOpClass 580eventq_index=0 581opClass=IprAccess 582 583[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 584type=MinorOpClass 585eventq_index=0 586opClass=InstPrefetch 587 588[system.cpu.icache] 589type=Cache 590children=tags 591addr_ranges=0:18446744073709551615 592assoc=2 593clk_domain=system.cpu_clk_domain	154cpu_side=system.cpu.dcache_port 155mem_side=system.cpu.toL2Bus.slave[1] 156 157[system.cpu.dcache.tags] 158type=LRU 159assoc=2 160block_size=64 161clk_domain=system.cpu_clk_domain 162eventq_index=0 163hit_latency=2 164sequential_access=false 165size=262144 166 167[system.cpu.dstage2_mmu] 168type=ArmStage2MMU 169children=stage2_tlb 170eventq_index=0 171stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 172sys=system 173tlb=system.cpu.dtb 174 175[system.cpu.dstage2_mmu.stage2_tlb] 176type=ArmTLB 177children=walker 178eventq_index=0 179is_stage2=true 180size=32 181walker=system.cpu.dstage2_mmu.stage2_tlb.walker 182 183[system.cpu.dstage2_mmu.stage2_tlb.walker] 184type=ArmTableWalker 185clk_domain=system.cpu_clk_domain 186eventq_index=0 187is_stage2=true 188num_squash_per_cycle=2 189sys=system 190 191[system.cpu.dtb] 192type=ArmTLB 193children=walker 194eventq_index=0 195is_stage2=false 196size=64 197walker=system.cpu.dtb.walker 198 199[system.cpu.dtb.walker] 200type=ArmTableWalker 201clk_domain=system.cpu_clk_domain 202eventq_index=0 203is_stage2=false 204num_squash_per_cycle=2 205sys=system 206port=system.cpu.toL2Bus.slave[3] 207 208[system.cpu.executeFuncUnits] 209type=MinorFUPool 210children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 211eventq_index=0 212funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 213 214[system.cpu.executeFuncUnits.funcUnits0] 215type=MinorFU 216children=opClasses timings 217cantForwardFromFUIndices= 218eventq_index=0 219issueLat=1 220opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses 221opLat=3 222timings=system.cpu.executeFuncUnits.funcUnits0.timings 223 224[system.cpu.executeFuncUnits.funcUnits0.opClasses] 225type=MinorOpClassSet 226children=opClasses 227eventq_index=0 228opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses 229 230[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] 231type=MinorOpClass 232eventq_index=0 233opClass=IntAlu 234 235[system.cpu.executeFuncUnits.funcUnits0.timings] 236type=MinorFUTiming 237children=opClasses 238description=Int 239eventq_index=0 240extraAssumedLat=0 241extraCommitLat=0 242extraCommitLatExpr=Null 243mask=0 244match=0 245opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses 246srcRegsRelativeLats=2 247suppress=false 248 249[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] 250type=MinorOpClassSet 251eventq_index=0 252opClasses= 253 254[system.cpu.executeFuncUnits.funcUnits1] 255type=MinorFU 256children=opClasses timings 257cantForwardFromFUIndices= 258eventq_index=0 259issueLat=1 260opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses 261opLat=3 262timings=system.cpu.executeFuncUnits.funcUnits1.timings 263 264[system.cpu.executeFuncUnits.funcUnits1.opClasses] 265type=MinorOpClassSet 266children=opClasses 267eventq_index=0 268opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses 269 270[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] 271type=MinorOpClass 272eventq_index=0 273opClass=IntAlu 274 275[system.cpu.executeFuncUnits.funcUnits1.timings] 276type=MinorFUTiming 277children=opClasses 278description=Int 279eventq_index=0 280extraAssumedLat=0 281extraCommitLat=0 282extraCommitLatExpr=Null 283mask=0 284match=0 285opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses 286srcRegsRelativeLats=2 287suppress=false 288 289[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] 290type=MinorOpClassSet 291eventq_index=0 292opClasses= 293 294[system.cpu.executeFuncUnits.funcUnits2] 295type=MinorFU 296children=opClasses timings 297cantForwardFromFUIndices= 298eventq_index=0 299issueLat=1 300opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses 301opLat=3 302timings=system.cpu.executeFuncUnits.funcUnits2.timings 303 304[system.cpu.executeFuncUnits.funcUnits2.opClasses] 305type=MinorOpClassSet 306children=opClasses 307eventq_index=0 308opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses 309 310[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] 311type=MinorOpClass 312eventq_index=0 313opClass=IntMult 314 315[system.cpu.executeFuncUnits.funcUnits2.timings] 316type=MinorFUTiming 317children=opClasses 318description=Mul 319eventq_index=0 320extraAssumedLat=0 321extraCommitLat=0 322extraCommitLatExpr=Null 323mask=0 324match=0 325opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses 326srcRegsRelativeLats=0 327suppress=false 328 329[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] 330type=MinorOpClassSet 331eventq_index=0 332opClasses= 333 334[system.cpu.executeFuncUnits.funcUnits3] 335type=MinorFU 336children=opClasses 337cantForwardFromFUIndices= 338eventq_index=0 339issueLat=9 340opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses 341opLat=9 342timings= 343 344[system.cpu.executeFuncUnits.funcUnits3.opClasses] 345type=MinorOpClassSet 346children=opClasses 347eventq_index=0 348opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses 349 350[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] 351type=MinorOpClass 352eventq_index=0 353opClass=IntDiv 354 355[system.cpu.executeFuncUnits.funcUnits4] 356type=MinorFU 357children=opClasses timings 358cantForwardFromFUIndices= 359eventq_index=0 360issueLat=1 361opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses 362opLat=6 363timings=system.cpu.executeFuncUnits.funcUnits4.timings 364 365[system.cpu.executeFuncUnits.funcUnits4.opClasses] 366type=MinorOpClassSet 367children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 368eventq_index=0 369opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 370 371[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] 372type=MinorOpClass 373eventq_index=0 374opClass=FloatAdd 375 376[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] 377type=MinorOpClass 378eventq_index=0 379opClass=FloatCmp 380 381[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] 382type=MinorOpClass 383eventq_index=0 384opClass=FloatCvt 385 386[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] 387type=MinorOpClass 388eventq_index=0 389opClass=FloatMult 390 391[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] 392type=MinorOpClass 393eventq_index=0 394opClass=FloatDiv 395 396[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] 397type=MinorOpClass 398eventq_index=0 399opClass=FloatSqrt 400 401[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] 402type=MinorOpClass 403eventq_index=0 404opClass=SimdAdd 405 406[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] 407type=MinorOpClass 408eventq_index=0 409opClass=SimdAddAcc 410 411[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] 412type=MinorOpClass 413eventq_index=0 414opClass=SimdAlu 415 416[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] 417type=MinorOpClass 418eventq_index=0 419opClass=SimdCmp 420 421[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] 422type=MinorOpClass 423eventq_index=0 424opClass=SimdCvt 425 426[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] 427type=MinorOpClass 428eventq_index=0 429opClass=SimdMisc 430 431[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] 432type=MinorOpClass 433eventq_index=0 434opClass=SimdMult 435 436[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] 437type=MinorOpClass 438eventq_index=0 439opClass=SimdMultAcc 440 441[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] 442type=MinorOpClass 443eventq_index=0 444opClass=SimdShift 445 446[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] 447type=MinorOpClass 448eventq_index=0 449opClass=SimdShiftAcc 450 451[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] 452type=MinorOpClass 453eventq_index=0 454opClass=SimdSqrt 455 456[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] 457type=MinorOpClass 458eventq_index=0 459opClass=SimdFloatAdd 460 461[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] 462type=MinorOpClass 463eventq_index=0 464opClass=SimdFloatAlu 465 466[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] 467type=MinorOpClass 468eventq_index=0 469opClass=SimdFloatCmp 470 471[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] 472type=MinorOpClass 473eventq_index=0 474opClass=SimdFloatCvt 475 476[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] 477type=MinorOpClass 478eventq_index=0 479opClass=SimdFloatDiv 480 481[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] 482type=MinorOpClass 483eventq_index=0 484opClass=SimdFloatMisc 485 486[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] 487type=MinorOpClass 488eventq_index=0 489opClass=SimdFloatMult 490 491[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] 492type=MinorOpClass 493eventq_index=0 494opClass=SimdFloatMultAcc 495 496[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] 497type=MinorOpClass 498eventq_index=0 499opClass=SimdFloatSqrt 500 501[system.cpu.executeFuncUnits.funcUnits4.timings] 502type=MinorFUTiming 503children=opClasses 504description=FloatSimd 505eventq_index=0 506extraAssumedLat=0 507extraCommitLat=0 508extraCommitLatExpr=Null 509mask=0 510match=0 511opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses 512srcRegsRelativeLats=2 513suppress=false 514 515[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] 516type=MinorOpClassSet 517eventq_index=0 518opClasses= 519 520[system.cpu.executeFuncUnits.funcUnits5] 521type=MinorFU 522children=opClasses timings 523cantForwardFromFUIndices= 524eventq_index=0 525issueLat=1 526opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses 527opLat=1 528timings=system.cpu.executeFuncUnits.funcUnits5.timings 529 530[system.cpu.executeFuncUnits.funcUnits5.opClasses] 531type=MinorOpClassSet 532children=opClasses0 opClasses1 533eventq_index=0 534opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 535 536[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] 537type=MinorOpClass 538eventq_index=0 539opClass=MemRead 540 541[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] 542type=MinorOpClass 543eventq_index=0 544opClass=MemWrite 545 546[system.cpu.executeFuncUnits.funcUnits5.timings] 547type=MinorFUTiming 548children=opClasses 549description=Mem 550eventq_index=0 551extraAssumedLat=2 552extraCommitLat=0 553extraCommitLatExpr=Null 554mask=0 555match=0 556opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses 557srcRegsRelativeLats=1 558suppress=false 559 560[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] 561type=MinorOpClassSet 562eventq_index=0 563opClasses= 564 565[system.cpu.executeFuncUnits.funcUnits6] 566type=MinorFU 567children=opClasses 568cantForwardFromFUIndices= 569eventq_index=0 570issueLat=1 571opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses 572opLat=1 573timings= 574 575[system.cpu.executeFuncUnits.funcUnits6.opClasses] 576type=MinorOpClassSet 577children=opClasses0 opClasses1 578eventq_index=0 579opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 580 581[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] 582type=MinorOpClass 583eventq_index=0 584opClass=IprAccess 585 586[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 587type=MinorOpClass 588eventq_index=0 589opClass=InstPrefetch 590 591[system.cpu.icache] 592type=Cache 593children=tags 594addr_ranges=0:18446744073709551615 595assoc=2 596clk_domain=system.cpu_clk_domain
	597clusivity=mostly_incl
594demand_mshr_reserve=1 595eventq_index=0	598demand_mshr_reserve=1 599eventq_index=0
596forward_snoops=true
597hit_latency=2 598is_read_only=true 599max_miss_count=0 600mshrs=4 601prefetch_on_access=false 602prefetcher=Null 603response_latency=2 604sequential_access=false 605size=131072 606system=system 607tags=system.cpu.icache.tags 608tgts_per_mshr=20 609write_buffers=8	600hit_latency=2 601is_read_only=true 602max_miss_count=0 603mshrs=4 604prefetch_on_access=false 605prefetcher=Null 606response_latency=2 607sequential_access=false 608size=131072 609system=system 610tags=system.cpu.icache.tags 611tgts_per_mshr=20 612write_buffers=8
	613writeback_clean=true
610cpu_side=system.cpu.icache_port 611mem_side=system.cpu.toL2Bus.slave[0] 612 613[system.cpu.icache.tags] 614type=LRU 615assoc=2 616block_size=64 617clk_domain=system.cpu_clk_domain 618eventq_index=0 619hit_latency=2 620sequential_access=false 621size=131072 622 623[system.cpu.interrupts] 624type=ArmInterrupts 625eventq_index=0 626 627[system.cpu.isa] 628type=ArmISA	614cpu_side=system.cpu.icache_port 615mem_side=system.cpu.toL2Bus.slave[0] 616 617[system.cpu.icache.tags] 618type=LRU 619assoc=2 620block_size=64 621clk_domain=system.cpu_clk_domain 622eventq_index=0 623hit_latency=2 624sequential_access=false 625size=131072 626 627[system.cpu.interrupts] 628type=ArmInterrupts 629eventq_index=0 630 631[system.cpu.isa] 632type=ArmISA
	633decoderFlavour=Generic
629eventq_index=0 630fpsid=1090793632 631id_aa64afr0_el1=0 632id_aa64afr1_el1=0 633id_aa64dfr0_el1=1052678 634id_aa64dfr1_el1=0 635id_aa64isar0_el1=0 636id_aa64isar1_el1=0 637id_aa64mmfr0_el1=15728642 638id_aa64mmfr1_el1=0 639id_aa64pfr0_el1=17 640id_aa64pfr1_el1=0 641id_isar0=34607377 642id_isar1=34677009 643id_isar2=555950401 644id_isar3=17899825 645id_isar4=268501314 646id_isar5=0 647id_mmfr0=270536963 648id_mmfr1=0 649id_mmfr2=19070976 650id_mmfr3=34611729 651id_pfr0=49 652id_pfr1=4113 653midr=1091551472 654pmu=Null 655system=system 656 657[system.cpu.istage2_mmu] 658type=ArmStage2MMU 659children=stage2_tlb 660eventq_index=0 661stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 662sys=system 663tlb=system.cpu.itb 664 665[system.cpu.istage2_mmu.stage2_tlb] 666type=ArmTLB 667children=walker 668eventq_index=0 669is_stage2=true 670size=32 671walker=system.cpu.istage2_mmu.stage2_tlb.walker 672 673[system.cpu.istage2_mmu.stage2_tlb.walker] 674type=ArmTableWalker 675clk_domain=system.cpu_clk_domain 676eventq_index=0 677is_stage2=true 678num_squash_per_cycle=2 679sys=system 680 681[system.cpu.itb] 682type=ArmTLB 683children=walker 684eventq_index=0 685is_stage2=false 686size=64 687walker=system.cpu.itb.walker 688 689[system.cpu.itb.walker] 690type=ArmTableWalker 691clk_domain=system.cpu_clk_domain 692eventq_index=0 693is_stage2=false 694num_squash_per_cycle=2 695sys=system 696port=system.cpu.toL2Bus.slave[2] 697 698[system.cpu.l2cache] 699type=Cache 700children=tags 701addr_ranges=0:18446744073709551615 702assoc=8 703clk_domain=system.cpu_clk_domain	634eventq_index=0 635fpsid=1090793632 636id_aa64afr0_el1=0 637id_aa64afr1_el1=0 638id_aa64dfr0_el1=1052678 639id_aa64dfr1_el1=0 640id_aa64isar0_el1=0 641id_aa64isar1_el1=0 642id_aa64mmfr0_el1=15728642 643id_aa64mmfr1_el1=0 644id_aa64pfr0_el1=17 645id_aa64pfr1_el1=0 646id_isar0=34607377 647id_isar1=34677009 648id_isar2=555950401 649id_isar3=17899825 650id_isar4=268501314 651id_isar5=0 652id_mmfr0=270536963 653id_mmfr1=0 654id_mmfr2=19070976 655id_mmfr3=34611729 656id_pfr0=49 657id_pfr1=4113 658midr=1091551472 659pmu=Null 660system=system 661 662[system.cpu.istage2_mmu] 663type=ArmStage2MMU 664children=stage2_tlb 665eventq_index=0 666stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 667sys=system 668tlb=system.cpu.itb 669 670[system.cpu.istage2_mmu.stage2_tlb] 671type=ArmTLB 672children=walker 673eventq_index=0 674is_stage2=true 675size=32 676walker=system.cpu.istage2_mmu.stage2_tlb.walker 677 678[system.cpu.istage2_mmu.stage2_tlb.walker] 679type=ArmTableWalker 680clk_domain=system.cpu_clk_domain 681eventq_index=0 682is_stage2=true 683num_squash_per_cycle=2 684sys=system 685 686[system.cpu.itb] 687type=ArmTLB 688children=walker 689eventq_index=0 690is_stage2=false 691size=64 692walker=system.cpu.itb.walker 693 694[system.cpu.itb.walker] 695type=ArmTableWalker 696clk_domain=system.cpu_clk_domain 697eventq_index=0 698is_stage2=false 699num_squash_per_cycle=2 700sys=system 701port=system.cpu.toL2Bus.slave[2] 702 703[system.cpu.l2cache] 704type=Cache 705children=tags 706addr_ranges=0:18446744073709551615 707assoc=8 708clk_domain=system.cpu_clk_domain
	709clusivity=mostly_incl
704demand_mshr_reserve=1 705eventq_index=0	710demand_mshr_reserve=1 711eventq_index=0
706forward_snoops=true
707hit_latency=20 708is_read_only=false 709max_miss_count=0 710mshrs=20 711prefetch_on_access=false 712prefetcher=Null 713response_latency=20 714sequential_access=false 715size=2097152 716system=system 717tags=system.cpu.l2cache.tags 718tgts_per_mshr=12 719write_buffers=8	712hit_latency=20 713is_read_only=false 714max_miss_count=0 715mshrs=20 716prefetch_on_access=false 717prefetcher=Null 718response_latency=20 719sequential_access=false 720size=2097152 721system=system 722tags=system.cpu.l2cache.tags 723tgts_per_mshr=12 724write_buffers=8
	725writeback_clean=false
720cpu_side=system.cpu.toL2Bus.master[0] 721mem_side=system.membus.slave[1] 722 723[system.cpu.l2cache.tags] 724type=LRU 725assoc=8 726block_size=64 727clk_domain=system.cpu_clk_domain 728eventq_index=0 729hit_latency=20 730sequential_access=false 731size=2097152 732 733[system.cpu.toL2Bus] 734type=CoherentXBar	726cpu_side=system.cpu.toL2Bus.master[0] 727mem_side=system.membus.slave[1] 728 729[system.cpu.l2cache.tags] 730type=LRU 731assoc=8 732block_size=64 733clk_domain=system.cpu_clk_domain 734eventq_index=0 735hit_latency=20 736sequential_access=false 737size=2097152 738 739[system.cpu.toL2Bus] 740type=CoherentXBar
	741children=snoop_filter
735clk_domain=system.cpu_clk_domain 736eventq_index=0 737forward_latency=0 738frontend_latency=1	742clk_domain=system.cpu_clk_domain 743eventq_index=0 744forward_latency=0 745frontend_latency=1
	746point_of_coherency=false
739response_latency=1	747response_latency=1
740snoop_filter=Null	748snoop_filter=system.cpu.toL2Bus.snoop_filter
741snoop_response_latency=1 742system=system 743use_default_range=false 744width=32 745master=system.cpu.l2cache.cpu_side 746slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 747	749snoop_response_latency=1 750system=system 751use_default_range=false 752width=32 753master=system.cpu.l2cache.cpu_side 754slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 755
	756[system.cpu.toL2Bus.snoop_filter] 757type=SnoopFilter 758eventq_index=0 759lookup_latency=0 760max_capacity=8388608 761system=system 762
748[system.cpu.tracer] 749type=ExeTracer 750eventq_index=0 751 752[system.cpu.workload] 753type=LiveProcess 754cmd=parser 2.1.dict -batch 755cwd=build/ARM/tests/opt/long/se/20.parser/arm/linux/minor-timing 756drivers= 757egid=100 758env= 759errout=cerr 760euid=100 761eventq_index=0	763[system.cpu.tracer] 764type=ExeTracer 765eventq_index=0 766 767[system.cpu.workload] 768type=LiveProcess 769cmd=parser 2.1.dict -batch 770cwd=build/ARM/tests/opt/long/se/20.parser/arm/linux/minor-timing 771drivers= 772egid=100 773env= 774errout=cerr 775euid=100 776eventq_index=0
762executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/parser	777executable=/dist/m5/cpu2000/binaries/arm/linux/parser
763gid=100	778gid=100
764input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in	779input=/dist/m5/cpu2000/data/parser/mdred/input/parser.in
765kvmInSE=false 766max_stack_size=67108864 767output=cout 768pid=100 769ppid=99 770simpoint=114600000000 771system=system 772uid=100 773useArchPT=false 774 775[system.cpu_clk_domain] 776type=SrcClockDomain 777clock=500 778domain_id=-1 779eventq_index=0 780init_perf_level=0 781voltage_domain=system.voltage_domain 782 783[system.dvfs_handler] 784type=DVFSHandler 785domains= 786enable=false 787eventq_index=0 788sys_clk_domain=system.clk_domain 789transition_latency=100000000 790 791[system.membus] 792type=CoherentXBar 793clk_domain=system.clk_domain 794eventq_index=0 795forward_latency=4 796frontend_latency=3	780kvmInSE=false 781max_stack_size=67108864 782output=cout 783pid=100 784ppid=99 785simpoint=114600000000 786system=system 787uid=100 788useArchPT=false 789 790[system.cpu_clk_domain] 791type=SrcClockDomain 792clock=500 793domain_id=-1 794eventq_index=0 795init_perf_level=0 796voltage_domain=system.voltage_domain 797 798[system.dvfs_handler] 799type=DVFSHandler 800domains= 801enable=false 802eventq_index=0 803sys_clk_domain=system.clk_domain 804transition_latency=100000000 805 806[system.membus] 807type=CoherentXBar 808clk_domain=system.clk_domain 809eventq_index=0 810forward_latency=4 811frontend_latency=3
	812point_of_coherency=true
797response_latency=2 798snoop_filter=Null 799snoop_response_latency=4 800system=system 801use_default_range=false 802width=16 803master=system.physmem.port 804slave=system.system_port system.cpu.l2cache.mem_side 805 806[system.physmem] 807type=DRAMCtrl 808IDD0=0.075000 809IDD02=0.000000 810IDD2N=0.050000 811IDD2N2=0.000000 812IDD2P0=0.000000 813IDD2P02=0.000000 814IDD2P1=0.000000 815IDD2P12=0.000000 816IDD3N=0.057000 817IDD3N2=0.000000 818IDD3P0=0.000000 819IDD3P02=0.000000 820IDD3P1=0.000000 821IDD3P12=0.000000 822IDD4R=0.187000 823IDD4R2=0.000000 824IDD4W=0.165000 825IDD4W2=0.000000 826IDD5=0.220000 827IDD52=0.000000 828IDD6=0.000000 829IDD62=0.000000 830VDD=1.500000 831VDD2=0.000000 832activation_limit=4 833addr_mapping=RoRaBaCoCh 834bank_groups_per_rank=0 835banks_per_rank=8 836burst_length=8 837channels=1 838clk_domain=system.clk_domain 839conf_table_reported=true 840device_bus_width=8 841device_rowbuffer_size=1024 842device_size=536870912 843devices_per_rank=8 844dll=true 845eventq_index=0 846in_addr_map=true 847max_accesses_per_row=16 848mem_sched_policy=frfcfs 849min_writes_per_switch=16 850null=false 851page_policy=open_adaptive 852range=0:134217727 853ranks_per_channel=2 854read_buffer_size=32 855static_backend_latency=10000 856static_frontend_latency=10000 857tBURST=5000 858tCCD_L=0 859tCK=1250 860tCL=13750 861tCS=2500 862tRAS=35000 863tRCD=13750 864tREFI=7800000 865tRFC=260000 866tRP=13750 867tRRD=6000 868tRRD_L=0 869tRTP=7500 870tRTW=2500 871tWR=15000 872tWTR=7500 873tXAW=30000 874tXP=0 875tXPDLL=0 876tXS=0 877tXSDLL=0 878write_buffer_size=64 879write_high_thresh_perc=85 880write_low_thresh_perc=50 881port=system.membus.master[0] 882 883[system.voltage_domain] 884type=VoltageDomain 885eventq_index=0 886voltage=1.000000 887	813response_latency=2 814snoop_filter=Null 815snoop_response_latency=4 816system=system 817use_default_range=false 818width=16 819master=system.physmem.port 820slave=system.system_port system.cpu.l2cache.mem_side 821 822[system.physmem] 823type=DRAMCtrl 824IDD0=0.075000 825IDD02=0.000000 826IDD2N=0.050000 827IDD2N2=0.000000 828IDD2P0=0.000000 829IDD2P02=0.000000 830IDD2P1=0.000000 831IDD2P12=0.000000 832IDD3N=0.057000 833IDD3N2=0.000000 834IDD3P0=0.000000 835IDD3P02=0.000000 836IDD3P1=0.000000 837IDD3P12=0.000000 838IDD4R=0.187000 839IDD4R2=0.000000 840IDD4W=0.165000 841IDD4W2=0.000000 842IDD5=0.220000 843IDD52=0.000000 844IDD6=0.000000 845IDD62=0.000000 846VDD=1.500000 847VDD2=0.000000 848activation_limit=4 849addr_mapping=RoRaBaCoCh 850bank_groups_per_rank=0 851banks_per_rank=8 852burst_length=8 853channels=1 854clk_domain=system.clk_domain 855conf_table_reported=true 856device_bus_width=8 857device_rowbuffer_size=1024 858device_size=536870912 859devices_per_rank=8 860dll=true 861eventq_index=0 862in_addr_map=true 863max_accesses_per_row=16 864mem_sched_policy=frfcfs 865min_writes_per_switch=16 866null=false 867page_policy=open_adaptive 868range=0:134217727 869ranks_per_channel=2 870read_buffer_size=32 871static_backend_latency=10000 872static_frontend_latency=10000 873tBURST=5000 874tCCD_L=0 875tCK=1250 876tCL=13750 877tCS=2500 878tRAS=35000 879tRCD=13750 880tREFI=7800000 881tRFC=260000 882tRP=13750 883tRRD=6000 884tRRD_L=0 885tRTP=7500 886tRTW=2500 887tWR=15000 888tWTR=7500 889tXAW=30000 890tXP=0 891tXPDLL=0 892tXS=0 893tXSDLL=0 894write_buffer_size=64 895write_high_thresh_perc=85 896write_low_thresh_perc=50 897port=system.membus.master[0] 898 899[system.voltage_domain] 900type=VoltageDomain 901eventq_index=0 902voltage=1.000000 903