1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000

--- 716 unchanged lines hidden (view full) ---

725block_size=64
726clk_domain=system.cpu_clk_domain
727eventq_index=0
728hit_latency=20
729sequential_access=false
730size=2097152
731
732[system.cpu.toL2Bus]
733type=CoherentBus
734clk_domain=system.cpu_clk_domain
735eventq_index=0
736header_cycles=1
737system=system
738use_default_range=false
739width=32
740master=system.cpu.l2cache.cpu_side
741slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port
742
743[system.cpu.tracer]
744type=ExeTracer

--- 13 unchanged lines hidden (view full) ---

758input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in
759max_stack_size=67108864
760output=cout
761pid=100
762ppid=99
763simpoint=114600000000
764system=system
765uid=100
766
767[system.cpu_clk_domain]
768type=SrcClockDomain
769clock=500
770domain_id=-1
771eventq_index=0
772init_perf_level=0
773voltage_domain=system.voltage_domain
774
775[system.dvfs_handler]
776type=DVFSHandler
777domains=
778enable=false
779eventq_index=0
780sys_clk_domain=system.clk_domain
781transition_latency=100000000
782
783[system.membus]
784type=CoherentBus
785clk_domain=system.clk_domain
786eventq_index=0
787header_cycles=1
788system=system
789use_default_range=false
790width=8
791master=system.physmem.port
792slave=system.system_port system.cpu.l2cache.mem_side
793
794[system.physmem]
795type=DRAMCtrl
796activation_limit=4
797addr_mapping=RoRaBaChCo
798banks_per_rank=8
799burst_length=8
800channels=1
801clk_domain=system.clk_domain
802conf_table_reported=true
803device_bus_width=8
804device_rowbuffer_size=1024
805devices_per_rank=8
806eventq_index=0
807in_addr_map=true
808max_accesses_per_row=16
809mem_sched_policy=frfcfs
810min_writes_per_switch=16
811null=false
812page_policy=open_adaptive
813range=0:134217727
814ranks_per_channel=2
815read_buffer_size=32
816static_backend_latency=10000
817static_frontend_latency=10000
818tBURST=5000
819tCK=1250
820tCL=13750
821tRAS=35000
822tRCD=13750
823tREFI=7800000
824tRFC=260000
825tRP=13750
826tRRD=6000
827tRTP=7500
828tRTW=2500
829tWR=15000
830tWTR=7500
831tXAW=30000
832write_buffer_size=64
833write_high_thresh_perc=85
834write_low_thresh_perc=50
835port=system.membus.master[0]
836
837[system.voltage_domain]
838type=VoltageDomain
839eventq_index=0
840voltage=1.000000
841