Cross Reference: /gem5/tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini

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config.ini (10036:80e84beef3bb)	config.ini (10242:cb4e86c17767)
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20load_addr_mask=1099511627775	1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain 17eventq_index=0 18init_param=0 19kernel= 20load_addr_mask=1099511627775
	21load_offset=0
21mem_mode=timing 22mem_ranges= 23memories=system.physmem 24num_work_ids=16 25readfile= 26symbolfile= 27work_begin_ckpt_count=0 28work_begin_cpu_id_exit=-1 29work_begin_exit_count=0 30work_cpus_ckpt_count=0 31work_end_ckpt_count=0 32work_end_exit_count=0 33work_item_id=-1 34system_port=system.membus.slave[0] 35 36[system.clk_domain] 37type=SrcClockDomain 38clock=1000 39eventq_index=0 40voltage_domain=system.voltage_domain 41 42[system.cpu] 43type=DerivO3CPU 44children=apic_clk_domain branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload 45LFSTSize=1024 46LQEntries=32 47LSQCheckLoads=true 48LSQDepCheckShift=4 49SQEntries=32 50SSITSize=1024 51activity=0 52backComSize=5 53branchPred=system.cpu.branchPred 54cachePorts=200 55checker=Null 56clk_domain=system.cpu_clk_domain 57commitToDecodeDelay=1 58commitToFetchDelay=1 59commitToIEWDelay=1 60commitToRenameDelay=1 61commitWidth=8 62cpu_id=0 63decodeToFetchDelay=1 64decodeToRenameDelay=1 65decodeWidth=8 66dispatchWidth=8 67do_checkpoint_insts=true 68do_quiesce=true 69do_statistics_insts=true 70dtb=system.cpu.dtb 71eventq_index=0 72fetchBufferSize=64 73fetchToDecodeDelay=1 74fetchTrapLatency=1 75fetchWidth=8 76forwardComSize=5 77fuPool=system.cpu.fuPool 78function_trace=false 79function_trace_start=0 80iewToCommitDelay=1 81iewToDecodeDelay=1 82iewToFetchDelay=1 83iewToRenameDelay=1 84interrupts=system.cpu.interrupts 85isa=system.cpu.isa 86issueToExecuteDelay=1 87issueWidth=8 88itb=system.cpu.itb 89max_insts_all_threads=0 90max_insts_any_thread=0 91max_loads_all_threads=0 92max_loads_any_thread=0 93needsTSO=true 94numIQEntries=64 95numPhysCCRegs=1280 96numPhysFloatRegs=256 97numPhysIntRegs=256 98numROBEntries=192 99numRobs=1 100numThreads=1 101profile=0 102progress_interval=0 103renameToDecodeDelay=1 104renameToFetchDelay=1 105renameToIEWDelay=2 106renameToROBDelay=1 107renameWidth=8 108simpoint_start_insts= 109smtCommitPolicy=RoundRobin 110smtFetchPolicy=SingleThread 111smtIQPolicy=Partitioned 112smtIQThreshold=100 113smtLSQPolicy=Partitioned 114smtLSQThreshold=100 115smtNumFetchingThreads=1 116smtROBPolicy=Partitioned 117smtROBThreshold=100	22mem_mode=timing 23mem_ranges= 24memories=system.physmem 25num_work_ids=16 26readfile= 27symbolfile= 28work_begin_ckpt_count=0 29work_begin_cpu_id_exit=-1 30work_begin_exit_count=0 31work_cpus_ckpt_count=0 32work_end_ckpt_count=0 33work_end_exit_count=0 34work_item_id=-1 35system_port=system.membus.slave[0] 36 37[system.clk_domain] 38type=SrcClockDomain 39clock=1000 40eventq_index=0 41voltage_domain=system.voltage_domain 42 43[system.cpu] 44type=DerivO3CPU 45children=apic_clk_domain branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload 46LFSTSize=1024 47LQEntries=32 48LSQCheckLoads=true 49LSQDepCheckShift=4 50SQEntries=32 51SSITSize=1024 52activity=0 53backComSize=5 54branchPred=system.cpu.branchPred 55cachePorts=200 56checker=Null 57clk_domain=system.cpu_clk_domain 58commitToDecodeDelay=1 59commitToFetchDelay=1 60commitToIEWDelay=1 61commitToRenameDelay=1 62commitWidth=8 63cpu_id=0 64decodeToFetchDelay=1 65decodeToRenameDelay=1 66decodeWidth=8 67dispatchWidth=8 68do_checkpoint_insts=true 69do_quiesce=true 70do_statistics_insts=true 71dtb=system.cpu.dtb 72eventq_index=0 73fetchBufferSize=64 74fetchToDecodeDelay=1 75fetchTrapLatency=1 76fetchWidth=8 77forwardComSize=5 78fuPool=system.cpu.fuPool 79function_trace=false 80function_trace_start=0 81iewToCommitDelay=1 82iewToDecodeDelay=1 83iewToFetchDelay=1 84iewToRenameDelay=1 85interrupts=system.cpu.interrupts 86isa=system.cpu.isa 87issueToExecuteDelay=1 88issueWidth=8 89itb=system.cpu.itb 90max_insts_all_threads=0 91max_insts_any_thread=0 92max_loads_all_threads=0 93max_loads_any_thread=0 94needsTSO=true 95numIQEntries=64 96numPhysCCRegs=1280 97numPhysFloatRegs=256 98numPhysIntRegs=256 99numROBEntries=192 100numRobs=1 101numThreads=1 102profile=0 103progress_interval=0 104renameToDecodeDelay=1 105renameToFetchDelay=1 106renameToIEWDelay=2 107renameToROBDelay=1 108renameWidth=8 109simpoint_start_insts= 110smtCommitPolicy=RoundRobin 111smtFetchPolicy=SingleThread 112smtIQPolicy=Partitioned 113smtIQThreshold=100 114smtLSQPolicy=Partitioned 115smtLSQThreshold=100 116smtNumFetchingThreads=1 117smtROBPolicy=Partitioned 118smtROBThreshold=100
	119socket_id=0
118squashWidth=8 119store_set_clear_period=250000 120switched_out=false 121system=system 122tracer=system.cpu.tracer 123trapLatency=13 124wbDepth=1 125wbWidth=8 126workload=system.cpu.workload 127dcache_port=system.cpu.dcache.cpu_side 128icache_port=system.cpu.icache.cpu_side 129 130[system.cpu.apic_clk_domain] 131type=DerivedClockDomain 132clk_divider=16 133clk_domain=system.cpu_clk_domain 134eventq_index=0 135 136[system.cpu.branchPred] 137type=BranchPredictor 138BTBEntries=4096 139BTBTagSize=16 140RASSize=16 141choiceCtrBits=2 142choicePredictorSize=8192 143eventq_index=0 144globalCtrBits=2 145globalPredictorSize=8192 146instShiftAmt=2 147localCtrBits=2 148localHistoryTableSize=2048 149localPredictorSize=2048 150numThreads=1 151predType=tournament 152 153[system.cpu.dcache] 154type=BaseCache 155children=tags 156addr_ranges=0:18446744073709551615 157assoc=2 158clk_domain=system.cpu_clk_domain 159eventq_index=0 160forward_snoops=true 161hit_latency=2 162is_top_level=true 163max_miss_count=0 164mshrs=4 165prefetch_on_access=false 166prefetcher=Null 167response_latency=2 168sequential_access=false 169size=262144 170system=system 171tags=system.cpu.dcache.tags 172tgts_per_mshr=20 173two_queue=false 174write_buffers=8 175cpu_side=system.cpu.dcache_port 176mem_side=system.cpu.toL2Bus.slave[1] 177 178[system.cpu.dcache.tags] 179type=LRU 180assoc=2 181block_size=64 182clk_domain=system.cpu_clk_domain 183eventq_index=0 184hit_latency=2 185sequential_access=false 186size=262144 187 188[system.cpu.dtb] 189type=X86TLB 190children=walker 191eventq_index=0 192size=64 193walker=system.cpu.dtb.walker 194 195[system.cpu.dtb.walker] 196type=X86PagetableWalker 197clk_domain=system.cpu_clk_domain 198eventq_index=0 199num_squash_per_cycle=4 200system=system 201port=system.cpu.toL2Bus.slave[3] 202 203[system.cpu.fuPool] 204type=FUPool 205children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 206FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 207eventq_index=0 208 209[system.cpu.fuPool.FUList0] 210type=FUDesc 211children=opList 212count=6 213eventq_index=0 214opList=system.cpu.fuPool.FUList0.opList 215 216[system.cpu.fuPool.FUList0.opList] 217type=OpDesc 218eventq_index=0 219issueLat=1 220opClass=IntAlu 221opLat=1 222 223[system.cpu.fuPool.FUList1] 224type=FUDesc 225children=opList0 opList1 226count=2 227eventq_index=0 228opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 229 230[system.cpu.fuPool.FUList1.opList0] 231type=OpDesc 232eventq_index=0 233issueLat=1 234opClass=IntMult 235opLat=3 236 237[system.cpu.fuPool.FUList1.opList1] 238type=OpDesc 239eventq_index=0 240issueLat=19 241opClass=IntDiv 242opLat=20 243 244[system.cpu.fuPool.FUList2] 245type=FUDesc 246children=opList0 opList1 opList2 247count=4 248eventq_index=0 249opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 250 251[system.cpu.fuPool.FUList2.opList0] 252type=OpDesc 253eventq_index=0 254issueLat=1 255opClass=FloatAdd 256opLat=2 257 258[system.cpu.fuPool.FUList2.opList1] 259type=OpDesc 260eventq_index=0 261issueLat=1 262opClass=FloatCmp 263opLat=2 264 265[system.cpu.fuPool.FUList2.opList2] 266type=OpDesc 267eventq_index=0 268issueLat=1 269opClass=FloatCvt 270opLat=2 271 272[system.cpu.fuPool.FUList3] 273type=FUDesc 274children=opList0 opList1 opList2 275count=2 276eventq_index=0 277opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 278 279[system.cpu.fuPool.FUList3.opList0] 280type=OpDesc 281eventq_index=0 282issueLat=1 283opClass=FloatMult 284opLat=4 285 286[system.cpu.fuPool.FUList3.opList1] 287type=OpDesc 288eventq_index=0 289issueLat=12 290opClass=FloatDiv 291opLat=12 292 293[system.cpu.fuPool.FUList3.opList2] 294type=OpDesc 295eventq_index=0 296issueLat=24 297opClass=FloatSqrt 298opLat=24 299 300[system.cpu.fuPool.FUList4] 301type=FUDesc 302children=opList 303count=0 304eventq_index=0 305opList=system.cpu.fuPool.FUList4.opList 306 307[system.cpu.fuPool.FUList4.opList] 308type=OpDesc 309eventq_index=0 310issueLat=1 311opClass=MemRead 312opLat=1 313 314[system.cpu.fuPool.FUList5] 315type=FUDesc 316children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 317count=4 318eventq_index=0 319opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 320 321[system.cpu.fuPool.FUList5.opList00] 322type=OpDesc 323eventq_index=0 324issueLat=1 325opClass=SimdAdd 326opLat=1 327 328[system.cpu.fuPool.FUList5.opList01] 329type=OpDesc 330eventq_index=0 331issueLat=1 332opClass=SimdAddAcc 333opLat=1 334 335[system.cpu.fuPool.FUList5.opList02] 336type=OpDesc 337eventq_index=0 338issueLat=1 339opClass=SimdAlu 340opLat=1 341 342[system.cpu.fuPool.FUList5.opList03] 343type=OpDesc 344eventq_index=0 345issueLat=1 346opClass=SimdCmp 347opLat=1 348 349[system.cpu.fuPool.FUList5.opList04] 350type=OpDesc 351eventq_index=0 352issueLat=1 353opClass=SimdCvt 354opLat=1 355 356[system.cpu.fuPool.FUList5.opList05] 357type=OpDesc 358eventq_index=0 359issueLat=1 360opClass=SimdMisc 361opLat=1 362 363[system.cpu.fuPool.FUList5.opList06] 364type=OpDesc 365eventq_index=0 366issueLat=1 367opClass=SimdMult 368opLat=1 369 370[system.cpu.fuPool.FUList5.opList07] 371type=OpDesc 372eventq_index=0 373issueLat=1 374opClass=SimdMultAcc 375opLat=1 376 377[system.cpu.fuPool.FUList5.opList08] 378type=OpDesc 379eventq_index=0 380issueLat=1 381opClass=SimdShift 382opLat=1 383 384[system.cpu.fuPool.FUList5.opList09] 385type=OpDesc 386eventq_index=0 387issueLat=1 388opClass=SimdShiftAcc 389opLat=1 390 391[system.cpu.fuPool.FUList5.opList10] 392type=OpDesc 393eventq_index=0 394issueLat=1 395opClass=SimdSqrt 396opLat=1 397 398[system.cpu.fuPool.FUList5.opList11] 399type=OpDesc 400eventq_index=0 401issueLat=1 402opClass=SimdFloatAdd 403opLat=1 404 405[system.cpu.fuPool.FUList5.opList12] 406type=OpDesc 407eventq_index=0 408issueLat=1 409opClass=SimdFloatAlu 410opLat=1 411 412[system.cpu.fuPool.FUList5.opList13] 413type=OpDesc 414eventq_index=0 415issueLat=1 416opClass=SimdFloatCmp 417opLat=1 418 419[system.cpu.fuPool.FUList5.opList14] 420type=OpDesc 421eventq_index=0 422issueLat=1 423opClass=SimdFloatCvt 424opLat=1 425 426[system.cpu.fuPool.FUList5.opList15] 427type=OpDesc 428eventq_index=0 429issueLat=1 430opClass=SimdFloatDiv 431opLat=1 432 433[system.cpu.fuPool.FUList5.opList16] 434type=OpDesc 435eventq_index=0 436issueLat=1 437opClass=SimdFloatMisc 438opLat=1 439 440[system.cpu.fuPool.FUList5.opList17] 441type=OpDesc 442eventq_index=0 443issueLat=1 444opClass=SimdFloatMult 445opLat=1 446 447[system.cpu.fuPool.FUList5.opList18] 448type=OpDesc 449eventq_index=0 450issueLat=1 451opClass=SimdFloatMultAcc 452opLat=1 453 454[system.cpu.fuPool.FUList5.opList19] 455type=OpDesc 456eventq_index=0 457issueLat=1 458opClass=SimdFloatSqrt 459opLat=1 460 461[system.cpu.fuPool.FUList6] 462type=FUDesc 463children=opList 464count=0 465eventq_index=0 466opList=system.cpu.fuPool.FUList6.opList 467 468[system.cpu.fuPool.FUList6.opList] 469type=OpDesc 470eventq_index=0 471issueLat=1 472opClass=MemWrite 473opLat=1 474 475[system.cpu.fuPool.FUList7] 476type=FUDesc 477children=opList0 opList1 478count=4 479eventq_index=0 480opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 481 482[system.cpu.fuPool.FUList7.opList0] 483type=OpDesc 484eventq_index=0 485issueLat=1 486opClass=MemRead 487opLat=1 488 489[system.cpu.fuPool.FUList7.opList1] 490type=OpDesc 491eventq_index=0 492issueLat=1 493opClass=MemWrite 494opLat=1 495 496[system.cpu.fuPool.FUList8] 497type=FUDesc 498children=opList 499count=1 500eventq_index=0 501opList=system.cpu.fuPool.FUList8.opList 502 503[system.cpu.fuPool.FUList8.opList] 504type=OpDesc 505eventq_index=0 506issueLat=3 507opClass=IprAccess 508opLat=3 509 510[system.cpu.icache] 511type=BaseCache 512children=tags 513addr_ranges=0:18446744073709551615 514assoc=2 515clk_domain=system.cpu_clk_domain 516eventq_index=0 517forward_snoops=true 518hit_latency=2 519is_top_level=true 520max_miss_count=0 521mshrs=4 522prefetch_on_access=false 523prefetcher=Null 524response_latency=2 525sequential_access=false 526size=131072 527system=system 528tags=system.cpu.icache.tags 529tgts_per_mshr=20 530two_queue=false 531write_buffers=8 532cpu_side=system.cpu.icache_port 533mem_side=system.cpu.toL2Bus.slave[0] 534 535[system.cpu.icache.tags] 536type=LRU 537assoc=2 538block_size=64 539clk_domain=system.cpu_clk_domain 540eventq_index=0 541hit_latency=2 542sequential_access=false 543size=131072 544 545[system.cpu.interrupts] 546type=X86LocalApic 547clk_domain=system.cpu.apic_clk_domain 548eventq_index=0 549int_latency=1000 550pio_addr=2305843009213693952 551pio_latency=100000 552system=system 553int_master=system.membus.slave[2] 554int_slave=system.membus.master[2] 555pio=system.membus.master[1] 556 557[system.cpu.isa] 558type=X86ISA 559eventq_index=0 560 561[system.cpu.itb] 562type=X86TLB 563children=walker 564eventq_index=0 565size=64 566walker=system.cpu.itb.walker 567 568[system.cpu.itb.walker] 569type=X86PagetableWalker 570clk_domain=system.cpu_clk_domain 571eventq_index=0 572num_squash_per_cycle=4 573system=system 574port=system.cpu.toL2Bus.slave[2] 575 576[system.cpu.l2cache] 577type=BaseCache 578children=tags 579addr_ranges=0:18446744073709551615 580assoc=8 581clk_domain=system.cpu_clk_domain 582eventq_index=0 583forward_snoops=true 584hit_latency=20 585is_top_level=false 586max_miss_count=0 587mshrs=20 588prefetch_on_access=false 589prefetcher=Null 590response_latency=20 591sequential_access=false 592size=2097152 593system=system 594tags=system.cpu.l2cache.tags 595tgts_per_mshr=12 596two_queue=false 597write_buffers=8 598cpu_side=system.cpu.toL2Bus.master[0] 599mem_side=system.membus.slave[1] 600 601[system.cpu.l2cache.tags] 602type=LRU 603assoc=8 604block_size=64 605clk_domain=system.cpu_clk_domain 606eventq_index=0 607hit_latency=20 608sequential_access=false 609size=2097152 610 611[system.cpu.toL2Bus] 612type=CoherentBus 613clk_domain=system.cpu_clk_domain 614eventq_index=0 615header_cycles=1 616system=system 617use_default_range=false 618width=32 619master=system.cpu.l2cache.cpu_side 620slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 621 622[system.cpu.tracer] 623type=ExeTracer 624eventq_index=0 625 626[system.cpu.workload] 627type=LiveProcess 628cmd=mcf mcf.in 629cwd=build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing 630egid=100 631env= 632errout=cerr 633euid=100 634eventq_index=0	120squashWidth=8 121store_set_clear_period=250000 122switched_out=false 123system=system 124tracer=system.cpu.tracer 125trapLatency=13 126wbDepth=1 127wbWidth=8 128workload=system.cpu.workload 129dcache_port=system.cpu.dcache.cpu_side 130icache_port=system.cpu.icache.cpu_side 131 132[system.cpu.apic_clk_domain] 133type=DerivedClockDomain 134clk_divider=16 135clk_domain=system.cpu_clk_domain 136eventq_index=0 137 138[system.cpu.branchPred] 139type=BranchPredictor 140BTBEntries=4096 141BTBTagSize=16 142RASSize=16 143choiceCtrBits=2 144choicePredictorSize=8192 145eventq_index=0 146globalCtrBits=2 147globalPredictorSize=8192 148instShiftAmt=2 149localCtrBits=2 150localHistoryTableSize=2048 151localPredictorSize=2048 152numThreads=1 153predType=tournament 154 155[system.cpu.dcache] 156type=BaseCache 157children=tags 158addr_ranges=0:18446744073709551615 159assoc=2 160clk_domain=system.cpu_clk_domain 161eventq_index=0 162forward_snoops=true 163hit_latency=2 164is_top_level=true 165max_miss_count=0 166mshrs=4 167prefetch_on_access=false 168prefetcher=Null 169response_latency=2 170sequential_access=false 171size=262144 172system=system 173tags=system.cpu.dcache.tags 174tgts_per_mshr=20 175two_queue=false 176write_buffers=8 177cpu_side=system.cpu.dcache_port 178mem_side=system.cpu.toL2Bus.slave[1] 179 180[system.cpu.dcache.tags] 181type=LRU 182assoc=2 183block_size=64 184clk_domain=system.cpu_clk_domain 185eventq_index=0 186hit_latency=2 187sequential_access=false 188size=262144 189 190[system.cpu.dtb] 191type=X86TLB 192children=walker 193eventq_index=0 194size=64 195walker=system.cpu.dtb.walker 196 197[system.cpu.dtb.walker] 198type=X86PagetableWalker 199clk_domain=system.cpu_clk_domain 200eventq_index=0 201num_squash_per_cycle=4 202system=system 203port=system.cpu.toL2Bus.slave[3] 204 205[system.cpu.fuPool] 206type=FUPool 207children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 208FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 209eventq_index=0 210 211[system.cpu.fuPool.FUList0] 212type=FUDesc 213children=opList 214count=6 215eventq_index=0 216opList=system.cpu.fuPool.FUList0.opList 217 218[system.cpu.fuPool.FUList0.opList] 219type=OpDesc 220eventq_index=0 221issueLat=1 222opClass=IntAlu 223opLat=1 224 225[system.cpu.fuPool.FUList1] 226type=FUDesc 227children=opList0 opList1 228count=2 229eventq_index=0 230opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 231 232[system.cpu.fuPool.FUList1.opList0] 233type=OpDesc 234eventq_index=0 235issueLat=1 236opClass=IntMult 237opLat=3 238 239[system.cpu.fuPool.FUList1.opList1] 240type=OpDesc 241eventq_index=0 242issueLat=19 243opClass=IntDiv 244opLat=20 245 246[system.cpu.fuPool.FUList2] 247type=FUDesc 248children=opList0 opList1 opList2 249count=4 250eventq_index=0 251opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 252 253[system.cpu.fuPool.FUList2.opList0] 254type=OpDesc 255eventq_index=0 256issueLat=1 257opClass=FloatAdd 258opLat=2 259 260[system.cpu.fuPool.FUList2.opList1] 261type=OpDesc 262eventq_index=0 263issueLat=1 264opClass=FloatCmp 265opLat=2 266 267[system.cpu.fuPool.FUList2.opList2] 268type=OpDesc 269eventq_index=0 270issueLat=1 271opClass=FloatCvt 272opLat=2 273 274[system.cpu.fuPool.FUList3] 275type=FUDesc 276children=opList0 opList1 opList2 277count=2 278eventq_index=0 279opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 280 281[system.cpu.fuPool.FUList3.opList0] 282type=OpDesc 283eventq_index=0 284issueLat=1 285opClass=FloatMult 286opLat=4 287 288[system.cpu.fuPool.FUList3.opList1] 289type=OpDesc 290eventq_index=0 291issueLat=12 292opClass=FloatDiv 293opLat=12 294 295[system.cpu.fuPool.FUList3.opList2] 296type=OpDesc 297eventq_index=0 298issueLat=24 299opClass=FloatSqrt 300opLat=24 301 302[system.cpu.fuPool.FUList4] 303type=FUDesc 304children=opList 305count=0 306eventq_index=0 307opList=system.cpu.fuPool.FUList4.opList 308 309[system.cpu.fuPool.FUList4.opList] 310type=OpDesc 311eventq_index=0 312issueLat=1 313opClass=MemRead 314opLat=1 315 316[system.cpu.fuPool.FUList5] 317type=FUDesc 318children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 319count=4 320eventq_index=0 321opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 322 323[system.cpu.fuPool.FUList5.opList00] 324type=OpDesc 325eventq_index=0 326issueLat=1 327opClass=SimdAdd 328opLat=1 329 330[system.cpu.fuPool.FUList5.opList01] 331type=OpDesc 332eventq_index=0 333issueLat=1 334opClass=SimdAddAcc 335opLat=1 336 337[system.cpu.fuPool.FUList5.opList02] 338type=OpDesc 339eventq_index=0 340issueLat=1 341opClass=SimdAlu 342opLat=1 343 344[system.cpu.fuPool.FUList5.opList03] 345type=OpDesc 346eventq_index=0 347issueLat=1 348opClass=SimdCmp 349opLat=1 350 351[system.cpu.fuPool.FUList5.opList04] 352type=OpDesc 353eventq_index=0 354issueLat=1 355opClass=SimdCvt 356opLat=1 357 358[system.cpu.fuPool.FUList5.opList05] 359type=OpDesc 360eventq_index=0 361issueLat=1 362opClass=SimdMisc 363opLat=1 364 365[system.cpu.fuPool.FUList5.opList06] 366type=OpDesc 367eventq_index=0 368issueLat=1 369opClass=SimdMult 370opLat=1 371 372[system.cpu.fuPool.FUList5.opList07] 373type=OpDesc 374eventq_index=0 375issueLat=1 376opClass=SimdMultAcc 377opLat=1 378 379[system.cpu.fuPool.FUList5.opList08] 380type=OpDesc 381eventq_index=0 382issueLat=1 383opClass=SimdShift 384opLat=1 385 386[system.cpu.fuPool.FUList5.opList09] 387type=OpDesc 388eventq_index=0 389issueLat=1 390opClass=SimdShiftAcc 391opLat=1 392 393[system.cpu.fuPool.FUList5.opList10] 394type=OpDesc 395eventq_index=0 396issueLat=1 397opClass=SimdSqrt 398opLat=1 399 400[system.cpu.fuPool.FUList5.opList11] 401type=OpDesc 402eventq_index=0 403issueLat=1 404opClass=SimdFloatAdd 405opLat=1 406 407[system.cpu.fuPool.FUList5.opList12] 408type=OpDesc 409eventq_index=0 410issueLat=1 411opClass=SimdFloatAlu 412opLat=1 413 414[system.cpu.fuPool.FUList5.opList13] 415type=OpDesc 416eventq_index=0 417issueLat=1 418opClass=SimdFloatCmp 419opLat=1 420 421[system.cpu.fuPool.FUList5.opList14] 422type=OpDesc 423eventq_index=0 424issueLat=1 425opClass=SimdFloatCvt 426opLat=1 427 428[system.cpu.fuPool.FUList5.opList15] 429type=OpDesc 430eventq_index=0 431issueLat=1 432opClass=SimdFloatDiv 433opLat=1 434 435[system.cpu.fuPool.FUList5.opList16] 436type=OpDesc 437eventq_index=0 438issueLat=1 439opClass=SimdFloatMisc 440opLat=1 441 442[system.cpu.fuPool.FUList5.opList17] 443type=OpDesc 444eventq_index=0 445issueLat=1 446opClass=SimdFloatMult 447opLat=1 448 449[system.cpu.fuPool.FUList5.opList18] 450type=OpDesc 451eventq_index=0 452issueLat=1 453opClass=SimdFloatMultAcc 454opLat=1 455 456[system.cpu.fuPool.FUList5.opList19] 457type=OpDesc 458eventq_index=0 459issueLat=1 460opClass=SimdFloatSqrt 461opLat=1 462 463[system.cpu.fuPool.FUList6] 464type=FUDesc 465children=opList 466count=0 467eventq_index=0 468opList=system.cpu.fuPool.FUList6.opList 469 470[system.cpu.fuPool.FUList6.opList] 471type=OpDesc 472eventq_index=0 473issueLat=1 474opClass=MemWrite 475opLat=1 476 477[system.cpu.fuPool.FUList7] 478type=FUDesc 479children=opList0 opList1 480count=4 481eventq_index=0 482opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 483 484[system.cpu.fuPool.FUList7.opList0] 485type=OpDesc 486eventq_index=0 487issueLat=1 488opClass=MemRead 489opLat=1 490 491[system.cpu.fuPool.FUList7.opList1] 492type=OpDesc 493eventq_index=0 494issueLat=1 495opClass=MemWrite 496opLat=1 497 498[system.cpu.fuPool.FUList8] 499type=FUDesc 500children=opList 501count=1 502eventq_index=0 503opList=system.cpu.fuPool.FUList8.opList 504 505[system.cpu.fuPool.FUList8.opList] 506type=OpDesc 507eventq_index=0 508issueLat=3 509opClass=IprAccess 510opLat=3 511 512[system.cpu.icache] 513type=BaseCache 514children=tags 515addr_ranges=0:18446744073709551615 516assoc=2 517clk_domain=system.cpu_clk_domain 518eventq_index=0 519forward_snoops=true 520hit_latency=2 521is_top_level=true 522max_miss_count=0 523mshrs=4 524prefetch_on_access=false 525prefetcher=Null 526response_latency=2 527sequential_access=false 528size=131072 529system=system 530tags=system.cpu.icache.tags 531tgts_per_mshr=20 532two_queue=false 533write_buffers=8 534cpu_side=system.cpu.icache_port 535mem_side=system.cpu.toL2Bus.slave[0] 536 537[system.cpu.icache.tags] 538type=LRU 539assoc=2 540block_size=64 541clk_domain=system.cpu_clk_domain 542eventq_index=0 543hit_latency=2 544sequential_access=false 545size=131072 546 547[system.cpu.interrupts] 548type=X86LocalApic 549clk_domain=system.cpu.apic_clk_domain 550eventq_index=0 551int_latency=1000 552pio_addr=2305843009213693952 553pio_latency=100000 554system=system 555int_master=system.membus.slave[2] 556int_slave=system.membus.master[2] 557pio=system.membus.master[1] 558 559[system.cpu.isa] 560type=X86ISA 561eventq_index=0 562 563[system.cpu.itb] 564type=X86TLB 565children=walker 566eventq_index=0 567size=64 568walker=system.cpu.itb.walker 569 570[system.cpu.itb.walker] 571type=X86PagetableWalker 572clk_domain=system.cpu_clk_domain 573eventq_index=0 574num_squash_per_cycle=4 575system=system 576port=system.cpu.toL2Bus.slave[2] 577 578[system.cpu.l2cache] 579type=BaseCache 580children=tags 581addr_ranges=0:18446744073709551615 582assoc=8 583clk_domain=system.cpu_clk_domain 584eventq_index=0 585forward_snoops=true 586hit_latency=20 587is_top_level=false 588max_miss_count=0 589mshrs=20 590prefetch_on_access=false 591prefetcher=Null 592response_latency=20 593sequential_access=false 594size=2097152 595system=system 596tags=system.cpu.l2cache.tags 597tgts_per_mshr=12 598two_queue=false 599write_buffers=8 600cpu_side=system.cpu.toL2Bus.master[0] 601mem_side=system.membus.slave[1] 602 603[system.cpu.l2cache.tags] 604type=LRU 605assoc=8 606block_size=64 607clk_domain=system.cpu_clk_domain 608eventq_index=0 609hit_latency=20 610sequential_access=false 611size=2097152 612 613[system.cpu.toL2Bus] 614type=CoherentBus 615clk_domain=system.cpu_clk_domain 616eventq_index=0 617header_cycles=1 618system=system 619use_default_range=false 620width=32 621master=system.cpu.l2cache.cpu_side 622slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 623 624[system.cpu.tracer] 625type=ExeTracer 626eventq_index=0 627 628[system.cpu.workload] 629type=LiveProcess 630cmd=mcf mcf.in 631cwd=build/X86/tests/opt/long/se/10.mcf/x86/linux/o3-timing 632egid=100 633env= 634errout=cerr 635euid=100 636eventq_index=0
635executable=/dist/cpu2000/binaries/x86/linux/mcf	637executable=/home/stever/m5/dist/cpu2000/binaries/x86/linux/mcf
636gid=100	638gid=100
637input=/dist/cpu2000/data/mcf/smred/input/mcf.in	639input=/home/stever/m5/dist/cpu2000/data/mcf/smred/input/mcf.in
638max_stack_size=67108864 639output=cout 640pid=100 641ppid=99 642simpoint=55300000000 643system=system 644uid=100 645 646[system.cpu_clk_domain] 647type=SrcClockDomain 648clock=500 649eventq_index=0 650voltage_domain=system.voltage_domain 651 652[system.membus] 653type=CoherentBus 654clk_domain=system.clk_domain 655eventq_index=0 656header_cycles=1 657system=system 658use_default_range=false 659width=8 660master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave 661slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master 662 663[system.physmem]	640max_stack_size=67108864 641output=cout 642pid=100 643ppid=99 644simpoint=55300000000 645system=system 646uid=100 647 648[system.cpu_clk_domain] 649type=SrcClockDomain 650clock=500 651eventq_index=0 652voltage_domain=system.voltage_domain 653 654[system.membus] 655type=CoherentBus 656clk_domain=system.clk_domain 657eventq_index=0 658header_cycles=1 659system=system 660use_default_range=false 661width=8 662master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave 663slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master 664 665[system.physmem]
664type=SimpleDRAM	666type=DRAMCtrl
665activation_limit=4	667activation_limit=4
666addr_mapping=RaBaChCo	668addr_mapping=RoRaBaChCo
667banks_per_rank=8 668burst_length=8 669channels=1 670clk_domain=system.clk_domain 671conf_table_reported=true 672device_bus_width=8 673device_rowbuffer_size=1024 674devices_per_rank=8 675eventq_index=0 676in_addr_map=true	669banks_per_rank=8 670burst_length=8 671channels=1 672clk_domain=system.clk_domain 673conf_table_reported=true 674device_bus_width=8 675device_rowbuffer_size=1024 676devices_per_rank=8 677eventq_index=0 678in_addr_map=true
	679max_accesses_per_row=16
677mem_sched_policy=frfcfs	680mem_sched_policy=frfcfs
	681min_writes_per_switch=16
678null=false	682null=false
679page_policy=open	683page_policy=open_adaptive
680range=0:268435455 681ranks_per_channel=2 682read_buffer_size=32 683static_backend_latency=10000 684static_frontend_latency=10000 685tBURST=5000	684range=0:268435455 685ranks_per_channel=2 686read_buffer_size=32 687static_backend_latency=10000 688static_frontend_latency=10000 689tBURST=5000
	690tCK=1250
686tCL=13750 687tRAS=35000 688tRCD=13750 689tREFI=7800000	691tCL=13750 692tRAS=35000 693tRCD=13750 694tREFI=7800000
690tRFC=300000	695tRFC=260000
691tRP=13750	696tRP=13750
692tRRD=6250	697tRRD=6000 698tRTP=7500 699tRTW=2500 700tWR=15000
693tWTR=7500	701tWTR=7500
694tXAW=40000 695write_buffer_size=32 696write_high_thresh_perc=70 697write_low_thresh_perc=0	702tXAW=30000 703write_buffer_size=64 704write_high_thresh_perc=85 705write_low_thresh_perc=50
698port=system.membus.master[0] 699 700[system.voltage_domain] 701type=VoltageDomain 702eventq_index=0 703voltage=1.000000 704	706port=system.membus.master[0] 707 708[system.voltage_domain] 709type=VoltageDomain 710eventq_index=0 711voltage=1.000000 712