stats.txt (11860:67dee11badea) | stats.txt (11955:1170d039b31e) |
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1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.058521 # Number of seconds simulated 4sim_ticks 58521086000 # Number of ticks simulated 5final_tick 58521086000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 243648 # Simulator instruction rate (inst/s) 8host_op_rate 244862 # Simulator op (including micro ops) rate (op/s) --- 408 unchanged lines hidden (view full) --- 417system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions 418system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions 419system.cpu.itb.read_accesses 0 # DTB read accesses 420system.cpu.itb.write_accesses 0 # DTB write accesses 421system.cpu.itb.inst_accesses 0 # ITB inst accesses 422system.cpu.itb.hits 0 # DTB hits 423system.cpu.itb.misses 0 # DTB misses 424system.cpu.itb.accesses 0 # DTB accesses | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.058521 # Number of seconds simulated 4sim_ticks 58521086000 # Number of ticks simulated 5final_tick 58521086000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 243648 # Simulator instruction rate (inst/s) 8host_op_rate 244862 # Simulator op (including micro ops) rate (op/s) --- 408 unchanged lines hidden (view full) --- 417system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions 418system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions 419system.cpu.itb.read_accesses 0 # DTB read accesses 420system.cpu.itb.write_accesses 0 # DTB write accesses 421system.cpu.itb.inst_accesses 0 # ITB inst accesses 422system.cpu.itb.hits 0 # DTB hits 423system.cpu.itb.misses 0 # DTB misses 424system.cpu.itb.accesses 0 # DTB accesses |
425system.cpu.workload.num_syscalls 442 # Number of system calls | 425system.cpu.workload.numSyscalls 442 # Number of system calls |
426system.cpu.pwrStateResidencyTicks::ON 58521086000 # Cumulative time (in ticks) in various power states 427system.cpu.numCycles 117042173 # number of cpu cycles simulated 428system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 429system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 430system.cpu.fetch.icacheStallCycles 755365 # Number of cycles fetch is stalled on an Icache miss 431system.cpu.fetch.Insts 134380549 # Number of instructions fetch has processed 432system.cpu.fetch.Branches 28121660 # Number of branches that fetch encountered 433system.cpu.fetch.predictedBranches 11736933 # Number of branches that fetch has predicted taken --- 829 unchanged lines hidden --- | 426system.cpu.pwrStateResidencyTicks::ON 58521086000 # Cumulative time (in ticks) in various power states 427system.cpu.numCycles 117042173 # number of cpu cycles simulated 428system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 429system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 430system.cpu.fetch.icacheStallCycles 755365 # Number of cycles fetch is stalled on an Icache miss 431system.cpu.fetch.Insts 134380549 # Number of instructions fetch has processed 432system.cpu.fetch.Branches 28121660 # Number of branches that fetch encountered 433system.cpu.fetch.predictedBranches 11736933 # Number of branches that fetch has predicted taken --- 829 unchanged lines hidden --- |