stats.txt (11680:b4d943429dc6) | stats.txt (11687:b3d5f0e9e258) |
---|---|
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.058675 # Number of seconds simulated 4sim_ticks 58675371500 # Number of ticks simulated 5final_tick 58675371500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.058675 # Number of seconds simulated 4sim_ticks 58675371500 # Number of ticks simulated 5final_tick 58675371500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
7host_inst_rate 111966 # Simulator instruction rate (inst/s) 8host_op_rate 112523 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 72520515 # Simulator tick rate (ticks/s) 10host_mem_usage 490592 # Number of bytes of host memory used 11host_seconds 809.09 # Real time elapsed on the host | 7host_inst_rate 241655 # Simulator instruction rate (inst/s) 8host_op_rate 242858 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 156520643 # Simulator tick rate (ticks/s) 10host_mem_usage 492304 # Number of bytes of host memory used 11host_seconds 374.87 # Real time elapsed on the host |
12sim_insts 90589799 # Number of instructions simulated 13sim_ops 91041030 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 58675371500 # Cumulative time (in ticks) in various power states 17system.physmem.bytes_read::cpu.inst 44736 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 218240 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu.l2cache.prefetcher 923072 # Number of bytes read from this memory --- 490 unchanged lines hidden (view full) --- 510system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available 511system.cpu.iq.fu_full::IntAlu 9783493 48.67% 48.67% # attempts to use FU when none available 512system.cpu.iq.fu_full::IntMult 50 0.00% 48.67% # attempts to use FU when none available 513system.cpu.iq.fu_full::IntDiv 0 0.00% 48.67% # attempts to use FU when none available 514system.cpu.iq.fu_full::FloatAdd 0 0.00% 48.67% # attempts to use FU when none available 515system.cpu.iq.fu_full::FloatCmp 0 0.00% 48.67% # attempts to use FU when none available 516system.cpu.iq.fu_full::FloatCvt 0 0.00% 48.67% # attempts to use FU when none available 517system.cpu.iq.fu_full::FloatMult 0 0.00% 48.67% # attempts to use FU when none available | 12sim_insts 90589799 # Number of instructions simulated 13sim_ops 91041030 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 58675371500 # Cumulative time (in ticks) in various power states 17system.physmem.bytes_read::cpu.inst 44736 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 218240 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu.l2cache.prefetcher 923072 # Number of bytes read from this memory --- 490 unchanged lines hidden (view full) --- 510system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available 511system.cpu.iq.fu_full::IntAlu 9783493 48.67% 48.67% # attempts to use FU when none available 512system.cpu.iq.fu_full::IntMult 50 0.00% 48.67% # attempts to use FU when none available 513system.cpu.iq.fu_full::IntDiv 0 0.00% 48.67% # attempts to use FU when none available 514system.cpu.iq.fu_full::FloatAdd 0 0.00% 48.67% # attempts to use FU when none available 515system.cpu.iq.fu_full::FloatCmp 0 0.00% 48.67% # attempts to use FU when none available 516system.cpu.iq.fu_full::FloatCvt 0 0.00% 48.67% # attempts to use FU when none available 517system.cpu.iq.fu_full::FloatMult 0 0.00% 48.67% # attempts to use FU when none available |
518system.cpu.iq.fu_full::FloatMultAcc 0 0.00% 48.67% # attempts to use FU when none available |
|
518system.cpu.iq.fu_full::FloatDiv 0 0.00% 48.67% # attempts to use FU when none available | 519system.cpu.iq.fu_full::FloatDiv 0 0.00% 48.67% # attempts to use FU when none available |
520system.cpu.iq.fu_full::FloatMisc 0 0.00% 48.67% # attempts to use FU when none available |
|
519system.cpu.iq.fu_full::FloatSqrt 0 0.00% 48.67% # attempts to use FU when none available 520system.cpu.iq.fu_full::SimdAdd 0 0.00% 48.67% # attempts to use FU when none available 521system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 48.67% # attempts to use FU when none available 522system.cpu.iq.fu_full::SimdAlu 0 0.00% 48.67% # attempts to use FU when none available 523system.cpu.iq.fu_full::SimdCmp 0 0.00% 48.67% # attempts to use FU when none available 524system.cpu.iq.fu_full::SimdCvt 0 0.00% 48.67% # attempts to use FU when none available 525system.cpu.iq.fu_full::SimdMisc 0 0.00% 48.67% # attempts to use FU when none available 526system.cpu.iq.fu_full::SimdMult 0 0.00% 48.67% # attempts to use FU when none available --- 5 unchanged lines hidden (view full) --- 532system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 48.67% # attempts to use FU when none available 533system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 48.67% # attempts to use FU when none available 534system.cpu.iq.fu_full::SimdFloatCvt 13 0.00% 48.67% # attempts to use FU when none available 535system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 48.67% # attempts to use FU when none available 536system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 48.67% # attempts to use FU when none available 537system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 48.67% # attempts to use FU when none available 538system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 48.67% # attempts to use FU when none available 539system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 48.67% # attempts to use FU when none available | 521system.cpu.iq.fu_full::FloatSqrt 0 0.00% 48.67% # attempts to use FU when none available 522system.cpu.iq.fu_full::SimdAdd 0 0.00% 48.67% # attempts to use FU when none available 523system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 48.67% # attempts to use FU when none available 524system.cpu.iq.fu_full::SimdAlu 0 0.00% 48.67% # attempts to use FU when none available 525system.cpu.iq.fu_full::SimdCmp 0 0.00% 48.67% # attempts to use FU when none available 526system.cpu.iq.fu_full::SimdCvt 0 0.00% 48.67% # attempts to use FU when none available 527system.cpu.iq.fu_full::SimdMisc 0 0.00% 48.67% # attempts to use FU when none available 528system.cpu.iq.fu_full::SimdMult 0 0.00% 48.67% # attempts to use FU when none available --- 5 unchanged lines hidden (view full) --- 534system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 48.67% # attempts to use FU when none available 535system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 48.67% # attempts to use FU when none available 536system.cpu.iq.fu_full::SimdFloatCvt 13 0.00% 48.67% # attempts to use FU when none available 537system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 48.67% # attempts to use FU when none available 538system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 48.67% # attempts to use FU when none available 539system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 48.67% # attempts to use FU when none available 540system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 48.67% # attempts to use FU when none available 541system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 48.67% # attempts to use FU when none available |
540system.cpu.iq.fu_full::MemRead 9615894 47.83% 96.50% # attempts to use FU when none available 541system.cpu.iq.fu_full::MemWrite 702925 3.50% 100.00% # attempts to use FU when none available | 542system.cpu.iq.fu_full::MemRead 9615891 47.83% 96.50% # attempts to use FU when none available 543system.cpu.iq.fu_full::MemWrite 702910 3.50% 100.00% # attempts to use FU when none available 544system.cpu.iq.fu_full::FloatMemRead 3 0.00% 100.00% # attempts to use FU when none available 545system.cpu.iq.fu_full::FloatMemWrite 24 0.00% 100.00% # attempts to use FU when none available |
542system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available 543system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available 544system.cpu.iq.FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued 545system.cpu.iq.FU_type_0::IntAlu 71970995 71.00% 71.00% # Type of FU issued 546system.cpu.iq.FU_type_0::IntMult 10697 0.01% 71.01% # Type of FU issued 547system.cpu.iq.FU_type_0::IntDiv 0 0.00% 71.01% # Type of FU issued 548system.cpu.iq.FU_type_0::FloatAdd 0 0.00% 71.01% # Type of FU issued 549system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 71.01% # Type of FU issued 550system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 71.01% # Type of FU issued 551system.cpu.iq.FU_type_0::FloatMult 0 0.00% 71.01% # Type of FU issued | 546system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available 547system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available 548system.cpu.iq.FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued 549system.cpu.iq.FU_type_0::IntAlu 71970995 71.00% 71.00% # Type of FU issued 550system.cpu.iq.FU_type_0::IntMult 10697 0.01% 71.01% # Type of FU issued 551system.cpu.iq.FU_type_0::IntDiv 0 0.00% 71.01% # Type of FU issued 552system.cpu.iq.FU_type_0::FloatAdd 0 0.00% 71.01% # Type of FU issued 553system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 71.01% # Type of FU issued 554system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 71.01% # Type of FU issued 555system.cpu.iq.FU_type_0::FloatMult 0 0.00% 71.01% # Type of FU issued |
556system.cpu.iq.FU_type_0::FloatMultAcc 0 0.00% 71.01% # Type of FU issued |
|
552system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 71.01% # Type of FU issued | 557system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 71.01% # Type of FU issued |
558system.cpu.iq.FU_type_0::FloatMisc 0 0.00% 71.01% # Type of FU issued |
|
553system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 71.01% # Type of FU issued 554system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 71.01% # Type of FU issued 555system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 71.01% # Type of FU issued 556system.cpu.iq.FU_type_0::SimdAlu 0 0.00% 71.01% # Type of FU issued 557system.cpu.iq.FU_type_0::SimdCmp 0 0.00% 71.01% # Type of FU issued 558system.cpu.iq.FU_type_0::SimdCvt 0 0.00% 71.01% # Type of FU issued 559system.cpu.iq.FU_type_0::SimdMisc 0 0.00% 71.01% # Type of FU issued 560system.cpu.iq.FU_type_0::SimdMult 0 0.00% 71.01% # Type of FU issued --- 5 unchanged lines hidden (view full) --- 566system.cpu.iq.FU_type_0::SimdFloatAlu 0 0.00% 71.01% # Type of FU issued 567system.cpu.iq.FU_type_0::SimdFloatCmp 2 0.00% 71.01% # Type of FU issued 568system.cpu.iq.FU_type_0::SimdFloatCvt 54 0.00% 71.01% # Type of FU issued 569system.cpu.iq.FU_type_0::SimdFloatDiv 0 0.00% 71.01% # Type of FU issued 570system.cpu.iq.FU_type_0::SimdFloatMisc 124 0.00% 71.01% # Type of FU issued 571system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 71.01% # Type of FU issued 572system.cpu.iq.FU_type_0::SimdFloatMultAcc 2 0.00% 71.01% # Type of FU issued 573system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 71.01% # Type of FU issued | 559system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 71.01% # Type of FU issued 560system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 71.01% # Type of FU issued 561system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 71.01% # Type of FU issued 562system.cpu.iq.FU_type_0::SimdAlu 0 0.00% 71.01% # Type of FU issued 563system.cpu.iq.FU_type_0::SimdCmp 0 0.00% 71.01% # Type of FU issued 564system.cpu.iq.FU_type_0::SimdCvt 0 0.00% 71.01% # Type of FU issued 565system.cpu.iq.FU_type_0::SimdMisc 0 0.00% 71.01% # Type of FU issued 566system.cpu.iq.FU_type_0::SimdMult 0 0.00% 71.01% # Type of FU issued --- 5 unchanged lines hidden (view full) --- 572system.cpu.iq.FU_type_0::SimdFloatAlu 0 0.00% 71.01% # Type of FU issued 573system.cpu.iq.FU_type_0::SimdFloatCmp 2 0.00% 71.01% # Type of FU issued 574system.cpu.iq.FU_type_0::SimdFloatCvt 54 0.00% 71.01% # Type of FU issued 575system.cpu.iq.FU_type_0::SimdFloatDiv 0 0.00% 71.01% # Type of FU issued 576system.cpu.iq.FU_type_0::SimdFloatMisc 124 0.00% 71.01% # Type of FU issued 577system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 71.01% # Type of FU issued 578system.cpu.iq.FU_type_0::SimdFloatMultAcc 2 0.00% 71.01% # Type of FU issued 579system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 71.01% # Type of FU issued |
574system.cpu.iq.FU_type_0::MemRead 24337772 24.01% 95.02% # Type of FU issued 575system.cpu.iq.FU_type_0::MemWrite 5047242 4.98% 100.00% # Type of FU issued | 580system.cpu.iq.FU_type_0::MemRead 24337764 24.01% 95.02% # Type of FU issued 581system.cpu.iq.FU_type_0::MemWrite 5047220 4.98% 100.00% # Type of FU issued 582system.cpu.iq.FU_type_0::FloatMemRead 8 0.00% 100.00% # Type of FU issued 583system.cpu.iq.FU_type_0::FloatMemWrite 22 0.00% 100.00% # Type of FU issued |
576system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued 577system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued 578system.cpu.iq.FU_type_0::total 101366888 # Type of FU issued 579system.cpu.iq.rate 0.863794 # Inst issue rate | 584system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued 585system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued 586system.cpu.iq.FU_type_0::total 101366888 # Type of FU issued 587system.cpu.iq.rate 0.863794 # Inst issue rate |
580system.cpu.iq.fu_busy_cnt 20102375 # FU busy when requested | 588system.cpu.iq.fu_busy_cnt 20102384 # FU busy when requested |
581system.cpu.iq.fu_busy_rate 0.198313 # FU busy rate (busy events/executed inst) 582system.cpu.iq.int_inst_queue_reads 341195448 # Number of integer instruction queue reads 583system.cpu.iq.int_inst_queue_writes 128311397 # Number of integer instruction queue writes 584system.cpu.iq.int_inst_queue_wakeup_accesses 99608403 # Number of integer instruction queue wakeup accesses | 589system.cpu.iq.fu_busy_rate 0.198313 # FU busy rate (busy events/executed inst) 590system.cpu.iq.int_inst_queue_reads 341195448 # Number of integer instruction queue reads 591system.cpu.iq.int_inst_queue_writes 128311397 # Number of integer instruction queue writes 592system.cpu.iq.int_inst_queue_wakeup_accesses 99608403 # Number of integer instruction queue wakeup accesses |
585system.cpu.iq.fp_inst_queue_reads 458 # Number of floating instruction queue reads | 593system.cpu.iq.fp_inst_queue_reads 467 # Number of floating instruction queue reads |
586system.cpu.iq.fp_inst_queue_writes 626 # Number of floating instruction queue writes 587system.cpu.iq.fp_inst_queue_wakeup_accesses 113 # Number of floating instruction queue wakeup accesses 588system.cpu.iq.int_alu_accesses 121469025 # Number of integer alu accesses | 594system.cpu.iq.fp_inst_queue_writes 626 # Number of floating instruction queue writes 595system.cpu.iq.fp_inst_queue_wakeup_accesses 113 # Number of floating instruction queue wakeup accesses 596system.cpu.iq.int_alu_accesses 121469025 # Number of integer alu accesses |
589system.cpu.iq.fp_alu_accesses 238 # Number of floating point alu accesses | 597system.cpu.iq.fp_alu_accesses 247 # Number of floating point alu accesses |
590system.cpu.iew.lsq.thread0.forwLoads 288057 # Number of loads that had data forwarded from stores 591system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address 592system.cpu.iew.lsq.thread0.squashedLoads 4329351 # Number of loads squashed 593system.cpu.iew.lsq.thread0.ignoredResponses 1498 # Number of memory responses ignored because the instruction is squashed 594system.cpu.iew.lsq.thread0.memOrderViolation 1351 # Number of memory ordering violations 595system.cpu.iew.lsq.thread0.squashedStores 602476 # Number of stores squashed 596system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address 597system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding --- 62 unchanged lines hidden (view full) --- 660system.cpu.commit.op_class_0::No_OpClass 0 0.00% 0.00% # Class of committed instruction 661system.cpu.commit.op_class_0::IntAlu 63822387 70.09% 70.09% # Class of committed instruction 662system.cpu.commit.op_class_0::IntMult 10474 0.01% 70.10% # Class of committed instruction 663system.cpu.commit.op_class_0::IntDiv 0 0.00% 70.10% # Class of committed instruction 664system.cpu.commit.op_class_0::FloatAdd 0 0.00% 70.10% # Class of committed instruction 665system.cpu.commit.op_class_0::FloatCmp 0 0.00% 70.10% # Class of committed instruction 666system.cpu.commit.op_class_0::FloatCvt 0 0.00% 70.10% # Class of committed instruction 667system.cpu.commit.op_class_0::FloatMult 0 0.00% 70.10% # Class of committed instruction | 598system.cpu.iew.lsq.thread0.forwLoads 288057 # Number of loads that had data forwarded from stores 599system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address 600system.cpu.iew.lsq.thread0.squashedLoads 4329351 # Number of loads squashed 601system.cpu.iew.lsq.thread0.ignoredResponses 1498 # Number of memory responses ignored because the instruction is squashed 602system.cpu.iew.lsq.thread0.memOrderViolation 1351 # Number of memory ordering violations 603system.cpu.iew.lsq.thread0.squashedStores 602476 # Number of stores squashed 604system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address 605system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding --- 62 unchanged lines hidden (view full) --- 668system.cpu.commit.op_class_0::No_OpClass 0 0.00% 0.00% # Class of committed instruction 669system.cpu.commit.op_class_0::IntAlu 63822387 70.09% 70.09% # Class of committed instruction 670system.cpu.commit.op_class_0::IntMult 10474 0.01% 70.10% # Class of committed instruction 671system.cpu.commit.op_class_0::IntDiv 0 0.00% 70.10% # Class of committed instruction 672system.cpu.commit.op_class_0::FloatAdd 0 0.00% 70.10% # Class of committed instruction 673system.cpu.commit.op_class_0::FloatCmp 0 0.00% 70.10% # Class of committed instruction 674system.cpu.commit.op_class_0::FloatCvt 0 0.00% 70.10% # Class of committed instruction 675system.cpu.commit.op_class_0::FloatMult 0 0.00% 70.10% # Class of committed instruction |
676system.cpu.commit.op_class_0::FloatMultAcc 0 0.00% 70.10% # Class of committed instruction |
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668system.cpu.commit.op_class_0::FloatDiv 0 0.00% 70.10% # Class of committed instruction | 677system.cpu.commit.op_class_0::FloatDiv 0 0.00% 70.10% # Class of committed instruction |
678system.cpu.commit.op_class_0::FloatMisc 0 0.00% 70.10% # Class of committed instruction |
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669system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 70.10% # Class of committed instruction 670system.cpu.commit.op_class_0::SimdAdd 0 0.00% 70.10% # Class of committed instruction 671system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 70.10% # Class of committed instruction 672system.cpu.commit.op_class_0::SimdAlu 0 0.00% 70.10% # Class of committed instruction 673system.cpu.commit.op_class_0::SimdCmp 0 0.00% 70.10% # Class of committed instruction 674system.cpu.commit.op_class_0::SimdCvt 0 0.00% 70.10% # Class of committed instruction 675system.cpu.commit.op_class_0::SimdMisc 0 0.00% 70.10% # Class of committed instruction 676system.cpu.commit.op_class_0::SimdMult 0 0.00% 70.10% # Class of committed instruction --- 5 unchanged lines hidden (view full) --- 682system.cpu.commit.op_class_0::SimdFloatAlu 0 0.00% 70.10% # Class of committed instruction 683system.cpu.commit.op_class_0::SimdFloatCmp 0 0.00% 70.10% # Class of committed instruction 684system.cpu.commit.op_class_0::SimdFloatCvt 6 0.00% 70.10% # Class of committed instruction 685system.cpu.commit.op_class_0::SimdFloatDiv 0 0.00% 70.10% # Class of committed instruction 686system.cpu.commit.op_class_0::SimdFloatMisc 15 0.00% 70.10% # Class of committed instruction 687system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 70.10% # Class of committed instruction 688system.cpu.commit.op_class_0::SimdFloatMultAcc 2 0.00% 70.10% # Class of committed instruction 689system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 70.10% # Class of committed instruction | 679system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 70.10% # Class of committed instruction 680system.cpu.commit.op_class_0::SimdAdd 0 0.00% 70.10% # Class of committed instruction 681system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 70.10% # Class of committed instruction 682system.cpu.commit.op_class_0::SimdAlu 0 0.00% 70.10% # Class of committed instruction 683system.cpu.commit.op_class_0::SimdCmp 0 0.00% 70.10% # Class of committed instruction 684system.cpu.commit.op_class_0::SimdCvt 0 0.00% 70.10% # Class of committed instruction 685system.cpu.commit.op_class_0::SimdMisc 0 0.00% 70.10% # Class of committed instruction 686system.cpu.commit.op_class_0::SimdMult 0 0.00% 70.10% # Class of committed instruction --- 5 unchanged lines hidden (view full) --- 692system.cpu.commit.op_class_0::SimdFloatAlu 0 0.00% 70.10% # Class of committed instruction 693system.cpu.commit.op_class_0::SimdFloatCmp 0 0.00% 70.10% # Class of committed instruction 694system.cpu.commit.op_class_0::SimdFloatCvt 6 0.00% 70.10% # Class of committed instruction 695system.cpu.commit.op_class_0::SimdFloatDiv 0 0.00% 70.10% # Class of committed instruction 696system.cpu.commit.op_class_0::SimdFloatMisc 15 0.00% 70.10% # Class of committed instruction 697system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 70.10% # Class of committed instruction 698system.cpu.commit.op_class_0::SimdFloatMultAcc 2 0.00% 70.10% # Class of committed instruction 699system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 70.10% # Class of committed instruction |
690system.cpu.commit.op_class_0::MemRead 22475911 24.68% 94.79% # Class of committed instruction 691system.cpu.commit.op_class_0::MemWrite 4744844 5.21% 100.00% # Class of committed instruction | 700system.cpu.commit.op_class_0::MemRead 22475905 24.68% 94.79% # Class of committed instruction 701system.cpu.commit.op_class_0::MemWrite 4744822 5.21% 100.00% # Class of committed instruction 702system.cpu.commit.op_class_0::FloatMemRead 6 0.00% 100.00% # Class of committed instruction 703system.cpu.commit.op_class_0::FloatMemWrite 22 0.00% 100.00% # Class of committed instruction |
692system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 693system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 694system.cpu.commit.op_class_0::total 91053639 # Class of committed instruction 695system.cpu.commit.bw_lim_events 4121250 # number cycles where commit BW limit reached 696system.cpu.rob.rob_reads 218887121 # The number of ROB reads 697system.cpu.rob.rob_writes 219522508 # The number of ROB writes 698system.cpu.timesIdled 581 # Number of times that the entire CPU went into an idle state and unscheduled itself 699system.cpu.idleCycles 65683 # Total number of cycles that the CPU has spent unscheduled due to idling --- 549 unchanged lines hidden --- | 704system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 705system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 706system.cpu.commit.op_class_0::total 91053639 # Class of committed instruction 707system.cpu.commit.bw_lim_events 4121250 # number cycles where commit BW limit reached 708system.cpu.rob.rob_reads 218887121 # The number of ROB reads 709system.cpu.rob.rob_writes 219522508 # The number of ROB writes 710system.cpu.timesIdled 581 # Number of times that the entire CPU went into an idle state and unscheduled itself 711system.cpu.idleCycles 65683 # Total number of cycles that the CPU has spent unscheduled due to idling --- 549 unchanged lines hidden --- |