| stats.txt (11507:be6065c1d8d2) | stats.txt (11515:c48c7cc5a522) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.058199 # Number of seconds simulated 4sim_ticks 58199030500 # Number of ticks simulated 5final_tick 58199030500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.058199 # Number of seconds simulated 4sim_ticks 58199030500 # Number of ticks simulated 5final_tick 58199030500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 101249 # Simulator instruction rate (inst/s) 8host_op_rate 101754 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 65047265 # Simulator tick rate (ticks/s) 10host_mem_usage 487144 # Number of bytes of host memory used 11host_seconds 894.72 # Real time elapsed on the host | 7host_inst_rate 218368 # Simulator instruction rate (inst/s) 8host_op_rate 219455 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 140289424 # Simulator tick rate (ticks/s) 10host_mem_usage 534192 # Number of bytes of host memory used 11host_seconds 414.85 # Real time elapsed on the host |
| 12sim_insts 90589799 # Number of instructions simulated 13sim_ops 91041030 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 44352 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 87616 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.l2cache.prefetcher 925056 # Number of bytes read from this memory 19system.physmem.bytes_read::total 1057024 # Number of bytes read from this memory --- 428 unchanged lines hidden (view full) --- 448system.cpu.rename.UnblockCycles 14777682 # Number of cycles rename is unblocking 449system.cpu.rename.RenamedInsts 110872417 # Number of instructions processed by rename 450system.cpu.rename.SquashedInsts 1412237 # Number of squashed instructions processed by rename 451system.cpu.rename.ROBFullEvents 11132933 # Number of times rename has blocked due to ROB full 452system.cpu.rename.IQFullEvents 1144918 # Number of times rename has blocked due to IQ full 453system.cpu.rename.LQFullEvents 1526969 # Number of times rename has blocked due to LQ full 454system.cpu.rename.SQFullEvents 486977 # Number of times rename has blocked due to SQ full 455system.cpu.rename.RenamedOperands 129945519 # Number of destination operands rename has renamed | 12sim_insts 90589799 # Number of instructions simulated 13sim_ops 91041030 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 44352 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 87616 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.l2cache.prefetcher 925056 # Number of bytes read from this memory 19system.physmem.bytes_read::total 1057024 # Number of bytes read from this memory --- 428 unchanged lines hidden (view full) --- 448system.cpu.rename.UnblockCycles 14777682 # Number of cycles rename is unblocking 449system.cpu.rename.RenamedInsts 110872417 # Number of instructions processed by rename 450system.cpu.rename.SquashedInsts 1412237 # Number of squashed instructions processed by rename 451system.cpu.rename.ROBFullEvents 11132933 # Number of times rename has blocked due to ROB full 452system.cpu.rename.IQFullEvents 1144918 # Number of times rename has blocked due to IQ full 453system.cpu.rename.LQFullEvents 1526969 # Number of times rename has blocked due to LQ full 454system.cpu.rename.SQFullEvents 486977 # Number of times rename has blocked due to SQ full 455system.cpu.rename.RenamedOperands 129945519 # Number of destination operands rename has renamed |
| 456system.cpu.rename.RenameLookups 483153288 # Number of register rename lookups that rename has made | 456system.cpu.rename.RenameLookups 483152587 # Number of register rename lookups that rename has made |
| 457system.cpu.rename.int_rename_lookups 119447216 # Number of integer rename lookups 458system.cpu.rename.fp_rename_lookups 432 # Number of floating rename lookups 459system.cpu.rename.CommittedMaps 107312919 # Number of HB maps that are committed 460system.cpu.rename.UndoneMaps 22632600 # Number of HB maps that are undone due to squashing 461system.cpu.rename.serializingInsts 4409 # count of serializing insts renamed 462system.cpu.rename.tempSerializingInsts 4401 # count of temporary serializing insts renamed 463system.cpu.rename.skidInsts 21510749 # count of insts added to the skid buffer 464system.cpu.memDep0.insertedLoads 26805153 # Number of loads inserted to the mem dependence unit. 465system.cpu.memDep0.insertedStores 5347343 # Number of stores inserted to the mem dependence unit. 466system.cpu.memDep0.conflictingLoads 519410 # Number of conflicting loads. 467system.cpu.memDep0.conflictingStores 254099 # Number of conflicting stores. 468system.cpu.iq.iqInstsAdded 109667150 # Number of instructions added to the IQ (excludes non-spec) 469system.cpu.iq.iqNonSpecInstsAdded 8283 # Number of non-speculative instructions added to the IQ 470system.cpu.iq.iqInstsIssued 101366848 # Number of instructions issued 471system.cpu.iq.iqSquashedInstsIssued 1074801 # Number of squashed instructions issued 472system.cpu.iq.iqSquashedInstsExamined 18634403 # Number of squashed instructions iterated over during squash; mainly for profiling | 457system.cpu.rename.int_rename_lookups 119447216 # Number of integer rename lookups 458system.cpu.rename.fp_rename_lookups 432 # Number of floating rename lookups 459system.cpu.rename.CommittedMaps 107312919 # Number of HB maps that are committed 460system.cpu.rename.UndoneMaps 22632600 # Number of HB maps that are undone due to squashing 461system.cpu.rename.serializingInsts 4409 # count of serializing insts renamed 462system.cpu.rename.tempSerializingInsts 4401 # count of temporary serializing insts renamed 463system.cpu.rename.skidInsts 21510749 # count of insts added to the skid buffer 464system.cpu.memDep0.insertedLoads 26805153 # Number of loads inserted to the mem dependence unit. 465system.cpu.memDep0.insertedStores 5347343 # Number of stores inserted to the mem dependence unit. 466system.cpu.memDep0.conflictingLoads 519410 # Number of conflicting loads. 467system.cpu.memDep0.conflictingStores 254099 # Number of conflicting stores. 468system.cpu.iq.iqInstsAdded 109667150 # Number of instructions added to the IQ (excludes non-spec) 469system.cpu.iq.iqNonSpecInstsAdded 8283 # Number of non-speculative instructions added to the IQ 470system.cpu.iq.iqInstsIssued 101366848 # Number of instructions issued 471system.cpu.iq.iqSquashedInstsIssued 1074801 # Number of squashed instructions issued 472system.cpu.iq.iqSquashedInstsExamined 18634403 # Number of squashed instructions iterated over during squash; mainly for profiling |
| 473system.cpu.iq.iqSquashedOperandsExamined 41667299 # Number of squashed operands that are examined and possibly removed from graph | 473system.cpu.iq.iqSquashedOperandsExamined 41667039 # Number of squashed operands that are examined and possibly removed from graph |
| 474system.cpu.iq.iqSquashedNonSpecRemoved 65 # Number of squashed non-spec instructions that were removed 475system.cpu.iq.issued_per_cycle::samples 116345779 # Number of insts issued each cycle 476system.cpu.iq.issued_per_cycle::mean 0.871255 # Number of insts issued each cycle 477system.cpu.iq.issued_per_cycle::stdev 0.989200 # Number of insts issued each cycle 478system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle 479system.cpu.iq.issued_per_cycle::0 54714850 47.03% 47.03% # Number of insts issued each cycle 480system.cpu.iq.issued_per_cycle::1 31358235 26.95% 73.98% # Number of insts issued each cycle 481system.cpu.iq.issued_per_cycle::2 22007860 18.92% 92.90% # Number of insts issued each cycle --- 204 unchanged lines hidden (view full) --- 686system.cpu.ipc 0.778276 # IPC: Instructions Per Cycle 687system.cpu.ipc_total 0.778276 # IPC: Total IPC of All Threads 688system.cpu.int_regfile_reads 108097873 # number of integer regfile reads 689system.cpu.int_regfile_writes 58692304 # number of integer regfile writes 690system.cpu.fp_regfile_reads 59 # number of floating regfile reads 691system.cpu.fp_regfile_writes 96 # number of floating regfile writes 692system.cpu.cc_regfile_reads 369004699 # number of cc regfile reads 693system.cpu.cc_regfile_writes 58686555 # number of cc regfile writes | 474system.cpu.iq.iqSquashedNonSpecRemoved 65 # Number of squashed non-spec instructions that were removed 475system.cpu.iq.issued_per_cycle::samples 116345779 # Number of insts issued each cycle 476system.cpu.iq.issued_per_cycle::mean 0.871255 # Number of insts issued each cycle 477system.cpu.iq.issued_per_cycle::stdev 0.989200 # Number of insts issued each cycle 478system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle 479system.cpu.iq.issued_per_cycle::0 54714850 47.03% 47.03% # Number of insts issued each cycle 480system.cpu.iq.issued_per_cycle::1 31358235 26.95% 73.98% # Number of insts issued each cycle 481system.cpu.iq.issued_per_cycle::2 22007860 18.92% 92.90% # Number of insts issued each cycle --- 204 unchanged lines hidden (view full) --- 686system.cpu.ipc 0.778276 # IPC: Instructions Per Cycle 687system.cpu.ipc_total 0.778276 # IPC: Total IPC of All Threads 688system.cpu.int_regfile_reads 108097873 # number of integer regfile reads 689system.cpu.int_regfile_writes 58692304 # number of integer regfile writes 690system.cpu.fp_regfile_reads 59 # number of floating regfile reads 691system.cpu.fp_regfile_writes 96 # number of floating regfile writes 692system.cpu.cc_regfile_reads 369004699 # number of cc regfile reads 693system.cpu.cc_regfile_writes 58686555 # number of cc regfile writes |
| 694system.cpu.misc_regfile_reads 28410220 # number of misc regfile reads | 694system.cpu.misc_regfile_reads 28410103 # number of misc regfile reads |
| 695system.cpu.misc_regfile_writes 7784 # number of misc regfile writes 696system.cpu.dcache.tags.replacements 5470634 # number of replacements 697system.cpu.dcache.tags.tagsinuse 511.784091 # Cycle average of tags in use 698system.cpu.dcache.tags.total_refs 18249365 # Total number of references to valid blocks. 699system.cpu.dcache.tags.sampled_refs 5471146 # Sample count of references to valid blocks. 700system.cpu.dcache.tags.avg_refs 3.335565 # Average number of references to valid blocks. 701system.cpu.dcache.tags.warmup_cycle 35796500 # Cycle when the warmup percentage was hit. 702system.cpu.dcache.tags.occ_blocks::cpu.data 511.784091 # Average occupied blocks per requestor --- 512 unchanged lines hidden --- | 695system.cpu.misc_regfile_writes 7784 # number of misc regfile writes 696system.cpu.dcache.tags.replacements 5470634 # number of replacements 697system.cpu.dcache.tags.tagsinuse 511.784091 # Cycle average of tags in use 698system.cpu.dcache.tags.total_refs 18249365 # Total number of references to valid blocks. 699system.cpu.dcache.tags.sampled_refs 5471146 # Sample count of references to valid blocks. 700system.cpu.dcache.tags.avg_refs 3.335565 # Average number of references to valid blocks. 701system.cpu.dcache.tags.warmup_cycle 35796500 # Cycle when the warmup percentage was hit. 702system.cpu.dcache.tags.occ_blocks::cpu.data 511.784091 # Average occupied blocks per requestor --- 512 unchanged lines hidden --- |