simout (9055:38f1926fb599) simout (9575:6c4d6fdf3644)
1gem5 Simulator System. http://gem5.org
2gem5 is copyrighted software; use the --copyright option for details.
3
1gem5 Simulator System. http://gem5.org
2gem5 is copyrighted software; use the --copyright option for details.
3
4gem5 compiled Jun 4 2012 12:01:47
5gem5 started Jun 4 2012 15:02:47
4gem5 compiled Mar 3 2013 21:18:30
5gem5 started Mar 3 2013 22:32:14
6gem5 executing on zizzer
7command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic -re tests/run.py build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic
8Global frequency set at 2000000000 ticks per second
6gem5 executing on zizzer
7command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic -re tests/run.py build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic
8Global frequency set at 2000000000 ticks per second
9info: No kernel set for full system simulation. Assuming you know what you're doing if not SPARC ISA
9info: No kernel set for full system simulation. Assuming you know what you're doing
10 0: system.t1000.htod: Real-time clock set to Thu Jan 1 00:00:00 2009
11
12 0: system.t1000.htod: Real-time clock set to 1230768000
13info: Entering event queue @ 0. Starting simulation...
14info: Ignoring write to SPARC ERROR regsiter
15info: Ignoring write to SPARC ERROR regsiter
10 0: system.t1000.htod: Real-time clock set to Thu Jan 1 00:00:00 2009
11
12 0: system.t1000.htod: Real-time clock set to 1230768000
13info: Entering event queue @ 0. Starting simulation...
14info: Ignoring write to SPARC ERROR regsiter
15info: Ignoring write to SPARC ERROR regsiter
16Exiting @ tick 2233777512 because m5_exit instruction encountered
16Exiting @ tick 4467555024 because m5_exit instruction encountered