config.ini (10636:9ac724889705) | config.ini (10900:ac6617bf9967) |
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1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 13 unchanged lines hidden (view full) --- 22intel_mp_table=system.intel_mp_table 23kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9.smp 24kernel_addr_check=true 25load_addr_mask=18446744073709551615 26load_offset=0 27mem_mode=timing 28mem_ranges=0:134217727 29memories=system.mem_ctrls | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 13 unchanged lines hidden (view full) --- 22intel_mp_table=system.intel_mp_table 23kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9.smp 24kernel_addr_check=true 25load_addr_mask=18446744073709551615 26load_offset=0 27mem_mode=timing 28mem_ranges=0:134217727 29memories=system.mem_ctrls |
30mmap_using_noreserve=false |
|
30num_work_ids=16 31readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh 32smbios_table=system.smbios_table 33symbolfile= 34work_begin_ckpt_count=0 35work_begin_cpu_id_exit=-1 36work_begin_exit_count=0 37work_cpus_ckpt_count=0 --- 658 unchanged lines hidden (view full) --- 696type=IntrControl 697eventq_index=0 698sys=system 699 700[system.iobus] 701type=NoncoherentXBar 702clk_domain=system.clk_domain 703eventq_index=0 | 31num_work_ids=16 32readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh 33smbios_table=system.smbios_table 34symbolfile= 35work_begin_ckpt_count=0 36work_begin_cpu_id_exit=-1 37work_begin_exit_count=0 38work_cpus_ckpt_count=0 --- 658 unchanged lines hidden (view full) --- 697type=IntrControl 698eventq_index=0 699sys=system 700 701[system.iobus] 702type=NoncoherentXBar 703clk_domain=system.clk_domain 704eventq_index=0 |
704header_cycles=1 | 705forward_latency=1 706frontend_latency=2 707response_latency=2 |
705use_default_range=false | 708use_default_range=false |
706width=8 | 709width=16 |
707default=system.pc.pciconfig.pio 708master=system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist1.pio system.pc.i_dont_exist2.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.ruby.l1_cntrl0.sequencer.pio_slave_port system.ruby.l1_cntrl1.sequencer.pio_slave_port system.ruby.io_controller.dma_sequencer.slave 709slave=system.pc.south_bridge.io_apic.int_master system.ruby.l1_cntrl0.sequencer.pio_master_port system.ruby.l1_cntrl0.sequencer.mem_master_port system.ruby.l1_cntrl1.sequencer.pio_master_port system.ruby.l1_cntrl1.sequencer.mem_master_port 710 711[system.mem_ctrls] 712type=DRAMCtrl 713IDD0=0.075000 714IDD02=0.000000 --- 15 unchanged lines hidden (view full) --- 730IDD4W2=0.000000 731IDD5=0.220000 732IDD52=0.000000 733IDD6=0.000000 734IDD62=0.000000 735VDD=1.500000 736VDD2=0.000000 737activation_limit=4 | 710default=system.pc.pciconfig.pio 711master=system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist1.pio system.pc.i_dont_exist2.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.ruby.l1_cntrl0.sequencer.pio_slave_port system.ruby.l1_cntrl1.sequencer.pio_slave_port system.ruby.io_controller.dma_sequencer.slave 712slave=system.pc.south_bridge.io_apic.int_master system.ruby.l1_cntrl0.sequencer.pio_master_port system.ruby.l1_cntrl0.sequencer.mem_master_port system.ruby.l1_cntrl1.sequencer.pio_master_port system.ruby.l1_cntrl1.sequencer.mem_master_port 713 714[system.mem_ctrls] 715type=DRAMCtrl 716IDD0=0.075000 717IDD02=0.000000 --- 15 unchanged lines hidden (view full) --- 733IDD4W2=0.000000 734IDD5=0.220000 735IDD52=0.000000 736IDD6=0.000000 737IDD62=0.000000 738VDD=1.500000 739VDD2=0.000000 740activation_limit=4 |
738addr_mapping=RoRaBaChCo | 741addr_mapping=RoRaBaCoCh |
739bank_groups_per_rank=0 740banks_per_rank=8 741burst_length=8 742channels=1 743clk_domain=system.clk_domain 744conf_table_reported=true 745device_bus_width=8 746device_rowbuffer_size=1024 --- 562 unchanged lines hidden (view full) --- 1309pio_addr=9223372036854775905 1310pio_latency=100000 1311system=system 1312pio=system.iobus.master[8] 1313 1314[system.ruby] 1315type=RubySystem 1316children=clk_domain dir_cntrl0 dma_cntrl0 io_controller l1_cntrl0 l1_cntrl1 l2_cntrl0 memctrl_clk_domain network | 742bank_groups_per_rank=0 743banks_per_rank=8 744burst_length=8 745channels=1 746clk_domain=system.clk_domain 747conf_table_reported=true 748device_bus_width=8 749device_rowbuffer_size=1024 --- 562 unchanged lines hidden (view full) --- 1312pio_addr=9223372036854775905 1313pio_latency=100000 1314system=system 1315pio=system.iobus.master[8] 1316 1317[system.ruby] 1318type=RubySystem 1319children=clk_domain dir_cntrl0 dma_cntrl0 io_controller l1_cntrl0 l1_cntrl1 l2_cntrl0 memctrl_clk_domain network |
1320access_backing_store=false |
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1317all_instructions=false 1318block_size_bytes=64 1319clk_domain=system.ruby.clk_domain 1320eventq_index=0 1321hot_lines=false 1322memory_size_bits=48 1323num_of_sequencers=2 1324phys_mem=Null --- 160 unchanged lines hidden (view full) --- 1485num_streams=4 1486pf_per_stream=1 1487sys=system 1488train_misses=4 1489unit_filter=8 1490 1491[system.ruby.l1_cntrl0.sequencer] 1492type=RubySequencer | 1321all_instructions=false 1322block_size_bytes=64 1323clk_domain=system.ruby.clk_domain 1324eventq_index=0 1325hot_lines=false 1326memory_size_bits=48 1327num_of_sequencers=2 1328phys_mem=Null --- 160 unchanged lines hidden (view full) --- 1489num_streams=4 1490pf_per_stream=1 1491sys=system 1492train_misses=4 1493unit_filter=8 1494 1495[system.ruby.l1_cntrl0.sequencer] 1496type=RubySequencer |
1493access_backing_store=false | |
1494clk_domain=system.cpu_clk_domain 1495dcache=system.ruby.l1_cntrl0.L1Dcache 1496deadlock_threshold=500000 1497eventq_index=0 1498icache=system.ruby.l1_cntrl0.L1Icache 1499max_outstanding_requests=16 1500ruby_system=system.ruby 1501support_data_reqs=true --- 76 unchanged lines hidden (view full) --- 1578num_streams=4 1579pf_per_stream=1 1580sys=system 1581train_misses=4 1582unit_filter=8 1583 1584[system.ruby.l1_cntrl1.sequencer] 1585type=RubySequencer | 1497clk_domain=system.cpu_clk_domain 1498dcache=system.ruby.l1_cntrl0.L1Dcache 1499deadlock_threshold=500000 1500eventq_index=0 1501icache=system.ruby.l1_cntrl0.L1Icache 1502max_outstanding_requests=16 1503ruby_system=system.ruby 1504support_data_reqs=true --- 76 unchanged lines hidden (view full) --- 1581num_streams=4 1582pf_per_stream=1 1583sys=system 1584train_misses=4 1585unit_filter=8 1586 1587[system.ruby.l1_cntrl1.sequencer] 1588type=RubySequencer |
1586access_backing_store=false | |
1587clk_domain=system.cpu_clk_domain 1588dcache=system.ruby.l1_cntrl1.L1Dcache 1589deadlock_threshold=500000 1590eventq_index=0 1591icache=system.ruby.l1_cntrl1.L1Icache 1592max_outstanding_requests=16 1593ruby_system=system.ruby 1594support_data_reqs=true --- 261 unchanged lines hidden (view full) --- 1856release_date=06/08/2008 1857rom_size=0 1858starting_addr_segment=0 1859vendor= 1860version= 1861 1862[system.sys_port_proxy] 1863type=RubyPortProxy | 1589clk_domain=system.cpu_clk_domain 1590dcache=system.ruby.l1_cntrl1.L1Dcache 1591deadlock_threshold=500000 1592eventq_index=0 1593icache=system.ruby.l1_cntrl1.L1Icache 1594max_outstanding_requests=16 1595ruby_system=system.ruby 1596support_data_reqs=true --- 261 unchanged lines hidden (view full) --- 1858release_date=06/08/2008 1859rom_size=0 1860starting_addr_segment=0 1861vendor= 1862version= 1863 1864[system.sys_port_proxy] 1865type=RubyPortProxy |
1864access_backing_store=false | |
1865clk_domain=system.clk_domain 1866eventq_index=0 1867ruby_system=system.ruby 1868support_data_reqs=true 1869support_inst_reqs=true 1870system=system 1871using_ruby_tester=false 1872version=0 1873slave=system.system_port 1874 1875[system.voltage_domain] 1876type=VoltageDomain 1877eventq_index=0 1878voltage=1.000000 1879 | 1866clk_domain=system.clk_domain 1867eventq_index=0 1868ruby_system=system.ruby 1869support_data_reqs=true 1870support_inst_reqs=true 1871system=system 1872using_ruby_tester=false 1873version=0 1874slave=system.system_port 1875 1876[system.voltage_domain] 1877type=VoltageDomain 1878eventq_index=0 1879voltage=1.000000 1880 |