| config.ini (9924:31ef410b6843) | config.ini (9988:0b2e590c85be) |
|---|---|
| 1[root] 2type=Root 3children=system | 1[root] 2type=Root 3children=system |
| 4eventq_index=0 |
|
| 4full_system=true | 5full_system=true |
| 6sim_quantum=0 |
|
| 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxX86System 11children=acpi_description_table_pointer apicbridge bridge clk_domain cpu cpu_clk_domain e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache membus pc physmem smbios_table voltage_domain 12acpi_description_table_pointer=system.acpi_description_table_pointer 13boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1 14cache_line_size=64 15clk_domain=system.clk_domain 16e820_table=system.e820_table | 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxX86System 13children=acpi_description_table_pointer apicbridge bridge clk_domain cpu cpu_clk_domain e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache membus pc physmem smbios_table voltage_domain 14acpi_description_table_pointer=system.acpi_description_table_pointer 15boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1 16cache_line_size=64 17clk_domain=system.clk_domain 18e820_table=system.e820_table |
| 19eventq_index=0 |
|
| 17init_param=0 18intel_mp_pointer=system.intel_mp_pointer 19intel_mp_table=system.intel_mp_table | 20init_param=0 21intel_mp_pointer=system.intel_mp_pointer 22intel_mp_table=system.intel_mp_table |
| 20kernel=/dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9 | 23kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9 |
| 21load_addr_mask=18446744073709551615 22mem_mode=timing 23mem_ranges=0:134217727 24memories=system.physmem 25num_work_ids=16 26readfile=tests/halt.sh 27smbios_table=system.smbios_table 28symbolfile= --- 4 unchanged lines hidden (view full) --- 33work_end_ckpt_count=0 34work_end_exit_count=0 35work_item_id=-1 36system_port=system.membus.slave[1] 37 38[system.acpi_description_table_pointer] 39type=X86ACPIRSDP 40children=xsdt | 24load_addr_mask=18446744073709551615 25mem_mode=timing 26mem_ranges=0:134217727 27memories=system.physmem 28num_work_ids=16 29readfile=tests/halt.sh 30smbios_table=system.smbios_table 31symbolfile= --- 4 unchanged lines hidden (view full) --- 36work_end_ckpt_count=0 37work_end_exit_count=0 38work_item_id=-1 39system_port=system.membus.slave[1] 40 41[system.acpi_description_table_pointer] 42type=X86ACPIRSDP 43children=xsdt |
| 44eventq_index=0 |
|
| 41oem_id= 42revision=2 43rsdt=Null 44xsdt=system.acpi_description_table_pointer.xsdt 45 46[system.acpi_description_table_pointer.xsdt] 47type=X86ACPIXSDT 48creator_id= 49creator_revision=0 50entries= | 45oem_id= 46revision=2 47rsdt=Null 48xsdt=system.acpi_description_table_pointer.xsdt 49 50[system.acpi_description_table_pointer.xsdt] 51type=X86ACPIXSDT 52creator_id= 53creator_revision=0 54entries= |
| 55eventq_index=0 |
|
| 51oem_id= 52oem_revision=0 53oem_table_id= 54 55[system.apicbridge] 56type=Bridge 57clk_domain=system.clk_domain 58delay=50000 | 56oem_id= 57oem_revision=0 58oem_table_id= 59 60[system.apicbridge] 61type=Bridge 62clk_domain=system.clk_domain 63delay=50000 |
| 64eventq_index=0 |
|
| 59ranges=11529215046068469760:11529215046068473855 60req_size=16 61resp_size=16 62master=system.membus.slave[0] 63slave=system.iobus.master[0] 64 65[system.bridge] 66type=Bridge 67clk_domain=system.clk_domain 68delay=50000 | 65ranges=11529215046068469760:11529215046068473855 66req_size=16 67resp_size=16 68master=system.membus.slave[0] 69slave=system.iobus.master[0] 70 71[system.bridge] 72type=Bridge 73clk_domain=system.clk_domain 74delay=50000 |
| 75eventq_index=0 |
|
| 69ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615 70req_size=16 71resp_size=16 72master=system.iobus.slave[0] 73slave=system.membus.master[0] 74 75[system.clk_domain] 76type=SrcClockDomain 77clock=1000 | 76ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615 77req_size=16 78resp_size=16 79master=system.iobus.slave[0] 80slave=system.membus.master[0] 81 82[system.clk_domain] 83type=SrcClockDomain 84clock=1000 |
| 85eventq_index=0 |
|
| 78voltage_domain=system.voltage_domain 79 80[system.cpu] 81type=DerivO3CPU 82children=apic_clk_domain branchPred dcache dtb dtb_walker_cache fuPool icache interrupts isa itb itb_walker_cache l2cache toL2Bus tracer 83LFSTSize=1024 84LQEntries=32 85LSQCheckLoads=true --- 15 unchanged lines hidden (view full) --- 101decodeToFetchDelay=1 102decodeToRenameDelay=1 103decodeWidth=8 104dispatchWidth=8 105do_checkpoint_insts=true 106do_quiesce=true 107do_statistics_insts=true 108dtb=system.cpu.dtb | 86voltage_domain=system.voltage_domain 87 88[system.cpu] 89type=DerivO3CPU 90children=apic_clk_domain branchPred dcache dtb dtb_walker_cache fuPool icache interrupts isa itb itb_walker_cache l2cache toL2Bus tracer 91LFSTSize=1024 92LQEntries=32 93LSQCheckLoads=true --- 15 unchanged lines hidden (view full) --- 109decodeToFetchDelay=1 110decodeToRenameDelay=1 111decodeWidth=8 112dispatchWidth=8 113do_checkpoint_insts=true 114do_quiesce=true 115do_statistics_insts=true 116dtb=system.cpu.dtb |
| 117eventq_index=0 118fetchBufferSize=64 |
|
| 109fetchToDecodeDelay=1 110fetchTrapLatency=1 111fetchWidth=8 112forwardComSize=5 113fuPool=system.cpu.fuPool 114function_trace=false 115function_trace_start=0 116iewToCommitDelay=1 --- 45 unchanged lines hidden (view full) --- 162workload= 163dcache_port=system.cpu.dcache.cpu_side 164icache_port=system.cpu.icache.cpu_side 165 166[system.cpu.apic_clk_domain] 167type=DerivedClockDomain 168clk_divider=16 169clk_domain=system.cpu_clk_domain | 119fetchToDecodeDelay=1 120fetchTrapLatency=1 121fetchWidth=8 122forwardComSize=5 123fuPool=system.cpu.fuPool 124function_trace=false 125function_trace_start=0 126iewToCommitDelay=1 --- 45 unchanged lines hidden (view full) --- 172workload= 173dcache_port=system.cpu.dcache.cpu_side 174icache_port=system.cpu.icache.cpu_side 175 176[system.cpu.apic_clk_domain] 177type=DerivedClockDomain 178clk_divider=16 179clk_domain=system.cpu_clk_domain |
| 180eventq_index=0 |
|
| 170 171[system.cpu.branchPred] 172type=BranchPredictor 173BTBEntries=4096 174BTBTagSize=16 175RASSize=16 176choiceCtrBits=2 177choicePredictorSize=8192 | 181 182[system.cpu.branchPred] 183type=BranchPredictor 184BTBEntries=4096 185BTBTagSize=16 186RASSize=16 187choiceCtrBits=2 188choicePredictorSize=8192 |
| 189eventq_index=0 |
|
| 178globalCtrBits=2 179globalPredictorSize=8192 180instShiftAmt=2 181localCtrBits=2 182localHistoryTableSize=2048 183localPredictorSize=2048 184numThreads=1 185predType=tournament 186 187[system.cpu.dcache] 188type=BaseCache 189children=tags 190addr_ranges=0:18446744073709551615 191assoc=4 192clk_domain=system.cpu_clk_domain | 190globalCtrBits=2 191globalPredictorSize=8192 192instShiftAmt=2 193localCtrBits=2 194localHistoryTableSize=2048 195localPredictorSize=2048 196numThreads=1 197predType=tournament 198 199[system.cpu.dcache] 200type=BaseCache 201children=tags 202addr_ranges=0:18446744073709551615 203assoc=4 204clk_domain=system.cpu_clk_domain |
| 205eventq_index=0 |
|
| 193forward_snoops=true 194hit_latency=2 195is_top_level=true 196max_miss_count=0 197mshrs=4 198prefetch_on_access=false 199prefetcher=Null 200response_latency=2 --- 6 unchanged lines hidden (view full) --- 207cpu_side=system.cpu.dcache_port 208mem_side=system.cpu.toL2Bus.slave[1] 209 210[system.cpu.dcache.tags] 211type=LRU 212assoc=4 213block_size=64 214clk_domain=system.cpu_clk_domain | 206forward_snoops=true 207hit_latency=2 208is_top_level=true 209max_miss_count=0 210mshrs=4 211prefetch_on_access=false 212prefetcher=Null 213response_latency=2 --- 6 unchanged lines hidden (view full) --- 220cpu_side=system.cpu.dcache_port 221mem_side=system.cpu.toL2Bus.slave[1] 222 223[system.cpu.dcache.tags] 224type=LRU 225assoc=4 226block_size=64 227clk_domain=system.cpu_clk_domain |
| 228eventq_index=0 |
|
| 215hit_latency=2 216size=32768 217 218[system.cpu.dtb] 219type=X86TLB 220children=walker | 229hit_latency=2 230size=32768 231 232[system.cpu.dtb] 233type=X86TLB 234children=walker |
| 235eventq_index=0 |
|
| 221size=64 222walker=system.cpu.dtb.walker 223 224[system.cpu.dtb.walker] 225type=X86PagetableWalker 226clk_domain=system.cpu_clk_domain | 236size=64 237walker=system.cpu.dtb.walker 238 239[system.cpu.dtb.walker] 240type=X86PagetableWalker 241clk_domain=system.cpu_clk_domain |
| 242eventq_index=0 |
|
| 227num_squash_per_cycle=4 228system=system 229port=system.cpu.dtb_walker_cache.cpu_side 230 231[system.cpu.dtb_walker_cache] 232type=BaseCache 233children=tags 234addr_ranges=0:18446744073709551615 235assoc=2 236clk_domain=system.cpu_clk_domain | 243num_squash_per_cycle=4 244system=system 245port=system.cpu.dtb_walker_cache.cpu_side 246 247[system.cpu.dtb_walker_cache] 248type=BaseCache 249children=tags 250addr_ranges=0:18446744073709551615 251assoc=2 252clk_domain=system.cpu_clk_domain |
| 253eventq_index=0 |
|
| 237forward_snoops=true 238hit_latency=2 239is_top_level=true 240max_miss_count=0 241mshrs=10 242prefetch_on_access=false 243prefetcher=Null 244response_latency=2 --- 6 unchanged lines hidden (view full) --- 251cpu_side=system.cpu.dtb.walker.port 252mem_side=system.cpu.toL2Bus.slave[3] 253 254[system.cpu.dtb_walker_cache.tags] 255type=LRU 256assoc=2 257block_size=64 258clk_domain=system.cpu_clk_domain | 254forward_snoops=true 255hit_latency=2 256is_top_level=true 257max_miss_count=0 258mshrs=10 259prefetch_on_access=false 260prefetcher=Null 261response_latency=2 --- 6 unchanged lines hidden (view full) --- 268cpu_side=system.cpu.dtb.walker.port 269mem_side=system.cpu.toL2Bus.slave[3] 270 271[system.cpu.dtb_walker_cache.tags] 272type=LRU 273assoc=2 274block_size=64 275clk_domain=system.cpu_clk_domain |
| 276eventq_index=0 |
|
| 259hit_latency=2 260size=1024 261 262[system.cpu.fuPool] 263type=FUPool 264children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 265FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 | 277hit_latency=2 278size=1024 279 280[system.cpu.fuPool] 281type=FUPool 282children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 283FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 |
| 284eventq_index=0 |
|
| 266 267[system.cpu.fuPool.FUList0] 268type=FUDesc 269children=opList 270count=6 | 285 286[system.cpu.fuPool.FUList0] 287type=FUDesc 288children=opList 289count=6 |
| 290eventq_index=0 |
|
| 271opList=system.cpu.fuPool.FUList0.opList 272 273[system.cpu.fuPool.FUList0.opList] 274type=OpDesc | 291opList=system.cpu.fuPool.FUList0.opList 292 293[system.cpu.fuPool.FUList0.opList] 294type=OpDesc |
| 295eventq_index=0 |
|
| 275issueLat=1 276opClass=IntAlu 277opLat=1 278 279[system.cpu.fuPool.FUList1] 280type=FUDesc 281children=opList0 opList1 282count=2 | 296issueLat=1 297opClass=IntAlu 298opLat=1 299 300[system.cpu.fuPool.FUList1] 301type=FUDesc 302children=opList0 opList1 303count=2 |
| 304eventq_index=0 |
|
| 283opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 284 285[system.cpu.fuPool.FUList1.opList0] 286type=OpDesc | 305opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 306 307[system.cpu.fuPool.FUList1.opList0] 308type=OpDesc |
| 309eventq_index=0 |
|
| 287issueLat=1 288opClass=IntMult 289opLat=3 290 291[system.cpu.fuPool.FUList1.opList1] 292type=OpDesc | 310issueLat=1 311opClass=IntMult 312opLat=3 313 314[system.cpu.fuPool.FUList1.opList1] 315type=OpDesc |
| 316eventq_index=0 |
|
| 293issueLat=19 294opClass=IntDiv 295opLat=20 296 297[system.cpu.fuPool.FUList2] 298type=FUDesc 299children=opList0 opList1 opList2 300count=4 | 317issueLat=19 318opClass=IntDiv 319opLat=20 320 321[system.cpu.fuPool.FUList2] 322type=FUDesc 323children=opList0 opList1 opList2 324count=4 |
| 325eventq_index=0 |
|
| 301opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 302 303[system.cpu.fuPool.FUList2.opList0] 304type=OpDesc | 326opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 327 328[system.cpu.fuPool.FUList2.opList0] 329type=OpDesc |
| 330eventq_index=0 |
|
| 305issueLat=1 306opClass=FloatAdd 307opLat=2 308 309[system.cpu.fuPool.FUList2.opList1] 310type=OpDesc | 331issueLat=1 332opClass=FloatAdd 333opLat=2 334 335[system.cpu.fuPool.FUList2.opList1] 336type=OpDesc |
| 337eventq_index=0 |
|
| 311issueLat=1 312opClass=FloatCmp 313opLat=2 314 315[system.cpu.fuPool.FUList2.opList2] 316type=OpDesc | 338issueLat=1 339opClass=FloatCmp 340opLat=2 341 342[system.cpu.fuPool.FUList2.opList2] 343type=OpDesc |
| 344eventq_index=0 |
|
| 317issueLat=1 318opClass=FloatCvt 319opLat=2 320 321[system.cpu.fuPool.FUList3] 322type=FUDesc 323children=opList0 opList1 opList2 324count=2 | 345issueLat=1 346opClass=FloatCvt 347opLat=2 348 349[system.cpu.fuPool.FUList3] 350type=FUDesc 351children=opList0 opList1 opList2 352count=2 |
| 353eventq_index=0 |
|
| 325opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 326 327[system.cpu.fuPool.FUList3.opList0] 328type=OpDesc | 354opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 355 356[system.cpu.fuPool.FUList3.opList0] 357type=OpDesc |
| 358eventq_index=0 |
|
| 329issueLat=1 330opClass=FloatMult 331opLat=4 332 333[system.cpu.fuPool.FUList3.opList1] 334type=OpDesc | 359issueLat=1 360opClass=FloatMult 361opLat=4 362 363[system.cpu.fuPool.FUList3.opList1] 364type=OpDesc |
| 365eventq_index=0 |
|
| 335issueLat=12 336opClass=FloatDiv 337opLat=12 338 339[system.cpu.fuPool.FUList3.opList2] 340type=OpDesc | 366issueLat=12 367opClass=FloatDiv 368opLat=12 369 370[system.cpu.fuPool.FUList3.opList2] 371type=OpDesc |
| 372eventq_index=0 |
|
| 341issueLat=24 342opClass=FloatSqrt 343opLat=24 344 345[system.cpu.fuPool.FUList4] 346type=FUDesc 347children=opList 348count=0 | 373issueLat=24 374opClass=FloatSqrt 375opLat=24 376 377[system.cpu.fuPool.FUList4] 378type=FUDesc 379children=opList 380count=0 |
| 381eventq_index=0 |
|
| 349opList=system.cpu.fuPool.FUList4.opList 350 351[system.cpu.fuPool.FUList4.opList] 352type=OpDesc | 382opList=system.cpu.fuPool.FUList4.opList 383 384[system.cpu.fuPool.FUList4.opList] 385type=OpDesc |
| 386eventq_index=0 |
|
| 353issueLat=1 354opClass=MemRead 355opLat=1 356 357[system.cpu.fuPool.FUList5] 358type=FUDesc 359children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 360count=4 | 387issueLat=1 388opClass=MemRead 389opLat=1 390 391[system.cpu.fuPool.FUList5] 392type=FUDesc 393children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 394count=4 |
| 395eventq_index=0 |
|
| 361opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 362 363[system.cpu.fuPool.FUList5.opList00] 364type=OpDesc | 396opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 397 398[system.cpu.fuPool.FUList5.opList00] 399type=OpDesc |
| 400eventq_index=0 |
|
| 365issueLat=1 366opClass=SimdAdd 367opLat=1 368 369[system.cpu.fuPool.FUList5.opList01] 370type=OpDesc | 401issueLat=1 402opClass=SimdAdd 403opLat=1 404 405[system.cpu.fuPool.FUList5.opList01] 406type=OpDesc |
| 407eventq_index=0 |
|
| 371issueLat=1 372opClass=SimdAddAcc 373opLat=1 374 375[system.cpu.fuPool.FUList5.opList02] 376type=OpDesc | 408issueLat=1 409opClass=SimdAddAcc 410opLat=1 411 412[system.cpu.fuPool.FUList5.opList02] 413type=OpDesc |
| 414eventq_index=0 |
|
| 377issueLat=1 378opClass=SimdAlu 379opLat=1 380 381[system.cpu.fuPool.FUList5.opList03] 382type=OpDesc | 415issueLat=1 416opClass=SimdAlu 417opLat=1 418 419[system.cpu.fuPool.FUList5.opList03] 420type=OpDesc |
| 421eventq_index=0 |
|
| 383issueLat=1 384opClass=SimdCmp 385opLat=1 386 387[system.cpu.fuPool.FUList5.opList04] 388type=OpDesc | 422issueLat=1 423opClass=SimdCmp 424opLat=1 425 426[system.cpu.fuPool.FUList5.opList04] 427type=OpDesc |
| 428eventq_index=0 |
|
| 389issueLat=1 390opClass=SimdCvt 391opLat=1 392 393[system.cpu.fuPool.FUList5.opList05] 394type=OpDesc | 429issueLat=1 430opClass=SimdCvt 431opLat=1 432 433[system.cpu.fuPool.FUList5.opList05] 434type=OpDesc |
| 435eventq_index=0 |
|
| 395issueLat=1 396opClass=SimdMisc 397opLat=1 398 399[system.cpu.fuPool.FUList5.opList06] 400type=OpDesc | 436issueLat=1 437opClass=SimdMisc 438opLat=1 439 440[system.cpu.fuPool.FUList5.opList06] 441type=OpDesc |
| 442eventq_index=0 |
|
| 401issueLat=1 402opClass=SimdMult 403opLat=1 404 405[system.cpu.fuPool.FUList5.opList07] 406type=OpDesc | 443issueLat=1 444opClass=SimdMult 445opLat=1 446 447[system.cpu.fuPool.FUList5.opList07] 448type=OpDesc |
| 449eventq_index=0 |
|
| 407issueLat=1 408opClass=SimdMultAcc 409opLat=1 410 411[system.cpu.fuPool.FUList5.opList08] 412type=OpDesc | 450issueLat=1 451opClass=SimdMultAcc 452opLat=1 453 454[system.cpu.fuPool.FUList5.opList08] 455type=OpDesc |
| 456eventq_index=0 |
|
| 413issueLat=1 414opClass=SimdShift 415opLat=1 416 417[system.cpu.fuPool.FUList5.opList09] 418type=OpDesc | 457issueLat=1 458opClass=SimdShift 459opLat=1 460 461[system.cpu.fuPool.FUList5.opList09] 462type=OpDesc |
| 463eventq_index=0 |
|
| 419issueLat=1 420opClass=SimdShiftAcc 421opLat=1 422 423[system.cpu.fuPool.FUList5.opList10] 424type=OpDesc | 464issueLat=1 465opClass=SimdShiftAcc 466opLat=1 467 468[system.cpu.fuPool.FUList5.opList10] 469type=OpDesc |
| 470eventq_index=0 |
|
| 425issueLat=1 426opClass=SimdSqrt 427opLat=1 428 429[system.cpu.fuPool.FUList5.opList11] 430type=OpDesc | 471issueLat=1 472opClass=SimdSqrt 473opLat=1 474 475[system.cpu.fuPool.FUList5.opList11] 476type=OpDesc |
| 477eventq_index=0 |
|
| 431issueLat=1 432opClass=SimdFloatAdd 433opLat=1 434 435[system.cpu.fuPool.FUList5.opList12] 436type=OpDesc | 478issueLat=1 479opClass=SimdFloatAdd 480opLat=1 481 482[system.cpu.fuPool.FUList5.opList12] 483type=OpDesc |
| 484eventq_index=0 |
|
| 437issueLat=1 438opClass=SimdFloatAlu 439opLat=1 440 441[system.cpu.fuPool.FUList5.opList13] 442type=OpDesc | 485issueLat=1 486opClass=SimdFloatAlu 487opLat=1 488 489[system.cpu.fuPool.FUList5.opList13] 490type=OpDesc |
| 491eventq_index=0 |
|
| 443issueLat=1 444opClass=SimdFloatCmp 445opLat=1 446 447[system.cpu.fuPool.FUList5.opList14] 448type=OpDesc | 492issueLat=1 493opClass=SimdFloatCmp 494opLat=1 495 496[system.cpu.fuPool.FUList5.opList14] 497type=OpDesc |
| 498eventq_index=0 |
|
| 449issueLat=1 450opClass=SimdFloatCvt 451opLat=1 452 453[system.cpu.fuPool.FUList5.opList15] 454type=OpDesc | 499issueLat=1 500opClass=SimdFloatCvt 501opLat=1 502 503[system.cpu.fuPool.FUList5.opList15] 504type=OpDesc |
| 505eventq_index=0 |
|
| 455issueLat=1 456opClass=SimdFloatDiv 457opLat=1 458 459[system.cpu.fuPool.FUList5.opList16] 460type=OpDesc | 506issueLat=1 507opClass=SimdFloatDiv 508opLat=1 509 510[system.cpu.fuPool.FUList5.opList16] 511type=OpDesc |
| 512eventq_index=0 |
|
| 461issueLat=1 462opClass=SimdFloatMisc 463opLat=1 464 465[system.cpu.fuPool.FUList5.opList17] 466type=OpDesc | 513issueLat=1 514opClass=SimdFloatMisc 515opLat=1 516 517[system.cpu.fuPool.FUList5.opList17] 518type=OpDesc |
| 519eventq_index=0 |
|
| 467issueLat=1 468opClass=SimdFloatMult 469opLat=1 470 471[system.cpu.fuPool.FUList5.opList18] 472type=OpDesc | 520issueLat=1 521opClass=SimdFloatMult 522opLat=1 523 524[system.cpu.fuPool.FUList5.opList18] 525type=OpDesc |
| 526eventq_index=0 |
|
| 473issueLat=1 474opClass=SimdFloatMultAcc 475opLat=1 476 477[system.cpu.fuPool.FUList5.opList19] 478type=OpDesc | 527issueLat=1 528opClass=SimdFloatMultAcc 529opLat=1 530 531[system.cpu.fuPool.FUList5.opList19] 532type=OpDesc |
| 533eventq_index=0 |
|
| 479issueLat=1 480opClass=SimdFloatSqrt 481opLat=1 482 483[system.cpu.fuPool.FUList6] 484type=FUDesc 485children=opList 486count=0 | 534issueLat=1 535opClass=SimdFloatSqrt 536opLat=1 537 538[system.cpu.fuPool.FUList6] 539type=FUDesc 540children=opList 541count=0 |
| 542eventq_index=0 |
|
| 487opList=system.cpu.fuPool.FUList6.opList 488 489[system.cpu.fuPool.FUList6.opList] 490type=OpDesc | 543opList=system.cpu.fuPool.FUList6.opList 544 545[system.cpu.fuPool.FUList6.opList] 546type=OpDesc |
| 547eventq_index=0 |
|
| 491issueLat=1 492opClass=MemWrite 493opLat=1 494 495[system.cpu.fuPool.FUList7] 496type=FUDesc 497children=opList0 opList1 498count=4 | 548issueLat=1 549opClass=MemWrite 550opLat=1 551 552[system.cpu.fuPool.FUList7] 553type=FUDesc 554children=opList0 opList1 555count=4 |
| 556eventq_index=0 |
|
| 499opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 500 501[system.cpu.fuPool.FUList7.opList0] 502type=OpDesc | 557opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 558 559[system.cpu.fuPool.FUList7.opList0] 560type=OpDesc |
| 561eventq_index=0 |
|
| 503issueLat=1 504opClass=MemRead 505opLat=1 506 507[system.cpu.fuPool.FUList7.opList1] 508type=OpDesc | 562issueLat=1 563opClass=MemRead 564opLat=1 565 566[system.cpu.fuPool.FUList7.opList1] 567type=OpDesc |
| 568eventq_index=0 |
|
| 509issueLat=1 510opClass=MemWrite 511opLat=1 512 513[system.cpu.fuPool.FUList8] 514type=FUDesc 515children=opList 516count=1 | 569issueLat=1 570opClass=MemWrite 571opLat=1 572 573[system.cpu.fuPool.FUList8] 574type=FUDesc 575children=opList 576count=1 |
| 577eventq_index=0 |
|
| 517opList=system.cpu.fuPool.FUList8.opList 518 519[system.cpu.fuPool.FUList8.opList] 520type=OpDesc | 578opList=system.cpu.fuPool.FUList8.opList 579 580[system.cpu.fuPool.FUList8.opList] 581type=OpDesc |
| 582eventq_index=0 |
|
| 521issueLat=3 522opClass=IprAccess 523opLat=3 524 525[system.cpu.icache] 526type=BaseCache 527children=tags 528addr_ranges=0:18446744073709551615 529assoc=1 530clk_domain=system.cpu_clk_domain | 583issueLat=3 584opClass=IprAccess 585opLat=3 586 587[system.cpu.icache] 588type=BaseCache 589children=tags 590addr_ranges=0:18446744073709551615 591assoc=1 592clk_domain=system.cpu_clk_domain |
| 593eventq_index=0 |
|
| 531forward_snoops=true 532hit_latency=2 533is_top_level=true 534max_miss_count=0 535mshrs=4 536prefetch_on_access=false 537prefetcher=Null 538response_latency=2 --- 6 unchanged lines hidden (view full) --- 545cpu_side=system.cpu.icache_port 546mem_side=system.cpu.toL2Bus.slave[0] 547 548[system.cpu.icache.tags] 549type=LRU 550assoc=1 551block_size=64 552clk_domain=system.cpu_clk_domain | 594forward_snoops=true 595hit_latency=2 596is_top_level=true 597max_miss_count=0 598mshrs=4 599prefetch_on_access=false 600prefetcher=Null 601response_latency=2 --- 6 unchanged lines hidden (view full) --- 608cpu_side=system.cpu.icache_port 609mem_side=system.cpu.toL2Bus.slave[0] 610 611[system.cpu.icache.tags] 612type=LRU 613assoc=1 614block_size=64 615clk_domain=system.cpu_clk_domain |
| 616eventq_index=0 |
|
| 553hit_latency=2 554size=32768 555 556[system.cpu.interrupts] 557type=X86LocalApic 558clk_domain=system.cpu.apic_clk_domain | 617hit_latency=2 618size=32768 619 620[system.cpu.interrupts] 621type=X86LocalApic 622clk_domain=system.cpu.apic_clk_domain |
| 623eventq_index=0 |
|
| 559int_latency=1000 560pio_addr=2305843009213693952 561pio_latency=100000 562system=system 563int_master=system.membus.slave[3] 564int_slave=system.membus.master[2] 565pio=system.membus.master[1] 566 567[system.cpu.isa] 568type=X86ISA | 624int_latency=1000 625pio_addr=2305843009213693952 626pio_latency=100000 627system=system 628int_master=system.membus.slave[3] 629int_slave=system.membus.master[2] 630pio=system.membus.master[1] 631 632[system.cpu.isa] 633type=X86ISA |
| 634eventq_index=0 |
|
| 569 570[system.cpu.itb] 571type=X86TLB 572children=walker | 635 636[system.cpu.itb] 637type=X86TLB 638children=walker |
| 639eventq_index=0 |
|
| 573size=64 574walker=system.cpu.itb.walker 575 576[system.cpu.itb.walker] 577type=X86PagetableWalker 578clk_domain=system.cpu_clk_domain | 640size=64 641walker=system.cpu.itb.walker 642 643[system.cpu.itb.walker] 644type=X86PagetableWalker 645clk_domain=system.cpu_clk_domain |
| 646eventq_index=0 |
|
| 579num_squash_per_cycle=4 580system=system 581port=system.cpu.itb_walker_cache.cpu_side 582 583[system.cpu.itb_walker_cache] 584type=BaseCache 585children=tags 586addr_ranges=0:18446744073709551615 587assoc=2 588clk_domain=system.cpu_clk_domain | 647num_squash_per_cycle=4 648system=system 649port=system.cpu.itb_walker_cache.cpu_side 650 651[system.cpu.itb_walker_cache] 652type=BaseCache 653children=tags 654addr_ranges=0:18446744073709551615 655assoc=2 656clk_domain=system.cpu_clk_domain |
| 657eventq_index=0 |
|
| 589forward_snoops=true 590hit_latency=2 591is_top_level=true 592max_miss_count=0 593mshrs=10 594prefetch_on_access=false 595prefetcher=Null 596response_latency=2 --- 6 unchanged lines hidden (view full) --- 603cpu_side=system.cpu.itb.walker.port 604mem_side=system.cpu.toL2Bus.slave[2] 605 606[system.cpu.itb_walker_cache.tags] 607type=LRU 608assoc=2 609block_size=64 610clk_domain=system.cpu_clk_domain | 658forward_snoops=true 659hit_latency=2 660is_top_level=true 661max_miss_count=0 662mshrs=10 663prefetch_on_access=false 664prefetcher=Null 665response_latency=2 --- 6 unchanged lines hidden (view full) --- 672cpu_side=system.cpu.itb.walker.port 673mem_side=system.cpu.toL2Bus.slave[2] 674 675[system.cpu.itb_walker_cache.tags] 676type=LRU 677assoc=2 678block_size=64 679clk_domain=system.cpu_clk_domain |
| 680eventq_index=0 |
|
| 611hit_latency=2 612size=1024 613 614[system.cpu.l2cache] 615type=BaseCache 616children=tags 617addr_ranges=0:18446744073709551615 618assoc=8 619clk_domain=system.cpu_clk_domain | 681hit_latency=2 682size=1024 683 684[system.cpu.l2cache] 685type=BaseCache 686children=tags 687addr_ranges=0:18446744073709551615 688assoc=8 689clk_domain=system.cpu_clk_domain |
| 690eventq_index=0 |
|
| 620forward_snoops=true 621hit_latency=20 622is_top_level=false 623max_miss_count=0 624mshrs=20 625prefetch_on_access=false 626prefetcher=Null 627response_latency=20 --- 6 unchanged lines hidden (view full) --- 634cpu_side=system.cpu.toL2Bus.master[0] 635mem_side=system.membus.slave[2] 636 637[system.cpu.l2cache.tags] 638type=LRU 639assoc=8 640block_size=64 641clk_domain=system.cpu_clk_domain | 691forward_snoops=true 692hit_latency=20 693is_top_level=false 694max_miss_count=0 695mshrs=20 696prefetch_on_access=false 697prefetcher=Null 698response_latency=20 --- 6 unchanged lines hidden (view full) --- 705cpu_side=system.cpu.toL2Bus.master[0] 706mem_side=system.membus.slave[2] 707 708[system.cpu.l2cache.tags] 709type=LRU 710assoc=8 711block_size=64 712clk_domain=system.cpu_clk_domain |
| 713eventq_index=0 |
|
| 642hit_latency=20 643size=4194304 644 645[system.cpu.toL2Bus] 646type=CoherentBus 647clk_domain=system.cpu_clk_domain | 714hit_latency=20 715size=4194304 716 717[system.cpu.toL2Bus] 718type=CoherentBus 719clk_domain=system.cpu_clk_domain |
| 720eventq_index=0 |
|
| 648header_cycles=1 649system=system 650use_default_range=false 651width=32 652master=system.cpu.l2cache.cpu_side 653slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side 654 655[system.cpu.tracer] 656type=ExeTracer | 721header_cycles=1 722system=system 723use_default_range=false 724width=32 725master=system.cpu.l2cache.cpu_side 726slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side 727 728[system.cpu.tracer] 729type=ExeTracer |
| 730eventq_index=0 |
|
| 657 658[system.cpu_clk_domain] 659type=SrcClockDomain 660clock=500 | 731 732[system.cpu_clk_domain] 733type=SrcClockDomain 734clock=500 |
| 735eventq_index=0 |
|
| 661voltage_domain=system.voltage_domain 662 663[system.e820_table] 664type=X86E820Table 665children=entries0 entries1 entries2 entries3 666entries=system.e820_table.entries0 system.e820_table.entries1 system.e820_table.entries2 system.e820_table.entries3 | 736voltage_domain=system.voltage_domain 737 738[system.e820_table] 739type=X86E820Table 740children=entries0 entries1 entries2 entries3 741entries=system.e820_table.entries0 system.e820_table.entries1 system.e820_table.entries2 system.e820_table.entries3 |
| 742eventq_index=0 |
|
| 667 668[system.e820_table.entries0] 669type=X86E820Entry 670addr=0 | 743 744[system.e820_table.entries0] 745type=X86E820Entry 746addr=0 |
| 747eventq_index=0 |
|
| 671range_type=1 672size=654336 673 674[system.e820_table.entries1] 675type=X86E820Entry 676addr=654336 | 748range_type=1 749size=654336 750 751[system.e820_table.entries1] 752type=X86E820Entry 753addr=654336 |
| 754eventq_index=0 |
|
| 677range_type=2 678size=394240 679 680[system.e820_table.entries2] 681type=X86E820Entry 682addr=1048576 | 755range_type=2 756size=394240 757 758[system.e820_table.entries2] 759type=X86E820Entry 760addr=1048576 |
| 761eventq_index=0 |
|
| 683range_type=1 684size=133169152 685 686[system.e820_table.entries3] 687type=X86E820Entry 688addr=4294901760 | 762range_type=1 763size=133169152 764 765[system.e820_table.entries3] 766type=X86E820Entry 767addr=4294901760 |
| 768eventq_index=0 |
|
| 689range_type=2 690size=65536 691 692[system.intel_mp_pointer] 693type=X86IntelMPFloatingPointer 694default_config=0 | 769range_type=2 770size=65536 771 772[system.intel_mp_pointer] 773type=X86IntelMPFloatingPointer 774default_config=0 |
| 775eventq_index=0 |
|
| 695imcr_present=true 696spec_rev=4 697 698[system.intel_mp_table] 699type=X86IntelMPConfigTable 700children=base_entries00 base_entries01 base_entries02 base_entries03 base_entries04 base_entries05 base_entries06 base_entries07 base_entries08 base_entries09 base_entries10 base_entries11 base_entries12 base_entries13 base_entries14 base_entries15 base_entries16 base_entries17 base_entries18 base_entries19 base_entries20 base_entries21 base_entries22 base_entries23 base_entries24 base_entries25 base_entries26 base_entries27 base_entries28 base_entries29 base_entries30 base_entries31 base_entries32 ext_entries 701base_entries=system.intel_mp_table.base_entries00 system.intel_mp_table.base_entries01 system.intel_mp_table.base_entries02 system.intel_mp_table.base_entries03 system.intel_mp_table.base_entries04 system.intel_mp_table.base_entries05 system.intel_mp_table.base_entries06 system.intel_mp_table.base_entries07 system.intel_mp_table.base_entries08 system.intel_mp_table.base_entries09 system.intel_mp_table.base_entries10 system.intel_mp_table.base_entries11 system.intel_mp_table.base_entries12 system.intel_mp_table.base_entries13 system.intel_mp_table.base_entries14 system.intel_mp_table.base_entries15 system.intel_mp_table.base_entries16 system.intel_mp_table.base_entries17 system.intel_mp_table.base_entries18 system.intel_mp_table.base_entries19 system.intel_mp_table.base_entries20 system.intel_mp_table.base_entries21 system.intel_mp_table.base_entries22 system.intel_mp_table.base_entries23 system.intel_mp_table.base_entries24 system.intel_mp_table.base_entries25 system.intel_mp_table.base_entries26 system.intel_mp_table.base_entries27 system.intel_mp_table.base_entries28 system.intel_mp_table.base_entries29 system.intel_mp_table.base_entries30 system.intel_mp_table.base_entries31 system.intel_mp_table.base_entries32 | 776imcr_present=true 777spec_rev=4 778 779[system.intel_mp_table] 780type=X86IntelMPConfigTable 781children=base_entries00 base_entries01 base_entries02 base_entries03 base_entries04 base_entries05 base_entries06 base_entries07 base_entries08 base_entries09 base_entries10 base_entries11 base_entries12 base_entries13 base_entries14 base_entries15 base_entries16 base_entries17 base_entries18 base_entries19 base_entries20 base_entries21 base_entries22 base_entries23 base_entries24 base_entries25 base_entries26 base_entries27 base_entries28 base_entries29 base_entries30 base_entries31 base_entries32 ext_entries 782base_entries=system.intel_mp_table.base_entries00 system.intel_mp_table.base_entries01 system.intel_mp_table.base_entries02 system.intel_mp_table.base_entries03 system.intel_mp_table.base_entries04 system.intel_mp_table.base_entries05 system.intel_mp_table.base_entries06 system.intel_mp_table.base_entries07 system.intel_mp_table.base_entries08 system.intel_mp_table.base_entries09 system.intel_mp_table.base_entries10 system.intel_mp_table.base_entries11 system.intel_mp_table.base_entries12 system.intel_mp_table.base_entries13 system.intel_mp_table.base_entries14 system.intel_mp_table.base_entries15 system.intel_mp_table.base_entries16 system.intel_mp_table.base_entries17 system.intel_mp_table.base_entries18 system.intel_mp_table.base_entries19 system.intel_mp_table.base_entries20 system.intel_mp_table.base_entries21 system.intel_mp_table.base_entries22 system.intel_mp_table.base_entries23 system.intel_mp_table.base_entries24 system.intel_mp_table.base_entries25 system.intel_mp_table.base_entries26 system.intel_mp_table.base_entries27 system.intel_mp_table.base_entries28 system.intel_mp_table.base_entries29 system.intel_mp_table.base_entries30 system.intel_mp_table.base_entries31 system.intel_mp_table.base_entries32 |
| 783eventq_index=0 |
|
| 702ext_entries=system.intel_mp_table.ext_entries 703local_apic=4276092928 704oem_id= 705oem_table_addr=0 706oem_table_size=0 707product_id= 708spec_rev=4 709 710[system.intel_mp_table.base_entries00] 711type=X86IntelMPProcessor 712bootstrap=true 713enable=true | 784ext_entries=system.intel_mp_table.ext_entries 785local_apic=4276092928 786oem_id= 787oem_table_addr=0 788oem_table_size=0 789product_id= 790spec_rev=4 791 792[system.intel_mp_table.base_entries00] 793type=X86IntelMPProcessor 794bootstrap=true 795enable=true |
| 796eventq_index=0 |
|
| 714family=0 715feature_flags=0 716local_apic_id=0 717local_apic_version=20 718model=0 719stepping=0 720 721[system.intel_mp_table.base_entries01] 722type=X86IntelMPIOAPIC 723address=4273995776 724enable=true | 797family=0 798feature_flags=0 799local_apic_id=0 800local_apic_version=20 801model=0 802stepping=0 803 804[system.intel_mp_table.base_entries01] 805type=X86IntelMPIOAPIC 806address=4273995776 807enable=true |
| 808eventq_index=0 |
|
| 725id=1 726version=17 727 728[system.intel_mp_table.base_entries02] 729type=X86IntelMPBus 730bus_id=0 731bus_type=ISA | 809id=1 810version=17 811 812[system.intel_mp_table.base_entries02] 813type=X86IntelMPBus 814bus_id=0 815bus_type=ISA |
| 816eventq_index=0 |
|
| 732 733[system.intel_mp_table.base_entries03] 734type=X86IntelMPBus 735bus_id=1 736bus_type=PCI | 817 818[system.intel_mp_table.base_entries03] 819type=X86IntelMPBus 820bus_id=1 821bus_type=PCI |
| 822eventq_index=0 |
|
| 737 738[system.intel_mp_table.base_entries04] 739type=X86IntelMPIOIntAssignment 740dest_io_apic_id=1 741dest_io_apic_intin=16 | 823 824[system.intel_mp_table.base_entries04] 825type=X86IntelMPIOIntAssignment 826dest_io_apic_id=1 827dest_io_apic_intin=16 |
| 828eventq_index=0 |
|
| 742interrupt_type=INT 743polarity=ConformPolarity 744source_bus_id=1 745source_bus_irq=16 746trigger=ConformTrigger 747 748[system.intel_mp_table.base_entries05] 749type=X86IntelMPIOIntAssignment 750dest_io_apic_id=1 751dest_io_apic_intin=0 | 829interrupt_type=INT 830polarity=ConformPolarity 831source_bus_id=1 832source_bus_irq=16 833trigger=ConformTrigger 834 835[system.intel_mp_table.base_entries05] 836type=X86IntelMPIOIntAssignment 837dest_io_apic_id=1 838dest_io_apic_intin=0 |
| 839eventq_index=0 |
|
| 752interrupt_type=ExtInt 753polarity=ConformPolarity 754source_bus_id=0 755source_bus_irq=0 756trigger=ConformTrigger 757 758[system.intel_mp_table.base_entries06] 759type=X86IntelMPIOIntAssignment 760dest_io_apic_id=1 761dest_io_apic_intin=2 | 840interrupt_type=ExtInt 841polarity=ConformPolarity 842source_bus_id=0 843source_bus_irq=0 844trigger=ConformTrigger 845 846[system.intel_mp_table.base_entries06] 847type=X86IntelMPIOIntAssignment 848dest_io_apic_id=1 849dest_io_apic_intin=2 |
| 850eventq_index=0 |
|
| 762interrupt_type=INT 763polarity=ConformPolarity 764source_bus_id=0 765source_bus_irq=0 766trigger=ConformTrigger 767 768[system.intel_mp_table.base_entries07] 769type=X86IntelMPIOIntAssignment 770dest_io_apic_id=1 771dest_io_apic_intin=0 | 851interrupt_type=INT 852polarity=ConformPolarity 853source_bus_id=0 854source_bus_irq=0 855trigger=ConformTrigger 856 857[system.intel_mp_table.base_entries07] 858type=X86IntelMPIOIntAssignment 859dest_io_apic_id=1 860dest_io_apic_intin=0 |
| 861eventq_index=0 |
|
| 772interrupt_type=ExtInt 773polarity=ConformPolarity 774source_bus_id=0 775source_bus_irq=1 776trigger=ConformTrigger 777 778[system.intel_mp_table.base_entries08] 779type=X86IntelMPIOIntAssignment 780dest_io_apic_id=1 781dest_io_apic_intin=1 | 862interrupt_type=ExtInt 863polarity=ConformPolarity 864source_bus_id=0 865source_bus_irq=1 866trigger=ConformTrigger 867 868[system.intel_mp_table.base_entries08] 869type=X86IntelMPIOIntAssignment 870dest_io_apic_id=1 871dest_io_apic_intin=1 |
| 872eventq_index=0 |
|
| 782interrupt_type=INT 783polarity=ConformPolarity 784source_bus_id=0 785source_bus_irq=1 786trigger=ConformTrigger 787 788[system.intel_mp_table.base_entries09] 789type=X86IntelMPIOIntAssignment 790dest_io_apic_id=1 791dest_io_apic_intin=0 | 873interrupt_type=INT 874polarity=ConformPolarity 875source_bus_id=0 876source_bus_irq=1 877trigger=ConformTrigger 878 879[system.intel_mp_table.base_entries09] 880type=X86IntelMPIOIntAssignment 881dest_io_apic_id=1 882dest_io_apic_intin=0 |
| 883eventq_index=0 |
|
| 792interrupt_type=ExtInt 793polarity=ConformPolarity 794source_bus_id=0 795source_bus_irq=3 796trigger=ConformTrigger 797 798[system.intel_mp_table.base_entries10] 799type=X86IntelMPIOIntAssignment 800dest_io_apic_id=1 801dest_io_apic_intin=3 | 884interrupt_type=ExtInt 885polarity=ConformPolarity 886source_bus_id=0 887source_bus_irq=3 888trigger=ConformTrigger 889 890[system.intel_mp_table.base_entries10] 891type=X86IntelMPIOIntAssignment 892dest_io_apic_id=1 893dest_io_apic_intin=3 |
| 894eventq_index=0 |
|
| 802interrupt_type=INT 803polarity=ConformPolarity 804source_bus_id=0 805source_bus_irq=3 806trigger=ConformTrigger 807 808[system.intel_mp_table.base_entries11] 809type=X86IntelMPIOIntAssignment 810dest_io_apic_id=1 811dest_io_apic_intin=0 | 895interrupt_type=INT 896polarity=ConformPolarity 897source_bus_id=0 898source_bus_irq=3 899trigger=ConformTrigger 900 901[system.intel_mp_table.base_entries11] 902type=X86IntelMPIOIntAssignment 903dest_io_apic_id=1 904dest_io_apic_intin=0 |
| 905eventq_index=0 |
|
| 812interrupt_type=ExtInt 813polarity=ConformPolarity 814source_bus_id=0 815source_bus_irq=4 816trigger=ConformTrigger 817 818[system.intel_mp_table.base_entries12] 819type=X86IntelMPIOIntAssignment 820dest_io_apic_id=1 821dest_io_apic_intin=4 | 906interrupt_type=ExtInt 907polarity=ConformPolarity 908source_bus_id=0 909source_bus_irq=4 910trigger=ConformTrigger 911 912[system.intel_mp_table.base_entries12] 913type=X86IntelMPIOIntAssignment 914dest_io_apic_id=1 915dest_io_apic_intin=4 |
| 916eventq_index=0 |
|
| 822interrupt_type=INT 823polarity=ConformPolarity 824source_bus_id=0 825source_bus_irq=4 826trigger=ConformTrigger 827 828[system.intel_mp_table.base_entries13] 829type=X86IntelMPIOIntAssignment 830dest_io_apic_id=1 831dest_io_apic_intin=0 | 917interrupt_type=INT 918polarity=ConformPolarity 919source_bus_id=0 920source_bus_irq=4 921trigger=ConformTrigger 922 923[system.intel_mp_table.base_entries13] 924type=X86IntelMPIOIntAssignment 925dest_io_apic_id=1 926dest_io_apic_intin=0 |
| 927eventq_index=0 |
|
| 832interrupt_type=ExtInt 833polarity=ConformPolarity 834source_bus_id=0 835source_bus_irq=5 836trigger=ConformTrigger 837 838[system.intel_mp_table.base_entries14] 839type=X86IntelMPIOIntAssignment 840dest_io_apic_id=1 841dest_io_apic_intin=5 | 928interrupt_type=ExtInt 929polarity=ConformPolarity 930source_bus_id=0 931source_bus_irq=5 932trigger=ConformTrigger 933 934[system.intel_mp_table.base_entries14] 935type=X86IntelMPIOIntAssignment 936dest_io_apic_id=1 937dest_io_apic_intin=5 |
| 938eventq_index=0 |
|
| 842interrupt_type=INT 843polarity=ConformPolarity 844source_bus_id=0 845source_bus_irq=5 846trigger=ConformTrigger 847 848[system.intel_mp_table.base_entries15] 849type=X86IntelMPIOIntAssignment 850dest_io_apic_id=1 851dest_io_apic_intin=0 | 939interrupt_type=INT 940polarity=ConformPolarity 941source_bus_id=0 942source_bus_irq=5 943trigger=ConformTrigger 944 945[system.intel_mp_table.base_entries15] 946type=X86IntelMPIOIntAssignment 947dest_io_apic_id=1 948dest_io_apic_intin=0 |
| 949eventq_index=0 |
|
| 852interrupt_type=ExtInt 853polarity=ConformPolarity 854source_bus_id=0 855source_bus_irq=6 856trigger=ConformTrigger 857 858[system.intel_mp_table.base_entries16] 859type=X86IntelMPIOIntAssignment 860dest_io_apic_id=1 861dest_io_apic_intin=6 | 950interrupt_type=ExtInt 951polarity=ConformPolarity 952source_bus_id=0 953source_bus_irq=6 954trigger=ConformTrigger 955 956[system.intel_mp_table.base_entries16] 957type=X86IntelMPIOIntAssignment 958dest_io_apic_id=1 959dest_io_apic_intin=6 |
| 960eventq_index=0 |
|
| 862interrupt_type=INT 863polarity=ConformPolarity 864source_bus_id=0 865source_bus_irq=6 866trigger=ConformTrigger 867 868[system.intel_mp_table.base_entries17] 869type=X86IntelMPIOIntAssignment 870dest_io_apic_id=1 871dest_io_apic_intin=0 | 961interrupt_type=INT 962polarity=ConformPolarity 963source_bus_id=0 964source_bus_irq=6 965trigger=ConformTrigger 966 967[system.intel_mp_table.base_entries17] 968type=X86IntelMPIOIntAssignment 969dest_io_apic_id=1 970dest_io_apic_intin=0 |
| 971eventq_index=0 |
|
| 872interrupt_type=ExtInt 873polarity=ConformPolarity 874source_bus_id=0 875source_bus_irq=7 876trigger=ConformTrigger 877 878[system.intel_mp_table.base_entries18] 879type=X86IntelMPIOIntAssignment 880dest_io_apic_id=1 881dest_io_apic_intin=7 | 972interrupt_type=ExtInt 973polarity=ConformPolarity 974source_bus_id=0 975source_bus_irq=7 976trigger=ConformTrigger 977 978[system.intel_mp_table.base_entries18] 979type=X86IntelMPIOIntAssignment 980dest_io_apic_id=1 981dest_io_apic_intin=7 |
| 982eventq_index=0 |
|
| 882interrupt_type=INT 883polarity=ConformPolarity 884source_bus_id=0 885source_bus_irq=7 886trigger=ConformTrigger 887 888[system.intel_mp_table.base_entries19] 889type=X86IntelMPIOIntAssignment 890dest_io_apic_id=1 891dest_io_apic_intin=0 | 983interrupt_type=INT 984polarity=ConformPolarity 985source_bus_id=0 986source_bus_irq=7 987trigger=ConformTrigger 988 989[system.intel_mp_table.base_entries19] 990type=X86IntelMPIOIntAssignment 991dest_io_apic_id=1 992dest_io_apic_intin=0 |
| 993eventq_index=0 |
|
| 892interrupt_type=ExtInt 893polarity=ConformPolarity 894source_bus_id=0 895source_bus_irq=8 896trigger=ConformTrigger 897 898[system.intel_mp_table.base_entries20] 899type=X86IntelMPIOIntAssignment 900dest_io_apic_id=1 901dest_io_apic_intin=8 | 994interrupt_type=ExtInt 995polarity=ConformPolarity 996source_bus_id=0 997source_bus_irq=8 998trigger=ConformTrigger 999 1000[system.intel_mp_table.base_entries20] 1001type=X86IntelMPIOIntAssignment 1002dest_io_apic_id=1 1003dest_io_apic_intin=8 |
| 1004eventq_index=0 |
|
| 902interrupt_type=INT 903polarity=ConformPolarity 904source_bus_id=0 905source_bus_irq=8 906trigger=ConformTrigger 907 908[system.intel_mp_table.base_entries21] 909type=X86IntelMPIOIntAssignment 910dest_io_apic_id=1 911dest_io_apic_intin=0 | 1005interrupt_type=INT 1006polarity=ConformPolarity 1007source_bus_id=0 1008source_bus_irq=8 1009trigger=ConformTrigger 1010 1011[system.intel_mp_table.base_entries21] 1012type=X86IntelMPIOIntAssignment 1013dest_io_apic_id=1 1014dest_io_apic_intin=0 |
| 1015eventq_index=0 |
|
| 912interrupt_type=ExtInt 913polarity=ConformPolarity 914source_bus_id=0 915source_bus_irq=9 916trigger=ConformTrigger 917 918[system.intel_mp_table.base_entries22] 919type=X86IntelMPIOIntAssignment 920dest_io_apic_id=1 921dest_io_apic_intin=9 | 1016interrupt_type=ExtInt 1017polarity=ConformPolarity 1018source_bus_id=0 1019source_bus_irq=9 1020trigger=ConformTrigger 1021 1022[system.intel_mp_table.base_entries22] 1023type=X86IntelMPIOIntAssignment 1024dest_io_apic_id=1 1025dest_io_apic_intin=9 |
| 1026eventq_index=0 |
|
| 922interrupt_type=INT 923polarity=ConformPolarity 924source_bus_id=0 925source_bus_irq=9 926trigger=ConformTrigger 927 928[system.intel_mp_table.base_entries23] 929type=X86IntelMPIOIntAssignment 930dest_io_apic_id=1 931dest_io_apic_intin=0 | 1027interrupt_type=INT 1028polarity=ConformPolarity 1029source_bus_id=0 1030source_bus_irq=9 1031trigger=ConformTrigger 1032 1033[system.intel_mp_table.base_entries23] 1034type=X86IntelMPIOIntAssignment 1035dest_io_apic_id=1 1036dest_io_apic_intin=0 |
| 1037eventq_index=0 |
|
| 932interrupt_type=ExtInt 933polarity=ConformPolarity 934source_bus_id=0 935source_bus_irq=10 936trigger=ConformTrigger 937 938[system.intel_mp_table.base_entries24] 939type=X86IntelMPIOIntAssignment 940dest_io_apic_id=1 941dest_io_apic_intin=10 | 1038interrupt_type=ExtInt 1039polarity=ConformPolarity 1040source_bus_id=0 1041source_bus_irq=10 1042trigger=ConformTrigger 1043 1044[system.intel_mp_table.base_entries24] 1045type=X86IntelMPIOIntAssignment 1046dest_io_apic_id=1 1047dest_io_apic_intin=10 |
| 1048eventq_index=0 |
|
| 942interrupt_type=INT 943polarity=ConformPolarity 944source_bus_id=0 945source_bus_irq=10 946trigger=ConformTrigger 947 948[system.intel_mp_table.base_entries25] 949type=X86IntelMPIOIntAssignment 950dest_io_apic_id=1 951dest_io_apic_intin=0 | 1049interrupt_type=INT 1050polarity=ConformPolarity 1051source_bus_id=0 1052source_bus_irq=10 1053trigger=ConformTrigger 1054 1055[system.intel_mp_table.base_entries25] 1056type=X86IntelMPIOIntAssignment 1057dest_io_apic_id=1 1058dest_io_apic_intin=0 |
| 1059eventq_index=0 |
|
| 952interrupt_type=ExtInt 953polarity=ConformPolarity 954source_bus_id=0 955source_bus_irq=11 956trigger=ConformTrigger 957 958[system.intel_mp_table.base_entries26] 959type=X86IntelMPIOIntAssignment 960dest_io_apic_id=1 961dest_io_apic_intin=11 | 1060interrupt_type=ExtInt 1061polarity=ConformPolarity 1062source_bus_id=0 1063source_bus_irq=11 1064trigger=ConformTrigger 1065 1066[system.intel_mp_table.base_entries26] 1067type=X86IntelMPIOIntAssignment 1068dest_io_apic_id=1 1069dest_io_apic_intin=11 |
| 1070eventq_index=0 |
|
| 962interrupt_type=INT 963polarity=ConformPolarity 964source_bus_id=0 965source_bus_irq=11 966trigger=ConformTrigger 967 968[system.intel_mp_table.base_entries27] 969type=X86IntelMPIOIntAssignment 970dest_io_apic_id=1 971dest_io_apic_intin=0 | 1071interrupt_type=INT 1072polarity=ConformPolarity 1073source_bus_id=0 1074source_bus_irq=11 1075trigger=ConformTrigger 1076 1077[system.intel_mp_table.base_entries27] 1078type=X86IntelMPIOIntAssignment 1079dest_io_apic_id=1 1080dest_io_apic_intin=0 |
| 1081eventq_index=0 |
|
| 972interrupt_type=ExtInt 973polarity=ConformPolarity 974source_bus_id=0 975source_bus_irq=12 976trigger=ConformTrigger 977 978[system.intel_mp_table.base_entries28] 979type=X86IntelMPIOIntAssignment 980dest_io_apic_id=1 981dest_io_apic_intin=12 | 1082interrupt_type=ExtInt 1083polarity=ConformPolarity 1084source_bus_id=0 1085source_bus_irq=12 1086trigger=ConformTrigger 1087 1088[system.intel_mp_table.base_entries28] 1089type=X86IntelMPIOIntAssignment 1090dest_io_apic_id=1 1091dest_io_apic_intin=12 |
| 1092eventq_index=0 |
|
| 982interrupt_type=INT 983polarity=ConformPolarity 984source_bus_id=0 985source_bus_irq=12 986trigger=ConformTrigger 987 988[system.intel_mp_table.base_entries29] 989type=X86IntelMPIOIntAssignment 990dest_io_apic_id=1 991dest_io_apic_intin=0 | 1093interrupt_type=INT 1094polarity=ConformPolarity 1095source_bus_id=0 1096source_bus_irq=12 1097trigger=ConformTrigger 1098 1099[system.intel_mp_table.base_entries29] 1100type=X86IntelMPIOIntAssignment 1101dest_io_apic_id=1 1102dest_io_apic_intin=0 |
| 1103eventq_index=0 |
|
| 992interrupt_type=ExtInt 993polarity=ConformPolarity 994source_bus_id=0 995source_bus_irq=13 996trigger=ConformTrigger 997 998[system.intel_mp_table.base_entries30] 999type=X86IntelMPIOIntAssignment 1000dest_io_apic_id=1 1001dest_io_apic_intin=13 | 1104interrupt_type=ExtInt 1105polarity=ConformPolarity 1106source_bus_id=0 1107source_bus_irq=13 1108trigger=ConformTrigger 1109 1110[system.intel_mp_table.base_entries30] 1111type=X86IntelMPIOIntAssignment 1112dest_io_apic_id=1 1113dest_io_apic_intin=13 |
| 1114eventq_index=0 |
|
| 1002interrupt_type=INT 1003polarity=ConformPolarity 1004source_bus_id=0 1005source_bus_irq=13 1006trigger=ConformTrigger 1007 1008[system.intel_mp_table.base_entries31] 1009type=X86IntelMPIOIntAssignment 1010dest_io_apic_id=1 1011dest_io_apic_intin=0 | 1115interrupt_type=INT 1116polarity=ConformPolarity 1117source_bus_id=0 1118source_bus_irq=13 1119trigger=ConformTrigger 1120 1121[system.intel_mp_table.base_entries31] 1122type=X86IntelMPIOIntAssignment 1123dest_io_apic_id=1 1124dest_io_apic_intin=0 |
| 1125eventq_index=0 |
|
| 1012interrupt_type=ExtInt 1013polarity=ConformPolarity 1014source_bus_id=0 1015source_bus_irq=14 1016trigger=ConformTrigger 1017 1018[system.intel_mp_table.base_entries32] 1019type=X86IntelMPIOIntAssignment 1020dest_io_apic_id=1 1021dest_io_apic_intin=14 | 1126interrupt_type=ExtInt 1127polarity=ConformPolarity 1128source_bus_id=0 1129source_bus_irq=14 1130trigger=ConformTrigger 1131 1132[system.intel_mp_table.base_entries32] 1133type=X86IntelMPIOIntAssignment 1134dest_io_apic_id=1 1135dest_io_apic_intin=14 |
| 1136eventq_index=0 |
|
| 1022interrupt_type=INT 1023polarity=ConformPolarity 1024source_bus_id=0 1025source_bus_irq=14 1026trigger=ConformTrigger 1027 1028[system.intel_mp_table.ext_entries] 1029type=X86IntelMPBusHierarchy 1030bus_id=0 | 1137interrupt_type=INT 1138polarity=ConformPolarity 1139source_bus_id=0 1140source_bus_irq=14 1141trigger=ConformTrigger 1142 1143[system.intel_mp_table.ext_entries] 1144type=X86IntelMPBusHierarchy 1145bus_id=0 |
| 1146eventq_index=0 |
|
| 1031parent_bus=1 1032subtractive_decode=true 1033 1034[system.intrctrl] 1035type=IntrControl | 1147parent_bus=1 1148subtractive_decode=true 1149 1150[system.intrctrl] 1151type=IntrControl |
| 1152eventq_index=0 |
|
| 1036sys=system 1037 1038[system.iobus] 1039type=NoncoherentBus 1040clk_domain=system.clk_domain | 1153sys=system 1154 1155[system.iobus] 1156type=NoncoherentBus 1157clk_domain=system.clk_domain |
| 1158eventq_index=0 |
|
| 1041header_cycles=1 1042use_default_range=true 1043width=8 1044default=system.pc.pciconfig.pio 1045master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.iocache.cpu_side 1046slave=system.bridge.master system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master 1047 1048[system.iocache] 1049type=BaseCache 1050children=tags 1051addr_ranges=0:134217727 1052assoc=8 1053clk_domain=system.clk_domain | 1159header_cycles=1 1160use_default_range=true 1161width=8 1162default=system.pc.pciconfig.pio 1163master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.iocache.cpu_side 1164slave=system.bridge.master system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master 1165 1166[system.iocache] 1167type=BaseCache 1168children=tags 1169addr_ranges=0:134217727 1170assoc=8 1171clk_domain=system.clk_domain |
| 1172eventq_index=0 |
|
| 1054forward_snoops=false 1055hit_latency=50 1056is_top_level=true 1057max_miss_count=0 1058mshrs=20 1059prefetch_on_access=false 1060prefetcher=Null 1061response_latency=50 --- 6 unchanged lines hidden (view full) --- 1068cpu_side=system.iobus.master[18] 1069mem_side=system.membus.slave[4] 1070 1071[system.iocache.tags] 1072type=LRU 1073assoc=8 1074block_size=64 1075clk_domain=system.clk_domain | 1173forward_snoops=false 1174hit_latency=50 1175is_top_level=true 1176max_miss_count=0 1177mshrs=20 1178prefetch_on_access=false 1179prefetcher=Null 1180response_latency=50 --- 6 unchanged lines hidden (view full) --- 1187cpu_side=system.iobus.master[18] 1188mem_side=system.membus.slave[4] 1189 1190[system.iocache.tags] 1191type=LRU 1192assoc=8 1193block_size=64 1194clk_domain=system.clk_domain |
| 1195eventq_index=0 |
|
| 1076hit_latency=50 1077size=1024 1078 1079[system.membus] 1080type=CoherentBus 1081children=badaddr_responder 1082clk_domain=system.clk_domain | 1196hit_latency=50 1197size=1024 1198 1199[system.membus] 1200type=CoherentBus 1201children=badaddr_responder 1202clk_domain=system.clk_domain |
| 1203eventq_index=0 |
|
| 1083header_cycles=1 1084system=system 1085use_default_range=false 1086width=8 1087default=system.membus.badaddr_responder.pio 1088master=system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave system.physmem.port 1089slave=system.apicbridge.master system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master system.iocache.mem_side 1090 1091[system.membus.badaddr_responder] 1092type=IsaFake 1093clk_domain=system.clk_domain | 1204header_cycles=1 1205system=system 1206use_default_range=false 1207width=8 1208default=system.membus.badaddr_responder.pio 1209master=system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave system.physmem.port 1210slave=system.apicbridge.master system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master system.iocache.mem_side 1211 1212[system.membus.badaddr_responder] 1213type=IsaFake 1214clk_domain=system.clk_domain |
| 1215eventq_index=0 |
|
| 1094fake_mem=false 1095pio_addr=0 1096pio_latency=100000 1097pio_size=8 1098ret_bad_addr=true 1099ret_data16=65535 1100ret_data32=4294967295 1101ret_data64=18446744073709551615 1102ret_data8=255 1103system=system 1104update_data=false 1105warn_access= 1106pio=system.membus.default 1107 1108[system.pc] 1109type=Pc | 1216fake_mem=false 1217pio_addr=0 1218pio_latency=100000 1219pio_size=8 1220ret_bad_addr=true 1221ret_data16=65535 1222ret_data32=4294967295 1223ret_data64=18446744073709551615 1224ret_data8=255 1225system=system 1226update_data=false 1227warn_access= 1228pio=system.membus.default 1229 1230[system.pc] 1231type=Pc |
| 1110children=behind_pci com_1 fake_com_2 fake_com_3 fake_com_4 fake_floppy i_dont_exist pciconfig south_bridge terminal | 1232children=behind_pci com_1 fake_com_2 fake_com_3 fake_com_4 fake_floppy i_dont_exist pciconfig south_bridge 1233eventq_index=0 |
| 1111intrctrl=system.intrctrl 1112system=system 1113 1114[system.pc.behind_pci] 1115type=IsaFake 1116clk_domain=system.clk_domain | 1234intrctrl=system.intrctrl 1235system=system 1236 1237[system.pc.behind_pci] 1238type=IsaFake 1239clk_domain=system.clk_domain |
| 1240eventq_index=0 |
|
| 1117fake_mem=false 1118pio_addr=9223372036854779128 1119pio_latency=100000 1120pio_size=8 1121ret_bad_addr=false 1122ret_data16=65535 1123ret_data32=4294967295 1124ret_data64=18446744073709551615 1125ret_data8=255 1126system=system 1127update_data=false 1128warn_access= 1129pio=system.iobus.master[12] 1130 1131[system.pc.com_1] 1132type=Uart8250 1133children=terminal 1134clk_domain=system.clk_domain | 1241fake_mem=false 1242pio_addr=9223372036854779128 1243pio_latency=100000 1244pio_size=8 1245ret_bad_addr=false 1246ret_data16=65535 1247ret_data32=4294967295 1248ret_data64=18446744073709551615 1249ret_data8=255 1250system=system 1251update_data=false 1252warn_access= 1253pio=system.iobus.master[12] 1254 1255[system.pc.com_1] 1256type=Uart8250 1257children=terminal 1258clk_domain=system.clk_domain |
| 1259eventq_index=0 |
|
| 1135pio_addr=9223372036854776824 1136pio_latency=100000 1137platform=system.pc 1138system=system 1139terminal=system.pc.com_1.terminal 1140pio=system.iobus.master[13] 1141 1142[system.pc.com_1.terminal] 1143type=Terminal | 1260pio_addr=9223372036854776824 1261pio_latency=100000 1262platform=system.pc 1263system=system 1264terminal=system.pc.com_1.terminal 1265pio=system.iobus.master[13] 1266 1267[system.pc.com_1.terminal] 1268type=Terminal |
| 1269eventq_index=0 |
|
| 1144intr_control=system.intrctrl 1145number=0 1146output=true 1147port=3456 1148 | 1270intr_control=system.intrctrl 1271number=0 1272output=true 1273port=3456 1274 |
| 1149[system.pc.com_1.terminal] 1150type=Terminal 1151intr_control=system.intrctrl 1152number=0 1153output=true 1154port=3456 1155 | |
| 1156[system.pc.fake_com_2] 1157type=IsaFake 1158clk_domain=system.clk_domain | 1275[system.pc.fake_com_2] 1276type=IsaFake 1277clk_domain=system.clk_domain |
| 1278eventq_index=0 |
|
| 1159fake_mem=false 1160pio_addr=9223372036854776568 1161pio_latency=100000 1162pio_size=8 1163ret_bad_addr=false 1164ret_data16=65535 1165ret_data32=4294967295 1166ret_data64=18446744073709551615 1167ret_data8=255 1168system=system 1169update_data=false 1170warn_access= 1171pio=system.iobus.master[14] 1172 1173[system.pc.fake_com_3] 1174type=IsaFake 1175clk_domain=system.clk_domain | 1279fake_mem=false 1280pio_addr=9223372036854776568 1281pio_latency=100000 1282pio_size=8 1283ret_bad_addr=false 1284ret_data16=65535 1285ret_data32=4294967295 1286ret_data64=18446744073709551615 1287ret_data8=255 1288system=system 1289update_data=false 1290warn_access= 1291pio=system.iobus.master[14] 1292 1293[system.pc.fake_com_3] 1294type=IsaFake 1295clk_domain=system.clk_domain |
| 1296eventq_index=0 |
|
| 1176fake_mem=false 1177pio_addr=9223372036854776808 1178pio_latency=100000 1179pio_size=8 1180ret_bad_addr=false 1181ret_data16=65535 1182ret_data32=4294967295 1183ret_data64=18446744073709551615 1184ret_data8=255 1185system=system 1186update_data=false 1187warn_access= 1188pio=system.iobus.master[15] 1189 1190[system.pc.fake_com_4] 1191type=IsaFake 1192clk_domain=system.clk_domain | 1297fake_mem=false 1298pio_addr=9223372036854776808 1299pio_latency=100000 1300pio_size=8 1301ret_bad_addr=false 1302ret_data16=65535 1303ret_data32=4294967295 1304ret_data64=18446744073709551615 1305ret_data8=255 1306system=system 1307update_data=false 1308warn_access= 1309pio=system.iobus.master[15] 1310 1311[system.pc.fake_com_4] 1312type=IsaFake 1313clk_domain=system.clk_domain |
| 1314eventq_index=0 |
|
| 1193fake_mem=false 1194pio_addr=9223372036854776552 1195pio_latency=100000 1196pio_size=8 1197ret_bad_addr=false 1198ret_data16=65535 1199ret_data32=4294967295 1200ret_data64=18446744073709551615 1201ret_data8=255 1202system=system 1203update_data=false 1204warn_access= 1205pio=system.iobus.master[16] 1206 1207[system.pc.fake_floppy] 1208type=IsaFake 1209clk_domain=system.clk_domain | 1315fake_mem=false 1316pio_addr=9223372036854776552 1317pio_latency=100000 1318pio_size=8 1319ret_bad_addr=false 1320ret_data16=65535 1321ret_data32=4294967295 1322ret_data64=18446744073709551615 1323ret_data8=255 1324system=system 1325update_data=false 1326warn_access= 1327pio=system.iobus.master[16] 1328 1329[system.pc.fake_floppy] 1330type=IsaFake 1331clk_domain=system.clk_domain |
| 1332eventq_index=0 |
|
| 1210fake_mem=false 1211pio_addr=9223372036854776818 1212pio_latency=100000 1213pio_size=2 1214ret_bad_addr=false 1215ret_data16=65535 1216ret_data32=4294967295 1217ret_data64=18446744073709551615 1218ret_data8=255 1219system=system 1220update_data=false 1221warn_access= 1222pio=system.iobus.master[17] 1223 1224[system.pc.i_dont_exist] 1225type=IsaFake 1226clk_domain=system.clk_domain | 1333fake_mem=false 1334pio_addr=9223372036854776818 1335pio_latency=100000 1336pio_size=2 1337ret_bad_addr=false 1338ret_data16=65535 1339ret_data32=4294967295 1340ret_data64=18446744073709551615 1341ret_data8=255 1342system=system 1343update_data=false 1344warn_access= 1345pio=system.iobus.master[17] 1346 1347[system.pc.i_dont_exist] 1348type=IsaFake 1349clk_domain=system.clk_domain |
| 1350eventq_index=0 |
|
| 1227fake_mem=false 1228pio_addr=9223372036854775936 1229pio_latency=100000 1230pio_size=1 1231ret_bad_addr=false 1232ret_data16=65535 1233ret_data32=4294967295 1234ret_data64=18446744073709551615 1235ret_data8=255 1236system=system 1237update_data=false 1238warn_access= 1239pio=system.iobus.master[11] 1240 1241[system.pc.pciconfig] 1242type=PciConfigAll 1243bus=0 1244clk_domain=system.clk_domain | 1351fake_mem=false 1352pio_addr=9223372036854775936 1353pio_latency=100000 1354pio_size=1 1355ret_bad_addr=false 1356ret_data16=65535 1357ret_data32=4294967295 1358ret_data64=18446744073709551615 1359ret_data8=255 1360system=system 1361update_data=false 1362warn_access= 1363pio=system.iobus.master[11] 1364 1365[system.pc.pciconfig] 1366type=PciConfigAll 1367bus=0 1368clk_domain=system.clk_domain |
| 1369eventq_index=0 |
|
| 1245pio_addr=0 1246pio_latency=30000 1247platform=system.pc 1248size=16777216 1249system=system 1250pio=system.iobus.default 1251 1252[system.pc.south_bridge] 1253type=SouthBridge 1254children=cmos dma1 ide int_lines0 int_lines1 int_lines2 int_lines3 int_lines4 int_lines5 int_lines6 io_apic keyboard pic1 pic2 pit speaker 1255cmos=system.pc.south_bridge.cmos 1256dma1=system.pc.south_bridge.dma1 | 1370pio_addr=0 1371pio_latency=30000 1372platform=system.pc 1373size=16777216 1374system=system 1375pio=system.iobus.default 1376 1377[system.pc.south_bridge] 1378type=SouthBridge 1379children=cmos dma1 ide int_lines0 int_lines1 int_lines2 int_lines3 int_lines4 int_lines5 int_lines6 io_apic keyboard pic1 pic2 pit speaker 1380cmos=system.pc.south_bridge.cmos 1381dma1=system.pc.south_bridge.dma1 |
| 1382eventq_index=0 |
|
| 1257io_apic=system.pc.south_bridge.io_apic 1258keyboard=system.pc.south_bridge.keyboard 1259pic1=system.pc.south_bridge.pic1 1260pic2=system.pc.south_bridge.pic2 1261pit=system.pc.south_bridge.pit 1262platform=system.pc 1263speaker=system.pc.south_bridge.speaker 1264 1265[system.pc.south_bridge.cmos] 1266type=Cmos 1267children=int_pin 1268clk_domain=system.clk_domain | 1383io_apic=system.pc.south_bridge.io_apic 1384keyboard=system.pc.south_bridge.keyboard 1385pic1=system.pc.south_bridge.pic1 1386pic2=system.pc.south_bridge.pic2 1387pit=system.pc.south_bridge.pit 1388platform=system.pc 1389speaker=system.pc.south_bridge.speaker 1390 1391[system.pc.south_bridge.cmos] 1392type=Cmos 1393children=int_pin 1394clk_domain=system.clk_domain |
| 1395eventq_index=0 |
|
| 1269int_pin=system.pc.south_bridge.cmos.int_pin 1270pio_addr=9223372036854775920 1271pio_latency=100000 1272system=system 1273time=Sun Jan 1 00:00:00 2012 1274pio=system.iobus.master[1] 1275 1276[system.pc.south_bridge.cmos.int_pin] 1277type=X86IntSourcePin | 1396int_pin=system.pc.south_bridge.cmos.int_pin 1397pio_addr=9223372036854775920 1398pio_latency=100000 1399system=system 1400time=Sun Jan 1 00:00:00 2012 1401pio=system.iobus.master[1] 1402 1403[system.pc.south_bridge.cmos.int_pin] 1404type=X86IntSourcePin |
| 1405eventq_index=0 |
|
| 1278 1279[system.pc.south_bridge.dma1] 1280type=I8237 1281clk_domain=system.clk_domain | 1406 1407[system.pc.south_bridge.dma1] 1408type=I8237 1409clk_domain=system.clk_domain |
| 1410eventq_index=0 |
|
| 1282pio_addr=9223372036854775808 1283pio_latency=100000 1284system=system 1285pio=system.iobus.master[2] 1286 1287[system.pc.south_bridge.ide] 1288type=IdeController 1289children=disks0 disks1 --- 12 unchanged lines hidden (view full) --- 1302BAR4=1 1303BAR4LegacyIO=false 1304BAR4Size=16 1305BAR5=1 1306BAR5LegacyIO=false 1307BAR5Size=0 1308BIST=0 1309CacheLineSize=0 | 1411pio_addr=9223372036854775808 1412pio_latency=100000 1413system=system 1414pio=system.iobus.master[2] 1415 1416[system.pc.south_bridge.ide] 1417type=IdeController 1418children=disks0 disks1 --- 12 unchanged lines hidden (view full) --- 1431BAR4=1 1432BAR4LegacyIO=false 1433BAR4Size=16 1434BAR5=1 1435BAR5LegacyIO=false 1436BAR5Size=0 1437BIST=0 1438CacheLineSize=0 |
| 1439CapabilityPtr=0 |
|
| 1310CardbusCIS=0 1311ClassCode=1 1312Command=0 1313DeviceID=28945 1314ExpansionROM=0 1315HeaderType=0 1316InterruptLine=14 1317InterruptPin=1 1318LatencyTimer=0 | 1440CardbusCIS=0 1441ClassCode=1 1442Command=0 1443DeviceID=28945 1444ExpansionROM=0 1445HeaderType=0 1446InterruptLine=14 1447InterruptPin=1 1448LatencyTimer=0 |
| 1449MSICAPBaseOffset=0 1450MSICAPCapId=0 1451MSICAPMaskBits=0 1452MSICAPMsgAddr=0 1453MSICAPMsgCtrl=0 1454MSICAPMsgData=0 1455MSICAPMsgUpperAddr=0 1456MSICAPNextCapability=0 1457MSICAPPendingBits=0 1458MSIXCAPBaseOffset=0 1459MSIXCAPCapId=0 1460MSIXCAPNextCapability=0 1461MSIXMsgCtrl=0 1462MSIXPbaOffset=0 1463MSIXTableOffset=0 |
|
| 1319MaximumLatency=0 1320MinimumGrant=0 | 1464MaximumLatency=0 1465MinimumGrant=0 |
| 1466PMCAPBaseOffset=0 1467PMCAPCapId=0 1468PMCAPCapabilities=0 1469PMCAPCtrlStatus=0 1470PMCAPNextCapability=0 1471PXCAPBaseOffset=0 1472PXCAPCapId=0 1473PXCAPCapabilities=0 1474PXCAPDevCap2=0 1475PXCAPDevCapabilities=0 1476PXCAPDevCtrl=0 1477PXCAPDevCtrl2=0 1478PXCAPDevStatus=0 1479PXCAPLinkCap=0 1480PXCAPLinkCtrl=0 1481PXCAPLinkStatus=0 1482PXCAPNextCapability=0 |
|
| 1321ProgIF=128 1322Revision=0 1323Status=640 1324SubClassCode=1 1325SubsystemID=0 1326SubsystemVendorID=0 1327VendorID=32902 1328clk_domain=system.clk_domain 1329config_latency=20000 1330ctrl_offset=0 1331disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1 | 1483ProgIF=128 1484Revision=0 1485Status=640 1486SubClassCode=1 1487SubsystemID=0 1488SubsystemVendorID=0 1489VendorID=32902 1490clk_domain=system.clk_domain 1491config_latency=20000 1492ctrl_offset=0 1493disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1 |
| 1494eventq_index=0 |
|
| 1332io_shift=0 1333pci_bus=0 1334pci_dev=4 1335pci_func=0 1336pio_latency=30000 1337platform=system.pc 1338system=system 1339config=system.iobus.master[4] 1340dma=system.iobus.slave[1] 1341pio=system.iobus.master[3] 1342 1343[system.pc.south_bridge.ide.disks0] 1344type=IdeDisk 1345children=image 1346delay=1000000 1347driveID=master | 1495io_shift=0 1496pci_bus=0 1497pci_dev=4 1498pci_func=0 1499pio_latency=30000 1500platform=system.pc 1501system=system 1502config=system.iobus.master[4] 1503dma=system.iobus.slave[1] 1504pio=system.iobus.master[3] 1505 1506[system.pc.south_bridge.ide.disks0] 1507type=IdeDisk 1508children=image 1509delay=1000000 1510driveID=master |
| 1511eventq_index=0 |
|
| 1348image=system.pc.south_bridge.ide.disks0.image 1349 1350[system.pc.south_bridge.ide.disks0.image] 1351type=CowDiskImage 1352children=child 1353child=system.pc.south_bridge.ide.disks0.image.child | 1512image=system.pc.south_bridge.ide.disks0.image 1513 1514[system.pc.south_bridge.ide.disks0.image] 1515type=CowDiskImage 1516children=child 1517child=system.pc.south_bridge.ide.disks0.image.child |
| 1518eventq_index=0 |
|
| 1354image_file= 1355read_only=false 1356table_size=65536 1357 1358[system.pc.south_bridge.ide.disks0.image.child] 1359type=RawDiskImage | 1519image_file= 1520read_only=false 1521table_size=65536 1522 1523[system.pc.south_bridge.ide.disks0.image.child] 1524type=RawDiskImage |
| 1360image_file=/dist/m5/system/disks/linux-x86.img | 1525eventq_index=0 1526image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img |
| 1361read_only=true 1362 1363[system.pc.south_bridge.ide.disks1] 1364type=IdeDisk 1365children=image 1366delay=1000000 1367driveID=master | 1527read_only=true 1528 1529[system.pc.south_bridge.ide.disks1] 1530type=IdeDisk 1531children=image 1532delay=1000000 1533driveID=master |
| 1534eventq_index=0 |
|
| 1368image=system.pc.south_bridge.ide.disks1.image 1369 1370[system.pc.south_bridge.ide.disks1.image] 1371type=CowDiskImage 1372children=child 1373child=system.pc.south_bridge.ide.disks1.image.child | 1535image=system.pc.south_bridge.ide.disks1.image 1536 1537[system.pc.south_bridge.ide.disks1.image] 1538type=CowDiskImage 1539children=child 1540child=system.pc.south_bridge.ide.disks1.image.child |
| 1541eventq_index=0 |
|
| 1374image_file= 1375read_only=false 1376table_size=65536 1377 1378[system.pc.south_bridge.ide.disks1.image.child] 1379type=RawDiskImage | 1542image_file= 1543read_only=false 1544table_size=65536 1545 1546[system.pc.south_bridge.ide.disks1.image.child] 1547type=RawDiskImage |
| 1380image_file=/dist/m5/system/disks/linux-bigswap2.img | 1548eventq_index=0 1549image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img |
| 1381read_only=true 1382 1383[system.pc.south_bridge.int_lines0] 1384type=X86IntLine 1385children=sink | 1550read_only=true 1551 1552[system.pc.south_bridge.int_lines0] 1553type=X86IntLine 1554children=sink |
| 1555eventq_index=0 |
|
| 1386sink=system.pc.south_bridge.int_lines0.sink 1387source=system.pc.south_bridge.pic1.output 1388 1389[system.pc.south_bridge.int_lines0.sink] 1390type=X86IntSinkPin 1391device=system.pc.south_bridge.io_apic | 1556sink=system.pc.south_bridge.int_lines0.sink 1557source=system.pc.south_bridge.pic1.output 1558 1559[system.pc.south_bridge.int_lines0.sink] 1560type=X86IntSinkPin 1561device=system.pc.south_bridge.io_apic |
| 1562eventq_index=0 |
|
| 1392number=0 1393 1394[system.pc.south_bridge.int_lines1] 1395type=X86IntLine 1396children=sink | 1563number=0 1564 1565[system.pc.south_bridge.int_lines1] 1566type=X86IntLine 1567children=sink |
| 1568eventq_index=0 |
|
| 1397sink=system.pc.south_bridge.int_lines1.sink 1398source=system.pc.south_bridge.pic2.output 1399 1400[system.pc.south_bridge.int_lines1.sink] 1401type=X86IntSinkPin 1402device=system.pc.south_bridge.pic1 | 1569sink=system.pc.south_bridge.int_lines1.sink 1570source=system.pc.south_bridge.pic2.output 1571 1572[system.pc.south_bridge.int_lines1.sink] 1573type=X86IntSinkPin 1574device=system.pc.south_bridge.pic1 |
| 1575eventq_index=0 |
|
| 1403number=2 1404 1405[system.pc.south_bridge.int_lines2] 1406type=X86IntLine 1407children=sink | 1576number=2 1577 1578[system.pc.south_bridge.int_lines2] 1579type=X86IntLine 1580children=sink |
| 1581eventq_index=0 |
|
| 1408sink=system.pc.south_bridge.int_lines2.sink 1409source=system.pc.south_bridge.cmos.int_pin 1410 1411[system.pc.south_bridge.int_lines2.sink] 1412type=X86IntSinkPin 1413device=system.pc.south_bridge.pic2 | 1582sink=system.pc.south_bridge.int_lines2.sink 1583source=system.pc.south_bridge.cmos.int_pin 1584 1585[system.pc.south_bridge.int_lines2.sink] 1586type=X86IntSinkPin 1587device=system.pc.south_bridge.pic2 |
| 1588eventq_index=0 |
|
| 1414number=0 1415 1416[system.pc.south_bridge.int_lines3] 1417type=X86IntLine 1418children=sink | 1589number=0 1590 1591[system.pc.south_bridge.int_lines3] 1592type=X86IntLine 1593children=sink |
| 1594eventq_index=0 |
|
| 1419sink=system.pc.south_bridge.int_lines3.sink 1420source=system.pc.south_bridge.pit.int_pin 1421 1422[system.pc.south_bridge.int_lines3.sink] 1423type=X86IntSinkPin 1424device=system.pc.south_bridge.pic1 | 1595sink=system.pc.south_bridge.int_lines3.sink 1596source=system.pc.south_bridge.pit.int_pin 1597 1598[system.pc.south_bridge.int_lines3.sink] 1599type=X86IntSinkPin 1600device=system.pc.south_bridge.pic1 |
| 1601eventq_index=0 |
|
| 1425number=0 1426 1427[system.pc.south_bridge.int_lines4] 1428type=X86IntLine 1429children=sink | 1602number=0 1603 1604[system.pc.south_bridge.int_lines4] 1605type=X86IntLine 1606children=sink |
| 1607eventq_index=0 |
|
| 1430sink=system.pc.south_bridge.int_lines4.sink 1431source=system.pc.south_bridge.pit.int_pin 1432 1433[system.pc.south_bridge.int_lines4.sink] 1434type=X86IntSinkPin 1435device=system.pc.south_bridge.io_apic | 1608sink=system.pc.south_bridge.int_lines4.sink 1609source=system.pc.south_bridge.pit.int_pin 1610 1611[system.pc.south_bridge.int_lines4.sink] 1612type=X86IntSinkPin 1613device=system.pc.south_bridge.io_apic |
| 1614eventq_index=0 |
|
| 1436number=2 1437 1438[system.pc.south_bridge.int_lines5] 1439type=X86IntLine 1440children=sink | 1615number=2 1616 1617[system.pc.south_bridge.int_lines5] 1618type=X86IntLine 1619children=sink |
| 1620eventq_index=0 |
|
| 1441sink=system.pc.south_bridge.int_lines5.sink 1442source=system.pc.south_bridge.keyboard.keyboard_int_pin 1443 1444[system.pc.south_bridge.int_lines5.sink] 1445type=X86IntSinkPin 1446device=system.pc.south_bridge.io_apic | 1621sink=system.pc.south_bridge.int_lines5.sink 1622source=system.pc.south_bridge.keyboard.keyboard_int_pin 1623 1624[system.pc.south_bridge.int_lines5.sink] 1625type=X86IntSinkPin 1626device=system.pc.south_bridge.io_apic |
| 1627eventq_index=0 |
|
| 1447number=1 1448 1449[system.pc.south_bridge.int_lines6] 1450type=X86IntLine 1451children=sink | 1628number=1 1629 1630[system.pc.south_bridge.int_lines6] 1631type=X86IntLine 1632children=sink |
| 1633eventq_index=0 |
|
| 1452sink=system.pc.south_bridge.int_lines6.sink 1453source=system.pc.south_bridge.keyboard.mouse_int_pin 1454 1455[system.pc.south_bridge.int_lines6.sink] 1456type=X86IntSinkPin 1457device=system.pc.south_bridge.io_apic | 1634sink=system.pc.south_bridge.int_lines6.sink 1635source=system.pc.south_bridge.keyboard.mouse_int_pin 1636 1637[system.pc.south_bridge.int_lines6.sink] 1638type=X86IntSinkPin 1639device=system.pc.south_bridge.io_apic |
| 1640eventq_index=0 |
|
| 1458number=12 1459 1460[system.pc.south_bridge.io_apic] 1461type=I82094AA 1462apic_id=1 1463clk_domain=system.clk_domain | 1641number=12 1642 1643[system.pc.south_bridge.io_apic] 1644type=I82094AA 1645apic_id=1 1646clk_domain=system.clk_domain |
| 1647eventq_index=0 |
|
| 1464external_int_pic=system.pc.south_bridge.pic1 1465int_latency=1000 1466pio_addr=4273995776 1467pio_latency=100000 1468system=system 1469int_master=system.iobus.slave[2] 1470pio=system.iobus.master[10] 1471 1472[system.pc.south_bridge.keyboard] 1473type=I8042 1474children=keyboard_int_pin mouse_int_pin 1475clk_domain=system.clk_domain 1476command_port=9223372036854775908 1477data_port=9223372036854775904 | 1648external_int_pic=system.pc.south_bridge.pic1 1649int_latency=1000 1650pio_addr=4273995776 1651pio_latency=100000 1652system=system 1653int_master=system.iobus.slave[2] 1654pio=system.iobus.master[10] 1655 1656[system.pc.south_bridge.keyboard] 1657type=I8042 1658children=keyboard_int_pin mouse_int_pin 1659clk_domain=system.clk_domain 1660command_port=9223372036854775908 1661data_port=9223372036854775904 |
| 1662eventq_index=0 |
|
| 1478keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin 1479mouse_int_pin=system.pc.south_bridge.keyboard.mouse_int_pin 1480pio_addr=0 1481pio_latency=100000 1482system=system 1483pio=system.iobus.master[5] 1484 1485[system.pc.south_bridge.keyboard.keyboard_int_pin] 1486type=X86IntSourcePin | 1663keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin 1664mouse_int_pin=system.pc.south_bridge.keyboard.mouse_int_pin 1665pio_addr=0 1666pio_latency=100000 1667system=system 1668pio=system.iobus.master[5] 1669 1670[system.pc.south_bridge.keyboard.keyboard_int_pin] 1671type=X86IntSourcePin |
| 1672eventq_index=0 |
|
| 1487 1488[system.pc.south_bridge.keyboard.mouse_int_pin] 1489type=X86IntSourcePin | 1673 1674[system.pc.south_bridge.keyboard.mouse_int_pin] 1675type=X86IntSourcePin |
| 1676eventq_index=0 |
|
| 1490 1491[system.pc.south_bridge.pic1] 1492type=I8259 1493children=output 1494clk_domain=system.clk_domain | 1677 1678[system.pc.south_bridge.pic1] 1679type=I8259 1680children=output 1681clk_domain=system.clk_domain |
| 1682eventq_index=0 |
|
| 1495mode=I8259Master 1496output=system.pc.south_bridge.pic1.output 1497pio_addr=9223372036854775840 1498pio_latency=100000 1499slave=system.pc.south_bridge.pic2 1500system=system 1501pio=system.iobus.master[6] 1502 1503[system.pc.south_bridge.pic1.output] 1504type=X86IntSourcePin | 1683mode=I8259Master 1684output=system.pc.south_bridge.pic1.output 1685pio_addr=9223372036854775840 1686pio_latency=100000 1687slave=system.pc.south_bridge.pic2 1688system=system 1689pio=system.iobus.master[6] 1690 1691[system.pc.south_bridge.pic1.output] 1692type=X86IntSourcePin |
| 1693eventq_index=0 |
|
| 1505 1506[system.pc.south_bridge.pic2] 1507type=I8259 1508children=output 1509clk_domain=system.clk_domain | 1694 1695[system.pc.south_bridge.pic2] 1696type=I8259 1697children=output 1698clk_domain=system.clk_domain |
| 1699eventq_index=0 |
|
| 1510mode=I8259Slave 1511output=system.pc.south_bridge.pic2.output 1512pio_addr=9223372036854775968 1513pio_latency=100000 1514slave=Null 1515system=system 1516pio=system.iobus.master[7] 1517 1518[system.pc.south_bridge.pic2.output] 1519type=X86IntSourcePin | 1700mode=I8259Slave 1701output=system.pc.south_bridge.pic2.output 1702pio_addr=9223372036854775968 1703pio_latency=100000 1704slave=Null 1705system=system 1706pio=system.iobus.master[7] 1707 1708[system.pc.south_bridge.pic2.output] 1709type=X86IntSourcePin |
| 1710eventq_index=0 |
|
| 1520 1521[system.pc.south_bridge.pit] 1522type=I8254 1523children=int_pin 1524clk_domain=system.clk_domain | 1711 1712[system.pc.south_bridge.pit] 1713type=I8254 1714children=int_pin 1715clk_domain=system.clk_domain |
| 1716eventq_index=0 |
|
| 1525int_pin=system.pc.south_bridge.pit.int_pin 1526pio_addr=9223372036854775872 1527pio_latency=100000 1528system=system 1529pio=system.iobus.master[8] 1530 1531[system.pc.south_bridge.pit.int_pin] 1532type=X86IntSourcePin | 1717int_pin=system.pc.south_bridge.pit.int_pin 1718pio_addr=9223372036854775872 1719pio_latency=100000 1720system=system 1721pio=system.iobus.master[8] 1722 1723[system.pc.south_bridge.pit.int_pin] 1724type=X86IntSourcePin |
| 1725eventq_index=0 |
|
| 1533 1534[system.pc.south_bridge.speaker] 1535type=PcSpeaker 1536clk_domain=system.clk_domain | 1726 1727[system.pc.south_bridge.speaker] 1728type=PcSpeaker 1729clk_domain=system.clk_domain |
| 1730eventq_index=0 |
|
| 1537i8254=system.pc.south_bridge.pit 1538pio_addr=9223372036854775905 1539pio_latency=100000 1540system=system 1541pio=system.iobus.master[9] 1542 1543[system.physmem] 1544type=SimpleDRAM 1545activation_limit=4 1546addr_mapping=RaBaChCo 1547banks_per_rank=8 1548burst_length=8 1549channels=1 1550clk_domain=system.clk_domain 1551conf_table_reported=true 1552device_bus_width=8 1553device_rowbuffer_size=1024 1554devices_per_rank=8 | 1731i8254=system.pc.south_bridge.pit 1732pio_addr=9223372036854775905 1733pio_latency=100000 1734system=system 1735pio=system.iobus.master[9] 1736 1737[system.physmem] 1738type=SimpleDRAM 1739activation_limit=4 1740addr_mapping=RaBaChCo 1741banks_per_rank=8 1742burst_length=8 1743channels=1 1744clk_domain=system.clk_domain 1745conf_table_reported=true 1746device_bus_width=8 1747device_rowbuffer_size=1024 1748devices_per_rank=8 |
| 1749eventq_index=0 |
|
| 1555in_addr_map=true 1556mem_sched_policy=frfcfs 1557null=false 1558page_policy=open 1559range=0:134217727 1560ranks_per_channel=2 1561read_buffer_size=32 1562static_backend_latency=10000 1563static_frontend_latency=10000 1564tBURST=5000 1565tCL=13750 | 1750in_addr_map=true 1751mem_sched_policy=frfcfs 1752null=false 1753page_policy=open 1754range=0:134217727 1755ranks_per_channel=2 1756read_buffer_size=32 1757static_backend_latency=10000 1758static_frontend_latency=10000 1759tBURST=5000 1760tCL=13750 |
| 1761tRAS=35000 |
|
| 1566tRCD=13750 1567tREFI=7800000 1568tRFC=300000 1569tRP=13750 | 1762tRCD=13750 1763tREFI=7800000 1764tRFC=300000 1765tRP=13750 |
| 1766tRRD=6250 |
|
| 1570tWTR=7500 1571tXAW=40000 1572write_buffer_size=32 | 1767tWTR=7500 1768tXAW=40000 1769write_buffer_size=32 |
| 1573write_thresh_perc=70 | 1770write_high_thresh_perc=70 1771write_low_thresh_perc=0 |
| 1574port=system.membus.master[3] 1575 1576[system.smbios_table] 1577type=X86SMBiosSMBiosTable 1578children=structures | 1772port=system.membus.master[3] 1773 1774[system.smbios_table] 1775type=X86SMBiosSMBiosTable 1776children=structures |
| 1777eventq_index=0 |
|
| 1579major_version=2 1580minor_version=5 1581structures=system.smbios_table.structures 1582 1583[system.smbios_table.structures] 1584type=X86SMBiosBiosInformation 1585characteristic_ext_bytes= 1586characteristics= 1587emb_cont_firmware_major=0 1588emb_cont_firmware_minor=0 | 1778major_version=2 1779minor_version=5 1780structures=system.smbios_table.structures 1781 1782[system.smbios_table.structures] 1783type=X86SMBiosBiosInformation 1784characteristic_ext_bytes= 1785characteristics= 1786emb_cont_firmware_major=0 1787emb_cont_firmware_minor=0 |
| 1788eventq_index=0 |
|
| 1589major=0 1590minor=0 1591release_date=06/08/2008 1592rom_size=0 1593starting_addr_segment=0 1594vendor= 1595version= 1596 1597[system.voltage_domain] 1598type=VoltageDomain | 1789major=0 1790minor=0 1791release_date=06/08/2008 1792rom_size=0 1793starting_addr_segment=0 1794vendor= 1795version= 1796 1797[system.voltage_domain] 1798type=VoltageDomain |
| 1799eventq_index=0 |
|
| 1599voltage=1.000000 1600 | 1800voltage=1.000000 1801 |