7,11c7,11
< host_inst_rate 1770185 # Simulator instruction rate (inst/s)
< host_op_rate 2080350 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 92115569363 # Simulator tick rate (ticks/s)
< host_mem_usage 676500 # Number of bytes of host memory used
< host_seconds 554.86 # Real time elapsed on the host
---
> host_inst_rate 1114977 # Simulator instruction rate (inst/s)
> host_op_rate 1310339 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 58020354238 # Simulator tick rate (ticks/s)
> host_mem_usage 675736 # Number of bytes of host memory used
> host_seconds 880.92 # Real time elapsed on the host
303,306c303,306
< system.cpu.dcache.demand_hits::cpu.data 330184303 # number of demand (read+write) hits
< system.cpu.dcache.demand_hits::total 330184303 # number of demand (read+write) hits
< system.cpu.dcache.overall_hits::cpu.data 330608768 # number of overall hits
< system.cpu.dcache.overall_hits::total 330608768 # number of overall hits
---
> system.cpu.dcache.demand_hits::cpu.data 330520588 # number of demand (read+write) hits
> system.cpu.dcache.demand_hits::total 330520588 # number of demand (read+write) hits
> system.cpu.dcache.overall_hits::cpu.data 330945053 # number of overall hits
> system.cpu.dcache.overall_hits::total 330945053 # number of overall hits
319,322c319,322
< system.cpu.dcache.demand_misses::cpu.data 8571515 # number of demand (read+write) misses
< system.cpu.dcache.demand_misses::total 8571515 # number of demand (read+write) misses
< system.cpu.dcache.overall_misses::cpu.data 10157717 # number of overall misses
< system.cpu.dcache.overall_misses::total 10157717 # number of overall misses
---
> system.cpu.dcache.demand_misses::cpu.data 9818285 # number of demand (read+write) misses
> system.cpu.dcache.demand_misses::total 9818285 # number of demand (read+write) misses
> system.cpu.dcache.overall_misses::cpu.data 11404487 # number of overall misses
> system.cpu.dcache.overall_misses::total 11404487 # number of overall misses
335,338c335,338
< system.cpu.dcache.demand_accesses::cpu.data 338755818 # number of demand (read+write) accesses
< system.cpu.dcache.demand_accesses::total 338755818 # number of demand (read+write) accesses
< system.cpu.dcache.overall_accesses::cpu.data 340766485 # number of overall (read+write) accesses
< system.cpu.dcache.overall_accesses::total 340766485 # number of overall (read+write) accesses
---
> system.cpu.dcache.demand_accesses::cpu.data 340338873 # number of demand (read+write) accesses
> system.cpu.dcache.demand_accesses::total 340338873 # number of demand (read+write) accesses
> system.cpu.dcache.overall_accesses::cpu.data 342349540 # number of overall (read+write) accesses
> system.cpu.dcache.overall_accesses::total 342349540 # number of overall (read+write) accesses
351,354c351,354
< system.cpu.dcache.demand_miss_rate::cpu.data 0.025303 # miss rate for demand accesses
< system.cpu.dcache.demand_miss_rate::total 0.025303 # miss rate for demand accesses
< system.cpu.dcache.overall_miss_rate::cpu.data 0.029808 # miss rate for overall accesses
< system.cpu.dcache.overall_miss_rate::total 0.029808 # miss rate for overall accesses
---
> system.cpu.dcache.demand_miss_rate::cpu.data 0.028849 # miss rate for demand accesses
> system.cpu.dcache.demand_miss_rate::total 0.028849 # miss rate for demand accesses
> system.cpu.dcache.overall_miss_rate::cpu.data 0.033312 # miss rate for overall accesses
> system.cpu.dcache.overall_miss_rate::total 0.033312 # miss rate for overall accesses
361,362d360
< system.cpu.dcache.fast_writes 0 # number of fast writes performed
< system.cpu.dcache.cache_copies 0 # number of cache copies performed
365d362
< system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
412,413d408
< system.cpu.icache.fast_writes 0 # number of fast writes performed
< system.cpu.icache.cache_copies 0 # number of cache copies performed
416d410
< system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
558,559d551
< system.cpu.l2cache.fast_writes 0 # number of fast writes performed
< system.cpu.l2cache.cache_copies 0 # number of cache copies performed
562d553
< system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
673,674c664,665
< system.iocache.demand_misses::realview.ide 8813 # number of demand (read+write) misses
< system.iocache.demand_misses::total 8853 # number of demand (read+write) misses
---
> system.iocache.demand_misses::realview.ide 115477 # number of demand (read+write) misses
> system.iocache.demand_misses::total 115517 # number of demand (read+write) misses
676,677c667,668
< system.iocache.overall_misses::realview.ide 8813 # number of overall misses
< system.iocache.overall_misses::total 8853 # number of overall misses
---
> system.iocache.overall_misses::realview.ide 115477 # number of overall misses
> system.iocache.overall_misses::total 115517 # number of overall misses
686,687c677,678
< system.iocache.demand_accesses::realview.ide 8813 # number of demand (read+write) accesses
< system.iocache.demand_accesses::total 8853 # number of demand (read+write) accesses
---
> system.iocache.demand_accesses::realview.ide 115477 # number of demand (read+write) accesses
> system.iocache.demand_accesses::total 115517 # number of demand (read+write) accesses
689,690c680,681
< system.iocache.overall_accesses::realview.ide 8813 # number of overall (read+write) accesses
< system.iocache.overall_accesses::total 8853 # number of overall (read+write) accesses
---
> system.iocache.overall_accesses::realview.ide 115477 # number of overall (read+write) accesses
> system.iocache.overall_accesses::total 115517 # number of overall (read+write) accesses
710,711d700
< system.iocache.fast_writes 0 # number of fast writes performed
< system.iocache.cache_copies 0 # number of cache copies performed
714d702
< system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate