| stats.txt (11570:4aac82f10951) | stats.txt (11606:6b749761c398) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 47.296282 # Number of seconds simulated 4sim_ticks 47296281748500 # Number of ticks simulated 5final_tick 47296281748500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 47.296282 # Number of seconds simulated 4sim_ticks 47296281748500 # Number of ticks simulated 5final_tick 47296281748500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 717114 # Simulator instruction rate (inst/s) 8host_op_rate 843581 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 34713303168 # Simulator tick rate (ticks/s) 10host_mem_usage 688104 # Number of bytes of host memory used 11host_seconds 1362.48 # Real time elapsed on the host | 7host_inst_rate 890958 # Simulator instruction rate (inst/s) 8host_op_rate 1048084 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 43128593002 # Simulator tick rate (ticks/s) 10host_mem_usage 697472 # Number of bytes of host memory used 11host_seconds 1096.63 # Real time elapsed on the host |
| 12sim_insts 977055082 # Number of instructions simulated 13sim_ops 1149364510 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 12sim_insts 977055082 # Number of instructions simulated 13sim_ops 1149364510 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 17system.physmem.bytes_read::cpu0.dtb.walker 151424 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu0.itb.walker 124352 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu0.inst 3875572 # Number of bytes read from this memory 20system.physmem.bytes_read::cpu0.data 35081800 # Number of bytes read from this memory 21system.physmem.bytes_read::cpu1.dtb.walker 222336 # Number of bytes read from this memory 22system.physmem.bytes_read::cpu1.itb.walker 221312 # Number of bytes read from this memory 23system.physmem.bytes_read::cpu1.inst 2647048 # Number of bytes read from this memory 24system.physmem.bytes_read::cpu1.data 38747248 # Number of bytes read from this memory 25system.physmem.bytes_read::realview.ide 401984 # Number of bytes read from this memory 26system.physmem.bytes_read::total 81473076 # Number of bytes read from this memory 27system.physmem.bytes_inst_read::cpu0.inst 3875572 # Number of instructions bytes read from this memory 28system.physmem.bytes_inst_read::cpu1.inst 2647048 # Number of instructions bytes read from this memory 29system.physmem.bytes_inst_read::total 6522620 # Number of instructions bytes read from this memory 30system.physmem.bytes_written::writebacks 101454976 # Number of bytes written to this memory | 17system.physmem.bytes_read::cpu0.dtb.walker 154816 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu0.itb.walker 128128 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu0.inst 4238644 # Number of bytes read from this memory 20system.physmem.bytes_read::cpu0.data 35981768 # Number of bytes read from this memory 21system.physmem.bytes_read::cpu1.dtb.walker 224128 # Number of bytes read from this memory 22system.physmem.bytes_read::cpu1.itb.walker 222976 # Number of bytes read from this memory 23system.physmem.bytes_read::cpu1.inst 3009416 # Number of bytes read from this memory 24system.physmem.bytes_read::cpu1.data 39414640 # Number of bytes read from this memory 25system.physmem.bytes_read::realview.ide 402560 # Number of bytes read from this memory 26system.physmem.bytes_read::total 83777076 # Number of bytes read from this memory 27system.physmem.bytes_inst_read::cpu0.inst 4238644 # Number of instructions bytes read from this memory 28system.physmem.bytes_inst_read::cpu1.inst 3009416 # Number of instructions bytes read from this memory 29system.physmem.bytes_inst_read::total 7248060 # Number of instructions bytes read from this memory 30system.physmem.bytes_written::writebacks 102370496 # Number of bytes written to this memory |
| 31system.physmem.bytes_written::cpu0.data 20580 # Number of bytes written to this memory 32system.physmem.bytes_written::cpu1.data 4 # Number of bytes written to this memory | 31system.physmem.bytes_written::cpu0.data 20580 # Number of bytes written to this memory 32system.physmem.bytes_written::cpu1.data 4 # Number of bytes written to this memory |
| 33system.physmem.bytes_written::total 101475560 # Number of bytes written to this memory 34system.physmem.num_reads::cpu0.dtb.walker 2366 # Number of read requests responded to by this memory 35system.physmem.num_reads::cpu0.itb.walker 1943 # Number of read requests responded to by this memory 36system.physmem.num_reads::cpu0.inst 100963 # Number of read requests responded to by this memory 37system.physmem.num_reads::cpu0.data 548166 # Number of read requests responded to by this memory 38system.physmem.num_reads::cpu1.dtb.walker 3474 # Number of read requests responded to by this memory 39system.physmem.num_reads::cpu1.itb.walker 3458 # Number of read requests responded to by this memory 40system.physmem.num_reads::cpu1.inst 41467 # Number of read requests responded to by this memory 41system.physmem.num_reads::cpu1.data 605442 # Number of read requests responded to by this memory 42system.physmem.num_reads::realview.ide 6281 # Number of read requests responded to by this memory 43system.physmem.num_reads::total 1313560 # Number of read requests responded to by this memory 44system.physmem.num_writes::writebacks 1585234 # Number of write requests responded to by this memory | 33system.physmem.bytes_written::total 102391080 # Number of bytes written to this memory 34system.physmem.num_reads::cpu0.dtb.walker 2419 # Number of read requests responded to by this memory 35system.physmem.num_reads::cpu0.itb.walker 2002 # Number of read requests responded to by this memory 36system.physmem.num_reads::cpu0.inst 106636 # Number of read requests responded to by this memory 37system.physmem.num_reads::cpu0.data 562228 # Number of read requests responded to by this memory 38system.physmem.num_reads::cpu1.dtb.walker 3502 # Number of read requests responded to by this memory 39system.physmem.num_reads::cpu1.itb.walker 3484 # Number of read requests responded to by this memory 40system.physmem.num_reads::cpu1.inst 47129 # Number of read requests responded to by this memory 41system.physmem.num_reads::cpu1.data 615870 # Number of read requests responded to by this memory 42system.physmem.num_reads::realview.ide 6290 # Number of read requests responded to by this memory 43system.physmem.num_reads::total 1349560 # Number of read requests responded to by this memory 44system.physmem.num_writes::writebacks 1599539 # Number of write requests responded to by this memory |
| 45system.physmem.num_writes::cpu0.data 2573 # Number of write requests responded to by this memory 46system.physmem.num_writes::cpu1.data 1 # Number of write requests responded to by this memory | 45system.physmem.num_writes::cpu0.data 2573 # Number of write requests responded to by this memory 46system.physmem.num_writes::cpu1.data 1 # Number of write requests responded to by this memory |
| 47system.physmem.num_writes::total 1587808 # Number of write requests responded to by this memory 48system.physmem.bw_read::cpu0.dtb.walker 3202 # Total read bandwidth from this memory (bytes/s) 49system.physmem.bw_read::cpu0.itb.walker 2629 # Total read bandwidth from this memory (bytes/s) 50system.physmem.bw_read::cpu0.inst 81942 # Total read bandwidth from this memory (bytes/s) 51system.physmem.bw_read::cpu0.data 741745 # Total read bandwidth from this memory (bytes/s) 52system.physmem.bw_read::cpu1.dtb.walker 4701 # Total read bandwidth from this memory (bytes/s) 53system.physmem.bw_read::cpu1.itb.walker 4679 # Total read bandwidth from this memory (bytes/s) 54system.physmem.bw_read::cpu1.inst 55967 # Total read bandwidth from this memory (bytes/s) 55system.physmem.bw_read::cpu1.data 819245 # Total read bandwidth from this memory (bytes/s) 56system.physmem.bw_read::realview.ide 8499 # Total read bandwidth from this memory (bytes/s) 57system.physmem.bw_read::total 1722611 # Total read bandwidth from this memory (bytes/s) 58system.physmem.bw_inst_read::cpu0.inst 81942 # Instruction read bandwidth from this memory (bytes/s) 59system.physmem.bw_inst_read::cpu1.inst 55967 # Instruction read bandwidth from this memory (bytes/s) 60system.physmem.bw_inst_read::total 137910 # Instruction read bandwidth from this memory (bytes/s) 61system.physmem.bw_write::writebacks 2145094 # Write bandwidth from this memory (bytes/s) | 47system.physmem.num_writes::total 1602113 # Number of write requests responded to by this memory 48system.physmem.bw_read::cpu0.dtb.walker 3273 # Total read bandwidth from this memory (bytes/s) 49system.physmem.bw_read::cpu0.itb.walker 2709 # Total read bandwidth from this memory (bytes/s) 50system.physmem.bw_read::cpu0.inst 89619 # Total read bandwidth from this memory (bytes/s) 51system.physmem.bw_read::cpu0.data 760774 # Total read bandwidth from this memory (bytes/s) 52system.physmem.bw_read::cpu1.dtb.walker 4739 # Total read bandwidth from this memory (bytes/s) 53system.physmem.bw_read::cpu1.itb.walker 4714 # Total read bandwidth from this memory (bytes/s) 54system.physmem.bw_read::cpu1.inst 63629 # Total read bandwidth from this memory (bytes/s) 55system.physmem.bw_read::cpu1.data 833356 # Total read bandwidth from this memory (bytes/s) 56system.physmem.bw_read::realview.ide 8511 # Total read bandwidth from this memory (bytes/s) 57system.physmem.bw_read::total 1771325 # Total read bandwidth from this memory (bytes/s) 58system.physmem.bw_inst_read::cpu0.inst 89619 # Instruction read bandwidth from this memory (bytes/s) 59system.physmem.bw_inst_read::cpu1.inst 63629 # Instruction read bandwidth from this memory (bytes/s) 60system.physmem.bw_inst_read::total 153248 # Instruction read bandwidth from this memory (bytes/s) 61system.physmem.bw_write::writebacks 2164451 # Write bandwidth from this memory (bytes/s) |
| 62system.physmem.bw_write::cpu0.data 435 # Write bandwidth from this memory (bytes/s) 63system.physmem.bw_write::cpu1.data 0 # Write bandwidth from this memory (bytes/s) | 62system.physmem.bw_write::cpu0.data 435 # Write bandwidth from this memory (bytes/s) 63system.physmem.bw_write::cpu1.data 0 # Write bandwidth from this memory (bytes/s) |
| 64system.physmem.bw_write::total 2145529 # Write bandwidth from this memory (bytes/s) 65system.physmem.bw_total::writebacks 2145094 # Total bandwidth to/from this memory (bytes/s) 66system.physmem.bw_total::cpu0.dtb.walker 3202 # Total bandwidth to/from this memory (bytes/s) 67system.physmem.bw_total::cpu0.itb.walker 2629 # Total bandwidth to/from this memory (bytes/s) 68system.physmem.bw_total::cpu0.inst 81942 # Total bandwidth to/from this memory (bytes/s) 69system.physmem.bw_total::cpu0.data 742181 # Total bandwidth to/from this memory (bytes/s) 70system.physmem.bw_total::cpu1.dtb.walker 4701 # Total bandwidth to/from this memory (bytes/s) 71system.physmem.bw_total::cpu1.itb.walker 4679 # Total bandwidth to/from this memory (bytes/s) 72system.physmem.bw_total::cpu1.inst 55967 # Total bandwidth to/from this memory (bytes/s) 73system.physmem.bw_total::cpu1.data 819245 # Total bandwidth to/from this memory (bytes/s) 74system.physmem.bw_total::realview.ide 8499 # Total bandwidth to/from this memory (bytes/s) 75system.physmem.bw_total::total 3868140 # Total bandwidth to/from this memory (bytes/s) | 64system.physmem.bw_write::total 2164886 # Write bandwidth from this memory (bytes/s) 65system.physmem.bw_total::writebacks 2164451 # Total bandwidth to/from this memory (bytes/s) 66system.physmem.bw_total::cpu0.dtb.walker 3273 # Total bandwidth to/from this memory (bytes/s) 67system.physmem.bw_total::cpu0.itb.walker 2709 # Total bandwidth to/from this memory (bytes/s) 68system.physmem.bw_total::cpu0.inst 89619 # Total bandwidth to/from this memory (bytes/s) 69system.physmem.bw_total::cpu0.data 761209 # Total bandwidth to/from this memory (bytes/s) 70system.physmem.bw_total::cpu1.dtb.walker 4739 # Total bandwidth to/from this memory (bytes/s) 71system.physmem.bw_total::cpu1.itb.walker 4714 # Total bandwidth to/from this memory (bytes/s) 72system.physmem.bw_total::cpu1.inst 63629 # Total bandwidth to/from this memory (bytes/s) 73system.physmem.bw_total::cpu1.data 833356 # Total bandwidth to/from this memory (bytes/s) 74system.physmem.bw_total::realview.ide 8511 # Total bandwidth to/from this memory (bytes/s) 75system.physmem.bw_total::total 3936211 # Total bandwidth to/from this memory (bytes/s) |
| 76system.realview.nvmem.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 77system.realview.nvmem.bytes_read::cpu0.inst 96 # Number of bytes read from this memory 78system.realview.nvmem.bytes_read::cpu0.data 36 # Number of bytes read from this memory 79system.realview.nvmem.bytes_read::cpu1.inst 64 # Number of bytes read from this memory 80system.realview.nvmem.bytes_read::cpu1.data 8 # Number of bytes read from this memory 81system.realview.nvmem.bytes_read::total 204 # Number of bytes read from this memory 82system.realview.nvmem.bytes_inst_read::cpu0.inst 96 # Number of instructions bytes read from this memory 83system.realview.nvmem.bytes_inst_read::cpu1.inst 64 # Number of instructions bytes read from this memory --- 243 unchanged lines hidden (view full) --- 327system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 69.52% # Class of executed instruction 328system.cpu0.op_class::SimdFloatSqrt 0 0.00% 69.52% # Class of executed instruction 329system.cpu0.op_class::MemRead 92545018 15.84% 85.36% # Class of executed instruction 330system.cpu0.op_class::MemWrite 85482625 14.64% 100.00% # Class of executed instruction 331system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 332system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 333system.cpu0.op_class::total 584096590 # Class of executed instruction 334system.cpu0.dcache.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 76system.realview.nvmem.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 77system.realview.nvmem.bytes_read::cpu0.inst 96 # Number of bytes read from this memory 78system.realview.nvmem.bytes_read::cpu0.data 36 # Number of bytes read from this memory 79system.realview.nvmem.bytes_read::cpu1.inst 64 # Number of bytes read from this memory 80system.realview.nvmem.bytes_read::cpu1.data 8 # Number of bytes read from this memory 81system.realview.nvmem.bytes_read::total 204 # Number of bytes read from this memory 82system.realview.nvmem.bytes_inst_read::cpu0.inst 96 # Number of instructions bytes read from this memory 83system.realview.nvmem.bytes_inst_read::cpu1.inst 64 # Number of instructions bytes read from this memory --- 243 unchanged lines hidden (view full) --- 327system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 69.52% # Class of executed instruction 328system.cpu0.op_class::SimdFloatSqrt 0 0.00% 69.52% # Class of executed instruction 329system.cpu0.op_class::MemRead 92545018 15.84% 85.36% # Class of executed instruction 330system.cpu0.op_class::MemWrite 85482625 14.64% 100.00% # Class of executed instruction 331system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 332system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 333system.cpu0.op_class::total 584096590 # Class of executed instruction 334system.cpu0.dcache.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 335system.cpu0.dcache.tags.replacements 6248912 # number of replacements | 335system.cpu0.dcache.tags.replacements 6248914 # number of replacements |
| 336system.cpu0.dcache.tags.tagsinuse 501.980044 # Cycle average of tags in use | 336system.cpu0.dcache.tags.tagsinuse 501.980044 # Cycle average of tags in use |
| 337system.cpu0.dcache.tags.total_refs 171607959 # Total number of references to valid blocks. 338system.cpu0.dcache.tags.sampled_refs 6249424 # Sample count of references to valid blocks. 339system.cpu0.dcache.tags.avg_refs 27.459804 # Average number of references to valid blocks. | 337system.cpu0.dcache.tags.total_refs 171607957 # Total number of references to valid blocks. 338system.cpu0.dcache.tags.sampled_refs 6249426 # Sample count of references to valid blocks. 339system.cpu0.dcache.tags.avg_refs 27.459795 # Average number of references to valid blocks. |
| 340system.cpu0.dcache.tags.warmup_cycle 33050500 # Cycle when the warmup percentage was hit. 341system.cpu0.dcache.tags.occ_blocks::cpu0.data 501.980044 # Average occupied blocks per requestor 342system.cpu0.dcache.tags.occ_percent::cpu0.data 0.980430 # Average percentage of cache occupancy 343system.cpu0.dcache.tags.occ_percent::total 0.980430 # Average percentage of cache occupancy 344system.cpu0.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 345system.cpu0.dcache.tags.age_task_id_blocks_1024::0 199 # Occupied blocks per task id 346system.cpu0.dcache.tags.age_task_id_blocks_1024::1 306 # Occupied blocks per task id 347system.cpu0.dcache.tags.age_task_id_blocks_1024::2 7 # Occupied blocks per task id 348system.cpu0.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id | 340system.cpu0.dcache.tags.warmup_cycle 33050500 # Cycle when the warmup percentage was hit. 341system.cpu0.dcache.tags.occ_blocks::cpu0.data 501.980044 # Average occupied blocks per requestor 342system.cpu0.dcache.tags.occ_percent::cpu0.data 0.980430 # Average percentage of cache occupancy 343system.cpu0.dcache.tags.occ_percent::total 0.980430 # Average percentage of cache occupancy 344system.cpu0.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 345system.cpu0.dcache.tags.age_task_id_blocks_1024::0 199 # Occupied blocks per task id 346system.cpu0.dcache.tags.age_task_id_blocks_1024::1 306 # Occupied blocks per task id 347system.cpu0.dcache.tags.age_task_id_blocks_1024::2 7 # Occupied blocks per task id 348system.cpu0.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id |
| 349system.cpu0.dcache.tags.tag_accesses 362271537 # Number of tag accesses 350system.cpu0.dcache.tags.data_accesses 362271537 # Number of data accesses | 349system.cpu0.dcache.tags.tag_accesses 362271539 # Number of tag accesses 350system.cpu0.dcache.tags.data_accesses 362271539 # Number of data accesses |
| 351system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 352system.cpu0.dcache.ReadReq_hits::cpu0.data 86024172 # number of ReadReq hits 353system.cpu0.dcache.ReadReq_hits::total 86024172 # number of ReadReq hits | 351system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 352system.cpu0.dcache.ReadReq_hits::cpu0.data 86024172 # number of ReadReq hits 353system.cpu0.dcache.ReadReq_hits::total 86024172 # number of ReadReq hits |
| 354system.cpu0.dcache.WriteReq_hits::cpu0.data 80672636 # number of WriteReq hits 355system.cpu0.dcache.WriteReq_hits::total 80672636 # number of WriteReq hits | 354system.cpu0.dcache.WriteReq_hits::cpu0.data 80674063 # number of WriteReq hits 355system.cpu0.dcache.WriteReq_hits::total 80674063 # number of WriteReq hits |
| 356system.cpu0.dcache.SoftPFReq_hits::cpu0.data 216269 # number of SoftPFReq hits 357system.cpu0.dcache.SoftPFReq_hits::total 216269 # number of SoftPFReq hits | 356system.cpu0.dcache.SoftPFReq_hits::cpu0.data 216269 # number of SoftPFReq hits 357system.cpu0.dcache.SoftPFReq_hits::total 216269 # number of SoftPFReq hits |
| 358system.cpu0.dcache.WriteLineReq_hits::cpu0.data 261023 # number of WriteLineReq hits 359system.cpu0.dcache.WriteLineReq_hits::total 261023 # number of WriteLineReq hits 360system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 2087977 # number of LoadLockedReq hits 361system.cpu0.dcache.LoadLockedReq_hits::total 2087977 # number of LoadLockedReq hits 362system.cpu0.dcache.StoreCondReq_hits::cpu0.data 2051999 # number of StoreCondReq hits 363system.cpu0.dcache.StoreCondReq_hits::total 2051999 # number of StoreCondReq hits 364system.cpu0.dcache.demand_hits::cpu0.data 166957831 # number of demand (read+write) hits 365system.cpu0.dcache.demand_hits::total 166957831 # number of demand (read+write) hits 366system.cpu0.dcache.overall_hits::cpu0.data 167174100 # number of overall hits 367system.cpu0.dcache.overall_hits::total 167174100 # number of overall hits | 358system.cpu0.dcache.WriteLineReq_hits::cpu0.data 261006 # number of WriteLineReq hits 359system.cpu0.dcache.WriteLineReq_hits::total 261006 # number of WriteLineReq hits 360system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 2087975 # number of LoadLockedReq hits 361system.cpu0.dcache.LoadLockedReq_hits::total 2087975 # number of LoadLockedReq hits 362system.cpu0.dcache.StoreCondReq_hits::cpu0.data 2051823 # number of StoreCondReq hits 363system.cpu0.dcache.StoreCondReq_hits::total 2051823 # number of StoreCondReq hits 364system.cpu0.dcache.demand_hits::cpu0.data 166959241 # number of demand (read+write) hits 365system.cpu0.dcache.demand_hits::total 166959241 # number of demand (read+write) hits 366system.cpu0.dcache.overall_hits::cpu0.data 167175510 # number of overall hits 367system.cpu0.dcache.overall_hits::total 167175510 # number of overall hits |
| 368system.cpu0.dcache.ReadReq_misses::cpu0.data 3298422 # number of ReadReq misses 369system.cpu0.dcache.ReadReq_misses::total 3298422 # number of ReadReq misses | 368system.cpu0.dcache.ReadReq_misses::cpu0.data 3298422 # number of ReadReq misses 369system.cpu0.dcache.ReadReq_misses::total 3298422 # number of ReadReq misses |
| 370system.cpu0.dcache.WriteReq_misses::cpu0.data 1479208 # number of WriteReq misses 371system.cpu0.dcache.WriteReq_misses::total 1479208 # number of WriteReq misses | 370system.cpu0.dcache.WriteReq_misses::cpu0.data 1477781 # number of WriteReq misses 371system.cpu0.dcache.WriteReq_misses::total 1477781 # number of WriteReq misses |
| 372system.cpu0.dcache.SoftPFReq_misses::cpu0.data 769563 # number of SoftPFReq misses 373system.cpu0.dcache.SoftPFReq_misses::total 769563 # number of SoftPFReq misses | 372system.cpu0.dcache.SoftPFReq_misses::cpu0.data 769563 # number of SoftPFReq misses 373system.cpu0.dcache.SoftPFReq_misses::total 769563 # number of SoftPFReq misses |
| 374system.cpu0.dcache.WriteLineReq_misses::cpu0.data 824176 # number of WriteLineReq misses 375system.cpu0.dcache.WriteLineReq_misses::total 824176 # number of WriteLineReq misses 376system.cpu0.dcache.LoadLockedReq_misses::cpu0.data 119749 # number of LoadLockedReq misses 377system.cpu0.dcache.LoadLockedReq_misses::total 119749 # number of LoadLockedReq misses 378system.cpu0.dcache.StoreCondReq_misses::cpu0.data 154638 # number of StoreCondReq misses 379system.cpu0.dcache.StoreCondReq_misses::total 154638 # number of StoreCondReq misses 380system.cpu0.dcache.demand_misses::cpu0.data 5601806 # number of demand (read+write) misses 381system.cpu0.dcache.demand_misses::total 5601806 # number of demand (read+write) misses 382system.cpu0.dcache.overall_misses::cpu0.data 6371369 # number of overall misses 383system.cpu0.dcache.overall_misses::total 6371369 # number of overall misses | 374system.cpu0.dcache.WriteLineReq_misses::cpu0.data 824193 # number of WriteLineReq misses 375system.cpu0.dcache.WriteLineReq_misses::total 824193 # number of WriteLineReq misses 376system.cpu0.dcache.LoadLockedReq_misses::cpu0.data 119751 # number of LoadLockedReq misses 377system.cpu0.dcache.LoadLockedReq_misses::total 119751 # number of LoadLockedReq misses 378system.cpu0.dcache.StoreCondReq_misses::cpu0.data 154814 # number of StoreCondReq misses 379system.cpu0.dcache.StoreCondReq_misses::total 154814 # number of StoreCondReq misses 380system.cpu0.dcache.demand_misses::cpu0.data 5600396 # number of demand (read+write) misses 381system.cpu0.dcache.demand_misses::total 5600396 # number of demand (read+write) misses 382system.cpu0.dcache.overall_misses::cpu0.data 6369959 # number of overall misses 383system.cpu0.dcache.overall_misses::total 6369959 # number of overall misses |
| 384system.cpu0.dcache.ReadReq_accesses::cpu0.data 89322594 # number of ReadReq accesses(hits+misses) 385system.cpu0.dcache.ReadReq_accesses::total 89322594 # number of ReadReq accesses(hits+misses) 386system.cpu0.dcache.WriteReq_accesses::cpu0.data 82151844 # number of WriteReq accesses(hits+misses) 387system.cpu0.dcache.WriteReq_accesses::total 82151844 # number of WriteReq accesses(hits+misses) 388system.cpu0.dcache.SoftPFReq_accesses::cpu0.data 985832 # number of SoftPFReq accesses(hits+misses) 389system.cpu0.dcache.SoftPFReq_accesses::total 985832 # number of SoftPFReq accesses(hits+misses) 390system.cpu0.dcache.WriteLineReq_accesses::cpu0.data 1085199 # number of WriteLineReq accesses(hits+misses) 391system.cpu0.dcache.WriteLineReq_accesses::total 1085199 # number of WriteLineReq accesses(hits+misses) 392system.cpu0.dcache.LoadLockedReq_accesses::cpu0.data 2207726 # number of LoadLockedReq accesses(hits+misses) 393system.cpu0.dcache.LoadLockedReq_accesses::total 2207726 # number of LoadLockedReq accesses(hits+misses) 394system.cpu0.dcache.StoreCondReq_accesses::cpu0.data 2206637 # number of StoreCondReq accesses(hits+misses) 395system.cpu0.dcache.StoreCondReq_accesses::total 2206637 # number of StoreCondReq accesses(hits+misses) 396system.cpu0.dcache.demand_accesses::cpu0.data 172559637 # number of demand (read+write) accesses 397system.cpu0.dcache.demand_accesses::total 172559637 # number of demand (read+write) accesses 398system.cpu0.dcache.overall_accesses::cpu0.data 173545469 # number of overall (read+write) accesses 399system.cpu0.dcache.overall_accesses::total 173545469 # number of overall (read+write) accesses 400system.cpu0.dcache.ReadReq_miss_rate::cpu0.data 0.036927 # miss rate for ReadReq accesses 401system.cpu0.dcache.ReadReq_miss_rate::total 0.036927 # miss rate for ReadReq accesses | 384system.cpu0.dcache.ReadReq_accesses::cpu0.data 89322594 # number of ReadReq accesses(hits+misses) 385system.cpu0.dcache.ReadReq_accesses::total 89322594 # number of ReadReq accesses(hits+misses) 386system.cpu0.dcache.WriteReq_accesses::cpu0.data 82151844 # number of WriteReq accesses(hits+misses) 387system.cpu0.dcache.WriteReq_accesses::total 82151844 # number of WriteReq accesses(hits+misses) 388system.cpu0.dcache.SoftPFReq_accesses::cpu0.data 985832 # number of SoftPFReq accesses(hits+misses) 389system.cpu0.dcache.SoftPFReq_accesses::total 985832 # number of SoftPFReq accesses(hits+misses) 390system.cpu0.dcache.WriteLineReq_accesses::cpu0.data 1085199 # number of WriteLineReq accesses(hits+misses) 391system.cpu0.dcache.WriteLineReq_accesses::total 1085199 # number of WriteLineReq accesses(hits+misses) 392system.cpu0.dcache.LoadLockedReq_accesses::cpu0.data 2207726 # number of LoadLockedReq accesses(hits+misses) 393system.cpu0.dcache.LoadLockedReq_accesses::total 2207726 # number of LoadLockedReq accesses(hits+misses) 394system.cpu0.dcache.StoreCondReq_accesses::cpu0.data 2206637 # number of StoreCondReq accesses(hits+misses) 395system.cpu0.dcache.StoreCondReq_accesses::total 2206637 # number of StoreCondReq accesses(hits+misses) 396system.cpu0.dcache.demand_accesses::cpu0.data 172559637 # number of demand (read+write) accesses 397system.cpu0.dcache.demand_accesses::total 172559637 # number of demand (read+write) accesses 398system.cpu0.dcache.overall_accesses::cpu0.data 173545469 # number of overall (read+write) accesses 399system.cpu0.dcache.overall_accesses::total 173545469 # number of overall (read+write) accesses 400system.cpu0.dcache.ReadReq_miss_rate::cpu0.data 0.036927 # miss rate for ReadReq accesses 401system.cpu0.dcache.ReadReq_miss_rate::total 0.036927 # miss rate for ReadReq accesses |
| 402system.cpu0.dcache.WriteReq_miss_rate::cpu0.data 0.018006 # miss rate for WriteReq accesses 403system.cpu0.dcache.WriteReq_miss_rate::total 0.018006 # miss rate for WriteReq accesses | 402system.cpu0.dcache.WriteReq_miss_rate::cpu0.data 0.017988 # miss rate for WriteReq accesses 403system.cpu0.dcache.WriteReq_miss_rate::total 0.017988 # miss rate for WriteReq accesses |
| 404system.cpu0.dcache.SoftPFReq_miss_rate::cpu0.data 0.780623 # miss rate for SoftPFReq accesses 405system.cpu0.dcache.SoftPFReq_miss_rate::total 0.780623 # miss rate for SoftPFReq accesses | 404system.cpu0.dcache.SoftPFReq_miss_rate::cpu0.data 0.780623 # miss rate for SoftPFReq accesses 405system.cpu0.dcache.SoftPFReq_miss_rate::total 0.780623 # miss rate for SoftPFReq accesses |
| 406system.cpu0.dcache.WriteLineReq_miss_rate::cpu0.data 0.759470 # miss rate for WriteLineReq accesses 407system.cpu0.dcache.WriteLineReq_miss_rate::total 0.759470 # miss rate for WriteLineReq accesses 408system.cpu0.dcache.LoadLockedReq_miss_rate::cpu0.data 0.054241 # miss rate for LoadLockedReq accesses 409system.cpu0.dcache.LoadLockedReq_miss_rate::total 0.054241 # miss rate for LoadLockedReq accesses 410system.cpu0.dcache.StoreCondReq_miss_rate::cpu0.data 0.070079 # miss rate for StoreCondReq accesses 411system.cpu0.dcache.StoreCondReq_miss_rate::total 0.070079 # miss rate for StoreCondReq accesses 412system.cpu0.dcache.demand_miss_rate::cpu0.data 0.032463 # miss rate for demand accesses 413system.cpu0.dcache.demand_miss_rate::total 0.032463 # miss rate for demand accesses 414system.cpu0.dcache.overall_miss_rate::cpu0.data 0.036713 # miss rate for overall accesses 415system.cpu0.dcache.overall_miss_rate::total 0.036713 # miss rate for overall accesses | 406system.cpu0.dcache.WriteLineReq_miss_rate::cpu0.data 0.759486 # miss rate for WriteLineReq accesses 407system.cpu0.dcache.WriteLineReq_miss_rate::total 0.759486 # miss rate for WriteLineReq accesses 408system.cpu0.dcache.LoadLockedReq_miss_rate::cpu0.data 0.054242 # miss rate for LoadLockedReq accesses 409system.cpu0.dcache.LoadLockedReq_miss_rate::total 0.054242 # miss rate for LoadLockedReq accesses 410system.cpu0.dcache.StoreCondReq_miss_rate::cpu0.data 0.070158 # miss rate for StoreCondReq accesses 411system.cpu0.dcache.StoreCondReq_miss_rate::total 0.070158 # miss rate for StoreCondReq accesses 412system.cpu0.dcache.demand_miss_rate::cpu0.data 0.032455 # miss rate for demand accesses 413system.cpu0.dcache.demand_miss_rate::total 0.032455 # miss rate for demand accesses 414system.cpu0.dcache.overall_miss_rate::cpu0.data 0.036705 # miss rate for overall accesses 415system.cpu0.dcache.overall_miss_rate::total 0.036705 # miss rate for overall accesses |
| 416system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 417system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 418system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 419system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked 420system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 421system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 416system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 417system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 418system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 419system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked 420system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 421system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 422system.cpu0.dcache.writebacks::writebacks 6248912 # number of writebacks 423system.cpu0.dcache.writebacks::total 6248912 # number of writebacks | 422system.cpu0.dcache.writebacks::writebacks 6248914 # number of writebacks 423system.cpu0.dcache.writebacks::total 6248914 # number of writebacks |
| 424system.cpu0.icache.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 424system.cpu0.icache.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 425system.cpu0.icache.tags.replacements 5509619 # number of replacements | 425system.cpu0.icache.tags.replacements 5509624 # number of replacements |
| 426system.cpu0.icache.tags.tagsinuse 511.989024 # Cycle average of tags in use | 426system.cpu0.icache.tags.tagsinuse 511.989024 # Cycle average of tags in use |
| 427system.cpu0.icache.tags.total_refs 491225335 # Total number of references to valid blocks. 428system.cpu0.icache.tags.sampled_refs 5510131 # Sample count of references to valid blocks. 429system.cpu0.icache.tags.avg_refs 89.149484 # Average number of references to valid blocks. | 427system.cpu0.icache.tags.total_refs 491225330 # Total number of references to valid blocks. 428system.cpu0.icache.tags.sampled_refs 5510136 # Sample count of references to valid blocks. 429system.cpu0.icache.tags.avg_refs 89.149402 # Average number of references to valid blocks. |
| 430system.cpu0.icache.tags.warmup_cycle 5759898000 # Cycle when the warmup percentage was hit. 431system.cpu0.icache.tags.occ_blocks::cpu0.inst 511.989024 # Average occupied blocks per requestor 432system.cpu0.icache.tags.occ_percent::cpu0.inst 0.999979 # Average percentage of cache occupancy 433system.cpu0.icache.tags.occ_percent::total 0.999979 # Average percentage of cache occupancy 434system.cpu0.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 435system.cpu0.icache.tags.age_task_id_blocks_1024::0 200 # Occupied blocks per task id 436system.cpu0.icache.tags.age_task_id_blocks_1024::1 248 # Occupied blocks per task id 437system.cpu0.icache.tags.age_task_id_blocks_1024::2 63 # Occupied blocks per task id 438system.cpu0.icache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id 439system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id | 430system.cpu0.icache.tags.warmup_cycle 5759898000 # Cycle when the warmup percentage was hit. 431system.cpu0.icache.tags.occ_blocks::cpu0.inst 511.989024 # Average occupied blocks per requestor 432system.cpu0.icache.tags.occ_percent::cpu0.inst 0.999979 # Average percentage of cache occupancy 433system.cpu0.icache.tags.occ_percent::total 0.999979 # Average percentage of cache occupancy 434system.cpu0.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 435system.cpu0.icache.tags.age_task_id_blocks_1024::0 200 # Occupied blocks per task id 436system.cpu0.icache.tags.age_task_id_blocks_1024::1 248 # Occupied blocks per task id 437system.cpu0.icache.tags.age_task_id_blocks_1024::2 63 # Occupied blocks per task id 438system.cpu0.icache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id 439system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id |
| 440system.cpu0.icache.tags.tag_accesses 998981078 # Number of tag accesses 441system.cpu0.icache.tags.data_accesses 998981078 # Number of data accesses | 440system.cpu0.icache.tags.tag_accesses 998981083 # Number of tag accesses 441system.cpu0.icache.tags.data_accesses 998981083 # Number of data accesses |
| 442system.cpu0.icache.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 442system.cpu0.icache.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 443system.cpu0.icache.ReadReq_hits::cpu0.inst 491225335 # number of ReadReq hits 444system.cpu0.icache.ReadReq_hits::total 491225335 # number of ReadReq hits 445system.cpu0.icache.demand_hits::cpu0.inst 491225335 # number of demand (read+write) hits 446system.cpu0.icache.demand_hits::total 491225335 # number of demand (read+write) hits 447system.cpu0.icache.overall_hits::cpu0.inst 491225335 # number of overall hits 448system.cpu0.icache.overall_hits::total 491225335 # number of overall hits 449system.cpu0.icache.ReadReq_misses::cpu0.inst 5510136 # number of ReadReq misses 450system.cpu0.icache.ReadReq_misses::total 5510136 # number of ReadReq misses 451system.cpu0.icache.demand_misses::cpu0.inst 5510136 # number of demand (read+write) misses 452system.cpu0.icache.demand_misses::total 5510136 # number of demand (read+write) misses 453system.cpu0.icache.overall_misses::cpu0.inst 5510136 # number of overall misses 454system.cpu0.icache.overall_misses::total 5510136 # number of overall misses | 443system.cpu0.icache.ReadReq_hits::cpu0.inst 491225330 # number of ReadReq hits 444system.cpu0.icache.ReadReq_hits::total 491225330 # number of ReadReq hits 445system.cpu0.icache.demand_hits::cpu0.inst 491225330 # number of demand (read+write) hits 446system.cpu0.icache.demand_hits::total 491225330 # number of demand (read+write) hits 447system.cpu0.icache.overall_hits::cpu0.inst 491225330 # number of overall hits 448system.cpu0.icache.overall_hits::total 491225330 # number of overall hits 449system.cpu0.icache.ReadReq_misses::cpu0.inst 5510141 # number of ReadReq misses 450system.cpu0.icache.ReadReq_misses::total 5510141 # number of ReadReq misses 451system.cpu0.icache.demand_misses::cpu0.inst 5510141 # number of demand (read+write) misses 452system.cpu0.icache.demand_misses::total 5510141 # number of demand (read+write) misses 453system.cpu0.icache.overall_misses::cpu0.inst 5510141 # number of overall misses 454system.cpu0.icache.overall_misses::total 5510141 # number of overall misses |
| 455system.cpu0.icache.ReadReq_accesses::cpu0.inst 496735471 # number of ReadReq accesses(hits+misses) 456system.cpu0.icache.ReadReq_accesses::total 496735471 # number of ReadReq accesses(hits+misses) 457system.cpu0.icache.demand_accesses::cpu0.inst 496735471 # number of demand (read+write) accesses 458system.cpu0.icache.demand_accesses::total 496735471 # number of demand (read+write) accesses 459system.cpu0.icache.overall_accesses::cpu0.inst 496735471 # number of overall (read+write) accesses 460system.cpu0.icache.overall_accesses::total 496735471 # number of overall (read+write) accesses 461system.cpu0.icache.ReadReq_miss_rate::cpu0.inst 0.011093 # miss rate for ReadReq accesses 462system.cpu0.icache.ReadReq_miss_rate::total 0.011093 # miss rate for ReadReq accesses 463system.cpu0.icache.demand_miss_rate::cpu0.inst 0.011093 # miss rate for demand accesses 464system.cpu0.icache.demand_miss_rate::total 0.011093 # miss rate for demand accesses 465system.cpu0.icache.overall_miss_rate::cpu0.inst 0.011093 # miss rate for overall accesses 466system.cpu0.icache.overall_miss_rate::total 0.011093 # miss rate for overall accesses 467system.cpu0.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 468system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 469system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked 470system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked 471system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 472system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 455system.cpu0.icache.ReadReq_accesses::cpu0.inst 496735471 # number of ReadReq accesses(hits+misses) 456system.cpu0.icache.ReadReq_accesses::total 496735471 # number of ReadReq accesses(hits+misses) 457system.cpu0.icache.demand_accesses::cpu0.inst 496735471 # number of demand (read+write) accesses 458system.cpu0.icache.demand_accesses::total 496735471 # number of demand (read+write) accesses 459system.cpu0.icache.overall_accesses::cpu0.inst 496735471 # number of overall (read+write) accesses 460system.cpu0.icache.overall_accesses::total 496735471 # number of overall (read+write) accesses 461system.cpu0.icache.ReadReq_miss_rate::cpu0.inst 0.011093 # miss rate for ReadReq accesses 462system.cpu0.icache.ReadReq_miss_rate::total 0.011093 # miss rate for ReadReq accesses 463system.cpu0.icache.demand_miss_rate::cpu0.inst 0.011093 # miss rate for demand accesses 464system.cpu0.icache.demand_miss_rate::total 0.011093 # miss rate for demand accesses 465system.cpu0.icache.overall_miss_rate::cpu0.inst 0.011093 # miss rate for overall accesses 466system.cpu0.icache.overall_miss_rate::total 0.011093 # miss rate for overall accesses 467system.cpu0.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 468system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 469system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked 470system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked 471system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 472system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 473system.cpu0.icache.writebacks::writebacks 5509619 # number of writebacks 474system.cpu0.icache.writebacks::total 5509619 # number of writebacks | 473system.cpu0.icache.writebacks::writebacks 5509624 # number of writebacks 474system.cpu0.icache.writebacks::total 5509624 # number of writebacks |
| 475system.cpu0.l2cache.prefetcher.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 476system.cpu0.l2cache.prefetcher.num_hwpf_issued 0 # number of hwpf issued 477system.cpu0.l2cache.prefetcher.pfIdentified 0 # number of prefetch candidates identified 478system.cpu0.l2cache.prefetcher.pfBufferHit 0 # number of redundant prefetches already in prefetch queue 479system.cpu0.l2cache.prefetcher.pfInCache 0 # number of redundant prefetches already in cache/mshr dropped 480system.cpu0.l2cache.prefetcher.pfRemovedFull 0 # number of prefetches dropped due to prefetch queue size 481system.cpu0.l2cache.prefetcher.pfSpanPage 0 # number of prefetches not generated due to page crossing 482system.cpu0.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 475system.cpu0.l2cache.prefetcher.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 476system.cpu0.l2cache.prefetcher.num_hwpf_issued 0 # number of hwpf issued 477system.cpu0.l2cache.prefetcher.pfIdentified 0 # number of prefetch candidates identified 478system.cpu0.l2cache.prefetcher.pfBufferHit 0 # number of redundant prefetches already in prefetch queue 479system.cpu0.l2cache.prefetcher.pfInCache 0 # number of redundant prefetches already in cache/mshr dropped 480system.cpu0.l2cache.prefetcher.pfRemovedFull 0 # number of prefetches dropped due to prefetch queue size 481system.cpu0.l2cache.prefetcher.pfSpanPage 0 # number of prefetches not generated due to page crossing 482system.cpu0.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 483system.cpu0.l2cache.tags.replacements 2653803 # number of replacements 484system.cpu0.l2cache.tags.tagsinuse 16139.372932 # Cycle average of tags in use 485system.cpu0.l2cache.tags.total_refs 15525451 # Total number of references to valid blocks. 486system.cpu0.l2cache.tags.sampled_refs 2669765 # Sample count of references to valid blocks. 487system.cpu0.l2cache.tags.avg_refs 5.815287 # Average number of references to valid blocks. | 483system.cpu0.l2cache.tags.replacements 2567589 # number of replacements 484system.cpu0.l2cache.tags.tagsinuse 15706.944975 # Cycle average of tags in use 485system.cpu0.l2cache.tags.total_refs 9429067 # Total number of references to valid blocks. 486system.cpu0.l2cache.tags.sampled_refs 2583246 # Sample count of references to valid blocks. 487system.cpu0.l2cache.tags.avg_refs 3.650085 # Average number of references to valid blocks. |
| 488system.cpu0.l2cache.tags.warmup_cycle 290949000 # Cycle when the warmup percentage was hit. | 488system.cpu0.l2cache.tags.warmup_cycle 290949000 # Cycle when the warmup percentage was hit. |
| 489system.cpu0.l2cache.tags.occ_blocks::writebacks 16063.015838 # Average occupied blocks per requestor 490system.cpu0.l2cache.tags.occ_blocks::cpu0.dtb.walker 35.657747 # Average occupied blocks per requestor 491system.cpu0.l2cache.tags.occ_blocks::cpu0.itb.walker 40.699347 # Average occupied blocks per requestor 492system.cpu0.l2cache.tags.occ_percent::writebacks 0.980409 # Average percentage of cache occupancy 493system.cpu0.l2cache.tags.occ_percent::cpu0.dtb.walker 0.002176 # Average percentage of cache occupancy 494system.cpu0.l2cache.tags.occ_percent::cpu0.itb.walker 0.002484 # Average percentage of cache occupancy 495system.cpu0.l2cache.tags.occ_percent::total 0.985069 # Average percentage of cache occupancy 496system.cpu0.l2cache.tags.occ_task_id_blocks::1023 53 # Occupied blocks per task id 497system.cpu0.l2cache.tags.occ_task_id_blocks::1024 15909 # Occupied blocks per task id 498system.cpu0.l2cache.tags.age_task_id_blocks_1023::2 39 # Occupied blocks per task id 499system.cpu0.l2cache.tags.age_task_id_blocks_1023::3 5 # Occupied blocks per task id 500system.cpu0.l2cache.tags.age_task_id_blocks_1023::4 9 # Occupied blocks per task id 501system.cpu0.l2cache.tags.age_task_id_blocks_1024::0 238 # Occupied blocks per task id 502system.cpu0.l2cache.tags.age_task_id_blocks_1024::1 1444 # Occupied blocks per task id 503system.cpu0.l2cache.tags.age_task_id_blocks_1024::2 4368 # Occupied blocks per task id 504system.cpu0.l2cache.tags.age_task_id_blocks_1024::3 5335 # Occupied blocks per task id 505system.cpu0.l2cache.tags.age_task_id_blocks_1024::4 4524 # Occupied blocks per task id 506system.cpu0.l2cache.tags.occ_task_id_percent::1023 0.003235 # Percentage of cache occupancy per task id 507system.cpu0.l2cache.tags.occ_task_id_percent::1024 0.971008 # Percentage of cache occupancy per task id 508system.cpu0.l2cache.tags.tag_accesses 395826781 # Number of tag accesses 509system.cpu0.l2cache.tags.data_accesses 395826781 # Number of data accesses | 489system.cpu0.l2cache.tags.occ_blocks::writebacks 15656.940594 # Average occupied blocks per requestor 490system.cpu0.l2cache.tags.occ_blocks::cpu0.dtb.walker 27.364617 # Average occupied blocks per requestor 491system.cpu0.l2cache.tags.occ_blocks::cpu0.itb.walker 22.639763 # Average occupied blocks per requestor 492system.cpu0.l2cache.tags.occ_percent::writebacks 0.955624 # Average percentage of cache occupancy 493system.cpu0.l2cache.tags.occ_percent::cpu0.dtb.walker 0.001670 # Average percentage of cache occupancy 494system.cpu0.l2cache.tags.occ_percent::cpu0.itb.walker 0.001382 # Average percentage of cache occupancy 495system.cpu0.l2cache.tags.occ_percent::total 0.958676 # Average percentage of cache occupancy 496system.cpu0.l2cache.tags.occ_task_id_blocks::1023 57 # Occupied blocks per task id 497system.cpu0.l2cache.tags.occ_task_id_blocks::1024 15600 # Occupied blocks per task id 498system.cpu0.l2cache.tags.age_task_id_blocks_1023::1 2 # Occupied blocks per task id 499system.cpu0.l2cache.tags.age_task_id_blocks_1023::2 41 # Occupied blocks per task id 500system.cpu0.l2cache.tags.age_task_id_blocks_1023::3 8 # Occupied blocks per task id 501system.cpu0.l2cache.tags.age_task_id_blocks_1023::4 6 # Occupied blocks per task id 502system.cpu0.l2cache.tags.age_task_id_blocks_1024::0 421 # Occupied blocks per task id 503system.cpu0.l2cache.tags.age_task_id_blocks_1024::1 2091 # Occupied blocks per task id 504system.cpu0.l2cache.tags.age_task_id_blocks_1024::2 5339 # Occupied blocks per task id 505system.cpu0.l2cache.tags.age_task_id_blocks_1024::3 5411 # Occupied blocks per task id 506system.cpu0.l2cache.tags.age_task_id_blocks_1024::4 2338 # Occupied blocks per task id 507system.cpu0.l2cache.tags.occ_task_id_percent::1023 0.003479 # Percentage of cache occupancy per task id 508system.cpu0.l2cache.tags.occ_task_id_percent::1024 0.952148 # Percentage of cache occupancy per task id 509system.cpu0.l2cache.tags.tag_accesses 401859473 # Number of tag accesses 510system.cpu0.l2cache.tags.data_accesses 401859473 # Number of data accesses |
| 510system.cpu0.l2cache.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 511system.cpu0.l2cache.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 511system.cpu0.l2cache.ReadReq_hits::cpu0.dtb.walker 296735 # number of ReadReq hits 512system.cpu0.l2cache.ReadReq_hits::cpu0.itb.walker 157755 # number of ReadReq hits 513system.cpu0.l2cache.ReadReq_hits::total 454490 # number of ReadReq hits 514system.cpu0.l2cache.WritebackDirty_hits::writebacks 4439476 # number of WritebackDirty hits 515system.cpu0.l2cache.WritebackDirty_hits::total 4439476 # number of WritebackDirty hits 516system.cpu0.l2cache.WritebackClean_hits::writebacks 7317657 # number of WritebackClean hits 517system.cpu0.l2cache.WritebackClean_hits::total 7317657 # number of WritebackClean hits 518system.cpu0.l2cache.UpgradeReq_hits::cpu0.data 746 # number of UpgradeReq hits 519system.cpu0.l2cache.UpgradeReq_hits::total 746 # number of UpgradeReq hits 520system.cpu0.l2cache.ReadExReq_hits::cpu0.data 639086 # number of ReadExReq hits 521system.cpu0.l2cache.ReadExReq_hits::total 639086 # number of ReadExReq hits 522system.cpu0.l2cache.ReadCleanReq_hits::cpu0.inst 5010934 # number of ReadCleanReq hits 523system.cpu0.l2cache.ReadCleanReq_hits::total 5010934 # number of ReadCleanReq hits 524system.cpu0.l2cache.ReadSharedReq_hits::cpu0.data 2954772 # number of ReadSharedReq hits 525system.cpu0.l2cache.ReadSharedReq_hits::total 2954772 # number of ReadSharedReq hits 526system.cpu0.l2cache.InvalidateReq_hits::cpu0.data 221315 # number of InvalidateReq hits 527system.cpu0.l2cache.InvalidateReq_hits::total 221315 # number of InvalidateReq hits 528system.cpu0.l2cache.demand_hits::cpu0.dtb.walker 296735 # number of demand (read+write) hits 529system.cpu0.l2cache.demand_hits::cpu0.itb.walker 157755 # number of demand (read+write) hits 530system.cpu0.l2cache.demand_hits::cpu0.inst 5010934 # number of demand (read+write) hits 531system.cpu0.l2cache.demand_hits::cpu0.data 3593858 # number of demand (read+write) hits 532system.cpu0.l2cache.demand_hits::total 9059282 # number of demand (read+write) hits 533system.cpu0.l2cache.overall_hits::cpu0.dtb.walker 296735 # number of overall hits 534system.cpu0.l2cache.overall_hits::cpu0.itb.walker 157755 # number of overall hits 535system.cpu0.l2cache.overall_hits::cpu0.inst 5010934 # number of overall hits 536system.cpu0.l2cache.overall_hits::cpu0.data 3593858 # number of overall hits 537system.cpu0.l2cache.overall_hits::total 9059282 # number of overall hits 538system.cpu0.l2cache.ReadReq_misses::cpu0.dtb.walker 11441 # number of ReadReq misses 539system.cpu0.l2cache.ReadReq_misses::cpu0.itb.walker 8530 # number of ReadReq misses 540system.cpu0.l2cache.ReadReq_misses::total 19971 # number of ReadReq misses 541system.cpu0.l2cache.UpgradeReq_misses::cpu0.data 138499 # number of UpgradeReq misses 542system.cpu0.l2cache.UpgradeReq_misses::total 138499 # number of UpgradeReq misses 543system.cpu0.l2cache.SCUpgradeReq_misses::cpu0.data 154638 # number of SCUpgradeReq misses 544system.cpu0.l2cache.SCUpgradeReq_misses::total 154638 # number of SCUpgradeReq misses 545system.cpu0.l2cache.ReadExReq_misses::cpu0.data 701212 # number of ReadExReq misses 546system.cpu0.l2cache.ReadExReq_misses::total 701212 # number of ReadExReq misses 547system.cpu0.l2cache.ReadCleanReq_misses::cpu0.inst 499202 # number of ReadCleanReq misses 548system.cpu0.l2cache.ReadCleanReq_misses::total 499202 # number of ReadCleanReq misses 549system.cpu0.l2cache.ReadSharedReq_misses::cpu0.data 1232962 # number of ReadSharedReq misses 550system.cpu0.l2cache.ReadSharedReq_misses::total 1232962 # number of ReadSharedReq misses 551system.cpu0.l2cache.InvalidateReq_misses::cpu0.data 602526 # number of InvalidateReq misses 552system.cpu0.l2cache.InvalidateReq_misses::total 602526 # number of InvalidateReq misses 553system.cpu0.l2cache.demand_misses::cpu0.dtb.walker 11441 # number of demand (read+write) misses 554system.cpu0.l2cache.demand_misses::cpu0.itb.walker 8530 # number of demand (read+write) misses 555system.cpu0.l2cache.demand_misses::cpu0.inst 499202 # number of demand (read+write) misses 556system.cpu0.l2cache.demand_misses::cpu0.data 1934174 # number of demand (read+write) misses 557system.cpu0.l2cache.demand_misses::total 2453347 # number of demand (read+write) misses 558system.cpu0.l2cache.overall_misses::cpu0.dtb.walker 11441 # number of overall misses 559system.cpu0.l2cache.overall_misses::cpu0.itb.walker 8530 # number of overall misses 560system.cpu0.l2cache.overall_misses::cpu0.inst 499202 # number of overall misses 561system.cpu0.l2cache.overall_misses::cpu0.data 1934174 # number of overall misses 562system.cpu0.l2cache.overall_misses::total 2453347 # number of overall misses 563system.cpu0.l2cache.ReadReq_accesses::cpu0.dtb.walker 308176 # number of ReadReq accesses(hits+misses) 564system.cpu0.l2cache.ReadReq_accesses::cpu0.itb.walker 166285 # number of ReadReq accesses(hits+misses) 565system.cpu0.l2cache.ReadReq_accesses::total 474461 # number of ReadReq accesses(hits+misses) 566system.cpu0.l2cache.WritebackDirty_accesses::writebacks 4439476 # number of WritebackDirty accesses(hits+misses) 567system.cpu0.l2cache.WritebackDirty_accesses::total 4439476 # number of WritebackDirty accesses(hits+misses) 568system.cpu0.l2cache.WritebackClean_accesses::writebacks 7317657 # number of WritebackClean accesses(hits+misses) 569system.cpu0.l2cache.WritebackClean_accesses::total 7317657 # number of WritebackClean accesses(hits+misses) 570system.cpu0.l2cache.UpgradeReq_accesses::cpu0.data 139245 # number of UpgradeReq accesses(hits+misses) 571system.cpu0.l2cache.UpgradeReq_accesses::total 139245 # number of UpgradeReq accesses(hits+misses) 572system.cpu0.l2cache.SCUpgradeReq_accesses::cpu0.data 154638 # number of SCUpgradeReq accesses(hits+misses) 573system.cpu0.l2cache.SCUpgradeReq_accesses::total 154638 # number of SCUpgradeReq accesses(hits+misses) | 512system.cpu0.l2cache.ReadReq_hits::cpu0.dtb.walker 287369 # number of ReadReq hits 513system.cpu0.l2cache.ReadReq_hits::cpu0.itb.walker 155522 # number of ReadReq hits 514system.cpu0.l2cache.ReadReq_hits::total 442891 # number of ReadReq hits 515system.cpu0.l2cache.WritebackDirty_hits::writebacks 4441046 # number of WritebackDirty hits 516system.cpu0.l2cache.WritebackDirty_hits::total 4441046 # number of WritebackDirty hits 517system.cpu0.l2cache.WritebackClean_hits::writebacks 7316094 # number of WritebackClean hits 518system.cpu0.l2cache.WritebackClean_hits::total 7316094 # number of WritebackClean hits 519system.cpu0.l2cache.ReadExReq_hits::cpu0.data 640560 # number of ReadExReq hits 520system.cpu0.l2cache.ReadExReq_hits::total 640560 # number of ReadExReq hits 521system.cpu0.l2cache.ReadCleanReq_hits::cpu0.inst 5011469 # number of ReadCleanReq hits 522system.cpu0.l2cache.ReadCleanReq_hits::total 5011469 # number of ReadCleanReq hits 523system.cpu0.l2cache.ReadSharedReq_hits::cpu0.data 2961462 # number of ReadSharedReq hits 524system.cpu0.l2cache.ReadSharedReq_hits::total 2961462 # number of ReadSharedReq hits 525system.cpu0.l2cache.InvalidateReq_hits::cpu0.data 222733 # number of InvalidateReq hits 526system.cpu0.l2cache.InvalidateReq_hits::total 222733 # number of InvalidateReq hits 527system.cpu0.l2cache.demand_hits::cpu0.dtb.walker 287369 # number of demand (read+write) hits 528system.cpu0.l2cache.demand_hits::cpu0.itb.walker 155522 # number of demand (read+write) hits 529system.cpu0.l2cache.demand_hits::cpu0.inst 5011469 # number of demand (read+write) hits 530system.cpu0.l2cache.demand_hits::cpu0.data 3602022 # number of demand (read+write) hits 531system.cpu0.l2cache.demand_hits::total 9056382 # number of demand (read+write) hits 532system.cpu0.l2cache.overall_hits::cpu0.dtb.walker 287369 # number of overall hits 533system.cpu0.l2cache.overall_hits::cpu0.itb.walker 155522 # number of overall hits 534system.cpu0.l2cache.overall_hits::cpu0.inst 5011469 # number of overall hits 535system.cpu0.l2cache.overall_hits::cpu0.data 3602022 # number of overall hits 536system.cpu0.l2cache.overall_hits::total 9056382 # number of overall hits 537system.cpu0.l2cache.ReadReq_misses::cpu0.dtb.walker 20057 # number of ReadReq misses 538system.cpu0.l2cache.ReadReq_misses::cpu0.itb.walker 9858 # number of ReadReq misses 539system.cpu0.l2cache.ReadReq_misses::total 29915 # number of ReadReq misses 540system.cpu0.l2cache.UpgradeReq_misses::cpu0.data 137835 # number of UpgradeReq misses 541system.cpu0.l2cache.UpgradeReq_misses::total 137835 # number of UpgradeReq misses 542system.cpu0.l2cache.SCUpgradeReq_misses::cpu0.data 154814 # number of SCUpgradeReq misses 543system.cpu0.l2cache.SCUpgradeReq_misses::total 154814 # number of SCUpgradeReq misses 544system.cpu0.l2cache.ReadExReq_misses::cpu0.data 699738 # number of ReadExReq misses 545system.cpu0.l2cache.ReadExReq_misses::total 699738 # number of ReadExReq misses 546system.cpu0.l2cache.ReadCleanReq_misses::cpu0.inst 498672 # number of ReadCleanReq misses 547system.cpu0.l2cache.ReadCleanReq_misses::total 498672 # number of ReadCleanReq misses 548system.cpu0.l2cache.ReadSharedReq_misses::cpu0.data 1226274 # number of ReadSharedReq misses 549system.cpu0.l2cache.ReadSharedReq_misses::total 1226274 # number of ReadSharedReq misses 550system.cpu0.l2cache.InvalidateReq_misses::cpu0.data 601108 # number of InvalidateReq misses 551system.cpu0.l2cache.InvalidateReq_misses::total 601108 # number of InvalidateReq misses 552system.cpu0.l2cache.demand_misses::cpu0.dtb.walker 20057 # number of demand (read+write) misses 553system.cpu0.l2cache.demand_misses::cpu0.itb.walker 9858 # number of demand (read+write) misses 554system.cpu0.l2cache.demand_misses::cpu0.inst 498672 # number of demand (read+write) misses 555system.cpu0.l2cache.demand_misses::cpu0.data 1926012 # number of demand (read+write) misses 556system.cpu0.l2cache.demand_misses::total 2454599 # number of demand (read+write) misses 557system.cpu0.l2cache.overall_misses::cpu0.dtb.walker 20057 # number of overall misses 558system.cpu0.l2cache.overall_misses::cpu0.itb.walker 9858 # number of overall misses 559system.cpu0.l2cache.overall_misses::cpu0.inst 498672 # number of overall misses 560system.cpu0.l2cache.overall_misses::cpu0.data 1926012 # number of overall misses 561system.cpu0.l2cache.overall_misses::total 2454599 # number of overall misses 562system.cpu0.l2cache.ReadReq_accesses::cpu0.dtb.walker 307426 # number of ReadReq accesses(hits+misses) 563system.cpu0.l2cache.ReadReq_accesses::cpu0.itb.walker 165380 # number of ReadReq accesses(hits+misses) 564system.cpu0.l2cache.ReadReq_accesses::total 472806 # number of ReadReq accesses(hits+misses) 565system.cpu0.l2cache.WritebackDirty_accesses::writebacks 4441046 # number of WritebackDirty accesses(hits+misses) 566system.cpu0.l2cache.WritebackDirty_accesses::total 4441046 # number of WritebackDirty accesses(hits+misses) 567system.cpu0.l2cache.WritebackClean_accesses::writebacks 7316094 # number of WritebackClean accesses(hits+misses) 568system.cpu0.l2cache.WritebackClean_accesses::total 7316094 # number of WritebackClean accesses(hits+misses) 569system.cpu0.l2cache.UpgradeReq_accesses::cpu0.data 137835 # number of UpgradeReq accesses(hits+misses) 570system.cpu0.l2cache.UpgradeReq_accesses::total 137835 # number of UpgradeReq accesses(hits+misses) 571system.cpu0.l2cache.SCUpgradeReq_accesses::cpu0.data 154814 # number of SCUpgradeReq accesses(hits+misses) 572system.cpu0.l2cache.SCUpgradeReq_accesses::total 154814 # number of SCUpgradeReq accesses(hits+misses) |
| 574system.cpu0.l2cache.ReadExReq_accesses::cpu0.data 1340298 # number of ReadExReq accesses(hits+misses) 575system.cpu0.l2cache.ReadExReq_accesses::total 1340298 # number of ReadExReq accesses(hits+misses) | 573system.cpu0.l2cache.ReadExReq_accesses::cpu0.data 1340298 # number of ReadExReq accesses(hits+misses) 574system.cpu0.l2cache.ReadExReq_accesses::total 1340298 # number of ReadExReq accesses(hits+misses) |
| 576system.cpu0.l2cache.ReadCleanReq_accesses::cpu0.inst 5510136 # number of ReadCleanReq accesses(hits+misses) 577system.cpu0.l2cache.ReadCleanReq_accesses::total 5510136 # number of ReadCleanReq accesses(hits+misses) 578system.cpu0.l2cache.ReadSharedReq_accesses::cpu0.data 4187734 # number of ReadSharedReq accesses(hits+misses) 579system.cpu0.l2cache.ReadSharedReq_accesses::total 4187734 # number of ReadSharedReq accesses(hits+misses) | 575system.cpu0.l2cache.ReadCleanReq_accesses::cpu0.inst 5510141 # number of ReadCleanReq accesses(hits+misses) 576system.cpu0.l2cache.ReadCleanReq_accesses::total 5510141 # number of ReadCleanReq accesses(hits+misses) 577system.cpu0.l2cache.ReadSharedReq_accesses::cpu0.data 4187736 # number of ReadSharedReq accesses(hits+misses) 578system.cpu0.l2cache.ReadSharedReq_accesses::total 4187736 # number of ReadSharedReq accesses(hits+misses) |
| 580system.cpu0.l2cache.InvalidateReq_accesses::cpu0.data 823841 # number of InvalidateReq accesses(hits+misses) 581system.cpu0.l2cache.InvalidateReq_accesses::total 823841 # number of InvalidateReq accesses(hits+misses) | 579system.cpu0.l2cache.InvalidateReq_accesses::cpu0.data 823841 # number of InvalidateReq accesses(hits+misses) 580system.cpu0.l2cache.InvalidateReq_accesses::total 823841 # number of InvalidateReq accesses(hits+misses) |
| 582system.cpu0.l2cache.demand_accesses::cpu0.dtb.walker 308176 # number of demand (read+write) accesses 583system.cpu0.l2cache.demand_accesses::cpu0.itb.walker 166285 # number of demand (read+write) accesses 584system.cpu0.l2cache.demand_accesses::cpu0.inst 5510136 # number of demand (read+write) accesses 585system.cpu0.l2cache.demand_accesses::cpu0.data 5528032 # number of demand (read+write) accesses 586system.cpu0.l2cache.demand_accesses::total 11512629 # number of demand (read+write) accesses 587system.cpu0.l2cache.overall_accesses::cpu0.dtb.walker 308176 # number of overall (read+write) accesses 588system.cpu0.l2cache.overall_accesses::cpu0.itb.walker 166285 # number of overall (read+write) accesses 589system.cpu0.l2cache.overall_accesses::cpu0.inst 5510136 # number of overall (read+write) accesses 590system.cpu0.l2cache.overall_accesses::cpu0.data 5528032 # number of overall (read+write) accesses 591system.cpu0.l2cache.overall_accesses::total 11512629 # number of overall (read+write) accesses 592system.cpu0.l2cache.ReadReq_miss_rate::cpu0.dtb.walker 0.037125 # miss rate for ReadReq accesses 593system.cpu0.l2cache.ReadReq_miss_rate::cpu0.itb.walker 0.051297 # miss rate for ReadReq accesses 594system.cpu0.l2cache.ReadReq_miss_rate::total 0.042092 # miss rate for ReadReq accesses 595system.cpu0.l2cache.UpgradeReq_miss_rate::cpu0.data 0.994643 # miss rate for UpgradeReq accesses 596system.cpu0.l2cache.UpgradeReq_miss_rate::total 0.994643 # miss rate for UpgradeReq accesses | 581system.cpu0.l2cache.demand_accesses::cpu0.dtb.walker 307426 # number of demand (read+write) accesses 582system.cpu0.l2cache.demand_accesses::cpu0.itb.walker 165380 # number of demand (read+write) accesses 583system.cpu0.l2cache.demand_accesses::cpu0.inst 5510141 # number of demand (read+write) accesses 584system.cpu0.l2cache.demand_accesses::cpu0.data 5528034 # number of demand (read+write) accesses 585system.cpu0.l2cache.demand_accesses::total 11510981 # number of demand (read+write) accesses 586system.cpu0.l2cache.overall_accesses::cpu0.dtb.walker 307426 # number of overall (read+write) accesses 587system.cpu0.l2cache.overall_accesses::cpu0.itb.walker 165380 # number of overall (read+write) accesses 588system.cpu0.l2cache.overall_accesses::cpu0.inst 5510141 # number of overall (read+write) accesses 589system.cpu0.l2cache.overall_accesses::cpu0.data 5528034 # number of overall (read+write) accesses 590system.cpu0.l2cache.overall_accesses::total 11510981 # number of overall (read+write) accesses 591system.cpu0.l2cache.ReadReq_miss_rate::cpu0.dtb.walker 0.065242 # miss rate for ReadReq accesses 592system.cpu0.l2cache.ReadReq_miss_rate::cpu0.itb.walker 0.059608 # miss rate for ReadReq accesses 593system.cpu0.l2cache.ReadReq_miss_rate::total 0.063271 # miss rate for ReadReq accesses 594system.cpu0.l2cache.UpgradeReq_miss_rate::cpu0.data 1 # miss rate for UpgradeReq accesses 595system.cpu0.l2cache.UpgradeReq_miss_rate::total 1 # miss rate for UpgradeReq accesses |
| 597system.cpu0.l2cache.SCUpgradeReq_miss_rate::cpu0.data 1 # miss rate for SCUpgradeReq accesses 598system.cpu0.l2cache.SCUpgradeReq_miss_rate::total 1 # miss rate for SCUpgradeReq accesses | 596system.cpu0.l2cache.SCUpgradeReq_miss_rate::cpu0.data 1 # miss rate for SCUpgradeReq accesses 597system.cpu0.l2cache.SCUpgradeReq_miss_rate::total 1 # miss rate for SCUpgradeReq accesses |
| 599system.cpu0.l2cache.ReadExReq_miss_rate::cpu0.data 0.523176 # miss rate for ReadExReq accesses 600system.cpu0.l2cache.ReadExReq_miss_rate::total 0.523176 # miss rate for ReadExReq accesses 601system.cpu0.l2cache.ReadCleanReq_miss_rate::cpu0.inst 0.090597 # miss rate for ReadCleanReq accesses 602system.cpu0.l2cache.ReadCleanReq_miss_rate::total 0.090597 # miss rate for ReadCleanReq accesses 603system.cpu0.l2cache.ReadSharedReq_miss_rate::cpu0.data 0.294422 # miss rate for ReadSharedReq accesses 604system.cpu0.l2cache.ReadSharedReq_miss_rate::total 0.294422 # miss rate for ReadSharedReq accesses 605system.cpu0.l2cache.InvalidateReq_miss_rate::cpu0.data 0.731362 # miss rate for InvalidateReq accesses 606system.cpu0.l2cache.InvalidateReq_miss_rate::total 0.731362 # miss rate for InvalidateReq accesses 607system.cpu0.l2cache.demand_miss_rate::cpu0.dtb.walker 0.037125 # miss rate for demand accesses 608system.cpu0.l2cache.demand_miss_rate::cpu0.itb.walker 0.051297 # miss rate for demand accesses 609system.cpu0.l2cache.demand_miss_rate::cpu0.inst 0.090597 # miss rate for demand accesses 610system.cpu0.l2cache.demand_miss_rate::cpu0.data 0.349885 # miss rate for demand accesses 611system.cpu0.l2cache.demand_miss_rate::total 0.213101 # miss rate for demand accesses 612system.cpu0.l2cache.overall_miss_rate::cpu0.dtb.walker 0.037125 # miss rate for overall accesses 613system.cpu0.l2cache.overall_miss_rate::cpu0.itb.walker 0.051297 # miss rate for overall accesses 614system.cpu0.l2cache.overall_miss_rate::cpu0.inst 0.090597 # miss rate for overall accesses 615system.cpu0.l2cache.overall_miss_rate::cpu0.data 0.349885 # miss rate for overall accesses 616system.cpu0.l2cache.overall_miss_rate::total 0.213101 # miss rate for overall accesses | 598system.cpu0.l2cache.ReadExReq_miss_rate::cpu0.data 0.522076 # miss rate for ReadExReq accesses 599system.cpu0.l2cache.ReadExReq_miss_rate::total 0.522076 # miss rate for ReadExReq accesses 600system.cpu0.l2cache.ReadCleanReq_miss_rate::cpu0.inst 0.090501 # miss rate for ReadCleanReq accesses 601system.cpu0.l2cache.ReadCleanReq_miss_rate::total 0.090501 # miss rate for ReadCleanReq accesses 602system.cpu0.l2cache.ReadSharedReq_miss_rate::cpu0.data 0.292825 # miss rate for ReadSharedReq accesses 603system.cpu0.l2cache.ReadSharedReq_miss_rate::total 0.292825 # miss rate for ReadSharedReq accesses 604system.cpu0.l2cache.InvalidateReq_miss_rate::cpu0.data 0.729641 # miss rate for InvalidateReq accesses 605system.cpu0.l2cache.InvalidateReq_miss_rate::total 0.729641 # miss rate for InvalidateReq accesses 606system.cpu0.l2cache.demand_miss_rate::cpu0.dtb.walker 0.065242 # miss rate for demand accesses 607system.cpu0.l2cache.demand_miss_rate::cpu0.itb.walker 0.059608 # miss rate for demand accesses 608system.cpu0.l2cache.demand_miss_rate::cpu0.inst 0.090501 # miss rate for demand accesses 609system.cpu0.l2cache.demand_miss_rate::cpu0.data 0.348408 # miss rate for demand accesses 610system.cpu0.l2cache.demand_miss_rate::total 0.213240 # miss rate for demand accesses 611system.cpu0.l2cache.overall_miss_rate::cpu0.dtb.walker 0.065242 # miss rate for overall accesses 612system.cpu0.l2cache.overall_miss_rate::cpu0.itb.walker 0.059608 # miss rate for overall accesses 613system.cpu0.l2cache.overall_miss_rate::cpu0.inst 0.090501 # miss rate for overall accesses 614system.cpu0.l2cache.overall_miss_rate::cpu0.data 0.348408 # miss rate for overall accesses 615system.cpu0.l2cache.overall_miss_rate::total 0.213240 # miss rate for overall accesses |
| 617system.cpu0.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 618system.cpu0.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 619system.cpu0.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 620system.cpu0.l2cache.blocked::no_targets 0 # number of cycles access was blocked 621system.cpu0.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 622system.cpu0.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 616system.cpu0.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 617system.cpu0.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 618system.cpu0.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 619system.cpu0.l2cache.blocked::no_targets 0 # number of cycles access was blocked 620system.cpu0.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 621system.cpu0.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 623system.cpu0.l2cache.writebacks::writebacks 1559963 # number of writebacks 624system.cpu0.l2cache.writebacks::total 1559963 # number of writebacks 625system.cpu0.toL2Bus.snoop_filter.tot_requests 24176858 # Total number of requests made to the snoop filter. 626system.cpu0.toL2Bus.snoop_filter.hit_single_requests 12314856 # Number of requests hitting in the snoop filter with a single holder of the requested data. | 622system.cpu0.l2cache.writebacks::writebacks 1552940 # number of writebacks 623system.cpu0.l2cache.writebacks::total 1552940 # number of writebacks 624system.cpu0.toL2Bus.snoop_filter.tot_requests 24175638 # Total number of requests made to the snoop filter. 625system.cpu0.toL2Bus.snoop_filter.hit_single_requests 12313629 # Number of requests hitting in the snoop filter with a single holder of the requested data. |
| 627system.cpu0.toL2Bus.snoop_filter.hit_multi_requests 1398 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. | 626system.cpu0.toL2Bus.snoop_filter.hit_multi_requests 1398 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. |
| 628system.cpu0.toL2Bus.snoop_filter.tot_snoops 1775409 # Total number of snoops made to the snoop filter. 629system.cpu0.toL2Bus.snoop_filter.hit_single_snoops 1775098 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 630system.cpu0.toL2Bus.snoop_filter.hit_multi_snoops 311 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. | 627system.cpu0.toL2Bus.snoop_filter.tot_snoops 303605 # Total number of snoops made to the snoop filter. 628system.cpu0.toL2Bus.snoop_filter.hit_single_snoops 303605 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 629system.cpu0.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. |
| 631system.cpu0.toL2Bus.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 632system.cpu0.toL2Bus.trans_dist::ReadReq 622617 # Transaction distribution | 630system.cpu0.toL2Bus.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 631system.cpu0.toL2Bus.trans_dist::ReadReq 622617 # Transaction distribution |
| 633system.cpu0.toL2Bus.trans_dist::ReadResp 10320487 # Transaction distribution | 632system.cpu0.toL2Bus.trans_dist::ReadResp 10320494 # Transaction distribution |
| 634system.cpu0.toL2Bus.trans_dist::WriteReq 33234 # Transaction distribution 635system.cpu0.toL2Bus.trans_dist::WriteResp 33234 # Transaction distribution | 633system.cpu0.toL2Bus.trans_dist::WriteReq 33234 # Transaction distribution 634system.cpu0.toL2Bus.trans_dist::WriteResp 33234 # Transaction distribution |
| 636system.cpu0.toL2Bus.trans_dist::WritebackDirty 4439476 # Transaction distribution 637system.cpu0.toL2Bus.trans_dist::WritebackClean 7319055 # Transaction distribution 638system.cpu0.toL2Bus.trans_dist::UpgradeReq 139245 # Transaction distribution 639system.cpu0.toL2Bus.trans_dist::SCUpgradeReq 154638 # Transaction distribution 640system.cpu0.toL2Bus.trans_dist::UpgradeResp 293883 # Transaction distribution | 635system.cpu0.toL2Bus.trans_dist::WritebackDirty 4441046 # Transaction distribution 636system.cpu0.toL2Bus.trans_dist::WritebackClean 7317492 # Transaction distribution 637system.cpu0.toL2Bus.trans_dist::UpgradeReq 137835 # Transaction distribution 638system.cpu0.toL2Bus.trans_dist::SCUpgradeReq 154814 # Transaction distribution 639system.cpu0.toL2Bus.trans_dist::UpgradeResp 292649 # Transaction distribution |
| 641system.cpu0.toL2Bus.trans_dist::ReadExReq 1340298 # Transaction distribution 642system.cpu0.toL2Bus.trans_dist::ReadExResp 1340298 # Transaction distribution | 640system.cpu0.toL2Bus.trans_dist::ReadExReq 1340298 # Transaction distribution 641system.cpu0.toL2Bus.trans_dist::ReadExResp 1340298 # Transaction distribution |
| 643system.cpu0.toL2Bus.trans_dist::ReadCleanReq 5510136 # Transaction distribution 644system.cpu0.toL2Bus.trans_dist::ReadSharedReq 4187734 # Transaction distribution | 642system.cpu0.toL2Bus.trans_dist::ReadCleanReq 5510141 # Transaction distribution 643system.cpu0.toL2Bus.trans_dist::ReadSharedReq 4187736 # Transaction distribution |
| 645system.cpu0.toL2Bus.trans_dist::InvalidateReq 823841 # Transaction distribution 646system.cpu0.toL2Bus.trans_dist::InvalidateResp 823841 # Transaction distribution | 644system.cpu0.toL2Bus.trans_dist::InvalidateReq 823841 # Transaction distribution 645system.cpu0.toL2Bus.trans_dist::InvalidateResp 823841 # Transaction distribution |
| 647system.cpu0.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.cpu0.l2cache.cpu_side 16616141 # Packet count per connected master and slave (bytes) 648system.cpu0.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.cpu0.l2cache.cpu_side 19673024 # Packet count per connected master and slave (bytes) | 646system.cpu0.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.cpu0.l2cache.cpu_side 16616156 # Packet count per connected master and slave (bytes) 647system.cpu0.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.cpu0.l2cache.cpu_side 19670562 # Packet count per connected master and slave (bytes) |
| 649system.cpu0.toL2Bus.pkt_count_system.cpu0.itb.walker.dma::system.cpu0.l2cache.cpu_side 364916 # Packet count per connected master and slave (bytes) 650system.cpu0.toL2Bus.pkt_count_system.cpu0.dtb.walker.dma::system.cpu0.l2cache.cpu_side 727936 # Packet count per connected master and slave (bytes) | 648system.cpu0.toL2Bus.pkt_count_system.cpu0.itb.walker.dma::system.cpu0.l2cache.cpu_side 364916 # Packet count per connected master and slave (bytes) 649system.cpu0.toL2Bus.pkt_count_system.cpu0.dtb.walker.dma::system.cpu0.l2cache.cpu_side 727936 # Packet count per connected master and slave (bytes) |
| 651system.cpu0.toL2Bus.pkt_count::total 37382017 # Packet count per connected master and slave (bytes) 652system.cpu0.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.cpu0.l2cache.cpu_side 705436820 # Cumulative packet size per connected master and slave (bytes) 653system.cpu0.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.cpu0.l2cache.cpu_side 753922812 # Cumulative packet size per connected master and slave (bytes) | 650system.cpu0.toL2Bus.pkt_count::total 37379570 # Packet count per connected master and slave (bytes) 651system.cpu0.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.cpu0.l2cache.cpu_side 705437460 # Cumulative packet size per connected master and slave (bytes) 652system.cpu0.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.cpu0.l2cache.cpu_side 753923068 # Cumulative packet size per connected master and slave (bytes) |
| 654system.cpu0.toL2Bus.pkt_size_system.cpu0.itb.walker.dma::system.cpu0.l2cache.cpu_side 1459664 # Cumulative packet size per connected master and slave (bytes) 655system.cpu0.toL2Bus.pkt_size_system.cpu0.dtb.walker.dma::system.cpu0.l2cache.cpu_side 2911744 # Cumulative packet size per connected master and slave (bytes) | 653system.cpu0.toL2Bus.pkt_size_system.cpu0.itb.walker.dma::system.cpu0.l2cache.cpu_side 1459664 # Cumulative packet size per connected master and slave (bytes) 654system.cpu0.toL2Bus.pkt_size_system.cpu0.dtb.walker.dma::system.cpu0.l2cache.cpu_side 2911744 # Cumulative packet size per connected master and slave (bytes) |
| 656system.cpu0.toL2Bus.pkt_size::total 1463731040 # Cumulative packet size per connected master and slave (bytes) 657system.cpu0.toL2Bus.snoops 6082125 # Total snoops (count) 658system.cpu0.toL2Bus.snoopTraffic 101619328 # Total snoop traffic (bytes) 659system.cpu0.toL2Bus.snoop_fanout::samples 30471409 # Request fanout histogram 660system.cpu0.toL2Bus.snoop_fanout::mean 0.066979 # Request fanout histogram 661system.cpu0.toL2Bus.snoop_fanout::stdev 0.250027 # Request fanout histogram | 655system.cpu0.toL2Bus.pkt_size::total 1463731936 # Cumulative packet size per connected master and slave (bytes) 656system.cpu0.toL2Bus.snoops 4670427 # Total snoops (count) 657system.cpu0.toL2Bus.snoopTraffic 101174852 # Total snoop traffic (bytes) 658system.cpu0.toL2Bus.snoop_fanout::samples 29058250 # Request fanout histogram 659system.cpu0.toL2Bus.snoop_fanout::mean 0.019576 # Request fanout histogram 660system.cpu0.toL2Bus.snoop_fanout::stdev 0.138538 # Request fanout histogram |
| 662system.cpu0.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram | 661system.cpu0.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram |
| 663system.cpu0.toL2Bus.snoop_fanout::0 28430762 93.30% 93.30% # Request fanout histogram 664system.cpu0.toL2Bus.snoop_fanout::1 2040336 6.70% 100.00% # Request fanout histogram 665system.cpu0.toL2Bus.snoop_fanout::2 311 0.00% 100.00% # Request fanout histogram | 662system.cpu0.toL2Bus.snoop_fanout::0 28489407 98.04% 98.04% # Request fanout histogram 663system.cpu0.toL2Bus.snoop_fanout::1 568843 1.96% 100.00% # Request fanout histogram 664system.cpu0.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram |
| 666system.cpu0.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 667system.cpu0.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram | 665system.cpu0.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 666system.cpu0.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram |
| 668system.cpu0.toL2Bus.snoop_fanout::max_value 2 # Request fanout histogram 669system.cpu0.toL2Bus.snoop_fanout::total 30471409 # Request fanout histogram | 667system.cpu0.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram 668system.cpu0.toL2Bus.snoop_fanout::total 29058250 # Request fanout histogram |
| 670system.cpu1.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 671system.cpu1.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested 672system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst 673system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst 674system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst 675system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst 676system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst 677system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst --- 205 unchanged lines hidden (view full) --- 883system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 69.52% # Class of executed instruction 884system.cpu1.op_class::SimdFloatSqrt 0 0.00% 69.52% # Class of executed instruction 885system.cpu1.op_class::MemRead 90755131 16.04% 85.56% # Class of executed instruction 886system.cpu1.op_class::MemWrite 81710125 14.44% 100.00% # Class of executed instruction 887system.cpu1.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 888system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 889system.cpu1.op_class::total 565908654 # Class of executed instruction 890system.cpu1.dcache.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 669system.cpu1.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 670system.cpu1.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested 671system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst 672system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst 673system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst 674system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst 675system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst 676system.cpu1.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst --- 205 unchanged lines hidden (view full) --- 882system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 69.52% # Class of executed instruction 883system.cpu1.op_class::SimdFloatSqrt 0 0.00% 69.52% # Class of executed instruction 884system.cpu1.op_class::MemRead 90755131 16.04% 85.56% # Class of executed instruction 885system.cpu1.op_class::MemWrite 81710125 14.44% 100.00% # Class of executed instruction 886system.cpu1.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 887system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 888system.cpu1.op_class::total 565908654 # Class of executed instruction 889system.cpu1.dcache.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 891system.cpu1.dcache.tags.replacements 5970882 # number of replacements | 890system.cpu1.dcache.tags.replacements 5970884 # number of replacements |
| 892system.cpu1.dcache.tags.tagsinuse 423.354804 # Cycle average of tags in use | 891system.cpu1.dcache.tags.tagsinuse 423.354804 # Cycle average of tags in use |
| 893system.cpu1.dcache.tags.total_refs 166384450 # Total number of references to valid blocks. 894system.cpu1.dcache.tags.sampled_refs 5971393 # Sample count of references to valid blocks. 895system.cpu1.dcache.tags.avg_refs 27.863591 # Average number of references to valid blocks. | 892system.cpu1.dcache.tags.total_refs 166384448 # Total number of references to valid blocks. 893system.cpu1.dcache.tags.sampled_refs 5971395 # Sample count of references to valid blocks. 894system.cpu1.dcache.tags.avg_refs 27.863581 # Average number of references to valid blocks. |
| 896system.cpu1.dcache.tags.warmup_cycle 8470277781000 # Cycle when the warmup percentage was hit. 897system.cpu1.dcache.tags.occ_blocks::cpu1.data 423.354804 # Average occupied blocks per requestor 898system.cpu1.dcache.tags.occ_percent::cpu1.data 0.826865 # Average percentage of cache occupancy 899system.cpu1.dcache.tags.occ_percent::total 0.826865 # Average percentage of cache occupancy 900system.cpu1.dcache.tags.occ_task_id_blocks::1024 511 # Occupied blocks per task id 901system.cpu1.dcache.tags.age_task_id_blocks_1024::0 180 # Occupied blocks per task id 902system.cpu1.dcache.tags.age_task_id_blocks_1024::1 330 # Occupied blocks per task id 903system.cpu1.dcache.tags.age_task_id_blocks_1024::2 1 # Occupied blocks per task id 904system.cpu1.dcache.tags.occ_task_id_percent::1024 0.998047 # Percentage of cache occupancy per task id | 895system.cpu1.dcache.tags.warmup_cycle 8470277781000 # Cycle when the warmup percentage was hit. 896system.cpu1.dcache.tags.occ_blocks::cpu1.data 423.354804 # Average occupied blocks per requestor 897system.cpu1.dcache.tags.occ_percent::cpu1.data 0.826865 # Average percentage of cache occupancy 898system.cpu1.dcache.tags.occ_percent::total 0.826865 # Average percentage of cache occupancy 899system.cpu1.dcache.tags.occ_task_id_blocks::1024 511 # Occupied blocks per task id 900system.cpu1.dcache.tags.age_task_id_blocks_1024::0 180 # Occupied blocks per task id 901system.cpu1.dcache.tags.age_task_id_blocks_1024::1 330 # Occupied blocks per task id 902system.cpu1.dcache.tags.age_task_id_blocks_1024::2 1 # Occupied blocks per task id 903system.cpu1.dcache.tags.occ_task_id_percent::1024 0.998047 # Percentage of cache occupancy per task id |
| 905system.cpu1.dcache.tags.tag_accesses 350957209 # Number of tag accesses 906system.cpu1.dcache.tags.data_accesses 350957209 # Number of data accesses | 904system.cpu1.dcache.tags.tag_accesses 350957211 # Number of tag accesses 905system.cpu1.dcache.tags.data_accesses 350957211 # Number of data accesses |
| 907system.cpu1.dcache.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 906system.cpu1.dcache.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 908system.cpu1.dcache.ReadReq_hits::cpu1.data 84198599 # number of ReadReq hits 909system.cpu1.dcache.ReadReq_hits::total 84198599 # number of ReadReq hits 910system.cpu1.dcache.WriteReq_hits::cpu1.data 77532107 # number of WriteReq hits 911system.cpu1.dcache.WriteReq_hits::total 77532107 # number of WriteReq hits | 907system.cpu1.dcache.ReadReq_hits::cpu1.data 84198598 # number of ReadReq hits 908system.cpu1.dcache.ReadReq_hits::total 84198598 # number of ReadReq hits 909system.cpu1.dcache.WriteReq_hits::cpu1.data 77531561 # number of WriteReq hits 910system.cpu1.dcache.WriteReq_hits::total 77531561 # number of WriteReq hits |
| 912system.cpu1.dcache.SoftPFReq_hits::cpu1.data 187263 # number of SoftPFReq hits 913system.cpu1.dcache.SoftPFReq_hits::total 187263 # number of SoftPFReq hits | 911system.cpu1.dcache.SoftPFReq_hits::cpu1.data 187263 # number of SoftPFReq hits 912system.cpu1.dcache.SoftPFReq_hits::total 187263 # number of SoftPFReq hits |
| 914system.cpu1.dcache.WriteLineReq_hits::cpu1.data 64879 # number of WriteLineReq hits 915system.cpu1.dcache.WriteLineReq_hits::total 64879 # number of WriteLineReq hits 916system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 2055501 # number of LoadLockedReq hits 917system.cpu1.dcache.LoadLockedReq_hits::total 2055501 # number of LoadLockedReq hits 918system.cpu1.dcache.StoreCondReq_hits::cpu1.data 2044925 # number of StoreCondReq hits 919system.cpu1.dcache.StoreCondReq_hits::total 2044925 # number of StoreCondReq hits 920system.cpu1.dcache.demand_hits::cpu1.data 161795585 # number of demand (read+write) hits 921system.cpu1.dcache.demand_hits::total 161795585 # number of demand (read+write) hits 922system.cpu1.dcache.overall_hits::cpu1.data 161982848 # number of overall hits 923system.cpu1.dcache.overall_hits::total 161982848 # number of overall hits 924system.cpu1.dcache.ReadReq_misses::cpu1.data 3367289 # number of ReadReq misses 925system.cpu1.dcache.ReadReq_misses::total 3367289 # number of ReadReq misses 926system.cpu1.dcache.WriteReq_misses::cpu1.data 1465578 # number of WriteReq misses 927system.cpu1.dcache.WriteReq_misses::total 1465578 # number of WriteReq misses | 913system.cpu1.dcache.WriteLineReq_hits::cpu1.data 64886 # number of WriteLineReq hits 914system.cpu1.dcache.WriteLineReq_hits::total 64886 # number of WriteLineReq hits 915system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 2055500 # number of LoadLockedReq hits 916system.cpu1.dcache.LoadLockedReq_hits::total 2055500 # number of LoadLockedReq hits 917system.cpu1.dcache.StoreCondReq_hits::cpu1.data 2044725 # number of StoreCondReq hits 918system.cpu1.dcache.StoreCondReq_hits::total 2044725 # number of StoreCondReq hits 919system.cpu1.dcache.demand_hits::cpu1.data 161795045 # number of demand (read+write) hits 920system.cpu1.dcache.demand_hits::total 161795045 # number of demand (read+write) hits 921system.cpu1.dcache.overall_hits::cpu1.data 161982308 # number of overall hits 922system.cpu1.dcache.overall_hits::total 161982308 # number of overall hits 923system.cpu1.dcache.ReadReq_misses::cpu1.data 3367290 # number of ReadReq misses 924system.cpu1.dcache.ReadReq_misses::total 3367290 # number of ReadReq misses 925system.cpu1.dcache.WriteReq_misses::cpu1.data 1466124 # number of WriteReq misses 926system.cpu1.dcache.WriteReq_misses::total 1466124 # number of WriteReq misses |
| 928system.cpu1.dcache.SoftPFReq_misses::cpu1.data 793623 # number of SoftPFReq misses 929system.cpu1.dcache.SoftPFReq_misses::total 793623 # number of SoftPFReq misses | 927system.cpu1.dcache.SoftPFReq_misses::cpu1.data 793623 # number of SoftPFReq misses 928system.cpu1.dcache.SoftPFReq_misses::total 793623 # number of SoftPFReq misses |
| 930system.cpu1.dcache.WriteLineReq_misses::cpu1.data 433878 # number of WriteLineReq misses 931system.cpu1.dcache.WriteLineReq_misses::total 433878 # number of WriteLineReq misses 932system.cpu1.dcache.LoadLockedReq_misses::cpu1.data 147104 # number of LoadLockedReq misses 933system.cpu1.dcache.LoadLockedReq_misses::total 147104 # number of LoadLockedReq misses 934system.cpu1.dcache.StoreCondReq_misses::cpu1.data 156474 # number of StoreCondReq misses 935system.cpu1.dcache.StoreCondReq_misses::total 156474 # number of StoreCondReq misses 936system.cpu1.dcache.demand_misses::cpu1.data 5266745 # number of demand (read+write) misses 937system.cpu1.dcache.demand_misses::total 5266745 # number of demand (read+write) misses 938system.cpu1.dcache.overall_misses::cpu1.data 6060368 # number of overall misses 939system.cpu1.dcache.overall_misses::total 6060368 # number of overall misses | 929system.cpu1.dcache.WriteLineReq_misses::cpu1.data 433871 # number of WriteLineReq misses 930system.cpu1.dcache.WriteLineReq_misses::total 433871 # number of WriteLineReq misses 931system.cpu1.dcache.LoadLockedReq_misses::cpu1.data 147105 # number of LoadLockedReq misses 932system.cpu1.dcache.LoadLockedReq_misses::total 147105 # number of LoadLockedReq misses 933system.cpu1.dcache.StoreCondReq_misses::cpu1.data 156674 # number of StoreCondReq misses 934system.cpu1.dcache.StoreCondReq_misses::total 156674 # number of StoreCondReq misses 935system.cpu1.dcache.demand_misses::cpu1.data 5267285 # number of demand (read+write) misses 936system.cpu1.dcache.demand_misses::total 5267285 # number of demand (read+write) misses 937system.cpu1.dcache.overall_misses::cpu1.data 6060908 # number of overall misses 938system.cpu1.dcache.overall_misses::total 6060908 # number of overall misses |
| 940system.cpu1.dcache.ReadReq_accesses::cpu1.data 87565888 # number of ReadReq accesses(hits+misses) 941system.cpu1.dcache.ReadReq_accesses::total 87565888 # number of ReadReq accesses(hits+misses) 942system.cpu1.dcache.WriteReq_accesses::cpu1.data 78997685 # number of WriteReq accesses(hits+misses) 943system.cpu1.dcache.WriteReq_accesses::total 78997685 # number of WriteReq accesses(hits+misses) 944system.cpu1.dcache.SoftPFReq_accesses::cpu1.data 980886 # number of SoftPFReq accesses(hits+misses) 945system.cpu1.dcache.SoftPFReq_accesses::total 980886 # number of SoftPFReq accesses(hits+misses) 946system.cpu1.dcache.WriteLineReq_accesses::cpu1.data 498757 # number of WriteLineReq accesses(hits+misses) 947system.cpu1.dcache.WriteLineReq_accesses::total 498757 # number of WriteLineReq accesses(hits+misses) 948system.cpu1.dcache.LoadLockedReq_accesses::cpu1.data 2202605 # number of LoadLockedReq accesses(hits+misses) 949system.cpu1.dcache.LoadLockedReq_accesses::total 2202605 # number of LoadLockedReq accesses(hits+misses) 950system.cpu1.dcache.StoreCondReq_accesses::cpu1.data 2201399 # number of StoreCondReq accesses(hits+misses) 951system.cpu1.dcache.StoreCondReq_accesses::total 2201399 # number of StoreCondReq accesses(hits+misses) 952system.cpu1.dcache.demand_accesses::cpu1.data 167062330 # number of demand (read+write) accesses 953system.cpu1.dcache.demand_accesses::total 167062330 # number of demand (read+write) accesses 954system.cpu1.dcache.overall_accesses::cpu1.data 168043216 # number of overall (read+write) accesses 955system.cpu1.dcache.overall_accesses::total 168043216 # number of overall (read+write) accesses 956system.cpu1.dcache.ReadReq_miss_rate::cpu1.data 0.038454 # miss rate for ReadReq accesses 957system.cpu1.dcache.ReadReq_miss_rate::total 0.038454 # miss rate for ReadReq accesses | 939system.cpu1.dcache.ReadReq_accesses::cpu1.data 87565888 # number of ReadReq accesses(hits+misses) 940system.cpu1.dcache.ReadReq_accesses::total 87565888 # number of ReadReq accesses(hits+misses) 941system.cpu1.dcache.WriteReq_accesses::cpu1.data 78997685 # number of WriteReq accesses(hits+misses) 942system.cpu1.dcache.WriteReq_accesses::total 78997685 # number of WriteReq accesses(hits+misses) 943system.cpu1.dcache.SoftPFReq_accesses::cpu1.data 980886 # number of SoftPFReq accesses(hits+misses) 944system.cpu1.dcache.SoftPFReq_accesses::total 980886 # number of SoftPFReq accesses(hits+misses) 945system.cpu1.dcache.WriteLineReq_accesses::cpu1.data 498757 # number of WriteLineReq accesses(hits+misses) 946system.cpu1.dcache.WriteLineReq_accesses::total 498757 # number of WriteLineReq accesses(hits+misses) 947system.cpu1.dcache.LoadLockedReq_accesses::cpu1.data 2202605 # number of LoadLockedReq accesses(hits+misses) 948system.cpu1.dcache.LoadLockedReq_accesses::total 2202605 # number of LoadLockedReq accesses(hits+misses) 949system.cpu1.dcache.StoreCondReq_accesses::cpu1.data 2201399 # number of StoreCondReq accesses(hits+misses) 950system.cpu1.dcache.StoreCondReq_accesses::total 2201399 # number of StoreCondReq accesses(hits+misses) 951system.cpu1.dcache.demand_accesses::cpu1.data 167062330 # number of demand (read+write) accesses 952system.cpu1.dcache.demand_accesses::total 167062330 # number of demand (read+write) accesses 953system.cpu1.dcache.overall_accesses::cpu1.data 168043216 # number of overall (read+write) accesses 954system.cpu1.dcache.overall_accesses::total 168043216 # number of overall (read+write) accesses 955system.cpu1.dcache.ReadReq_miss_rate::cpu1.data 0.038454 # miss rate for ReadReq accesses 956system.cpu1.dcache.ReadReq_miss_rate::total 0.038454 # miss rate for ReadReq accesses |
| 958system.cpu1.dcache.WriteReq_miss_rate::cpu1.data 0.018552 # miss rate for WriteReq accesses 959system.cpu1.dcache.WriteReq_miss_rate::total 0.018552 # miss rate for WriteReq accesses | 957system.cpu1.dcache.WriteReq_miss_rate::cpu1.data 0.018559 # miss rate for WriteReq accesses 958system.cpu1.dcache.WriteReq_miss_rate::total 0.018559 # miss rate for WriteReq accesses |
| 960system.cpu1.dcache.SoftPFReq_miss_rate::cpu1.data 0.809088 # miss rate for SoftPFReq accesses 961system.cpu1.dcache.SoftPFReq_miss_rate::total 0.809088 # miss rate for SoftPFReq accesses | 959system.cpu1.dcache.SoftPFReq_miss_rate::cpu1.data 0.809088 # miss rate for SoftPFReq accesses 960system.cpu1.dcache.SoftPFReq_miss_rate::total 0.809088 # miss rate for SoftPFReq accesses |
| 962system.cpu1.dcache.WriteLineReq_miss_rate::cpu1.data 0.869919 # miss rate for WriteLineReq accesses 963system.cpu1.dcache.WriteLineReq_miss_rate::total 0.869919 # miss rate for WriteLineReq accesses 964system.cpu1.dcache.LoadLockedReq_miss_rate::cpu1.data 0.066786 # miss rate for LoadLockedReq accesses 965system.cpu1.dcache.LoadLockedReq_miss_rate::total 0.066786 # miss rate for LoadLockedReq accesses 966system.cpu1.dcache.StoreCondReq_miss_rate::cpu1.data 0.071079 # miss rate for StoreCondReq accesses 967system.cpu1.dcache.StoreCondReq_miss_rate::total 0.071079 # miss rate for StoreCondReq accesses 968system.cpu1.dcache.demand_miss_rate::cpu1.data 0.031526 # miss rate for demand accesses 969system.cpu1.dcache.demand_miss_rate::total 0.031526 # miss rate for demand accesses 970system.cpu1.dcache.overall_miss_rate::cpu1.data 0.036064 # miss rate for overall accesses 971system.cpu1.dcache.overall_miss_rate::total 0.036064 # miss rate for overall accesses | 961system.cpu1.dcache.WriteLineReq_miss_rate::cpu1.data 0.869905 # miss rate for WriteLineReq accesses 962system.cpu1.dcache.WriteLineReq_miss_rate::total 0.869905 # miss rate for WriteLineReq accesses 963system.cpu1.dcache.LoadLockedReq_miss_rate::cpu1.data 0.066787 # miss rate for LoadLockedReq accesses 964system.cpu1.dcache.LoadLockedReq_miss_rate::total 0.066787 # miss rate for LoadLockedReq accesses 965system.cpu1.dcache.StoreCondReq_miss_rate::cpu1.data 0.071170 # miss rate for StoreCondReq accesses 966system.cpu1.dcache.StoreCondReq_miss_rate::total 0.071170 # miss rate for StoreCondReq accesses 967system.cpu1.dcache.demand_miss_rate::cpu1.data 0.031529 # miss rate for demand accesses 968system.cpu1.dcache.demand_miss_rate::total 0.031529 # miss rate for demand accesses 969system.cpu1.dcache.overall_miss_rate::cpu1.data 0.036068 # miss rate for overall accesses 970system.cpu1.dcache.overall_miss_rate::total 0.036068 # miss rate for overall accesses |
| 972system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 973system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 974system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 975system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked 976system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 977system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 971system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 972system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 973system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 974system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked 975system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 976system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 978system.cpu1.dcache.writebacks::writebacks 5970882 # number of writebacks 979system.cpu1.dcache.writebacks::total 5970882 # number of writebacks | 977system.cpu1.dcache.writebacks::writebacks 5970884 # number of writebacks 978system.cpu1.dcache.writebacks::total 5970884 # number of writebacks |
| 980system.cpu1.icache.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 981system.cpu1.icache.tags.replacements 4768482 # number of replacements 982system.cpu1.icache.tags.tagsinuse 496.452247 # Cycle average of tags in use 983system.cpu1.icache.tags.total_refs 476148096 # Total number of references to valid blocks. 984system.cpu1.icache.tags.sampled_refs 4768994 # Sample count of references to valid blocks. 985system.cpu1.icache.tags.avg_refs 99.842461 # Average number of references to valid blocks. 986system.cpu1.icache.tags.warmup_cycle 8470205818500 # Cycle when the warmup percentage was hit. 987system.cpu1.icache.tags.occ_blocks::cpu1.inst 496.452247 # Average occupied blocks per requestor --- 42 unchanged lines hidden (view full) --- 1030system.cpu1.l2cache.prefetcher.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1031system.cpu1.l2cache.prefetcher.num_hwpf_issued 0 # number of hwpf issued 1032system.cpu1.l2cache.prefetcher.pfIdentified 0 # number of prefetch candidates identified 1033system.cpu1.l2cache.prefetcher.pfBufferHit 0 # number of redundant prefetches already in prefetch queue 1034system.cpu1.l2cache.prefetcher.pfInCache 0 # number of redundant prefetches already in cache/mshr dropped 1035system.cpu1.l2cache.prefetcher.pfRemovedFull 0 # number of prefetches dropped due to prefetch queue size 1036system.cpu1.l2cache.prefetcher.pfSpanPage 0 # number of prefetches not generated due to page crossing 1037system.cpu1.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 979system.cpu1.icache.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 980system.cpu1.icache.tags.replacements 4768482 # number of replacements 981system.cpu1.icache.tags.tagsinuse 496.452247 # Cycle average of tags in use 982system.cpu1.icache.tags.total_refs 476148096 # Total number of references to valid blocks. 983system.cpu1.icache.tags.sampled_refs 4768994 # Sample count of references to valid blocks. 984system.cpu1.icache.tags.avg_refs 99.842461 # Average number of references to valid blocks. 985system.cpu1.icache.tags.warmup_cycle 8470205818500 # Cycle when the warmup percentage was hit. 986system.cpu1.icache.tags.occ_blocks::cpu1.inst 496.452247 # Average occupied blocks per requestor --- 42 unchanged lines hidden (view full) --- 1029system.cpu1.l2cache.prefetcher.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1030system.cpu1.l2cache.prefetcher.num_hwpf_issued 0 # number of hwpf issued 1031system.cpu1.l2cache.prefetcher.pfIdentified 0 # number of prefetch candidates identified 1032system.cpu1.l2cache.prefetcher.pfBufferHit 0 # number of redundant prefetches already in prefetch queue 1033system.cpu1.l2cache.prefetcher.pfInCache 0 # number of redundant prefetches already in cache/mshr dropped 1034system.cpu1.l2cache.prefetcher.pfRemovedFull 0 # number of prefetches dropped due to prefetch queue size 1035system.cpu1.l2cache.prefetcher.pfSpanPage 0 # number of prefetches not generated due to page crossing 1036system.cpu1.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 1038system.cpu1.l2cache.tags.replacements 2262891 # number of replacements 1039system.cpu1.l2cache.tags.tagsinuse 13357.261726 # Cycle average of tags in use 1040system.cpu1.l2cache.tags.total_refs 14305129 # Total number of references to valid blocks. 1041system.cpu1.l2cache.tags.sampled_refs 2278874 # Sample count of references to valid blocks. 1042system.cpu1.l2cache.tags.avg_refs 6.277279 # Average number of references to valid blocks. 1043system.cpu1.l2cache.tags.warmup_cycle 9829187815500 # Cycle when the warmup percentage was hit. 1044system.cpu1.l2cache.tags.occ_blocks::writebacks 13247.067066 # Average occupied blocks per requestor 1045system.cpu1.l2cache.tags.occ_blocks::cpu1.dtb.walker 51.785938 # Average occupied blocks per requestor 1046system.cpu1.l2cache.tags.occ_blocks::cpu1.itb.walker 58.408722 # Average occupied blocks per requestor 1047system.cpu1.l2cache.tags.occ_percent::writebacks 0.808537 # Average percentage of cache occupancy 1048system.cpu1.l2cache.tags.occ_percent::cpu1.dtb.walker 0.003161 # Average percentage of cache occupancy 1049system.cpu1.l2cache.tags.occ_percent::cpu1.itb.walker 0.003565 # Average percentage of cache occupancy 1050system.cpu1.l2cache.tags.occ_percent::total 0.815263 # Average percentage of cache occupancy 1051system.cpu1.l2cache.tags.occ_task_id_blocks::1023 91 # Occupied blocks per task id 1052system.cpu1.l2cache.tags.occ_task_id_blocks::1024 15892 # Occupied blocks per task id 1053system.cpu1.l2cache.tags.age_task_id_blocks_1023::2 53 # Occupied blocks per task id 1054system.cpu1.l2cache.tags.age_task_id_blocks_1023::3 17 # Occupied blocks per task id | 1037system.cpu1.l2cache.tags.replacements 2174770 # number of replacements 1038system.cpu1.l2cache.tags.tagsinuse 13105.960937 # Cycle average of tags in use 1039system.cpu1.l2cache.tags.total_refs 8815603 # Total number of references to valid blocks. 1040system.cpu1.l2cache.tags.sampled_refs 2190453 # Sample count of references to valid blocks. 1041system.cpu1.l2cache.tags.avg_refs 4.024557 # Average number of references to valid blocks. 1042system.cpu1.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 1043system.cpu1.l2cache.tags.occ_blocks::writebacks 13068.855777 # Average occupied blocks per requestor 1044system.cpu1.l2cache.tags.occ_blocks::cpu1.dtb.walker 21.863128 # Average occupied blocks per requestor 1045system.cpu1.l2cache.tags.occ_blocks::cpu1.itb.walker 15.242032 # Average occupied blocks per requestor 1046system.cpu1.l2cache.tags.occ_percent::writebacks 0.797660 # Average percentage of cache occupancy 1047system.cpu1.l2cache.tags.occ_percent::cpu1.dtb.walker 0.001334 # Average percentage of cache occupancy 1048system.cpu1.l2cache.tags.occ_percent::cpu1.itb.walker 0.000930 # Average percentage of cache occupancy 1049system.cpu1.l2cache.tags.occ_percent::total 0.799924 # Average percentage of cache occupancy 1050system.cpu1.l2cache.tags.occ_task_id_blocks::1023 90 # Occupied blocks per task id 1051system.cpu1.l2cache.tags.occ_task_id_blocks::1024 15593 # Occupied blocks per task id 1052system.cpu1.l2cache.tags.age_task_id_blocks_1023::2 57 # Occupied blocks per task id 1053system.cpu1.l2cache.tags.age_task_id_blocks_1023::3 12 # Occupied blocks per task id |
| 1055system.cpu1.l2cache.tags.age_task_id_blocks_1023::4 21 # Occupied blocks per task id | 1054system.cpu1.l2cache.tags.age_task_id_blocks_1023::4 21 # Occupied blocks per task id |
| 1056system.cpu1.l2cache.tags.age_task_id_blocks_1024::0 152 # Occupied blocks per task id 1057system.cpu1.l2cache.tags.age_task_id_blocks_1024::1 1574 # Occupied blocks per task id 1058system.cpu1.l2cache.tags.age_task_id_blocks_1024::2 6119 # Occupied blocks per task id 1059system.cpu1.l2cache.tags.age_task_id_blocks_1024::3 4359 # Occupied blocks per task id 1060system.cpu1.l2cache.tags.age_task_id_blocks_1024::4 3688 # Occupied blocks per task id 1061system.cpu1.l2cache.tags.occ_task_id_percent::1023 0.005554 # Percentage of cache occupancy per task id 1062system.cpu1.l2cache.tags.occ_task_id_percent::1024 0.969971 # Percentage of cache occupancy per task id 1063system.cpu1.l2cache.tags.tag_accesses 363588050 # Number of tag accesses 1064system.cpu1.l2cache.tags.data_accesses 363588050 # Number of data accesses | 1055system.cpu1.l2cache.tags.age_task_id_blocks_1024::0 246 # Occupied blocks per task id 1056system.cpu1.l2cache.tags.age_task_id_blocks_1024::1 2414 # Occupied blocks per task id 1057system.cpu1.l2cache.tags.age_task_id_blocks_1024::2 7618 # Occupied blocks per task id 1058system.cpu1.l2cache.tags.age_task_id_blocks_1024::3 3564 # Occupied blocks per task id 1059system.cpu1.l2cache.tags.age_task_id_blocks_1024::4 1751 # Occupied blocks per task id 1060system.cpu1.l2cache.tags.occ_task_id_percent::1023 0.005493 # Percentage of cache occupancy per task id 1061system.cpu1.l2cache.tags.occ_task_id_percent::1024 0.951721 # Percentage of cache occupancy per task id 1062system.cpu1.l2cache.tags.tag_accesses 369059783 # Number of tag accesses 1063system.cpu1.l2cache.tags.data_accesses 369059783 # Number of data accesses |
| 1065system.cpu1.l2cache.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 1064system.cpu1.l2cache.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 1066system.cpu1.l2cache.ReadReq_hits::cpu1.dtb.walker 348760 # number of ReadReq hits 1067system.cpu1.l2cache.ReadReq_hits::cpu1.itb.walker 155429 # number of ReadReq hits 1068system.cpu1.l2cache.ReadReq_hits::total 504189 # number of ReadReq hits 1069system.cpu1.l2cache.WritebackDirty_hits::writebacks 4050331 # number of WritebackDirty hits 1070system.cpu1.l2cache.WritebackDirty_hits::total 4050331 # number of WritebackDirty hits 1071system.cpu1.l2cache.WritebackClean_hits::writebacks 6688666 # number of WritebackClean hits 1072system.cpu1.l2cache.WritebackClean_hits::total 6688666 # number of WritebackClean hits 1073system.cpu1.l2cache.UpgradeReq_hits::cpu1.data 1054 # number of UpgradeReq hits 1074system.cpu1.l2cache.UpgradeReq_hits::total 1054 # number of UpgradeReq hits 1075system.cpu1.l2cache.ReadExReq_hits::cpu1.data 613437 # number of ReadExReq hits 1076system.cpu1.l2cache.ReadExReq_hits::total 613437 # number of ReadExReq hits 1077system.cpu1.l2cache.ReadCleanReq_hits::cpu1.inst 4306709 # number of ReadCleanReq hits 1078system.cpu1.l2cache.ReadCleanReq_hits::total 4306709 # number of ReadCleanReq hits 1079system.cpu1.l2cache.ReadSharedReq_hits::cpu1.data 3087044 # number of ReadSharedReq hits 1080system.cpu1.l2cache.ReadSharedReq_hits::total 3087044 # number of ReadSharedReq hits 1081system.cpu1.l2cache.InvalidateReq_hits::cpu1.data 164780 # number of InvalidateReq hits 1082system.cpu1.l2cache.InvalidateReq_hits::total 164780 # number of InvalidateReq hits 1083system.cpu1.l2cache.demand_hits::cpu1.dtb.walker 348760 # number of demand (read+write) hits 1084system.cpu1.l2cache.demand_hits::cpu1.itb.walker 155429 # number of demand (read+write) hits 1085system.cpu1.l2cache.demand_hits::cpu1.inst 4306709 # number of demand (read+write) hits 1086system.cpu1.l2cache.demand_hits::cpu1.data 3700481 # number of demand (read+write) hits 1087system.cpu1.l2cache.demand_hits::total 8511379 # number of demand (read+write) hits 1088system.cpu1.l2cache.overall_hits::cpu1.dtb.walker 348760 # number of overall hits 1089system.cpu1.l2cache.overall_hits::cpu1.itb.walker 155429 # number of overall hits 1090system.cpu1.l2cache.overall_hits::cpu1.inst 4306709 # number of overall hits 1091system.cpu1.l2cache.overall_hits::cpu1.data 3700481 # number of overall hits 1092system.cpu1.l2cache.overall_hits::total 8511379 # number of overall hits 1093system.cpu1.l2cache.ReadReq_misses::cpu1.dtb.walker 12218 # number of ReadReq misses 1094system.cpu1.l2cache.ReadReq_misses::cpu1.itb.walker 9629 # number of ReadReq misses 1095system.cpu1.l2cache.ReadReq_misses::total 21847 # number of ReadReq misses 1096system.cpu1.l2cache.UpgradeReq_misses::cpu1.data 143649 # number of UpgradeReq misses 1097system.cpu1.l2cache.UpgradeReq_misses::total 143649 # number of UpgradeReq misses 1098system.cpu1.l2cache.SCUpgradeReq_misses::cpu1.data 156474 # number of SCUpgradeReq misses 1099system.cpu1.l2cache.SCUpgradeReq_misses::total 156474 # number of SCUpgradeReq misses 1100system.cpu1.l2cache.ReadExReq_misses::cpu1.data 707649 # number of ReadExReq misses 1101system.cpu1.l2cache.ReadExReq_misses::total 707649 # number of ReadExReq misses 1102system.cpu1.l2cache.ReadCleanReq_misses::cpu1.inst 462285 # number of ReadCleanReq misses 1103system.cpu1.l2cache.ReadCleanReq_misses::total 462285 # number of ReadCleanReq misses 1104system.cpu1.l2cache.ReadSharedReq_misses::cpu1.data 1220972 # number of ReadSharedReq misses 1105system.cpu1.l2cache.ReadSharedReq_misses::total 1220972 # number of ReadSharedReq misses 1106system.cpu1.l2cache.InvalidateReq_misses::cpu1.data 268887 # number of InvalidateReq misses 1107system.cpu1.l2cache.InvalidateReq_misses::total 268887 # number of InvalidateReq misses 1108system.cpu1.l2cache.demand_misses::cpu1.dtb.walker 12218 # number of demand (read+write) misses 1109system.cpu1.l2cache.demand_misses::cpu1.itb.walker 9629 # number of demand (read+write) misses 1110system.cpu1.l2cache.demand_misses::cpu1.inst 462285 # number of demand (read+write) misses 1111system.cpu1.l2cache.demand_misses::cpu1.data 1928621 # number of demand (read+write) misses 1112system.cpu1.l2cache.demand_misses::total 2412753 # number of demand (read+write) misses 1113system.cpu1.l2cache.overall_misses::cpu1.dtb.walker 12218 # number of overall misses 1114system.cpu1.l2cache.overall_misses::cpu1.itb.walker 9629 # number of overall misses 1115system.cpu1.l2cache.overall_misses::cpu1.inst 462285 # number of overall misses 1116system.cpu1.l2cache.overall_misses::cpu1.data 1928621 # number of overall misses 1117system.cpu1.l2cache.overall_misses::total 2412753 # number of overall misses 1118system.cpu1.l2cache.ReadReq_accesses::cpu1.dtb.walker 360978 # number of ReadReq accesses(hits+misses) 1119system.cpu1.l2cache.ReadReq_accesses::cpu1.itb.walker 165058 # number of ReadReq accesses(hits+misses) 1120system.cpu1.l2cache.ReadReq_accesses::total 526036 # number of ReadReq accesses(hits+misses) 1121system.cpu1.l2cache.WritebackDirty_accesses::writebacks 4050331 # number of WritebackDirty accesses(hits+misses) 1122system.cpu1.l2cache.WritebackDirty_accesses::total 4050331 # number of WritebackDirty accesses(hits+misses) 1123system.cpu1.l2cache.WritebackClean_accesses::writebacks 6688666 # number of WritebackClean accesses(hits+misses) 1124system.cpu1.l2cache.WritebackClean_accesses::total 6688666 # number of WritebackClean accesses(hits+misses) 1125system.cpu1.l2cache.UpgradeReq_accesses::cpu1.data 144703 # number of UpgradeReq accesses(hits+misses) 1126system.cpu1.l2cache.UpgradeReq_accesses::total 144703 # number of UpgradeReq accesses(hits+misses) 1127system.cpu1.l2cache.SCUpgradeReq_accesses::cpu1.data 156474 # number of SCUpgradeReq accesses(hits+misses) 1128system.cpu1.l2cache.SCUpgradeReq_accesses::total 156474 # number of SCUpgradeReq accesses(hits+misses) | 1065system.cpu1.l2cache.ReadReq_hits::cpu1.dtb.walker 338101 # number of ReadReq hits 1066system.cpu1.l2cache.ReadReq_hits::cpu1.itb.walker 153667 # number of ReadReq hits 1067system.cpu1.l2cache.ReadReq_hits::total 491768 # number of ReadReq hits 1068system.cpu1.l2cache.WritebackDirty_hits::writebacks 4061526 # number of WritebackDirty hits 1069system.cpu1.l2cache.WritebackDirty_hits::total 4061526 # number of WritebackDirty hits 1070system.cpu1.l2cache.WritebackClean_hits::writebacks 6677473 # number of WritebackClean hits 1071system.cpu1.l2cache.WritebackClean_hits::total 6677473 # number of WritebackClean hits 1072system.cpu1.l2cache.ReadExReq_hits::cpu1.data 614785 # number of ReadExReq hits 1073system.cpu1.l2cache.ReadExReq_hits::total 614785 # number of ReadExReq hits 1074system.cpu1.l2cache.ReadCleanReq_hits::cpu1.inst 4308825 # number of ReadCleanReq hits 1075system.cpu1.l2cache.ReadCleanReq_hits::total 4308825 # number of ReadCleanReq hits 1076system.cpu1.l2cache.ReadSharedReq_hits::cpu1.data 3093892 # number of ReadSharedReq hits 1077system.cpu1.l2cache.ReadSharedReq_hits::total 3093892 # number of ReadSharedReq hits 1078system.cpu1.l2cache.InvalidateReq_hits::cpu1.data 164960 # number of InvalidateReq hits 1079system.cpu1.l2cache.InvalidateReq_hits::total 164960 # number of InvalidateReq hits 1080system.cpu1.l2cache.demand_hits::cpu1.dtb.walker 338101 # number of demand (read+write) hits 1081system.cpu1.l2cache.demand_hits::cpu1.itb.walker 153667 # number of demand (read+write) hits 1082system.cpu1.l2cache.demand_hits::cpu1.inst 4308825 # number of demand (read+write) hits 1083system.cpu1.l2cache.demand_hits::cpu1.data 3708677 # number of demand (read+write) hits 1084system.cpu1.l2cache.demand_hits::total 8509270 # number of demand (read+write) hits 1085system.cpu1.l2cache.overall_hits::cpu1.dtb.walker 338101 # number of overall hits 1086system.cpu1.l2cache.overall_hits::cpu1.itb.walker 153667 # number of overall hits 1087system.cpu1.l2cache.overall_hits::cpu1.inst 4308825 # number of overall hits 1088system.cpu1.l2cache.overall_hits::cpu1.data 3708677 # number of overall hits 1089system.cpu1.l2cache.overall_hits::total 8509270 # number of overall hits 1090system.cpu1.l2cache.ReadReq_misses::cpu1.dtb.walker 22355 # number of ReadReq misses 1091system.cpu1.l2cache.ReadReq_misses::cpu1.itb.walker 10972 # number of ReadReq misses 1092system.cpu1.l2cache.ReadReq_misses::total 33327 # number of ReadReq misses 1093system.cpu1.l2cache.UpgradeReq_misses::cpu1.data 145242 # number of UpgradeReq misses 1094system.cpu1.l2cache.UpgradeReq_misses::total 145242 # number of UpgradeReq misses 1095system.cpu1.l2cache.SCUpgradeReq_misses::cpu1.data 156674 # number of SCUpgradeReq misses 1096system.cpu1.l2cache.SCUpgradeReq_misses::total 156674 # number of SCUpgradeReq misses 1097system.cpu1.l2cache.ReadExReq_misses::cpu1.data 706301 # number of ReadExReq misses 1098system.cpu1.l2cache.ReadExReq_misses::total 706301 # number of ReadExReq misses 1099system.cpu1.l2cache.ReadCleanReq_misses::cpu1.inst 460169 # number of ReadCleanReq misses 1100system.cpu1.l2cache.ReadCleanReq_misses::total 460169 # number of ReadCleanReq misses 1101system.cpu1.l2cache.ReadSharedReq_misses::cpu1.data 1214126 # number of ReadSharedReq misses 1102system.cpu1.l2cache.ReadSharedReq_misses::total 1214126 # number of ReadSharedReq misses 1103system.cpu1.l2cache.InvalidateReq_misses::cpu1.data 268707 # number of InvalidateReq misses 1104system.cpu1.l2cache.InvalidateReq_misses::total 268707 # number of InvalidateReq misses 1105system.cpu1.l2cache.demand_misses::cpu1.dtb.walker 22355 # number of demand (read+write) misses 1106system.cpu1.l2cache.demand_misses::cpu1.itb.walker 10972 # number of demand (read+write) misses 1107system.cpu1.l2cache.demand_misses::cpu1.inst 460169 # number of demand (read+write) misses 1108system.cpu1.l2cache.demand_misses::cpu1.data 1920427 # number of demand (read+write) misses 1109system.cpu1.l2cache.demand_misses::total 2413923 # number of demand (read+write) misses 1110system.cpu1.l2cache.overall_misses::cpu1.dtb.walker 22355 # number of overall misses 1111system.cpu1.l2cache.overall_misses::cpu1.itb.walker 10972 # number of overall misses 1112system.cpu1.l2cache.overall_misses::cpu1.inst 460169 # number of overall misses 1113system.cpu1.l2cache.overall_misses::cpu1.data 1920427 # number of overall misses 1114system.cpu1.l2cache.overall_misses::total 2413923 # number of overall misses 1115system.cpu1.l2cache.ReadReq_accesses::cpu1.dtb.walker 360456 # number of ReadReq accesses(hits+misses) 1116system.cpu1.l2cache.ReadReq_accesses::cpu1.itb.walker 164639 # number of ReadReq accesses(hits+misses) 1117system.cpu1.l2cache.ReadReq_accesses::total 525095 # number of ReadReq accesses(hits+misses) 1118system.cpu1.l2cache.WritebackDirty_accesses::writebacks 4061526 # number of WritebackDirty accesses(hits+misses) 1119system.cpu1.l2cache.WritebackDirty_accesses::total 4061526 # number of WritebackDirty accesses(hits+misses) 1120system.cpu1.l2cache.WritebackClean_accesses::writebacks 6677473 # number of WritebackClean accesses(hits+misses) 1121system.cpu1.l2cache.WritebackClean_accesses::total 6677473 # number of WritebackClean accesses(hits+misses) 1122system.cpu1.l2cache.UpgradeReq_accesses::cpu1.data 145242 # number of UpgradeReq accesses(hits+misses) 1123system.cpu1.l2cache.UpgradeReq_accesses::total 145242 # number of UpgradeReq accesses(hits+misses) 1124system.cpu1.l2cache.SCUpgradeReq_accesses::cpu1.data 156674 # number of SCUpgradeReq accesses(hits+misses) 1125system.cpu1.l2cache.SCUpgradeReq_accesses::total 156674 # number of SCUpgradeReq accesses(hits+misses) |
| 1129system.cpu1.l2cache.ReadExReq_accesses::cpu1.data 1321086 # number of ReadExReq accesses(hits+misses) 1130system.cpu1.l2cache.ReadExReq_accesses::total 1321086 # number of ReadExReq accesses(hits+misses) 1131system.cpu1.l2cache.ReadCleanReq_accesses::cpu1.inst 4768994 # number of ReadCleanReq accesses(hits+misses) 1132system.cpu1.l2cache.ReadCleanReq_accesses::total 4768994 # number of ReadCleanReq accesses(hits+misses) | 1126system.cpu1.l2cache.ReadExReq_accesses::cpu1.data 1321086 # number of ReadExReq accesses(hits+misses) 1127system.cpu1.l2cache.ReadExReq_accesses::total 1321086 # number of ReadExReq accesses(hits+misses) 1128system.cpu1.l2cache.ReadCleanReq_accesses::cpu1.inst 4768994 # number of ReadCleanReq accesses(hits+misses) 1129system.cpu1.l2cache.ReadCleanReq_accesses::total 4768994 # number of ReadCleanReq accesses(hits+misses) |
| 1133system.cpu1.l2cache.ReadSharedReq_accesses::cpu1.data 4308016 # number of ReadSharedReq accesses(hits+misses) 1134system.cpu1.l2cache.ReadSharedReq_accesses::total 4308016 # number of ReadSharedReq accesses(hits+misses) | 1130system.cpu1.l2cache.ReadSharedReq_accesses::cpu1.data 4308018 # number of ReadSharedReq accesses(hits+misses) 1131system.cpu1.l2cache.ReadSharedReq_accesses::total 4308018 # number of ReadSharedReq accesses(hits+misses) |
| 1135system.cpu1.l2cache.InvalidateReq_accesses::cpu1.data 433667 # number of InvalidateReq accesses(hits+misses) 1136system.cpu1.l2cache.InvalidateReq_accesses::total 433667 # number of InvalidateReq accesses(hits+misses) | 1132system.cpu1.l2cache.InvalidateReq_accesses::cpu1.data 433667 # number of InvalidateReq accesses(hits+misses) 1133system.cpu1.l2cache.InvalidateReq_accesses::total 433667 # number of InvalidateReq accesses(hits+misses) |
| 1137system.cpu1.l2cache.demand_accesses::cpu1.dtb.walker 360978 # number of demand (read+write) accesses 1138system.cpu1.l2cache.demand_accesses::cpu1.itb.walker 165058 # number of demand (read+write) accesses | 1134system.cpu1.l2cache.demand_accesses::cpu1.dtb.walker 360456 # number of demand (read+write) accesses 1135system.cpu1.l2cache.demand_accesses::cpu1.itb.walker 164639 # number of demand (read+write) accesses |
| 1139system.cpu1.l2cache.demand_accesses::cpu1.inst 4768994 # number of demand (read+write) accesses | 1136system.cpu1.l2cache.demand_accesses::cpu1.inst 4768994 # number of demand (read+write) accesses |
| 1140system.cpu1.l2cache.demand_accesses::cpu1.data 5629102 # number of demand (read+write) accesses 1141system.cpu1.l2cache.demand_accesses::total 10924132 # number of demand (read+write) accesses 1142system.cpu1.l2cache.overall_accesses::cpu1.dtb.walker 360978 # number of overall (read+write) accesses 1143system.cpu1.l2cache.overall_accesses::cpu1.itb.walker 165058 # number of overall (read+write) accesses | 1137system.cpu1.l2cache.demand_accesses::cpu1.data 5629104 # number of demand (read+write) accesses 1138system.cpu1.l2cache.demand_accesses::total 10923193 # number of demand (read+write) accesses 1139system.cpu1.l2cache.overall_accesses::cpu1.dtb.walker 360456 # number of overall (read+write) accesses 1140system.cpu1.l2cache.overall_accesses::cpu1.itb.walker 164639 # number of overall (read+write) accesses |
| 1144system.cpu1.l2cache.overall_accesses::cpu1.inst 4768994 # number of overall (read+write) accesses | 1141system.cpu1.l2cache.overall_accesses::cpu1.inst 4768994 # number of overall (read+write) accesses |
| 1145system.cpu1.l2cache.overall_accesses::cpu1.data 5629102 # number of overall (read+write) accesses 1146system.cpu1.l2cache.overall_accesses::total 10924132 # number of overall (read+write) accesses 1147system.cpu1.l2cache.ReadReq_miss_rate::cpu1.dtb.walker 0.033847 # miss rate for ReadReq accesses 1148system.cpu1.l2cache.ReadReq_miss_rate::cpu1.itb.walker 0.058337 # miss rate for ReadReq accesses 1149system.cpu1.l2cache.ReadReq_miss_rate::total 0.041531 # miss rate for ReadReq accesses 1150system.cpu1.l2cache.UpgradeReq_miss_rate::cpu1.data 0.992716 # miss rate for UpgradeReq accesses 1151system.cpu1.l2cache.UpgradeReq_miss_rate::total 0.992716 # miss rate for UpgradeReq accesses | 1142system.cpu1.l2cache.overall_accesses::cpu1.data 5629104 # number of overall (read+write) accesses 1143system.cpu1.l2cache.overall_accesses::total 10923193 # number of overall (read+write) accesses 1144system.cpu1.l2cache.ReadReq_miss_rate::cpu1.dtb.walker 0.062019 # miss rate for ReadReq accesses 1145system.cpu1.l2cache.ReadReq_miss_rate::cpu1.itb.walker 0.066643 # miss rate for ReadReq accesses 1146system.cpu1.l2cache.ReadReq_miss_rate::total 0.063469 # miss rate for ReadReq accesses 1147system.cpu1.l2cache.UpgradeReq_miss_rate::cpu1.data 1 # miss rate for UpgradeReq accesses 1148system.cpu1.l2cache.UpgradeReq_miss_rate::total 1 # miss rate for UpgradeReq accesses |
| 1152system.cpu1.l2cache.SCUpgradeReq_miss_rate::cpu1.data 1 # miss rate for SCUpgradeReq accesses 1153system.cpu1.l2cache.SCUpgradeReq_miss_rate::total 1 # miss rate for SCUpgradeReq accesses | 1149system.cpu1.l2cache.SCUpgradeReq_miss_rate::cpu1.data 1 # miss rate for SCUpgradeReq accesses 1150system.cpu1.l2cache.SCUpgradeReq_miss_rate::total 1 # miss rate for SCUpgradeReq accesses |
| 1154system.cpu1.l2cache.ReadExReq_miss_rate::cpu1.data 0.535657 # miss rate for ReadExReq accesses 1155system.cpu1.l2cache.ReadExReq_miss_rate::total 0.535657 # miss rate for ReadExReq accesses 1156system.cpu1.l2cache.ReadCleanReq_miss_rate::cpu1.inst 0.096936 # miss rate for ReadCleanReq accesses 1157system.cpu1.l2cache.ReadCleanReq_miss_rate::total 0.096936 # miss rate for ReadCleanReq accesses 1158system.cpu1.l2cache.ReadSharedReq_miss_rate::cpu1.data 0.283419 # miss rate for ReadSharedReq accesses 1159system.cpu1.l2cache.ReadSharedReq_miss_rate::total 0.283419 # miss rate for ReadSharedReq accesses 1160system.cpu1.l2cache.InvalidateReq_miss_rate::cpu1.data 0.620031 # miss rate for InvalidateReq accesses 1161system.cpu1.l2cache.InvalidateReq_miss_rate::total 0.620031 # miss rate for InvalidateReq accesses 1162system.cpu1.l2cache.demand_miss_rate::cpu1.dtb.walker 0.033847 # miss rate for demand accesses 1163system.cpu1.l2cache.demand_miss_rate::cpu1.itb.walker 0.058337 # miss rate for demand accesses 1164system.cpu1.l2cache.demand_miss_rate::cpu1.inst 0.096936 # miss rate for demand accesses 1165system.cpu1.l2cache.demand_miss_rate::cpu1.data 0.342616 # miss rate for demand accesses 1166system.cpu1.l2cache.demand_miss_rate::total 0.220865 # miss rate for demand accesses 1167system.cpu1.l2cache.overall_miss_rate::cpu1.dtb.walker 0.033847 # miss rate for overall accesses 1168system.cpu1.l2cache.overall_miss_rate::cpu1.itb.walker 0.058337 # miss rate for overall accesses 1169system.cpu1.l2cache.overall_miss_rate::cpu1.inst 0.096936 # miss rate for overall accesses 1170system.cpu1.l2cache.overall_miss_rate::cpu1.data 0.342616 # miss rate for overall accesses 1171system.cpu1.l2cache.overall_miss_rate::total 0.220865 # miss rate for overall accesses | 1151system.cpu1.l2cache.ReadExReq_miss_rate::cpu1.data 0.534637 # miss rate for ReadExReq accesses 1152system.cpu1.l2cache.ReadExReq_miss_rate::total 0.534637 # miss rate for ReadExReq accesses 1153system.cpu1.l2cache.ReadCleanReq_miss_rate::cpu1.inst 0.096492 # miss rate for ReadCleanReq accesses 1154system.cpu1.l2cache.ReadCleanReq_miss_rate::total 0.096492 # miss rate for ReadCleanReq accesses 1155system.cpu1.l2cache.ReadSharedReq_miss_rate::cpu1.data 0.281829 # miss rate for ReadSharedReq accesses 1156system.cpu1.l2cache.ReadSharedReq_miss_rate::total 0.281829 # miss rate for ReadSharedReq accesses 1157system.cpu1.l2cache.InvalidateReq_miss_rate::cpu1.data 0.619616 # miss rate for InvalidateReq accesses 1158system.cpu1.l2cache.InvalidateReq_miss_rate::total 0.619616 # miss rate for InvalidateReq accesses 1159system.cpu1.l2cache.demand_miss_rate::cpu1.dtb.walker 0.062019 # miss rate for demand accesses 1160system.cpu1.l2cache.demand_miss_rate::cpu1.itb.walker 0.066643 # miss rate for demand accesses 1161system.cpu1.l2cache.demand_miss_rate::cpu1.inst 0.096492 # miss rate for demand accesses 1162system.cpu1.l2cache.demand_miss_rate::cpu1.data 0.341160 # miss rate for demand accesses 1163system.cpu1.l2cache.demand_miss_rate::total 0.220991 # miss rate for demand accesses 1164system.cpu1.l2cache.overall_miss_rate::cpu1.dtb.walker 0.062019 # miss rate for overall accesses 1165system.cpu1.l2cache.overall_miss_rate::cpu1.itb.walker 0.066643 # miss rate for overall accesses 1166system.cpu1.l2cache.overall_miss_rate::cpu1.inst 0.096492 # miss rate for overall accesses 1167system.cpu1.l2cache.overall_miss_rate::cpu1.data 0.341160 # miss rate for overall accesses 1168system.cpu1.l2cache.overall_miss_rate::total 0.220991 # miss rate for overall accesses |
| 1172system.cpu1.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 1173system.cpu1.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 1174system.cpu1.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 1175system.cpu1.l2cache.blocked::no_targets 0 # number of cycles access was blocked 1176system.cpu1.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 1177system.cpu1.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 1169system.cpu1.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 1170system.cpu1.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 1171system.cpu1.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 1172system.cpu1.l2cache.blocked::no_targets 0 # number of cycles access was blocked 1173system.cpu1.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 1174system.cpu1.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 1178system.cpu1.l2cache.writebacks::writebacks 1200117 # number of writebacks 1179system.cpu1.l2cache.writebacks::total 1200117 # number of writebacks 1180system.cpu1.toL2Bus.snoop_filter.tot_requests 22145801 # Total number of requests made to the snoop filter. 1181system.cpu1.toL2Bus.snoop_filter.hit_single_requests 11314039 # Number of requests hitting in the snoop filter with a single holder of the requested data. | 1175system.cpu1.l2cache.writebacks::writebacks 1197912 # number of writebacks 1176system.cpu1.l2cache.writebacks::total 1197912 # number of writebacks 1177system.cpu1.toL2Bus.snoop_filter.tot_requests 22146544 # Total number of requests made to the snoop filter. 1178system.cpu1.toL2Bus.snoop_filter.hit_single_requests 11314780 # Number of requests hitting in the snoop filter with a single holder of the requested data. |
| 1182system.cpu1.toL2Bus.snoop_filter.hit_multi_requests 367 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. | 1179system.cpu1.toL2Bus.snoop_filter.hit_multi_requests 367 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. |
| 1183system.cpu1.toL2Bus.snoop_filter.tot_snoops 1748963 # Total number of snoops made to the snoop filter. 1184system.cpu1.toL2Bus.snoop_filter.hit_single_snoops 1748793 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 1185system.cpu1.toL2Bus.snoop_filter.hit_multi_snoops 170 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. | 1180system.cpu1.toL2Bus.snoop_filter.tot_snoops 285761 # Total number of snoops made to the snoop filter. 1181system.cpu1.toL2Bus.snoop_filter.hit_single_snoops 285759 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 1182system.cpu1.toL2Bus.snoop_filter.hit_multi_snoops 2 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. |
| 1186system.cpu1.toL2Bus.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1187system.cpu1.toL2Bus.trans_dist::ReadReq 607661 # Transaction distribution | 1183system.cpu1.toL2Bus.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1184system.cpu1.toL2Bus.trans_dist::ReadReq 607661 # Transaction distribution |
| 1188system.cpu1.toL2Bus.trans_dist::ReadResp 9684671 # Transaction distribution | 1185system.cpu1.toL2Bus.trans_dist::ReadResp 9684673 # Transaction distribution |
| 1189system.cpu1.toL2Bus.trans_dist::WriteReq 5564 # Transaction distribution 1190system.cpu1.toL2Bus.trans_dist::WriteResp 5564 # Transaction distribution | 1186system.cpu1.toL2Bus.trans_dist::WriteReq 5564 # Transaction distribution 1187system.cpu1.toL2Bus.trans_dist::WriteResp 5564 # Transaction distribution |
| 1191system.cpu1.toL2Bus.trans_dist::WritebackDirty 4050331 # Transaction distribution 1192system.cpu1.toL2Bus.trans_dist::WritebackClean 6689033 # Transaction distribution 1193system.cpu1.toL2Bus.trans_dist::UpgradeReq 144703 # Transaction distribution 1194system.cpu1.toL2Bus.trans_dist::SCUpgradeReq 156474 # Transaction distribution 1195system.cpu1.toL2Bus.trans_dist::UpgradeResp 301177 # Transaction distribution | 1188system.cpu1.toL2Bus.trans_dist::WritebackDirty 4061526 # Transaction distribution 1189system.cpu1.toL2Bus.trans_dist::WritebackClean 6677840 # Transaction distribution 1190system.cpu1.toL2Bus.trans_dist::UpgradeReq 145242 # Transaction distribution 1191system.cpu1.toL2Bus.trans_dist::SCUpgradeReq 156674 # Transaction distribution 1192system.cpu1.toL2Bus.trans_dist::UpgradeResp 301916 # Transaction distribution |
| 1196system.cpu1.toL2Bus.trans_dist::ReadExReq 1321086 # Transaction distribution 1197system.cpu1.toL2Bus.trans_dist::ReadExResp 1321086 # Transaction distribution 1198system.cpu1.toL2Bus.trans_dist::ReadCleanReq 4768994 # Transaction distribution | 1193system.cpu1.toL2Bus.trans_dist::ReadExReq 1321086 # Transaction distribution 1194system.cpu1.toL2Bus.trans_dist::ReadExResp 1321086 # Transaction distribution 1195system.cpu1.toL2Bus.trans_dist::ReadCleanReq 4768994 # Transaction distribution |
| 1199system.cpu1.toL2Bus.trans_dist::ReadSharedReq 4308016 # Transaction distribution | 1196system.cpu1.toL2Bus.trans_dist::ReadSharedReq 4308018 # Transaction distribution |
| 1200system.cpu1.toL2Bus.trans_dist::InvalidateReq 433667 # Transaction distribution 1201system.cpu1.toL2Bus.trans_dist::InvalidateResp 433667 # Transaction distribution 1202system.cpu1.toL2Bus.pkt_count_system.cpu1.icache.mem_side::system.cpu1.l2cache.cpu_side 14306730 # Packet count per connected master and slave (bytes) | 1197system.cpu1.toL2Bus.trans_dist::InvalidateReq 433667 # Transaction distribution 1198system.cpu1.toL2Bus.trans_dist::InvalidateResp 433667 # Transaction distribution 1199system.cpu1.toL2Bus.pkt_count_system.cpu1.icache.mem_side::system.cpu1.l2cache.cpu_side 14306730 # Packet count per connected master and slave (bytes) |
| 1203system.cpu1.toL2Bus.pkt_count_system.cpu1.dcache.mem_side::system.cpu1.l2cache.cpu_side 18721524 # Packet count per connected master and slave (bytes) | 1200system.cpu1.toL2Bus.pkt_count_system.cpu1.dcache.mem_side::system.cpu1.l2cache.cpu_side 18723008 # Packet count per connected master and slave (bytes) |
| 1204system.cpu1.toL2Bus.pkt_count_system.cpu1.itb.walker.dma::system.cpu1.l2cache.cpu_side 366766 # Packet count per connected master and slave (bytes) 1205system.cpu1.toL2Bus.pkt_count_system.cpu1.dtb.walker.dma::system.cpu1.l2cache.cpu_side 836674 # Packet count per connected master and slave (bytes) | 1201system.cpu1.toL2Bus.pkt_count_system.cpu1.itb.walker.dma::system.cpu1.l2cache.cpu_side 366766 # Packet count per connected master and slave (bytes) 1202system.cpu1.toL2Bus.pkt_count_system.cpu1.dtb.walker.dma::system.cpu1.l2cache.cpu_side 836674 # Packet count per connected master and slave (bytes) |
| 1206system.cpu1.toL2Bus.pkt_count::total 34231694 # Packet count per connected master and slave (bytes) | 1203system.cpu1.toL2Bus.pkt_count::total 34233178 # Packet count per connected master and slave (bytes) |
| 1207system.cpu1.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.cpu1.l2cache.cpu_side 610398984 # Cumulative packet size per connected master and slave (bytes) | 1204system.cpu1.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.cpu1.l2cache.cpu_side 610398984 # Cumulative packet size per connected master and slave (bytes) |
| 1208system.cpu1.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.cpu1.l2cache.cpu_side 742432303 # Cumulative packet size per connected master and slave (bytes) | 1205system.cpu1.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.cpu1.l2cache.cpu_side 742432559 # Cumulative packet size per connected master and slave (bytes) |
| 1209system.cpu1.toL2Bus.pkt_size_system.cpu1.itb.walker.dma::system.cpu1.l2cache.cpu_side 1467064 # Cumulative packet size per connected master and slave (bytes) 1210system.cpu1.toL2Bus.pkt_size_system.cpu1.dtb.walker.dma::system.cpu1.l2cache.cpu_side 3346696 # Cumulative packet size per connected master and slave (bytes) | 1206system.cpu1.toL2Bus.pkt_size_system.cpu1.itb.walker.dma::system.cpu1.l2cache.cpu_side 1467064 # Cumulative packet size per connected master and slave (bytes) 1207system.cpu1.toL2Bus.pkt_size_system.cpu1.dtb.walker.dma::system.cpu1.l2cache.cpu_side 3346696 # Cumulative packet size per connected master and slave (bytes) |
| 1211system.cpu1.toL2Bus.pkt_size::total 1357645047 # Cumulative packet size per connected master and slave (bytes) 1212system.cpu1.toL2Bus.snoops 5675394 # Total snoops (count) 1213system.cpu1.toL2Bus.snoopTraffic 79399936 # Total snoop traffic (bytes) 1214system.cpu1.toL2Bus.snoop_fanout::samples 28001988 # Request fanout histogram 1215system.cpu1.toL2Bus.snoop_fanout::mean 0.072258 # Request fanout histogram 1216system.cpu1.toL2Bus.snoop_fanout::stdev 0.258938 # Request fanout histogram | 1208system.cpu1.toL2Bus.pkt_size::total 1357645303 # Cumulative packet size per connected master and slave (bytes) 1209system.cpu1.toL2Bus.snoops 4277162 # Total snoops (count) 1210system.cpu1.toL2Bus.snoopTraffic 79243712 # Total snoop traffic (bytes) 1211system.cpu1.toL2Bus.snoop_fanout::samples 26604267 # Request fanout histogram 1212system.cpu1.toL2Bus.snoop_fanout::mean 0.021049 # Request fanout histogram 1213system.cpu1.toL2Bus.snoop_fanout::stdev 0.143548 # Request fanout histogram |
| 1217system.cpu1.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram | 1214system.cpu1.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram |
| 1218system.cpu1.toL2Bus.snoop_fanout::0 25978793 92.77% 92.77% # Request fanout histogram 1219system.cpu1.toL2Bus.snoop_fanout::1 2023025 7.22% 100.00% # Request fanout histogram 1220system.cpu1.toL2Bus.snoop_fanout::2 170 0.00% 100.00% # Request fanout histogram | 1215system.cpu1.toL2Bus.snoop_fanout::0 26044274 97.90% 97.90% # Request fanout histogram 1216system.cpu1.toL2Bus.snoop_fanout::1 559991 2.10% 100.00% # Request fanout histogram 1217system.cpu1.toL2Bus.snoop_fanout::2 2 0.00% 100.00% # Request fanout histogram |
| 1221system.cpu1.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 1222system.cpu1.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 1223system.cpu1.toL2Bus.snoop_fanout::max_value 2 # Request fanout histogram | 1218system.cpu1.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 1219system.cpu1.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 1220system.cpu1.toL2Bus.snoop_fanout::max_value 2 # Request fanout histogram |
| 1224system.cpu1.toL2Bus.snoop_fanout::total 28001988 # Request fanout histogram | 1221system.cpu1.toL2Bus.snoop_fanout::total 26604267 # Request fanout histogram |
| 1225system.iobus.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1226system.iobus.trans_dist::ReadReq 40301 # Transaction distribution 1227system.iobus.trans_dist::ReadResp 40301 # Transaction distribution 1228system.iobus.trans_dist::WriteReq 136636 # Transaction distribution 1229system.iobus.trans_dist::WriteResp 136636 # Transaction distribution 1230system.iobus.pkt_count_system.bridge.master::system.realview.uart.pio 47642 # Packet count per connected master and slave (bytes) 1231system.iobus.pkt_count_system.bridge.master::system.realview.realview_io.pio 14 # Packet count per connected master and slave (bytes) 1232system.iobus.pkt_count_system.bridge.master::system.realview.pci_host.pio 434 # Packet count per connected master and slave (bytes) --- 93 unchanged lines hidden (view full) --- 1326system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 1327system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 1328system.iocache.blocked::no_targets 0 # number of cycles access was blocked 1329system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 1330system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 1331system.iocache.writebacks::writebacks 106694 # number of writebacks 1332system.iocache.writebacks::total 106694 # number of writebacks 1333system.l2c.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 1222system.iobus.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1223system.iobus.trans_dist::ReadReq 40301 # Transaction distribution 1224system.iobus.trans_dist::ReadResp 40301 # Transaction distribution 1225system.iobus.trans_dist::WriteReq 136636 # Transaction distribution 1226system.iobus.trans_dist::WriteResp 136636 # Transaction distribution 1227system.iobus.pkt_count_system.bridge.master::system.realview.uart.pio 47642 # Packet count per connected master and slave (bytes) 1228system.iobus.pkt_count_system.bridge.master::system.realview.realview_io.pio 14 # Packet count per connected master and slave (bytes) 1229system.iobus.pkt_count_system.bridge.master::system.realview.pci_host.pio 434 # Packet count per connected master and slave (bytes) --- 93 unchanged lines hidden (view full) --- 1323system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 1324system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 1325system.iocache.blocked::no_targets 0 # number of cycles access was blocked 1326system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 1327system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 1328system.iocache.writebacks::writebacks 106694 # number of writebacks 1329system.iocache.writebacks::total 106694 # number of writebacks 1330system.l2c.tags.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 1334system.l2c.tags.replacements 1774395 # number of replacements 1335system.l2c.tags.tagsinuse 63409.930559 # Cycle average of tags in use 1336system.l2c.tags.total_refs 4611925 # Total number of references to valid blocks. 1337system.l2c.tags.sampled_refs 1833378 # Sample count of references to valid blocks. 1338system.l2c.tags.avg_refs 2.515534 # Average number of references to valid blocks. 1339system.l2c.tags.warmup_cycle 514828500 # Cycle when the warmup percentage was hit. 1340system.l2c.tags.occ_blocks::writebacks 34658.678488 # Average occupied blocks per requestor 1341system.l2c.tags.occ_blocks::cpu0.dtb.walker 33.446161 # Average occupied blocks per requestor 1342system.l2c.tags.occ_blocks::cpu0.itb.walker 43.299197 # Average occupied blocks per requestor 1343system.l2c.tags.occ_blocks::cpu0.inst 3299.237288 # Average occupied blocks per requestor 1344system.l2c.tags.occ_blocks::cpu0.data 7180.746684 # Average occupied blocks per requestor 1345system.l2c.tags.occ_blocks::cpu1.dtb.walker 272.688902 # Average occupied blocks per requestor 1346system.l2c.tags.occ_blocks::cpu1.itb.walker 432.688870 # Average occupied blocks per requestor 1347system.l2c.tags.occ_blocks::cpu1.inst 2834.364418 # Average occupied blocks per requestor 1348system.l2c.tags.occ_blocks::cpu1.data 14654.780551 # Average occupied blocks per requestor 1349system.l2c.tags.occ_percent::writebacks 0.528849 # Average percentage of cache occupancy 1350system.l2c.tags.occ_percent::cpu0.dtb.walker 0.000510 # Average percentage of cache occupancy 1351system.l2c.tags.occ_percent::cpu0.itb.walker 0.000661 # Average percentage of cache occupancy 1352system.l2c.tags.occ_percent::cpu0.inst 0.050342 # Average percentage of cache occupancy 1353system.l2c.tags.occ_percent::cpu0.data 0.109569 # Average percentage of cache occupancy 1354system.l2c.tags.occ_percent::cpu1.dtb.walker 0.004161 # Average percentage of cache occupancy 1355system.l2c.tags.occ_percent::cpu1.itb.walker 0.006602 # Average percentage of cache occupancy 1356system.l2c.tags.occ_percent::cpu1.inst 0.043249 # Average percentage of cache occupancy 1357system.l2c.tags.occ_percent::cpu1.data 0.223614 # Average percentage of cache occupancy 1358system.l2c.tags.occ_percent::total 0.967559 # Average percentage of cache occupancy 1359system.l2c.tags.occ_task_id_blocks::1023 232 # Occupied blocks per task id 1360system.l2c.tags.occ_task_id_blocks::1024 58751 # Occupied blocks per task id | 1331system.l2c.tags.replacements 1924793 # number of replacements 1332system.l2c.tags.tagsinuse 65250.197909 # Cycle average of tags in use 1333system.l2c.tags.total_refs 5713780 # Total number of references to valid blocks. 1334system.l2c.tags.sampled_refs 1986359 # Sample count of references to valid blocks. 1335system.l2c.tags.avg_refs 2.876509 # Average number of references to valid blocks. 1336system.l2c.tags.warmup_cycle 477350500 # Cycle when the warmup percentage was hit. 1337system.l2c.tags.occ_blocks::writebacks 10662.392220 # Average occupied blocks per requestor 1338system.l2c.tags.occ_blocks::cpu0.dtb.walker 41.728586 # Average occupied blocks per requestor 1339system.l2c.tags.occ_blocks::cpu0.itb.walker 44.787257 # Average occupied blocks per requestor 1340system.l2c.tags.occ_blocks::cpu0.inst 3175.849688 # Average occupied blocks per requestor 1341system.l2c.tags.occ_blocks::cpu0.data 15990.343630 # Average occupied blocks per requestor 1342system.l2c.tags.occ_blocks::cpu1.dtb.walker 362.595804 # Average occupied blocks per requestor 1343system.l2c.tags.occ_blocks::cpu1.itb.walker 421.087250 # Average occupied blocks per requestor 1344system.l2c.tags.occ_blocks::cpu1.inst 2804.760651 # Average occupied blocks per requestor 1345system.l2c.tags.occ_blocks::cpu1.data 31746.652822 # Average occupied blocks per requestor 1346system.l2c.tags.occ_percent::writebacks 0.162695 # Average percentage of cache occupancy 1347system.l2c.tags.occ_percent::cpu0.dtb.walker 0.000637 # Average percentage of cache occupancy 1348system.l2c.tags.occ_percent::cpu0.itb.walker 0.000683 # Average percentage of cache occupancy 1349system.l2c.tags.occ_percent::cpu0.inst 0.048460 # Average percentage of cache occupancy 1350system.l2c.tags.occ_percent::cpu0.data 0.243993 # Average percentage of cache occupancy 1351system.l2c.tags.occ_percent::cpu1.dtb.walker 0.005533 # Average percentage of cache occupancy 1352system.l2c.tags.occ_percent::cpu1.itb.walker 0.006425 # Average percentage of cache occupancy 1353system.l2c.tags.occ_percent::cpu1.inst 0.042797 # Average percentage of cache occupancy 1354system.l2c.tags.occ_percent::cpu1.data 0.484415 # Average percentage of cache occupancy 1355system.l2c.tags.occ_percent::total 0.995639 # Average percentage of cache occupancy 1356system.l2c.tags.occ_task_id_blocks::1023 224 # Occupied blocks per task id 1357system.l2c.tags.occ_task_id_blocks::1024 61342 # Occupied blocks per task id |
| 1361system.l2c.tags.age_task_id_blocks_1023::2 1 # Occupied blocks per task id | 1358system.l2c.tags.age_task_id_blocks_1023::2 1 # Occupied blocks per task id |
| 1362system.l2c.tags.age_task_id_blocks_1023::4 231 # Occupied blocks per task id 1363system.l2c.tags.age_task_id_blocks_1024::0 46 # Occupied blocks per task id 1364system.l2c.tags.age_task_id_blocks_1024::1 463 # Occupied blocks per task id 1365system.l2c.tags.age_task_id_blocks_1024::2 3223 # Occupied blocks per task id 1366system.l2c.tags.age_task_id_blocks_1024::3 5259 # Occupied blocks per task id 1367system.l2c.tags.age_task_id_blocks_1024::4 49760 # Occupied blocks per task id 1368system.l2c.tags.occ_task_id_percent::1023 0.003540 # Percentage of cache occupancy per task id 1369system.l2c.tags.occ_task_id_percent::1024 0.896469 # Percentage of cache occupancy per task id 1370system.l2c.tags.tag_accesses 73267769 # Number of tag accesses 1371system.l2c.tags.data_accesses 73267769 # Number of data accesses | 1359system.l2c.tags.age_task_id_blocks_1023::4 223 # Occupied blocks per task id 1360system.l2c.tags.age_task_id_blocks_1024::0 26 # Occupied blocks per task id 1361system.l2c.tags.age_task_id_blocks_1024::1 260 # Occupied blocks per task id 1362system.l2c.tags.age_task_id_blocks_1024::2 3566 # Occupied blocks per task id 1363system.l2c.tags.age_task_id_blocks_1024::3 4579 # Occupied blocks per task id 1364system.l2c.tags.age_task_id_blocks_1024::4 52911 # Occupied blocks per task id 1365system.l2c.tags.occ_task_id_percent::1023 0.003418 # Percentage of cache occupancy per task id 1366system.l2c.tags.occ_task_id_percent::1024 0.936005 # Percentage of cache occupancy per task id 1367system.l2c.tags.tag_accesses 71904156 # Number of tag accesses 1368system.l2c.tags.data_accesses 71904156 # Number of data accesses |
| 1372system.l2c.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 1369system.l2c.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 1373system.l2c.WritebackDirty_hits::writebacks 2760080 # number of WritebackDirty hits 1374system.l2c.WritebackDirty_hits::total 2760080 # number of WritebackDirty hits 1375system.l2c.UpgradeReq_hits::cpu0.data 17858 # number of UpgradeReq hits 1376system.l2c.UpgradeReq_hits::cpu1.data 15288 # number of UpgradeReq hits 1377system.l2c.UpgradeReq_hits::total 33146 # number of UpgradeReq hits 1378system.l2c.SCUpgradeReq_hits::cpu0.data 2554 # number of SCUpgradeReq hits 1379system.l2c.SCUpgradeReq_hits::cpu1.data 2409 # number of SCUpgradeReq hits 1380system.l2c.SCUpgradeReq_hits::total 4963 # number of SCUpgradeReq hits 1381system.l2c.ReadExReq_hits::cpu0.data 196672 # number of ReadExReq hits 1382system.l2c.ReadExReq_hits::cpu1.data 175397 # number of ReadExReq hits 1383system.l2c.ReadExReq_hits::total 372069 # number of ReadExReq hits 1384system.l2c.ReadSharedReq_hits::cpu0.dtb.walker 6428 # number of ReadSharedReq hits 1385system.l2c.ReadSharedReq_hits::cpu0.itb.walker 4634 # number of ReadSharedReq hits 1386system.l2c.ReadSharedReq_hits::cpu0.inst 441340 # number of ReadSharedReq hits 1387system.l2c.ReadSharedReq_hits::cpu0.data 728132 # number of ReadSharedReq hits 1388system.l2c.ReadSharedReq_hits::cpu1.dtb.walker 5456 # number of ReadSharedReq hits 1389system.l2c.ReadSharedReq_hits::cpu1.itb.walker 3654 # number of ReadSharedReq hits 1390system.l2c.ReadSharedReq_hits::cpu1.inst 420919 # number of ReadSharedReq hits 1391system.l2c.ReadSharedReq_hits::cpu1.data 680845 # number of ReadSharedReq hits 1392system.l2c.ReadSharedReq_hits::total 2291408 # number of ReadSharedReq hits 1393system.l2c.InvalidateReq_hits::cpu0.data 115975 # number of InvalidateReq hits 1394system.l2c.InvalidateReq_hits::cpu1.data 102728 # number of InvalidateReq hits 1395system.l2c.InvalidateReq_hits::total 218703 # number of InvalidateReq hits 1396system.l2c.demand_hits::cpu0.dtb.walker 6428 # number of demand (read+write) hits 1397system.l2c.demand_hits::cpu0.itb.walker 4634 # number of demand (read+write) hits 1398system.l2c.demand_hits::cpu0.inst 441340 # number of demand (read+write) hits 1399system.l2c.demand_hits::cpu0.data 924804 # number of demand (read+write) hits 1400system.l2c.demand_hits::cpu1.dtb.walker 5456 # number of demand (read+write) hits 1401system.l2c.demand_hits::cpu1.itb.walker 3654 # number of demand (read+write) hits 1402system.l2c.demand_hits::cpu1.inst 420919 # number of demand (read+write) hits 1403system.l2c.demand_hits::cpu1.data 856242 # number of demand (read+write) hits 1404system.l2c.demand_hits::total 2663477 # number of demand (read+write) hits 1405system.l2c.overall_hits::cpu0.dtb.walker 6428 # number of overall hits 1406system.l2c.overall_hits::cpu0.itb.walker 4634 # number of overall hits 1407system.l2c.overall_hits::cpu0.inst 441340 # number of overall hits 1408system.l2c.overall_hits::cpu0.data 924804 # number of overall hits 1409system.l2c.overall_hits::cpu1.dtb.walker 5456 # number of overall hits 1410system.l2c.overall_hits::cpu1.itb.walker 3654 # number of overall hits 1411system.l2c.overall_hits::cpu1.inst 420919 # number of overall hits 1412system.l2c.overall_hits::cpu1.data 856242 # number of overall hits 1413system.l2c.overall_hits::total 2663477 # number of overall hits 1414system.l2c.UpgradeReq_misses::cpu0.data 65292 # number of UpgradeReq misses 1415system.l2c.UpgradeReq_misses::cpu1.data 60363 # number of UpgradeReq misses 1416system.l2c.UpgradeReq_misses::total 125655 # number of UpgradeReq misses 1417system.l2c.SCUpgradeReq_misses::cpu0.data 6568 # number of SCUpgradeReq misses 1418system.l2c.SCUpgradeReq_misses::cpu1.data 6268 # number of SCUpgradeReq misses 1419system.l2c.SCUpgradeReq_misses::total 12836 # number of SCUpgradeReq misses 1420system.l2c.ReadExReq_misses::cpu0.data 377580 # number of ReadExReq misses 1421system.l2c.ReadExReq_misses::cpu1.data 423134 # number of ReadExReq misses 1422system.l2c.ReadExReq_misses::total 800714 # number of ReadExReq misses 1423system.l2c.ReadSharedReq_misses::cpu0.dtb.walker 2366 # number of ReadSharedReq misses 1424system.l2c.ReadSharedReq_misses::cpu0.itb.walker 1943 # number of ReadSharedReq misses 1425system.l2c.ReadSharedReq_misses::cpu0.inst 57862 # number of ReadSharedReq misses 1426system.l2c.ReadSharedReq_misses::cpu0.data 180178 # number of ReadSharedReq misses 1427system.l2c.ReadSharedReq_misses::cpu1.dtb.walker 3474 # number of ReadSharedReq misses 1428system.l2c.ReadSharedReq_misses::cpu1.itb.walker 3458 # number of ReadSharedReq misses 1429system.l2c.ReadSharedReq_misses::cpu1.inst 41366 # number of ReadSharedReq misses 1430system.l2c.ReadSharedReq_misses::cpu1.data 189464 # number of ReadSharedReq misses 1431system.l2c.ReadSharedReq_misses::total 480111 # number of ReadSharedReq misses 1432system.l2c.InvalidateReq_misses::cpu0.data 478573 # number of InvalidateReq misses 1433system.l2c.InvalidateReq_misses::cpu1.data 160244 # number of InvalidateReq misses 1434system.l2c.InvalidateReq_misses::total 638817 # number of InvalidateReq misses 1435system.l2c.demand_misses::cpu0.dtb.walker 2366 # number of demand (read+write) misses 1436system.l2c.demand_misses::cpu0.itb.walker 1943 # number of demand (read+write) misses 1437system.l2c.demand_misses::cpu0.inst 57862 # number of demand (read+write) misses 1438system.l2c.demand_misses::cpu0.data 557758 # number of demand (read+write) misses 1439system.l2c.demand_misses::cpu1.dtb.walker 3474 # number of demand (read+write) misses 1440system.l2c.demand_misses::cpu1.itb.walker 3458 # number of demand (read+write) misses 1441system.l2c.demand_misses::cpu1.inst 41366 # number of demand (read+write) misses 1442system.l2c.demand_misses::cpu1.data 612598 # number of demand (read+write) misses 1443system.l2c.demand_misses::total 1280825 # number of demand (read+write) misses 1444system.l2c.overall_misses::cpu0.dtb.walker 2366 # number of overall misses 1445system.l2c.overall_misses::cpu0.itb.walker 1943 # number of overall misses 1446system.l2c.overall_misses::cpu0.inst 57862 # number of overall misses 1447system.l2c.overall_misses::cpu0.data 557758 # number of overall misses 1448system.l2c.overall_misses::cpu1.dtb.walker 3474 # number of overall misses 1449system.l2c.overall_misses::cpu1.itb.walker 3458 # number of overall misses 1450system.l2c.overall_misses::cpu1.inst 41366 # number of overall misses 1451system.l2c.overall_misses::cpu1.data 612598 # number of overall misses 1452system.l2c.overall_misses::total 1280825 # number of overall misses 1453system.l2c.WritebackDirty_accesses::writebacks 2760080 # number of WritebackDirty accesses(hits+misses) 1454system.l2c.WritebackDirty_accesses::total 2760080 # number of WritebackDirty accesses(hits+misses) 1455system.l2c.UpgradeReq_accesses::cpu0.data 83150 # number of UpgradeReq accesses(hits+misses) 1456system.l2c.UpgradeReq_accesses::cpu1.data 75651 # number of UpgradeReq accesses(hits+misses) 1457system.l2c.UpgradeReq_accesses::total 158801 # number of UpgradeReq accesses(hits+misses) 1458system.l2c.SCUpgradeReq_accesses::cpu0.data 9122 # number of SCUpgradeReq accesses(hits+misses) 1459system.l2c.SCUpgradeReq_accesses::cpu1.data 8677 # number of SCUpgradeReq accesses(hits+misses) 1460system.l2c.SCUpgradeReq_accesses::total 17799 # number of SCUpgradeReq accesses(hits+misses) 1461system.l2c.ReadExReq_accesses::cpu0.data 574252 # number of ReadExReq accesses(hits+misses) 1462system.l2c.ReadExReq_accesses::cpu1.data 598531 # number of ReadExReq accesses(hits+misses) 1463system.l2c.ReadExReq_accesses::total 1172783 # number of ReadExReq accesses(hits+misses) 1464system.l2c.ReadSharedReq_accesses::cpu0.dtb.walker 8794 # number of ReadSharedReq accesses(hits+misses) 1465system.l2c.ReadSharedReq_accesses::cpu0.itb.walker 6577 # number of ReadSharedReq accesses(hits+misses) 1466system.l2c.ReadSharedReq_accesses::cpu0.inst 499202 # number of ReadSharedReq accesses(hits+misses) 1467system.l2c.ReadSharedReq_accesses::cpu0.data 908310 # number of ReadSharedReq accesses(hits+misses) 1468system.l2c.ReadSharedReq_accesses::cpu1.dtb.walker 8930 # number of ReadSharedReq accesses(hits+misses) 1469system.l2c.ReadSharedReq_accesses::cpu1.itb.walker 7112 # number of ReadSharedReq accesses(hits+misses) 1470system.l2c.ReadSharedReq_accesses::cpu1.inst 462285 # number of ReadSharedReq accesses(hits+misses) 1471system.l2c.ReadSharedReq_accesses::cpu1.data 870309 # number of ReadSharedReq accesses(hits+misses) 1472system.l2c.ReadSharedReq_accesses::total 2771519 # number of ReadSharedReq accesses(hits+misses) 1473system.l2c.InvalidateReq_accesses::cpu0.data 594548 # number of InvalidateReq accesses(hits+misses) 1474system.l2c.InvalidateReq_accesses::cpu1.data 262972 # number of InvalidateReq accesses(hits+misses) 1475system.l2c.InvalidateReq_accesses::total 857520 # number of InvalidateReq accesses(hits+misses) 1476system.l2c.demand_accesses::cpu0.dtb.walker 8794 # number of demand (read+write) accesses 1477system.l2c.demand_accesses::cpu0.itb.walker 6577 # number of demand (read+write) accesses 1478system.l2c.demand_accesses::cpu0.inst 499202 # number of demand (read+write) accesses 1479system.l2c.demand_accesses::cpu0.data 1482562 # number of demand (read+write) accesses 1480system.l2c.demand_accesses::cpu1.dtb.walker 8930 # number of demand (read+write) accesses 1481system.l2c.demand_accesses::cpu1.itb.walker 7112 # number of demand (read+write) accesses 1482system.l2c.demand_accesses::cpu1.inst 462285 # number of demand (read+write) accesses 1483system.l2c.demand_accesses::cpu1.data 1468840 # number of demand (read+write) accesses 1484system.l2c.demand_accesses::total 3944302 # number of demand (read+write) accesses 1485system.l2c.overall_accesses::cpu0.dtb.walker 8794 # number of overall (read+write) accesses 1486system.l2c.overall_accesses::cpu0.itb.walker 6577 # number of overall (read+write) accesses 1487system.l2c.overall_accesses::cpu0.inst 499202 # number of overall (read+write) accesses 1488system.l2c.overall_accesses::cpu0.data 1482562 # number of overall (read+write) accesses 1489system.l2c.overall_accesses::cpu1.dtb.walker 8930 # number of overall (read+write) accesses 1490system.l2c.overall_accesses::cpu1.itb.walker 7112 # number of overall (read+write) accesses 1491system.l2c.overall_accesses::cpu1.inst 462285 # number of overall (read+write) accesses 1492system.l2c.overall_accesses::cpu1.data 1468840 # number of overall (read+write) accesses 1493system.l2c.overall_accesses::total 3944302 # number of overall (read+write) accesses 1494system.l2c.UpgradeReq_miss_rate::cpu0.data 0.785232 # miss rate for UpgradeReq accesses 1495system.l2c.UpgradeReq_miss_rate::cpu1.data 0.797914 # miss rate for UpgradeReq accesses 1496system.l2c.UpgradeReq_miss_rate::total 0.791273 # miss rate for UpgradeReq accesses 1497system.l2c.SCUpgradeReq_miss_rate::cpu0.data 0.720018 # miss rate for SCUpgradeReq accesses 1498system.l2c.SCUpgradeReq_miss_rate::cpu1.data 0.722369 # miss rate for SCUpgradeReq accesses 1499system.l2c.SCUpgradeReq_miss_rate::total 0.721164 # miss rate for SCUpgradeReq accesses 1500system.l2c.ReadExReq_miss_rate::cpu0.data 0.657516 # miss rate for ReadExReq accesses 1501system.l2c.ReadExReq_miss_rate::cpu1.data 0.706954 # miss rate for ReadExReq accesses 1502system.l2c.ReadExReq_miss_rate::total 0.682747 # miss rate for ReadExReq accesses 1503system.l2c.ReadSharedReq_miss_rate::cpu0.dtb.walker 0.269047 # miss rate for ReadSharedReq accesses 1504system.l2c.ReadSharedReq_miss_rate::cpu0.itb.walker 0.295423 # miss rate for ReadSharedReq accesses 1505system.l2c.ReadSharedReq_miss_rate::cpu0.inst 0.115909 # miss rate for ReadSharedReq accesses 1506system.l2c.ReadSharedReq_miss_rate::cpu0.data 0.198366 # miss rate for ReadSharedReq accesses 1507system.l2c.ReadSharedReq_miss_rate::cpu1.dtb.walker 0.389026 # miss rate for ReadSharedReq accesses 1508system.l2c.ReadSharedReq_miss_rate::cpu1.itb.walker 0.486220 # miss rate for ReadSharedReq accesses 1509system.l2c.ReadSharedReq_miss_rate::cpu1.inst 0.089482 # miss rate for ReadSharedReq accesses 1510system.l2c.ReadSharedReq_miss_rate::cpu1.data 0.217697 # miss rate for ReadSharedReq accesses 1511system.l2c.ReadSharedReq_miss_rate::total 0.173230 # miss rate for ReadSharedReq accesses 1512system.l2c.InvalidateReq_miss_rate::cpu0.data 0.804936 # miss rate for InvalidateReq accesses 1513system.l2c.InvalidateReq_miss_rate::cpu1.data 0.609358 # miss rate for InvalidateReq accesses 1514system.l2c.InvalidateReq_miss_rate::total 0.744959 # miss rate for InvalidateReq accesses 1515system.l2c.demand_miss_rate::cpu0.dtb.walker 0.269047 # miss rate for demand accesses 1516system.l2c.demand_miss_rate::cpu0.itb.walker 0.295423 # miss rate for demand accesses 1517system.l2c.demand_miss_rate::cpu0.inst 0.115909 # miss rate for demand accesses 1518system.l2c.demand_miss_rate::cpu0.data 0.376212 # miss rate for demand accesses 1519system.l2c.demand_miss_rate::cpu1.dtb.walker 0.389026 # miss rate for demand accesses 1520system.l2c.demand_miss_rate::cpu1.itb.walker 0.486220 # miss rate for demand accesses 1521system.l2c.demand_miss_rate::cpu1.inst 0.089482 # miss rate for demand accesses 1522system.l2c.demand_miss_rate::cpu1.data 0.417062 # miss rate for demand accesses 1523system.l2c.demand_miss_rate::total 0.324728 # miss rate for demand accesses 1524system.l2c.overall_miss_rate::cpu0.dtb.walker 0.269047 # miss rate for overall accesses 1525system.l2c.overall_miss_rate::cpu0.itb.walker 0.295423 # miss rate for overall accesses 1526system.l2c.overall_miss_rate::cpu0.inst 0.115909 # miss rate for overall accesses 1527system.l2c.overall_miss_rate::cpu0.data 0.376212 # miss rate for overall accesses 1528system.l2c.overall_miss_rate::cpu1.dtb.walker 0.389026 # miss rate for overall accesses 1529system.l2c.overall_miss_rate::cpu1.itb.walker 0.486220 # miss rate for overall accesses 1530system.l2c.overall_miss_rate::cpu1.inst 0.089482 # miss rate for overall accesses 1531system.l2c.overall_miss_rate::cpu1.data 0.417062 # miss rate for overall accesses 1532system.l2c.overall_miss_rate::total 0.324728 # miss rate for overall accesses | 1370system.l2c.WritebackDirty_hits::writebacks 2750852 # number of WritebackDirty hits 1371system.l2c.WritebackDirty_hits::total 2750852 # number of WritebackDirty hits 1372system.l2c.UpgradeReq_hits::cpu0.data 60132 # number of UpgradeReq hits 1373system.l2c.UpgradeReq_hits::cpu1.data 51539 # number of UpgradeReq hits 1374system.l2c.UpgradeReq_hits::total 111671 # number of UpgradeReq hits 1375system.l2c.SCUpgradeReq_hits::cpu0.data 8500 # number of SCUpgradeReq hits 1376system.l2c.SCUpgradeReq_hits::cpu1.data 7695 # number of SCUpgradeReq hits 1377system.l2c.SCUpgradeReq_hits::total 16195 # number of SCUpgradeReq hits 1378system.l2c.ReadExReq_hits::cpu0.data 199510 # number of ReadExReq hits 1379system.l2c.ReadExReq_hits::cpu1.data 176557 # number of ReadExReq hits 1380system.l2c.ReadExReq_hits::total 376067 # number of ReadExReq hits 1381system.l2c.ReadSharedReq_hits::cpu0.dtb.walker 12368 # number of ReadSharedReq hits 1382system.l2c.ReadSharedReq_hits::cpu0.itb.walker 5246 # number of ReadSharedReq hits 1383system.l2c.ReadSharedReq_hits::cpu0.inst 435137 # number of ReadSharedReq hits 1384system.l2c.ReadSharedReq_hits::cpu0.data 707607 # number of ReadSharedReq hits 1385system.l2c.ReadSharedReq_hits::cpu1.dtb.walker 12105 # number of ReadSharedReq hits 1386system.l2c.ReadSharedReq_hits::cpu1.itb.walker 4097 # number of ReadSharedReq hits 1387system.l2c.ReadSharedReq_hits::cpu1.inst 413141 # number of ReadSharedReq hits 1388system.l2c.ReadSharedReq_hits::cpu1.data 664483 # number of ReadSharedReq hits 1389system.l2c.ReadSharedReq_hits::total 2254184 # number of ReadSharedReq hits 1390system.l2c.InvalidateReq_hits::cpu0.data 130356 # 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number of overall hits 1404system.l2c.overall_hits::cpu0.inst 435137 # number of overall hits 1405system.l2c.overall_hits::cpu0.data 907117 # number of overall hits 1406system.l2c.overall_hits::cpu1.dtb.walker 12105 # number of overall hits 1407system.l2c.overall_hits::cpu1.itb.walker 4097 # number of overall hits 1408system.l2c.overall_hits::cpu1.inst 413141 # number of overall hits 1409system.l2c.overall_hits::cpu1.data 841040 # number of overall hits 1410system.l2c.overall_hits::total 2630251 # number of overall hits 1411system.l2c.UpgradeReq_misses::cpu0.data 21889 # number of UpgradeReq misses 1412system.l2c.UpgradeReq_misses::cpu1.data 25427 # number of UpgradeReq misses 1413system.l2c.UpgradeReq_misses::total 47316 # number of UpgradeReq misses 1414system.l2c.SCUpgradeReq_misses::cpu0.data 415 # number of SCUpgradeReq misses 1415system.l2c.SCUpgradeReq_misses::cpu1.data 794 # number of SCUpgradeReq misses 1416system.l2c.SCUpgradeReq_misses::total 1209 # number of SCUpgradeReq misses 1417system.l2c.ReadExReq_misses::cpu0.data 372583 # number of ReadExReq misses 1418system.l2c.ReadExReq_misses::cpu1.data 420111 # number of ReadExReq misses 1419system.l2c.ReadExReq_misses::total 792694 # number of ReadExReq misses 1420system.l2c.ReadSharedReq_misses::cpu0.dtb.walker 2419 # number of ReadSharedReq misses 1421system.l2c.ReadSharedReq_misses::cpu0.itb.walker 2002 # number of ReadSharedReq misses 1422system.l2c.ReadSharedReq_misses::cpu0.inst 63535 # number of ReadSharedReq misses 1423system.l2c.ReadSharedReq_misses::cpu0.data 191729 # number of ReadSharedReq misses 1424system.l2c.ReadSharedReq_misses::cpu1.dtb.walker 3502 # number of ReadSharedReq misses 1425system.l2c.ReadSharedReq_misses::cpu1.itb.walker 3484 # number of ReadSharedReq misses 1426system.l2c.ReadSharedReq_misses::cpu1.inst 47028 # number of ReadSharedReq misses 1427system.l2c.ReadSharedReq_misses::cpu1.data 197713 # number of ReadSharedReq misses 1428system.l2c.ReadSharedReq_misses::total 511412 # number of ReadSharedReq misses 1429system.l2c.InvalidateReq_misses::cpu0.data 462716 # number of InvalidateReq misses 1430system.l2c.InvalidateReq_misses::cpu1.data 149158 # number of InvalidateReq misses 1431system.l2c.InvalidateReq_misses::total 611874 # number of InvalidateReq misses 1432system.l2c.demand_misses::cpu0.dtb.walker 2419 # number of demand (read+write) misses 1433system.l2c.demand_misses::cpu0.itb.walker 2002 # number of demand (read+write) misses 1434system.l2c.demand_misses::cpu0.inst 63535 # number of demand (read+write) misses 1435system.l2c.demand_misses::cpu0.data 564312 # number of demand (read+write) misses 1436system.l2c.demand_misses::cpu1.dtb.walker 3502 # number of demand (read+write) misses 1437system.l2c.demand_misses::cpu1.itb.walker 3484 # number of demand (read+write) misses 1438system.l2c.demand_misses::cpu1.inst 47028 # number of demand (read+write) misses 1439system.l2c.demand_misses::cpu1.data 617824 # number of demand (read+write) misses 1440system.l2c.demand_misses::total 1304106 # number of demand (read+write) misses 1441system.l2c.overall_misses::cpu0.dtb.walker 2419 # number of overall misses 1442system.l2c.overall_misses::cpu0.itb.walker 2002 # number of overall misses 1443system.l2c.overall_misses::cpu0.inst 63535 # number of overall misses 1444system.l2c.overall_misses::cpu0.data 564312 # number of overall misses 1445system.l2c.overall_misses::cpu1.dtb.walker 3502 # number of overall misses 1446system.l2c.overall_misses::cpu1.itb.walker 3484 # number of overall misses 1447system.l2c.overall_misses::cpu1.inst 47028 # number of overall misses 1448system.l2c.overall_misses::cpu1.data 617824 # number of overall misses 1449system.l2c.overall_misses::total 1304106 # number of overall misses 1450system.l2c.WritebackDirty_accesses::writebacks 2750852 # number of WritebackDirty accesses(hits+misses) 1451system.l2c.WritebackDirty_accesses::total 2750852 # number of WritebackDirty accesses(hits+misses) 1452system.l2c.UpgradeReq_accesses::cpu0.data 82021 # number of UpgradeReq accesses(hits+misses) 1453system.l2c.UpgradeReq_accesses::cpu1.data 76966 # number of UpgradeReq accesses(hits+misses) 1454system.l2c.UpgradeReq_accesses::total 158987 # number of UpgradeReq accesses(hits+misses) 1455system.l2c.SCUpgradeReq_accesses::cpu0.data 8915 # number of SCUpgradeReq accesses(hits+misses) 1456system.l2c.SCUpgradeReq_accesses::cpu1.data 8489 # number of SCUpgradeReq accesses(hits+misses) 1457system.l2c.SCUpgradeReq_accesses::total 17404 # number of SCUpgradeReq accesses(hits+misses) 1458system.l2c.ReadExReq_accesses::cpu0.data 572093 # number of ReadExReq accesses(hits+misses) 1459system.l2c.ReadExReq_accesses::cpu1.data 596668 # number of ReadExReq accesses(hits+misses) 1460system.l2c.ReadExReq_accesses::total 1168761 # number of ReadExReq accesses(hits+misses) 1461system.l2c.ReadSharedReq_accesses::cpu0.dtb.walker 14787 # number of ReadSharedReq accesses(hits+misses) 1462system.l2c.ReadSharedReq_accesses::cpu0.itb.walker 7248 # number of ReadSharedReq accesses(hits+misses) 1463system.l2c.ReadSharedReq_accesses::cpu0.inst 498672 # number of ReadSharedReq accesses(hits+misses) 1464system.l2c.ReadSharedReq_accesses::cpu0.data 899336 # number of ReadSharedReq accesses(hits+misses) 1465system.l2c.ReadSharedReq_accesses::cpu1.dtb.walker 15607 # number of ReadSharedReq accesses(hits+misses) 1466system.l2c.ReadSharedReq_accesses::cpu1.itb.walker 7581 # number of ReadSharedReq accesses(hits+misses) 1467system.l2c.ReadSharedReq_accesses::cpu1.inst 460169 # number of ReadSharedReq accesses(hits+misses) 1468system.l2c.ReadSharedReq_accesses::cpu1.data 862196 # number of ReadSharedReq accesses(hits+misses) 1469system.l2c.ReadSharedReq_accesses::total 2765596 # number of ReadSharedReq accesses(hits+misses) 1470system.l2c.InvalidateReq_accesses::cpu0.data 593072 # number of InvalidateReq accesses(hits+misses) 1471system.l2c.InvalidateReq_accesses::cpu1.data 262725 # number of InvalidateReq accesses(hits+misses) 1472system.l2c.InvalidateReq_accesses::total 855797 # number of InvalidateReq accesses(hits+misses) 1473system.l2c.demand_accesses::cpu0.dtb.walker 14787 # number of demand (read+write) accesses 1474system.l2c.demand_accesses::cpu0.itb.walker 7248 # number of demand (read+write) accesses 1475system.l2c.demand_accesses::cpu0.inst 498672 # number of demand (read+write) accesses 1476system.l2c.demand_accesses::cpu0.data 1471429 # number of demand (read+write) accesses 1477system.l2c.demand_accesses::cpu1.dtb.walker 15607 # number of demand (read+write) accesses 1478system.l2c.demand_accesses::cpu1.itb.walker 7581 # number of demand (read+write) accesses 1479system.l2c.demand_accesses::cpu1.inst 460169 # number of demand (read+write) accesses 1480system.l2c.demand_accesses::cpu1.data 1458864 # number of demand (read+write) accesses 1481system.l2c.demand_accesses::total 3934357 # number of demand (read+write) accesses 1482system.l2c.overall_accesses::cpu0.dtb.walker 14787 # number of overall (read+write) accesses 1483system.l2c.overall_accesses::cpu0.itb.walker 7248 # number of overall (read+write) accesses 1484system.l2c.overall_accesses::cpu0.inst 498672 # number of overall (read+write) accesses 1485system.l2c.overall_accesses::cpu0.data 1471429 # number of overall (read+write) accesses 1486system.l2c.overall_accesses::cpu1.dtb.walker 15607 # number of overall (read+write) accesses 1487system.l2c.overall_accesses::cpu1.itb.walker 7581 # number of overall (read+write) accesses 1488system.l2c.overall_accesses::cpu1.inst 460169 # number of overall (read+write) accesses 1489system.l2c.overall_accesses::cpu1.data 1458864 # number of overall (read+write) accesses 1490system.l2c.overall_accesses::total 3934357 # number of overall (read+write) accesses 1491system.l2c.UpgradeReq_miss_rate::cpu0.data 0.266871 # miss rate for UpgradeReq accesses 1492system.l2c.UpgradeReq_miss_rate::cpu1.data 0.330367 # miss rate for UpgradeReq accesses 1493system.l2c.UpgradeReq_miss_rate::total 0.297609 # miss rate for UpgradeReq accesses 1494system.l2c.SCUpgradeReq_miss_rate::cpu0.data 0.046551 # miss rate for SCUpgradeReq accesses 1495system.l2c.SCUpgradeReq_miss_rate::cpu1.data 0.093533 # miss rate for SCUpgradeReq accesses 1496system.l2c.SCUpgradeReq_miss_rate::total 0.069467 # miss rate for SCUpgradeReq accesses 1497system.l2c.ReadExReq_miss_rate::cpu0.data 0.651263 # miss rate for ReadExReq accesses 1498system.l2c.ReadExReq_miss_rate::cpu1.data 0.704095 # miss rate for ReadExReq accesses 1499system.l2c.ReadExReq_miss_rate::total 0.678234 # miss rate for ReadExReq accesses 1500system.l2c.ReadSharedReq_miss_rate::cpu0.dtb.walker 0.163590 # miss rate for ReadSharedReq accesses 1501system.l2c.ReadSharedReq_miss_rate::cpu0.itb.walker 0.276214 # miss rate for ReadSharedReq accesses 1502system.l2c.ReadSharedReq_miss_rate::cpu0.inst 0.127408 # miss rate for ReadSharedReq accesses 1503system.l2c.ReadSharedReq_miss_rate::cpu0.data 0.213190 # miss rate for ReadSharedReq accesses 1504system.l2c.ReadSharedReq_miss_rate::cpu1.dtb.walker 0.224386 # miss rate for ReadSharedReq accesses 1505system.l2c.ReadSharedReq_miss_rate::cpu1.itb.walker 0.459570 # miss rate for ReadSharedReq accesses 1506system.l2c.ReadSharedReq_miss_rate::cpu1.inst 0.102197 # miss rate for ReadSharedReq accesses 1507system.l2c.ReadSharedReq_miss_rate::cpu1.data 0.229313 # miss rate for ReadSharedReq accesses 1508system.l2c.ReadSharedReq_miss_rate::total 0.184919 # miss rate for ReadSharedReq accesses 1509system.l2c.InvalidateReq_miss_rate::cpu0.data 0.780202 # miss rate for InvalidateReq accesses 1510system.l2c.InvalidateReq_miss_rate::cpu1.data 0.567734 # miss rate for InvalidateReq accesses 1511system.l2c.InvalidateReq_miss_rate::total 0.714976 # miss rate for InvalidateReq accesses 1512system.l2c.demand_miss_rate::cpu0.dtb.walker 0.163590 # miss rate for demand accesses 1513system.l2c.demand_miss_rate::cpu0.itb.walker 0.276214 # miss rate for demand accesses 1514system.l2c.demand_miss_rate::cpu0.inst 0.127408 # miss rate for demand accesses 1515system.l2c.demand_miss_rate::cpu0.data 0.383513 # miss rate for demand accesses 1516system.l2c.demand_miss_rate::cpu1.dtb.walker 0.224386 # miss rate for demand accesses 1517system.l2c.demand_miss_rate::cpu1.itb.walker 0.459570 # miss rate for demand accesses 1518system.l2c.demand_miss_rate::cpu1.inst 0.102197 # miss rate for demand accesses 1519system.l2c.demand_miss_rate::cpu1.data 0.423497 # miss rate for demand accesses 1520system.l2c.demand_miss_rate::total 0.331466 # miss rate for demand accesses 1521system.l2c.overall_miss_rate::cpu0.dtb.walker 0.163590 # miss rate for overall accesses 1522system.l2c.overall_miss_rate::cpu0.itb.walker 0.276214 # miss rate for overall accesses 1523system.l2c.overall_miss_rate::cpu0.inst 0.127408 # miss rate for overall accesses 1524system.l2c.overall_miss_rate::cpu0.data 0.383513 # miss rate for overall accesses 1525system.l2c.overall_miss_rate::cpu1.dtb.walker 0.224386 # miss rate for overall accesses 1526system.l2c.overall_miss_rate::cpu1.itb.walker 0.459570 # miss rate for overall accesses 1527system.l2c.overall_miss_rate::cpu1.inst 0.102197 # miss rate for overall accesses 1528system.l2c.overall_miss_rate::cpu1.data 0.423497 # miss rate for overall accesses 1529system.l2c.overall_miss_rate::total 0.331466 # miss rate for overall accesses |
| 1533system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 1534system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked 1535system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked 1536system.l2c.blocked::no_targets 0 # number of cycles access was blocked 1537system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 1538system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 1530system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 1531system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked 1532system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked 1533system.l2c.blocked::no_targets 0 # number of cycles access was blocked 1534system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 1535system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 1539system.l2c.writebacks::writebacks 1478540 # number of writebacks 1540system.l2c.writebacks::total 1478540 # number of writebacks 1541system.membus.snoop_filter.tot_requests 4495065 # Total number of requests made to the snoop filter. 1542system.membus.snoop_filter.hit_single_requests 2597713 # Number of requests hitting in the snoop filter with a single holder of the requested data. 1543system.membus.snoop_filter.hit_multi_requests 3483 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. | 1536system.l2c.writebacks::writebacks 1492845 # number of writebacks 1537system.l2c.writebacks::total 1492845 # number of writebacks 1538system.membus.snoop_filter.tot_requests 4436915 # Total number of requests made to the snoop filter. 1539system.membus.snoop_filter.hit_single_requests 2508187 # Number of requests hitting in the snoop filter with a single holder of the requested data. 1540system.membus.snoop_filter.hit_multi_requests 3478 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. |
| 1544system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. 1545system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 1546system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 1547system.membus.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1548system.membus.trans_dist::ReadReq 82130 # Transaction distribution | 1541system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. 1542system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 1543system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 1544system.membus.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1545system.membus.trans_dist::ReadReq 82130 # Transaction distribution |
| 1549system.membus.trans_dist::ReadResp 571159 # Transaction distribution | 1546system.membus.trans_dist::ReadResp 602460 # Transaction distribution |
| 1550system.membus.trans_dist::WriteReq 38798 # Transaction distribution 1551system.membus.trans_dist::WriteResp 38798 # Transaction distribution | 1547system.membus.trans_dist::WriteReq 38798 # Transaction distribution 1548system.membus.trans_dist::WriteResp 38798 # Transaction distribution |
| 1552system.membus.trans_dist::WritebackDirty 1585234 # Transaction distribution 1553system.membus.trans_dist::CleanEvict 247687 # Transaction distribution 1554system.membus.trans_dist::UpgradeReq 337993 # Transaction distribution 1555system.membus.trans_dist::SCUpgradeReq 306149 # Transaction distribution 1556system.membus.trans_dist::UpgradeResp 159131 # Transaction distribution 1557system.membus.trans_dist::ReadExReq 787924 # Transaction distribution 1558system.membus.trans_dist::ReadExResp 784573 # Transaction distribution 1559system.membus.trans_dist::ReadSharedReq 489029 # Transaction distribution 1560system.membus.trans_dist::InvalidateReq 741049 # Transaction distribution 1561system.membus.trans_dist::InvalidateResp 741049 # Transaction distribution | 1549system.membus.trans_dist::WritebackDirty 1599539 # Transaction distribution 1550system.membus.trans_dist::CleanEvict 267122 # Transaction distribution 1551system.membus.trans_dist::UpgradeReq 245150 # Transaction distribution 1552system.membus.trans_dist::SCUpgradeReq 295293 # Transaction distribution 1553system.membus.trans_dist::UpgradeResp 53835 # Transaction distribution 1554system.membus.trans_dist::ReadExReq 792754 # Transaction distribution 1555system.membus.trans_dist::ReadExResp 789263 # Transaction distribution 1556system.membus.trans_dist::ReadSharedReq 520330 # Transaction distribution 1557system.membus.trans_dist::InvalidateReq 716726 # Transaction distribution 1558system.membus.trans_dist::InvalidateResp 716726 # Transaction distribution |
| 1562system.membus.pkt_count_system.l2c.mem_side::system.bridge.slave 122576 # Packet count per connected master and slave (bytes) 1563system.membus.pkt_count_system.l2c.mem_side::system.realview.nvmem.port 92 # Packet count per connected master and slave (bytes) 1564system.membus.pkt_count_system.l2c.mem_side::system.realview.gic.pio 27542 # Packet count per connected master and slave (bytes) | 1559system.membus.pkt_count_system.l2c.mem_side::system.bridge.slave 122576 # Packet count per connected master and slave (bytes) 1560system.membus.pkt_count_system.l2c.mem_side::system.realview.nvmem.port 92 # Packet count per connected master and slave (bytes) 1561system.membus.pkt_count_system.l2c.mem_side::system.realview.gic.pio 27542 # Packet count per connected master and slave (bytes) |
| 1565system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 6413605 # Packet count per connected master and slave (bytes) 1566system.membus.pkt_count_system.l2c.mem_side::total 6563815 # Packet count per connected master and slave (bytes) | 1562system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 6261826 # Packet count per connected master and slave (bytes) 1563system.membus.pkt_count_system.l2c.mem_side::total 6412036 # Packet count per connected master and slave (bytes) |
| 1567system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 346888 # Packet count per connected master and slave (bytes) 1568system.membus.pkt_count_system.iocache.mem_side::total 346888 # Packet count per connected master and slave (bytes) | 1564system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 346888 # Packet count per connected master and slave (bytes) 1565system.membus.pkt_count_system.iocache.mem_side::total 346888 # Packet count per connected master and slave (bytes) |
| 1569system.membus.pkt_count::total 6910703 # Packet count per connected master and slave (bytes) | 1566system.membus.pkt_count::total 6758924 # Packet count per connected master and slave (bytes) |
| 1570system.membus.pkt_size_system.l2c.mem_side::system.bridge.slave 155683 # Cumulative packet size per connected master and slave (bytes) 1571system.membus.pkt_size_system.l2c.mem_side::system.realview.nvmem.port 204 # Cumulative packet size per connected master and slave (bytes) 1572system.membus.pkt_size_system.l2c.mem_side::system.realview.gic.pio 55084 # Cumulative packet size per connected master and slave (bytes) | 1567system.membus.pkt_size_system.l2c.mem_side::system.bridge.slave 155683 # Cumulative packet size per connected master and slave (bytes) 1568system.membus.pkt_size_system.l2c.mem_side::system.realview.nvmem.port 204 # Cumulative packet size per connected master and slave (bytes) 1569system.membus.pkt_size_system.l2c.mem_side::system.realview.gic.pio 55084 # Cumulative packet size per connected master and slave (bytes) |
| 1573system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 175760092 # Cumulative packet size per connected master and slave (bytes) 1574system.membus.pkt_size_system.l2c.mem_side::total 175971063 # Cumulative packet size per connected master and slave (bytes) | 1570system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 178979036 # Cumulative packet size per connected master and slave (bytes) 1571system.membus.pkt_size_system.l2c.mem_side::total 179190007 # Cumulative packet size per connected master and slave (bytes) |
| 1575system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 7399168 # Cumulative packet size per connected master and slave (bytes) 1576system.membus.pkt_size_system.iocache.mem_side::total 7399168 # Cumulative packet size per connected master and slave (bytes) | 1572system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 7399168 # Cumulative packet size per connected master and slave (bytes) 1573system.membus.pkt_size_system.iocache.mem_side::total 7399168 # Cumulative packet size per connected master and slave (bytes) |
| 1577system.membus.pkt_size::total 183370231 # Cumulative packet size per connected master and slave (bytes) | 1574system.membus.pkt_size::total 186589175 # Cumulative packet size per connected master and slave (bytes) |
| 1578system.membus.snoops 0 # Total snoops (count) 1579system.membus.snoopTraffic 0 # Total snoop traffic (bytes) | 1575system.membus.snoops 0 # Total snoops (count) 1576system.membus.snoopTraffic 0 # Total snoop traffic (bytes) |
| 1580system.membus.snoop_fanout::samples 4615993 # Request fanout histogram 1581system.membus.snoop_fanout::mean 0.007281 # Request fanout histogram 1582system.membus.snoop_fanout::stdev 0.085020 # Request fanout histogram | 1577system.membus.snoop_fanout::samples 4557842 # Request fanout histogram 1578system.membus.snoop_fanout::mean 0.007340 # Request fanout histogram 1579system.membus.snoop_fanout::stdev 0.085359 # Request fanout histogram |
| 1583system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram | 1580system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram |
| 1584system.membus.snoop_fanout::0 4582382 99.27% 99.27% # Request fanout histogram 1585system.membus.snoop_fanout::1 33611 0.73% 100.00% # Request fanout histogram | 1581system.membus.snoop_fanout::0 4524387 99.27% 99.27% # Request fanout histogram 1582system.membus.snoop_fanout::1 33455 0.73% 100.00% # Request fanout histogram |
| 1586system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 1587system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 1588system.membus.snoop_fanout::min_value 0 # Request fanout histogram 1589system.membus.snoop_fanout::max_value 1 # Request fanout histogram | 1583system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 1584system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 1585system.membus.snoop_fanout::min_value 0 # Request fanout histogram 1586system.membus.snoop_fanout::max_value 1 # Request fanout histogram |
| 1590system.membus.snoop_fanout::total 4615993 # Request fanout histogram | 1587system.membus.snoop_fanout::total 4557842 # Request fanout histogram |
| 1591system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1592system.realview.aaci_fake.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1593system.realview.pci_host.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1594system.realview.cf_ctrl.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1595system.realview.gic.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1596system.realview.clcd.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1597system.realview.realview_io.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1598system.realview.dcc.osc_cpu.clock 16667 # Clock period in ticks --- 64 unchanged lines hidden (view full) --- 1663system.realview.timer1.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1664system.realview.uart.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1665system.realview.uart1_fake.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1666system.realview.uart2_fake.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1667system.realview.uart3_fake.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1668system.realview.usb_fake.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1669system.realview.vgic.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1670system.realview.watchdog_fake.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states | 1588system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1589system.realview.aaci_fake.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1590system.realview.pci_host.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1591system.realview.cf_ctrl.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1592system.realview.gic.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1593system.realview.clcd.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1594system.realview.realview_io.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1595system.realview.dcc.osc_cpu.clock 16667 # Clock period in ticks --- 64 unchanged lines hidden (view full) --- 1660system.realview.timer1.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1661system.realview.uart.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1662system.realview.uart1_fake.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1663system.realview.uart2_fake.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1664system.realview.uart3_fake.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1665system.realview.usb_fake.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1666system.realview.vgic.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1667system.realview.watchdog_fake.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states |
| 1671system.toL2Bus.snoop_filter.tot_requests 11098491 # Total number of requests made to the snoop filter. 1672system.toL2Bus.snoop_filter.hit_single_requests 5714084 # Number of requests hitting in the snoop filter with a single holder of the requested data. 1673system.toL2Bus.snoop_filter.hit_multi_requests 1638499 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 1674system.toL2Bus.snoop_filter.tot_snoops 134977 # Total number of snoops made to the snoop filter. 1675system.toL2Bus.snoop_filter.hit_single_snoops 121387 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 1676system.toL2Bus.snoop_filter.hit_multi_snoops 13590 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. | 1668system.toL2Bus.snoop_filter.tot_requests 11075061 # Total number of requests made to the snoop filter. 1669system.toL2Bus.snoop_filter.hit_single_requests 5706480 # Number of requests hitting in the snoop filter with a single holder of the requested data. 1670system.toL2Bus.snoop_filter.hit_multi_requests 1648775 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 1671system.toL2Bus.snoop_filter.tot_snoops 269190 # Total number of snoops made to the snoop filter. 1672system.toL2Bus.snoop_filter.hit_single_snoops 248390 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 1673system.toL2Bus.snoop_filter.hit_multi_snoops 20800 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. |
| 1677system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1678system.toL2Bus.trans_dist::ReadReq 82132 # Transaction distribution | 1674system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 47296281748500 # Cumulative time (in ticks) in various power states 1675system.toL2Bus.trans_dist::ReadReq 82132 # Transaction distribution |
| 1679system.toL2Bus.trans_dist::ReadResp 3539371 # Transaction distribution | 1676system.toL2Bus.trans_dist::ReadResp 3544615 # Transaction distribution |
| 1680system.toL2Bus.trans_dist::WriteReq 38798 # Transaction distribution 1681system.toL2Bus.trans_dist::WriteResp 38798 # Transaction distribution | 1677system.toL2Bus.trans_dist::WriteReq 38798 # Transaction distribution 1678system.toL2Bus.trans_dist::WriteResp 38798 # Transaction distribution |
| 1682system.toL2Bus.trans_dist::WritebackDirty 2760080 # Transaction distribution 1683system.toL2Bus.trans_dist::CleanEvict 2007636 # Transaction distribution 1684system.toL2Bus.trans_dist::UpgradeReq 350499 # Transaction distribution 1685system.toL2Bus.trans_dist::SCUpgradeReq 311112 # Transaction distribution 1686system.toL2Bus.trans_dist::UpgradeResp 661611 # Transaction distribution 1687system.toL2Bus.trans_dist::ReadExReq 1354403 # Transaction distribution 1688system.toL2Bus.trans_dist::ReadExResp 1354403 # Transaction distribution 1689system.toL2Bus.trans_dist::ReadSharedReq 3457239 # Transaction distribution 1690system.toL2Bus.trans_dist::InvalidateReq 857520 # Transaction distribution 1691system.toL2Bus.trans_dist::InvalidateResp 857520 # Transaction distribution 1692system.toL2Bus.pkt_count_system.cpu0.l2cache.mem_side::system.l2c.cpu_side 9497179 # Packet count per connected master and slave (bytes) 1693system.toL2Bus.pkt_count_system.cpu1.l2cache.mem_side::system.l2c.cpu_side 8173943 # Packet count per connected master and slave (bytes) 1694system.toL2Bus.pkt_count::total 17671122 # Packet count per connected master and slave (bytes) 1695system.toL2Bus.pkt_size_system.cpu0.l2cache.mem_side::system.l2c.cpu_side 255360528 # Cumulative packet size per connected master and slave (bytes) 1696system.toL2Bus.pkt_size_system.cpu1.l2cache.mem_side::system.l2c.cpu_side 229634423 # Cumulative packet size per connected master and slave (bytes) 1697system.toL2Bus.pkt_size::total 484994951 # Cumulative packet size per connected master and slave (bytes) 1698system.toL2Bus.snoops 1809010 # Total snoops (count) 1699system.toL2Bus.snoopTraffic 94667072 # Total snoop traffic (bytes) 1700system.toL2Bus.snoop_fanout::samples 13026748 # Request fanout histogram 1701system.toL2Bus.snoop_fanout::mean 0.284748 # Request fanout histogram 1702system.toL2Bus.snoop_fanout::stdev 0.453600 # Request fanout histogram | 1679system.toL2Bus.trans_dist::WritebackDirty 2750852 # Transaction distribution 1680system.toL2Bus.trans_dist::CleanEvict 1991304 # Transaction distribution 1681system.toL2Bus.trans_dist::UpgradeReq 351511 # Transaction distribution 1682system.toL2Bus.trans_dist::SCUpgradeReq 311488 # Transaction distribution 1683system.toL2Bus.trans_dist::UpgradeResp 662999 # Transaction distribution 1684system.toL2Bus.trans_dist::ReadExReq 1351623 # Transaction distribution 1685system.toL2Bus.trans_dist::ReadExResp 1351623 # Transaction distribution 1686system.toL2Bus.trans_dist::ReadSharedReq 3462483 # Transaction distribution 1687system.toL2Bus.trans_dist::InvalidateReq 855797 # Transaction distribution 1688system.toL2Bus.trans_dist::InvalidateResp 855797 # Transaction distribution 1689system.toL2Bus.pkt_count_system.cpu0.l2cache.mem_side::system.l2c.cpu_side 9483041 # Packet count per connected master and slave (bytes) 1690system.toL2Bus.pkt_count_system.cpu1.l2cache.mem_side::system.l2c.cpu_side 8166779 # Packet count per connected master and slave (bytes) 1691system.toL2Bus.pkt_count::total 17649820 # Packet count per connected master and slave (bytes) 1692system.toL2Bus.pkt_size_system.cpu0.l2cache.mem_side::system.l2c.cpu_side 254997904 # Cumulative packet size per connected master and slave (bytes) 1693system.toL2Bus.pkt_size_system.cpu1.l2cache.mem_side::system.l2c.cpu_side 229564151 # Cumulative packet size per connected master and slave (bytes) 1694system.toL2Bus.pkt_size::total 484562055 # Cumulative packet size per connected master and slave (bytes) 1695system.toL2Bus.snoops 1959256 # Total snoops (count) 1696system.toL2Bus.snoopTraffic 95582592 # Total snoop traffic (bytes) 1697system.toL2Bus.snoop_fanout::samples 13153559 # Request fanout histogram 1698system.toL2Bus.snoop_fanout::mean 0.293824 # Request fanout histogram 1699system.toL2Bus.snoop_fanout::stdev 0.458971 # Request fanout histogram |
| 1703system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram | 1700system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram |
| 1704system.toL2Bus.snoop_fanout::0 9330997 71.63% 71.63% # Request fanout histogram 1705system.toL2Bus.snoop_fanout::1 3682161 28.27% 99.90% # Request fanout histogram 1706system.toL2Bus.snoop_fanout::2 13590 0.10% 100.00% # Request fanout histogram | 1701system.toL2Bus.snoop_fanout::0 9309527 70.78% 70.78% # Request fanout histogram 1702system.toL2Bus.snoop_fanout::1 3823232 29.07% 99.84% # Request fanout histogram 1703system.toL2Bus.snoop_fanout::2 20800 0.16% 100.00% # Request fanout histogram |
| 1707system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 1708system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 1709system.toL2Bus.snoop_fanout::max_value 2 # Request fanout histogram | 1704system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 1705system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 1706system.toL2Bus.snoop_fanout::max_value 2 # Request fanout histogram |
| 1710system.toL2Bus.snoop_fanout::total 13026748 # Request fanout histogram | 1707system.toL2Bus.snoop_fanout::total 13153559 # Request fanout histogram |
| 1711 1712---------- End Simulation Statistics ---------- | 1708 1709---------- End Simulation Statistics ---------- |