7,11c7,11
< host_inst_rate 717114 # Simulator instruction rate (inst/s)
< host_op_rate 843581 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 34713303168 # Simulator tick rate (ticks/s)
< host_mem_usage 688104 # Number of bytes of host memory used
< host_seconds 1362.48 # Real time elapsed on the host
---
> host_inst_rate 890958 # Simulator instruction rate (inst/s)
> host_op_rate 1048084 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 43128593002 # Simulator tick rate (ticks/s)
> host_mem_usage 697472 # Number of bytes of host memory used
> host_seconds 1096.63 # Real time elapsed on the host
17,30c17,30
< system.physmem.bytes_read::cpu0.dtb.walker 151424 # Number of bytes read from this memory
< system.physmem.bytes_read::cpu0.itb.walker 124352 # Number of bytes read from this memory
< system.physmem.bytes_read::cpu0.inst 3875572 # Number of bytes read from this memory
< system.physmem.bytes_read::cpu0.data 35081800 # Number of bytes read from this memory
< system.physmem.bytes_read::cpu1.dtb.walker 222336 # Number of bytes read from this memory
< system.physmem.bytes_read::cpu1.itb.walker 221312 # Number of bytes read from this memory
< system.physmem.bytes_read::cpu1.inst 2647048 # Number of bytes read from this memory
< system.physmem.bytes_read::cpu1.data 38747248 # Number of bytes read from this memory
< system.physmem.bytes_read::realview.ide 401984 # Number of bytes read from this memory
< system.physmem.bytes_read::total 81473076 # Number of bytes read from this memory
< system.physmem.bytes_inst_read::cpu0.inst 3875572 # Number of instructions bytes read from this memory
< system.physmem.bytes_inst_read::cpu1.inst 2647048 # Number of instructions bytes read from this memory
< system.physmem.bytes_inst_read::total 6522620 # Number of instructions bytes read from this memory
< system.physmem.bytes_written::writebacks 101454976 # Number of bytes written to this memory
---
> system.physmem.bytes_read::cpu0.dtb.walker 154816 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu0.itb.walker 128128 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu0.inst 4238644 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu0.data 35981768 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.dtb.walker 224128 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.itb.walker 222976 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.inst 3009416 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.data 39414640 # Number of bytes read from this memory
> system.physmem.bytes_read::realview.ide 402560 # Number of bytes read from this memory
> system.physmem.bytes_read::total 83777076 # Number of bytes read from this memory
> system.physmem.bytes_inst_read::cpu0.inst 4238644 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu1.inst 3009416 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::total 7248060 # Number of instructions bytes read from this memory
> system.physmem.bytes_written::writebacks 102370496 # Number of bytes written to this memory
33,44c33,44
< system.physmem.bytes_written::total 101475560 # Number of bytes written to this memory
< system.physmem.num_reads::cpu0.dtb.walker 2366 # Number of read requests responded to by this memory
< system.physmem.num_reads::cpu0.itb.walker 1943 # Number of read requests responded to by this memory
< system.physmem.num_reads::cpu0.inst 100963 # Number of read requests responded to by this memory
< system.physmem.num_reads::cpu0.data 548166 # Number of read requests responded to by this memory
< system.physmem.num_reads::cpu1.dtb.walker 3474 # Number of read requests responded to by this memory
< system.physmem.num_reads::cpu1.itb.walker 3458 # Number of read requests responded to by this memory
< system.physmem.num_reads::cpu1.inst 41467 # Number of read requests responded to by this memory
< system.physmem.num_reads::cpu1.data 605442 # Number of read requests responded to by this memory
< system.physmem.num_reads::realview.ide 6281 # Number of read requests responded to by this memory
< system.physmem.num_reads::total 1313560 # Number of read requests responded to by this memory
< system.physmem.num_writes::writebacks 1585234 # Number of write requests responded to by this memory
---
> system.physmem.bytes_written::total 102391080 # Number of bytes written to this memory
> system.physmem.num_reads::cpu0.dtb.walker 2419 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu0.itb.walker 2002 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu0.inst 106636 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu0.data 562228 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.dtb.walker 3502 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.itb.walker 3484 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.inst 47129 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.data 615870 # Number of read requests responded to by this memory
> system.physmem.num_reads::realview.ide 6290 # Number of read requests responded to by this memory
> system.physmem.num_reads::total 1349560 # Number of read requests responded to by this memory
> system.physmem.num_writes::writebacks 1599539 # Number of write requests responded to by this memory
47,61c47,61
< system.physmem.num_writes::total 1587808 # Number of write requests responded to by this memory
< system.physmem.bw_read::cpu0.dtb.walker 3202 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::cpu0.itb.walker 2629 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::cpu0.inst 81942 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::cpu0.data 741745 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::cpu1.dtb.walker 4701 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::cpu1.itb.walker 4679 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::cpu1.inst 55967 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::cpu1.data 819245 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::realview.ide 8499 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::total 1722611 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read::cpu0.inst 81942 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read::cpu1.inst 55967 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read::total 137910 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_write::writebacks 2145094 # Write bandwidth from this memory (bytes/s)
---
> system.physmem.num_writes::total 1602113 # Number of write requests responded to by this memory
> system.physmem.bw_read::cpu0.dtb.walker 3273 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu0.itb.walker 2709 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu0.inst 89619 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu0.data 760774 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.dtb.walker 4739 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.itb.walker 4714 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.inst 63629 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.data 833356 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::realview.ide 8511 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::total 1771325 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu0.inst 89619 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu1.inst 63629 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::total 153248 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_write::writebacks 2164451 # Write bandwidth from this memory (bytes/s)
64,75c64,75
< system.physmem.bw_write::total 2145529 # Write bandwidth from this memory (bytes/s)
< system.physmem.bw_total::writebacks 2145094 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::cpu0.dtb.walker 3202 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::cpu0.itb.walker 2629 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::cpu0.inst 81942 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::cpu0.data 742181 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::cpu1.dtb.walker 4701 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::cpu1.itb.walker 4679 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::cpu1.inst 55967 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::cpu1.data 819245 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::realview.ide 8499 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::total 3868140 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bw_write::total 2164886 # Write bandwidth from this memory (bytes/s)
> system.physmem.bw_total::writebacks 2164451 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu0.dtb.walker 3273 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu0.itb.walker 2709 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu0.inst 89619 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu0.data 761209 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.dtb.walker 4739 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.itb.walker 4714 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.inst 63629 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.data 833356 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::realview.ide 8511 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::total 3936211 # Total bandwidth to/from this memory (bytes/s)
335c335
< system.cpu0.dcache.tags.replacements 6248912 # number of replacements
---
> system.cpu0.dcache.tags.replacements 6248914 # number of replacements
337,339c337,339
< system.cpu0.dcache.tags.total_refs 171607959 # Total number of references to valid blocks.
< system.cpu0.dcache.tags.sampled_refs 6249424 # Sample count of references to valid blocks.
< system.cpu0.dcache.tags.avg_refs 27.459804 # Average number of references to valid blocks.
---
> system.cpu0.dcache.tags.total_refs 171607957 # Total number of references to valid blocks.
> system.cpu0.dcache.tags.sampled_refs 6249426 # Sample count of references to valid blocks.
> system.cpu0.dcache.tags.avg_refs 27.459795 # Average number of references to valid blocks.
349,350c349,350
< system.cpu0.dcache.tags.tag_accesses 362271537 # Number of tag accesses
< system.cpu0.dcache.tags.data_accesses 362271537 # Number of data accesses
---
> system.cpu0.dcache.tags.tag_accesses 362271539 # Number of tag accesses
> system.cpu0.dcache.tags.data_accesses 362271539 # Number of data accesses
354,355c354,355
< system.cpu0.dcache.WriteReq_hits::cpu0.data 80672636 # number of WriteReq hits
< system.cpu0.dcache.WriteReq_hits::total 80672636 # number of WriteReq hits
---
> system.cpu0.dcache.WriteReq_hits::cpu0.data 80674063 # number of WriteReq hits
> system.cpu0.dcache.WriteReq_hits::total 80674063 # number of WriteReq hits
358,367c358,367
< system.cpu0.dcache.WriteLineReq_hits::cpu0.data 261023 # number of WriteLineReq hits
< system.cpu0.dcache.WriteLineReq_hits::total 261023 # number of WriteLineReq hits
< system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 2087977 # number of LoadLockedReq hits
< system.cpu0.dcache.LoadLockedReq_hits::total 2087977 # number of LoadLockedReq hits
< system.cpu0.dcache.StoreCondReq_hits::cpu0.data 2051999 # number of StoreCondReq hits
< system.cpu0.dcache.StoreCondReq_hits::total 2051999 # number of StoreCondReq hits
< system.cpu0.dcache.demand_hits::cpu0.data 166957831 # number of demand (read+write) hits
< system.cpu0.dcache.demand_hits::total 166957831 # number of demand (read+write) hits
< system.cpu0.dcache.overall_hits::cpu0.data 167174100 # number of overall hits
< system.cpu0.dcache.overall_hits::total 167174100 # number of overall hits
---
> system.cpu0.dcache.WriteLineReq_hits::cpu0.data 261006 # number of WriteLineReq hits
> system.cpu0.dcache.WriteLineReq_hits::total 261006 # number of WriteLineReq hits
> system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 2087975 # number of LoadLockedReq hits
> system.cpu0.dcache.LoadLockedReq_hits::total 2087975 # number of LoadLockedReq hits
> system.cpu0.dcache.StoreCondReq_hits::cpu0.data 2051823 # number of StoreCondReq hits
> system.cpu0.dcache.StoreCondReq_hits::total 2051823 # number of StoreCondReq hits
> system.cpu0.dcache.demand_hits::cpu0.data 166959241 # number of demand (read+write) hits
> system.cpu0.dcache.demand_hits::total 166959241 # number of demand (read+write) hits
> system.cpu0.dcache.overall_hits::cpu0.data 167175510 # number of overall hits
> system.cpu0.dcache.overall_hits::total 167175510 # number of overall hits
370,371c370,371
< system.cpu0.dcache.WriteReq_misses::cpu0.data 1479208 # number of WriteReq misses
< system.cpu0.dcache.WriteReq_misses::total 1479208 # number of WriteReq misses
---
> system.cpu0.dcache.WriteReq_misses::cpu0.data 1477781 # number of WriteReq misses
> system.cpu0.dcache.WriteReq_misses::total 1477781 # number of WriteReq misses
374,383c374,383
< system.cpu0.dcache.WriteLineReq_misses::cpu0.data 824176 # number of WriteLineReq misses
< system.cpu0.dcache.WriteLineReq_misses::total 824176 # number of WriteLineReq misses
< system.cpu0.dcache.LoadLockedReq_misses::cpu0.data 119749 # number of LoadLockedReq misses
< system.cpu0.dcache.LoadLockedReq_misses::total 119749 # number of LoadLockedReq misses
< system.cpu0.dcache.StoreCondReq_misses::cpu0.data 154638 # number of StoreCondReq misses
< system.cpu0.dcache.StoreCondReq_misses::total 154638 # number of StoreCondReq misses
< system.cpu0.dcache.demand_misses::cpu0.data 5601806 # number of demand (read+write) misses
< system.cpu0.dcache.demand_misses::total 5601806 # number of demand (read+write) misses
< system.cpu0.dcache.overall_misses::cpu0.data 6371369 # number of overall misses
< system.cpu0.dcache.overall_misses::total 6371369 # number of overall misses
---
> system.cpu0.dcache.WriteLineReq_misses::cpu0.data 824193 # number of WriteLineReq misses
> system.cpu0.dcache.WriteLineReq_misses::total 824193 # number of WriteLineReq misses
> system.cpu0.dcache.LoadLockedReq_misses::cpu0.data 119751 # number of LoadLockedReq misses
> system.cpu0.dcache.LoadLockedReq_misses::total 119751 # number of LoadLockedReq misses
> system.cpu0.dcache.StoreCondReq_misses::cpu0.data 154814 # number of StoreCondReq misses
> system.cpu0.dcache.StoreCondReq_misses::total 154814 # number of StoreCondReq misses
> system.cpu0.dcache.demand_misses::cpu0.data 5600396 # number of demand (read+write) misses
> system.cpu0.dcache.demand_misses::total 5600396 # number of demand (read+write) misses
> system.cpu0.dcache.overall_misses::cpu0.data 6369959 # number of overall misses
> system.cpu0.dcache.overall_misses::total 6369959 # number of overall misses
402,403c402,403
< system.cpu0.dcache.WriteReq_miss_rate::cpu0.data 0.018006 # miss rate for WriteReq accesses
< system.cpu0.dcache.WriteReq_miss_rate::total 0.018006 # miss rate for WriteReq accesses
---
> system.cpu0.dcache.WriteReq_miss_rate::cpu0.data 0.017988 # miss rate for WriteReq accesses
> system.cpu0.dcache.WriteReq_miss_rate::total 0.017988 # miss rate for WriteReq accesses
406,415c406,415
< system.cpu0.dcache.WriteLineReq_miss_rate::cpu0.data 0.759470 # miss rate for WriteLineReq accesses
< system.cpu0.dcache.WriteLineReq_miss_rate::total 0.759470 # miss rate for WriteLineReq accesses
< system.cpu0.dcache.LoadLockedReq_miss_rate::cpu0.data 0.054241 # miss rate for LoadLockedReq accesses
< system.cpu0.dcache.LoadLockedReq_miss_rate::total 0.054241 # miss rate for LoadLockedReq accesses
< system.cpu0.dcache.StoreCondReq_miss_rate::cpu0.data 0.070079 # miss rate for StoreCondReq accesses
< system.cpu0.dcache.StoreCondReq_miss_rate::total 0.070079 # miss rate for StoreCondReq accesses
< system.cpu0.dcache.demand_miss_rate::cpu0.data 0.032463 # miss rate for demand accesses
< system.cpu0.dcache.demand_miss_rate::total 0.032463 # miss rate for demand accesses
< system.cpu0.dcache.overall_miss_rate::cpu0.data 0.036713 # miss rate for overall accesses
< system.cpu0.dcache.overall_miss_rate::total 0.036713 # miss rate for overall accesses
---
> system.cpu0.dcache.WriteLineReq_miss_rate::cpu0.data 0.759486 # miss rate for WriteLineReq accesses
> system.cpu0.dcache.WriteLineReq_miss_rate::total 0.759486 # miss rate for WriteLineReq accesses
> system.cpu0.dcache.LoadLockedReq_miss_rate::cpu0.data 0.054242 # miss rate for LoadLockedReq accesses
> system.cpu0.dcache.LoadLockedReq_miss_rate::total 0.054242 # miss rate for LoadLockedReq accesses
> system.cpu0.dcache.StoreCondReq_miss_rate::cpu0.data 0.070158 # miss rate for StoreCondReq accesses
> system.cpu0.dcache.StoreCondReq_miss_rate::total 0.070158 # miss rate for StoreCondReq accesses
> system.cpu0.dcache.demand_miss_rate::cpu0.data 0.032455 # miss rate for demand accesses
> system.cpu0.dcache.demand_miss_rate::total 0.032455 # miss rate for demand accesses
> system.cpu0.dcache.overall_miss_rate::cpu0.data 0.036705 # miss rate for overall accesses
> system.cpu0.dcache.overall_miss_rate::total 0.036705 # miss rate for overall accesses
422,423c422,423
< system.cpu0.dcache.writebacks::writebacks 6248912 # number of writebacks
< system.cpu0.dcache.writebacks::total 6248912 # number of writebacks
---
> system.cpu0.dcache.writebacks::writebacks 6248914 # number of writebacks
> system.cpu0.dcache.writebacks::total 6248914 # number of writebacks
425c425
< system.cpu0.icache.tags.replacements 5509619 # number of replacements
---
> system.cpu0.icache.tags.replacements 5509624 # number of replacements
427,429c427,429
< system.cpu0.icache.tags.total_refs 491225335 # Total number of references to valid blocks.
< system.cpu0.icache.tags.sampled_refs 5510131 # Sample count of references to valid blocks.
< system.cpu0.icache.tags.avg_refs 89.149484 # Average number of references to valid blocks.
---
> system.cpu0.icache.tags.total_refs 491225330 # Total number of references to valid blocks.
> system.cpu0.icache.tags.sampled_refs 5510136 # Sample count of references to valid blocks.
> system.cpu0.icache.tags.avg_refs 89.149402 # Average number of references to valid blocks.
440,441c440,441
< system.cpu0.icache.tags.tag_accesses 998981078 # Number of tag accesses
< system.cpu0.icache.tags.data_accesses 998981078 # Number of data accesses
---
> system.cpu0.icache.tags.tag_accesses 998981083 # Number of tag accesses
> system.cpu0.icache.tags.data_accesses 998981083 # Number of data accesses
443,454c443,454
< system.cpu0.icache.ReadReq_hits::cpu0.inst 491225335 # number of ReadReq hits
< system.cpu0.icache.ReadReq_hits::total 491225335 # number of ReadReq hits
< system.cpu0.icache.demand_hits::cpu0.inst 491225335 # number of demand (read+write) hits
< system.cpu0.icache.demand_hits::total 491225335 # number of demand (read+write) hits
< system.cpu0.icache.overall_hits::cpu0.inst 491225335 # number of overall hits
< system.cpu0.icache.overall_hits::total 491225335 # number of overall hits
< system.cpu0.icache.ReadReq_misses::cpu0.inst 5510136 # number of ReadReq misses
< system.cpu0.icache.ReadReq_misses::total 5510136 # number of ReadReq misses
< system.cpu0.icache.demand_misses::cpu0.inst 5510136 # number of demand (read+write) misses
< system.cpu0.icache.demand_misses::total 5510136 # number of demand (read+write) misses
< system.cpu0.icache.overall_misses::cpu0.inst 5510136 # number of overall misses
< system.cpu0.icache.overall_misses::total 5510136 # number of overall misses
---
> system.cpu0.icache.ReadReq_hits::cpu0.inst 491225330 # number of ReadReq hits
> system.cpu0.icache.ReadReq_hits::total 491225330 # number of ReadReq hits
> system.cpu0.icache.demand_hits::cpu0.inst 491225330 # number of demand (read+write) hits
> system.cpu0.icache.demand_hits::total 491225330 # number of demand (read+write) hits
> system.cpu0.icache.overall_hits::cpu0.inst 491225330 # number of overall hits
> system.cpu0.icache.overall_hits::total 491225330 # number of overall hits
> system.cpu0.icache.ReadReq_misses::cpu0.inst 5510141 # number of ReadReq misses
> system.cpu0.icache.ReadReq_misses::total 5510141 # number of ReadReq misses
> system.cpu0.icache.demand_misses::cpu0.inst 5510141 # number of demand (read+write) misses
> system.cpu0.icache.demand_misses::total 5510141 # number of demand (read+write) misses
> system.cpu0.icache.overall_misses::cpu0.inst 5510141 # number of overall misses
> system.cpu0.icache.overall_misses::total 5510141 # number of overall misses
473,474c473,474
< system.cpu0.icache.writebacks::writebacks 5509619 # number of writebacks
< system.cpu0.icache.writebacks::total 5509619 # number of writebacks
---
> system.cpu0.icache.writebacks::writebacks 5509624 # number of writebacks
> system.cpu0.icache.writebacks::total 5509624 # number of writebacks
483,487c483,487
< system.cpu0.l2cache.tags.replacements 2653803 # number of replacements
< system.cpu0.l2cache.tags.tagsinuse 16139.372932 # Cycle average of tags in use
< system.cpu0.l2cache.tags.total_refs 15525451 # Total number of references to valid blocks.
< system.cpu0.l2cache.tags.sampled_refs 2669765 # Sample count of references to valid blocks.
< system.cpu0.l2cache.tags.avg_refs 5.815287 # Average number of references to valid blocks.
---
> system.cpu0.l2cache.tags.replacements 2567589 # number of replacements
> system.cpu0.l2cache.tags.tagsinuse 15706.944975 # Cycle average of tags in use
> system.cpu0.l2cache.tags.total_refs 9429067 # Total number of references to valid blocks.
> system.cpu0.l2cache.tags.sampled_refs 2583246 # Sample count of references to valid blocks.
> system.cpu0.l2cache.tags.avg_refs 3.650085 # Average number of references to valid blocks.
489,509c489,510
< system.cpu0.l2cache.tags.occ_blocks::writebacks 16063.015838 # Average occupied blocks per requestor
< system.cpu0.l2cache.tags.occ_blocks::cpu0.dtb.walker 35.657747 # Average occupied blocks per requestor
< system.cpu0.l2cache.tags.occ_blocks::cpu0.itb.walker 40.699347 # Average occupied blocks per requestor
< system.cpu0.l2cache.tags.occ_percent::writebacks 0.980409 # Average percentage of cache occupancy
< system.cpu0.l2cache.tags.occ_percent::cpu0.dtb.walker 0.002176 # Average percentage of cache occupancy
< system.cpu0.l2cache.tags.occ_percent::cpu0.itb.walker 0.002484 # Average percentage of cache occupancy
< system.cpu0.l2cache.tags.occ_percent::total 0.985069 # Average percentage of cache occupancy
< system.cpu0.l2cache.tags.occ_task_id_blocks::1023 53 # Occupied blocks per task id
< system.cpu0.l2cache.tags.occ_task_id_blocks::1024 15909 # Occupied blocks per task id
< system.cpu0.l2cache.tags.age_task_id_blocks_1023::2 39 # Occupied blocks per task id
< system.cpu0.l2cache.tags.age_task_id_blocks_1023::3 5 # Occupied blocks per task id
< system.cpu0.l2cache.tags.age_task_id_blocks_1023::4 9 # Occupied blocks per task id
< system.cpu0.l2cache.tags.age_task_id_blocks_1024::0 238 # Occupied blocks per task id
< system.cpu0.l2cache.tags.age_task_id_blocks_1024::1 1444 # Occupied blocks per task id
< system.cpu0.l2cache.tags.age_task_id_blocks_1024::2 4368 # Occupied blocks per task id
< system.cpu0.l2cache.tags.age_task_id_blocks_1024::3 5335 # Occupied blocks per task id
< system.cpu0.l2cache.tags.age_task_id_blocks_1024::4 4524 # Occupied blocks per task id
< system.cpu0.l2cache.tags.occ_task_id_percent::1023 0.003235 # Percentage of cache occupancy per task id
< system.cpu0.l2cache.tags.occ_task_id_percent::1024 0.971008 # Percentage of cache occupancy per task id
< system.cpu0.l2cache.tags.tag_accesses 395826781 # Number of tag accesses
< system.cpu0.l2cache.tags.data_accesses 395826781 # Number of data accesses
---
> system.cpu0.l2cache.tags.occ_blocks::writebacks 15656.940594 # Average occupied blocks per requestor
> system.cpu0.l2cache.tags.occ_blocks::cpu0.dtb.walker 27.364617 # Average occupied blocks per requestor
> system.cpu0.l2cache.tags.occ_blocks::cpu0.itb.walker 22.639763 # Average occupied blocks per requestor
> system.cpu0.l2cache.tags.occ_percent::writebacks 0.955624 # Average percentage of cache occupancy
> system.cpu0.l2cache.tags.occ_percent::cpu0.dtb.walker 0.001670 # Average percentage of cache occupancy
> system.cpu0.l2cache.tags.occ_percent::cpu0.itb.walker 0.001382 # Average percentage of cache occupancy
> system.cpu0.l2cache.tags.occ_percent::total 0.958676 # Average percentage of cache occupancy
> system.cpu0.l2cache.tags.occ_task_id_blocks::1023 57 # Occupied blocks per task id
> system.cpu0.l2cache.tags.occ_task_id_blocks::1024 15600 # Occupied blocks per task id
> system.cpu0.l2cache.tags.age_task_id_blocks_1023::1 2 # Occupied blocks per task id
> system.cpu0.l2cache.tags.age_task_id_blocks_1023::2 41 # Occupied blocks per task id
> system.cpu0.l2cache.tags.age_task_id_blocks_1023::3 8 # Occupied blocks per task id
> system.cpu0.l2cache.tags.age_task_id_blocks_1023::4 6 # Occupied blocks per task id
> system.cpu0.l2cache.tags.age_task_id_blocks_1024::0 421 # Occupied blocks per task id
> system.cpu0.l2cache.tags.age_task_id_blocks_1024::1 2091 # Occupied blocks per task id
> system.cpu0.l2cache.tags.age_task_id_blocks_1024::2 5339 # Occupied blocks per task id
> system.cpu0.l2cache.tags.age_task_id_blocks_1024::3 5411 # Occupied blocks per task id
> system.cpu0.l2cache.tags.age_task_id_blocks_1024::4 2338 # Occupied blocks per task id
> system.cpu0.l2cache.tags.occ_task_id_percent::1023 0.003479 # Percentage of cache occupancy per task id
> system.cpu0.l2cache.tags.occ_task_id_percent::1024 0.952148 # Percentage of cache occupancy per task id
> system.cpu0.l2cache.tags.tag_accesses 401859473 # Number of tag accesses
> system.cpu0.l2cache.tags.data_accesses 401859473 # Number of data accesses
511,573c512,572
< system.cpu0.l2cache.ReadReq_hits::cpu0.dtb.walker 296735 # number of ReadReq hits
< system.cpu0.l2cache.ReadReq_hits::cpu0.itb.walker 157755 # number of ReadReq hits
< system.cpu0.l2cache.ReadReq_hits::total 454490 # number of ReadReq hits
< system.cpu0.l2cache.WritebackDirty_hits::writebacks 4439476 # number of WritebackDirty hits
< system.cpu0.l2cache.WritebackDirty_hits::total 4439476 # number of WritebackDirty hits
< system.cpu0.l2cache.WritebackClean_hits::writebacks 7317657 # number of WritebackClean hits
< system.cpu0.l2cache.WritebackClean_hits::total 7317657 # number of WritebackClean hits
< system.cpu0.l2cache.UpgradeReq_hits::cpu0.data 746 # number of UpgradeReq hits
< system.cpu0.l2cache.UpgradeReq_hits::total 746 # number of UpgradeReq hits
< system.cpu0.l2cache.ReadExReq_hits::cpu0.data 639086 # number of ReadExReq hits
< system.cpu0.l2cache.ReadExReq_hits::total 639086 # number of ReadExReq hits
< system.cpu0.l2cache.ReadCleanReq_hits::cpu0.inst 5010934 # number of ReadCleanReq hits
< system.cpu0.l2cache.ReadCleanReq_hits::total 5010934 # number of ReadCleanReq hits
< system.cpu0.l2cache.ReadSharedReq_hits::cpu0.data 2954772 # number of ReadSharedReq hits
< system.cpu0.l2cache.ReadSharedReq_hits::total 2954772 # number of ReadSharedReq hits
< system.cpu0.l2cache.InvalidateReq_hits::cpu0.data 221315 # number of InvalidateReq hits
< system.cpu0.l2cache.InvalidateReq_hits::total 221315 # number of InvalidateReq hits
< system.cpu0.l2cache.demand_hits::cpu0.dtb.walker 296735 # number of demand (read+write) hits
< system.cpu0.l2cache.demand_hits::cpu0.itb.walker 157755 # number of demand (read+write) hits
< system.cpu0.l2cache.demand_hits::cpu0.inst 5010934 # number of demand (read+write) hits
< system.cpu0.l2cache.demand_hits::cpu0.data 3593858 # number of demand (read+write) hits
< system.cpu0.l2cache.demand_hits::total 9059282 # number of demand (read+write) hits
< system.cpu0.l2cache.overall_hits::cpu0.dtb.walker 296735 # number of overall hits
< system.cpu0.l2cache.overall_hits::cpu0.itb.walker 157755 # number of overall hits
< system.cpu0.l2cache.overall_hits::cpu0.inst 5010934 # number of overall hits
< system.cpu0.l2cache.overall_hits::cpu0.data 3593858 # number of overall hits
< system.cpu0.l2cache.overall_hits::total 9059282 # number of overall hits
< system.cpu0.l2cache.ReadReq_misses::cpu0.dtb.walker 11441 # number of ReadReq misses
< system.cpu0.l2cache.ReadReq_misses::cpu0.itb.walker 8530 # number of ReadReq misses
< system.cpu0.l2cache.ReadReq_misses::total 19971 # number of ReadReq misses
< system.cpu0.l2cache.UpgradeReq_misses::cpu0.data 138499 # number of UpgradeReq misses
< system.cpu0.l2cache.UpgradeReq_misses::total 138499 # number of UpgradeReq misses
< system.cpu0.l2cache.SCUpgradeReq_misses::cpu0.data 154638 # number of SCUpgradeReq misses
< system.cpu0.l2cache.SCUpgradeReq_misses::total 154638 # number of SCUpgradeReq misses
< system.cpu0.l2cache.ReadExReq_misses::cpu0.data 701212 # number of ReadExReq misses
< system.cpu0.l2cache.ReadExReq_misses::total 701212 # number of ReadExReq misses
< system.cpu0.l2cache.ReadCleanReq_misses::cpu0.inst 499202 # number of ReadCleanReq misses
< system.cpu0.l2cache.ReadCleanReq_misses::total 499202 # number of ReadCleanReq misses
< system.cpu0.l2cache.ReadSharedReq_misses::cpu0.data 1232962 # number of ReadSharedReq misses
< system.cpu0.l2cache.ReadSharedReq_misses::total 1232962 # number of ReadSharedReq misses
< system.cpu0.l2cache.InvalidateReq_misses::cpu0.data 602526 # number of InvalidateReq misses
< system.cpu0.l2cache.InvalidateReq_misses::total 602526 # number of InvalidateReq misses
< system.cpu0.l2cache.demand_misses::cpu0.dtb.walker 11441 # number of demand (read+write) misses
< system.cpu0.l2cache.demand_misses::cpu0.itb.walker 8530 # number of demand (read+write) misses
< system.cpu0.l2cache.demand_misses::cpu0.inst 499202 # number of demand (read+write) misses
< system.cpu0.l2cache.demand_misses::cpu0.data 1934174 # number of demand (read+write) misses
< system.cpu0.l2cache.demand_misses::total 2453347 # number of demand (read+write) misses
< system.cpu0.l2cache.overall_misses::cpu0.dtb.walker 11441 # number of overall misses
< system.cpu0.l2cache.overall_misses::cpu0.itb.walker 8530 # number of overall misses
< system.cpu0.l2cache.overall_misses::cpu0.inst 499202 # number of overall misses
< system.cpu0.l2cache.overall_misses::cpu0.data 1934174 # number of overall misses
< system.cpu0.l2cache.overall_misses::total 2453347 # number of overall misses
< system.cpu0.l2cache.ReadReq_accesses::cpu0.dtb.walker 308176 # number of ReadReq accesses(hits+misses)
< system.cpu0.l2cache.ReadReq_accesses::cpu0.itb.walker 166285 # number of ReadReq accesses(hits+misses)
< system.cpu0.l2cache.ReadReq_accesses::total 474461 # number of ReadReq accesses(hits+misses)
< system.cpu0.l2cache.WritebackDirty_accesses::writebacks 4439476 # number of WritebackDirty accesses(hits+misses)
< system.cpu0.l2cache.WritebackDirty_accesses::total 4439476 # number of WritebackDirty accesses(hits+misses)
< system.cpu0.l2cache.WritebackClean_accesses::writebacks 7317657 # number of WritebackClean accesses(hits+misses)
< system.cpu0.l2cache.WritebackClean_accesses::total 7317657 # number of WritebackClean accesses(hits+misses)
< system.cpu0.l2cache.UpgradeReq_accesses::cpu0.data 139245 # number of UpgradeReq accesses(hits+misses)
< system.cpu0.l2cache.UpgradeReq_accesses::total 139245 # number of UpgradeReq accesses(hits+misses)
< system.cpu0.l2cache.SCUpgradeReq_accesses::cpu0.data 154638 # number of SCUpgradeReq accesses(hits+misses)
< system.cpu0.l2cache.SCUpgradeReq_accesses::total 154638 # number of SCUpgradeReq accesses(hits+misses)
---
> system.cpu0.l2cache.ReadReq_hits::cpu0.dtb.walker 287369 # number of ReadReq hits
> system.cpu0.l2cache.ReadReq_hits::cpu0.itb.walker 155522 # number of ReadReq hits
> system.cpu0.l2cache.ReadReq_hits::total 442891 # number of ReadReq hits
> system.cpu0.l2cache.WritebackDirty_hits::writebacks 4441046 # number of WritebackDirty hits
> system.cpu0.l2cache.WritebackDirty_hits::total 4441046 # number of WritebackDirty hits
> system.cpu0.l2cache.WritebackClean_hits::writebacks 7316094 # number of WritebackClean hits
> system.cpu0.l2cache.WritebackClean_hits::total 7316094 # number of WritebackClean hits
> system.cpu0.l2cache.ReadExReq_hits::cpu0.data 640560 # number of ReadExReq hits
> system.cpu0.l2cache.ReadExReq_hits::total 640560 # number of ReadExReq hits
> system.cpu0.l2cache.ReadCleanReq_hits::cpu0.inst 5011469 # number of ReadCleanReq hits
> system.cpu0.l2cache.ReadCleanReq_hits::total 5011469 # number of ReadCleanReq hits
> system.cpu0.l2cache.ReadSharedReq_hits::cpu0.data 2961462 # number of ReadSharedReq hits
> system.cpu0.l2cache.ReadSharedReq_hits::total 2961462 # number of ReadSharedReq hits
> system.cpu0.l2cache.InvalidateReq_hits::cpu0.data 222733 # number of InvalidateReq hits
> system.cpu0.l2cache.InvalidateReq_hits::total 222733 # number of InvalidateReq hits
> system.cpu0.l2cache.demand_hits::cpu0.dtb.walker 287369 # number of demand (read+write) hits
> system.cpu0.l2cache.demand_hits::cpu0.itb.walker 155522 # number of demand (read+write) hits
> system.cpu0.l2cache.demand_hits::cpu0.inst 5011469 # number of demand (read+write) hits
> system.cpu0.l2cache.demand_hits::cpu0.data 3602022 # number of demand (read+write) hits
> system.cpu0.l2cache.demand_hits::total 9056382 # number of demand (read+write) hits
> system.cpu0.l2cache.overall_hits::cpu0.dtb.walker 287369 # number of overall hits
> system.cpu0.l2cache.overall_hits::cpu0.itb.walker 155522 # number of overall hits
> system.cpu0.l2cache.overall_hits::cpu0.inst 5011469 # number of overall hits
> system.cpu0.l2cache.overall_hits::cpu0.data 3602022 # number of overall hits
> system.cpu0.l2cache.overall_hits::total 9056382 # number of overall hits
> system.cpu0.l2cache.ReadReq_misses::cpu0.dtb.walker 20057 # number of ReadReq misses
> system.cpu0.l2cache.ReadReq_misses::cpu0.itb.walker 9858 # number of ReadReq misses
> system.cpu0.l2cache.ReadReq_misses::total 29915 # number of ReadReq misses
> system.cpu0.l2cache.UpgradeReq_misses::cpu0.data 137835 # number of UpgradeReq misses
> system.cpu0.l2cache.UpgradeReq_misses::total 137835 # number of UpgradeReq misses
> system.cpu0.l2cache.SCUpgradeReq_misses::cpu0.data 154814 # number of SCUpgradeReq misses
> system.cpu0.l2cache.SCUpgradeReq_misses::total 154814 # number of SCUpgradeReq misses
> system.cpu0.l2cache.ReadExReq_misses::cpu0.data 699738 # number of ReadExReq misses
> system.cpu0.l2cache.ReadExReq_misses::total 699738 # number of ReadExReq misses
> system.cpu0.l2cache.ReadCleanReq_misses::cpu0.inst 498672 # number of ReadCleanReq misses
> system.cpu0.l2cache.ReadCleanReq_misses::total 498672 # number of ReadCleanReq misses
> system.cpu0.l2cache.ReadSharedReq_misses::cpu0.data 1226274 # number of ReadSharedReq misses
> system.cpu0.l2cache.ReadSharedReq_misses::total 1226274 # number of ReadSharedReq misses
> system.cpu0.l2cache.InvalidateReq_misses::cpu0.data 601108 # number of InvalidateReq misses
> system.cpu0.l2cache.InvalidateReq_misses::total 601108 # number of InvalidateReq misses
> system.cpu0.l2cache.demand_misses::cpu0.dtb.walker 20057 # number of demand (read+write) misses
> system.cpu0.l2cache.demand_misses::cpu0.itb.walker 9858 # number of demand (read+write) misses
> system.cpu0.l2cache.demand_misses::cpu0.inst 498672 # number of demand (read+write) misses
> system.cpu0.l2cache.demand_misses::cpu0.data 1926012 # number of demand (read+write) misses
> system.cpu0.l2cache.demand_misses::total 2454599 # number of demand (read+write) misses
> system.cpu0.l2cache.overall_misses::cpu0.dtb.walker 20057 # number of overall misses
> system.cpu0.l2cache.overall_misses::cpu0.itb.walker 9858 # number of overall misses
> system.cpu0.l2cache.overall_misses::cpu0.inst 498672 # number of overall misses
> system.cpu0.l2cache.overall_misses::cpu0.data 1926012 # number of overall misses
> system.cpu0.l2cache.overall_misses::total 2454599 # number of overall misses
> system.cpu0.l2cache.ReadReq_accesses::cpu0.dtb.walker 307426 # number of ReadReq accesses(hits+misses)
> system.cpu0.l2cache.ReadReq_accesses::cpu0.itb.walker 165380 # number of ReadReq accesses(hits+misses)
> system.cpu0.l2cache.ReadReq_accesses::total 472806 # number of ReadReq accesses(hits+misses)
> system.cpu0.l2cache.WritebackDirty_accesses::writebacks 4441046 # number of WritebackDirty accesses(hits+misses)
> system.cpu0.l2cache.WritebackDirty_accesses::total 4441046 # number of WritebackDirty accesses(hits+misses)
> system.cpu0.l2cache.WritebackClean_accesses::writebacks 7316094 # number of WritebackClean accesses(hits+misses)
> system.cpu0.l2cache.WritebackClean_accesses::total 7316094 # number of WritebackClean accesses(hits+misses)
> system.cpu0.l2cache.UpgradeReq_accesses::cpu0.data 137835 # number of UpgradeReq accesses(hits+misses)
> system.cpu0.l2cache.UpgradeReq_accesses::total 137835 # number of UpgradeReq accesses(hits+misses)
> system.cpu0.l2cache.SCUpgradeReq_accesses::cpu0.data 154814 # number of SCUpgradeReq accesses(hits+misses)
> system.cpu0.l2cache.SCUpgradeReq_accesses::total 154814 # number of SCUpgradeReq accesses(hits+misses)
576,579c575,578
< system.cpu0.l2cache.ReadCleanReq_accesses::cpu0.inst 5510136 # number of ReadCleanReq accesses(hits+misses)
< system.cpu0.l2cache.ReadCleanReq_accesses::total 5510136 # number of ReadCleanReq accesses(hits+misses)
< system.cpu0.l2cache.ReadSharedReq_accesses::cpu0.data 4187734 # number of ReadSharedReq accesses(hits+misses)
< system.cpu0.l2cache.ReadSharedReq_accesses::total 4187734 # number of ReadSharedReq accesses(hits+misses)
---
> system.cpu0.l2cache.ReadCleanReq_accesses::cpu0.inst 5510141 # number of ReadCleanReq accesses(hits+misses)
> system.cpu0.l2cache.ReadCleanReq_accesses::total 5510141 # number of ReadCleanReq accesses(hits+misses)
> system.cpu0.l2cache.ReadSharedReq_accesses::cpu0.data 4187736 # number of ReadSharedReq accesses(hits+misses)
> system.cpu0.l2cache.ReadSharedReq_accesses::total 4187736 # number of ReadSharedReq accesses(hits+misses)
582,596c581,595
< system.cpu0.l2cache.demand_accesses::cpu0.dtb.walker 308176 # number of demand (read+write) accesses
< system.cpu0.l2cache.demand_accesses::cpu0.itb.walker 166285 # number of demand (read+write) accesses
< system.cpu0.l2cache.demand_accesses::cpu0.inst 5510136 # number of demand (read+write) accesses
< system.cpu0.l2cache.demand_accesses::cpu0.data 5528032 # number of demand (read+write) accesses
< system.cpu0.l2cache.demand_accesses::total 11512629 # number of demand (read+write) accesses
< system.cpu0.l2cache.overall_accesses::cpu0.dtb.walker 308176 # number of overall (read+write) accesses
< system.cpu0.l2cache.overall_accesses::cpu0.itb.walker 166285 # number of overall (read+write) accesses
< system.cpu0.l2cache.overall_accesses::cpu0.inst 5510136 # number of overall (read+write) accesses
< system.cpu0.l2cache.overall_accesses::cpu0.data 5528032 # number of overall (read+write) accesses
< system.cpu0.l2cache.overall_accesses::total 11512629 # number of overall (read+write) accesses
< system.cpu0.l2cache.ReadReq_miss_rate::cpu0.dtb.walker 0.037125 # miss rate for ReadReq accesses
< system.cpu0.l2cache.ReadReq_miss_rate::cpu0.itb.walker 0.051297 # miss rate for ReadReq accesses
< system.cpu0.l2cache.ReadReq_miss_rate::total 0.042092 # miss rate for ReadReq accesses
< system.cpu0.l2cache.UpgradeReq_miss_rate::cpu0.data 0.994643 # miss rate for UpgradeReq accesses
< system.cpu0.l2cache.UpgradeReq_miss_rate::total 0.994643 # miss rate for UpgradeReq accesses
---
> system.cpu0.l2cache.demand_accesses::cpu0.dtb.walker 307426 # number of demand (read+write) accesses
> system.cpu0.l2cache.demand_accesses::cpu0.itb.walker 165380 # number of demand (read+write) accesses
> system.cpu0.l2cache.demand_accesses::cpu0.inst 5510141 # number of demand (read+write) accesses
> system.cpu0.l2cache.demand_accesses::cpu0.data 5528034 # number of demand (read+write) accesses
> system.cpu0.l2cache.demand_accesses::total 11510981 # number of demand (read+write) accesses
> system.cpu0.l2cache.overall_accesses::cpu0.dtb.walker 307426 # number of overall (read+write) accesses
> system.cpu0.l2cache.overall_accesses::cpu0.itb.walker 165380 # number of overall (read+write) accesses
> system.cpu0.l2cache.overall_accesses::cpu0.inst 5510141 # number of overall (read+write) accesses
> system.cpu0.l2cache.overall_accesses::cpu0.data 5528034 # number of overall (read+write) accesses
> system.cpu0.l2cache.overall_accesses::total 11510981 # number of overall (read+write) accesses
> system.cpu0.l2cache.ReadReq_miss_rate::cpu0.dtb.walker 0.065242 # miss rate for ReadReq accesses
> system.cpu0.l2cache.ReadReq_miss_rate::cpu0.itb.walker 0.059608 # miss rate for ReadReq accesses
> system.cpu0.l2cache.ReadReq_miss_rate::total 0.063271 # miss rate for ReadReq accesses
> system.cpu0.l2cache.UpgradeReq_miss_rate::cpu0.data 1 # miss rate for UpgradeReq accesses
> system.cpu0.l2cache.UpgradeReq_miss_rate::total 1 # miss rate for UpgradeReq accesses
599,616c598,615
< system.cpu0.l2cache.ReadExReq_miss_rate::cpu0.data 0.523176 # miss rate for ReadExReq accesses
< system.cpu0.l2cache.ReadExReq_miss_rate::total 0.523176 # miss rate for ReadExReq accesses
< system.cpu0.l2cache.ReadCleanReq_miss_rate::cpu0.inst 0.090597 # miss rate for ReadCleanReq accesses
< system.cpu0.l2cache.ReadCleanReq_miss_rate::total 0.090597 # miss rate for ReadCleanReq accesses
< system.cpu0.l2cache.ReadSharedReq_miss_rate::cpu0.data 0.294422 # miss rate for ReadSharedReq accesses
< system.cpu0.l2cache.ReadSharedReq_miss_rate::total 0.294422 # miss rate for ReadSharedReq accesses
< system.cpu0.l2cache.InvalidateReq_miss_rate::cpu0.data 0.731362 # miss rate for InvalidateReq accesses
< system.cpu0.l2cache.InvalidateReq_miss_rate::total 0.731362 # miss rate for InvalidateReq accesses
< system.cpu0.l2cache.demand_miss_rate::cpu0.dtb.walker 0.037125 # miss rate for demand accesses
< system.cpu0.l2cache.demand_miss_rate::cpu0.itb.walker 0.051297 # miss rate for demand accesses
< system.cpu0.l2cache.demand_miss_rate::cpu0.inst 0.090597 # miss rate for demand accesses
< system.cpu0.l2cache.demand_miss_rate::cpu0.data 0.349885 # miss rate for demand accesses
< system.cpu0.l2cache.demand_miss_rate::total 0.213101 # miss rate for demand accesses
< system.cpu0.l2cache.overall_miss_rate::cpu0.dtb.walker 0.037125 # miss rate for overall accesses
< system.cpu0.l2cache.overall_miss_rate::cpu0.itb.walker 0.051297 # miss rate for overall accesses
< system.cpu0.l2cache.overall_miss_rate::cpu0.inst 0.090597 # miss rate for overall accesses
< system.cpu0.l2cache.overall_miss_rate::cpu0.data 0.349885 # miss rate for overall accesses
< system.cpu0.l2cache.overall_miss_rate::total 0.213101 # miss rate for overall accesses
---
> system.cpu0.l2cache.ReadExReq_miss_rate::cpu0.data 0.522076 # miss rate for ReadExReq accesses
> system.cpu0.l2cache.ReadExReq_miss_rate::total 0.522076 # miss rate for ReadExReq accesses
> system.cpu0.l2cache.ReadCleanReq_miss_rate::cpu0.inst 0.090501 # miss rate for ReadCleanReq accesses
> system.cpu0.l2cache.ReadCleanReq_miss_rate::total 0.090501 # miss rate for ReadCleanReq accesses
> system.cpu0.l2cache.ReadSharedReq_miss_rate::cpu0.data 0.292825 # miss rate for ReadSharedReq accesses
> system.cpu0.l2cache.ReadSharedReq_miss_rate::total 0.292825 # miss rate for ReadSharedReq accesses
> system.cpu0.l2cache.InvalidateReq_miss_rate::cpu0.data 0.729641 # miss rate for InvalidateReq accesses
> system.cpu0.l2cache.InvalidateReq_miss_rate::total 0.729641 # miss rate for InvalidateReq accesses
> system.cpu0.l2cache.demand_miss_rate::cpu0.dtb.walker 0.065242 # miss rate for demand accesses
> system.cpu0.l2cache.demand_miss_rate::cpu0.itb.walker 0.059608 # miss rate for demand accesses
> system.cpu0.l2cache.demand_miss_rate::cpu0.inst 0.090501 # miss rate for demand accesses
> system.cpu0.l2cache.demand_miss_rate::cpu0.data 0.348408 # miss rate for demand accesses
> system.cpu0.l2cache.demand_miss_rate::total 0.213240 # miss rate for demand accesses
> system.cpu0.l2cache.overall_miss_rate::cpu0.dtb.walker 0.065242 # miss rate for overall accesses
> system.cpu0.l2cache.overall_miss_rate::cpu0.itb.walker 0.059608 # miss rate for overall accesses
> system.cpu0.l2cache.overall_miss_rate::cpu0.inst 0.090501 # miss rate for overall accesses
> system.cpu0.l2cache.overall_miss_rate::cpu0.data 0.348408 # miss rate for overall accesses
> system.cpu0.l2cache.overall_miss_rate::total 0.213240 # miss rate for overall accesses
623,626c622,625
< system.cpu0.l2cache.writebacks::writebacks 1559963 # number of writebacks
< system.cpu0.l2cache.writebacks::total 1559963 # number of writebacks
< system.cpu0.toL2Bus.snoop_filter.tot_requests 24176858 # Total number of requests made to the snoop filter.
< system.cpu0.toL2Bus.snoop_filter.hit_single_requests 12314856 # Number of requests hitting in the snoop filter with a single holder of the requested data.
---
> system.cpu0.l2cache.writebacks::writebacks 1552940 # number of writebacks
> system.cpu0.l2cache.writebacks::total 1552940 # number of writebacks
> system.cpu0.toL2Bus.snoop_filter.tot_requests 24175638 # Total number of requests made to the snoop filter.
> system.cpu0.toL2Bus.snoop_filter.hit_single_requests 12313629 # Number of requests hitting in the snoop filter with a single holder of the requested data.
628,630c627,629
< system.cpu0.toL2Bus.snoop_filter.tot_snoops 1775409 # Total number of snoops made to the snoop filter.
< system.cpu0.toL2Bus.snoop_filter.hit_single_snoops 1775098 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
< system.cpu0.toL2Bus.snoop_filter.hit_multi_snoops 311 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
---
> system.cpu0.toL2Bus.snoop_filter.tot_snoops 303605 # Total number of snoops made to the snoop filter.
> system.cpu0.toL2Bus.snoop_filter.hit_single_snoops 303605 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
> system.cpu0.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
633c632
< system.cpu0.toL2Bus.trans_dist::ReadResp 10320487 # Transaction distribution
---
> system.cpu0.toL2Bus.trans_dist::ReadResp 10320494 # Transaction distribution
636,640c635,639
< system.cpu0.toL2Bus.trans_dist::WritebackDirty 4439476 # Transaction distribution
< system.cpu0.toL2Bus.trans_dist::WritebackClean 7319055 # Transaction distribution
< system.cpu0.toL2Bus.trans_dist::UpgradeReq 139245 # Transaction distribution
< system.cpu0.toL2Bus.trans_dist::SCUpgradeReq 154638 # Transaction distribution
< system.cpu0.toL2Bus.trans_dist::UpgradeResp 293883 # Transaction distribution
---
> system.cpu0.toL2Bus.trans_dist::WritebackDirty 4441046 # Transaction distribution
> system.cpu0.toL2Bus.trans_dist::WritebackClean 7317492 # Transaction distribution
> system.cpu0.toL2Bus.trans_dist::UpgradeReq 137835 # Transaction distribution
> system.cpu0.toL2Bus.trans_dist::SCUpgradeReq 154814 # Transaction distribution
> system.cpu0.toL2Bus.trans_dist::UpgradeResp 292649 # Transaction distribution
643,644c642,643
< system.cpu0.toL2Bus.trans_dist::ReadCleanReq 5510136 # Transaction distribution
< system.cpu0.toL2Bus.trans_dist::ReadSharedReq 4187734 # Transaction distribution
---
> system.cpu0.toL2Bus.trans_dist::ReadCleanReq 5510141 # Transaction distribution
> system.cpu0.toL2Bus.trans_dist::ReadSharedReq 4187736 # Transaction distribution
647,648c646,647
< system.cpu0.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.cpu0.l2cache.cpu_side 16616141 # Packet count per connected master and slave (bytes)
< system.cpu0.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.cpu0.l2cache.cpu_side 19673024 # Packet count per connected master and slave (bytes)
---
> system.cpu0.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.cpu0.l2cache.cpu_side 16616156 # Packet count per connected master and slave (bytes)
> system.cpu0.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.cpu0.l2cache.cpu_side 19670562 # Packet count per connected master and slave (bytes)
651,653c650,652
< system.cpu0.toL2Bus.pkt_count::total 37382017 # Packet count per connected master and slave (bytes)
< system.cpu0.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.cpu0.l2cache.cpu_side 705436820 # Cumulative packet size per connected master and slave (bytes)
< system.cpu0.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.cpu0.l2cache.cpu_side 753922812 # Cumulative packet size per connected master and slave (bytes)
---
> system.cpu0.toL2Bus.pkt_count::total 37379570 # Packet count per connected master and slave (bytes)
> system.cpu0.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.cpu0.l2cache.cpu_side 705437460 # Cumulative packet size per connected master and slave (bytes)
> system.cpu0.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.cpu0.l2cache.cpu_side 753923068 # Cumulative packet size per connected master and slave (bytes)
656,661c655,660
< system.cpu0.toL2Bus.pkt_size::total 1463731040 # Cumulative packet size per connected master and slave (bytes)
< system.cpu0.toL2Bus.snoops 6082125 # Total snoops (count)
< system.cpu0.toL2Bus.snoopTraffic 101619328 # Total snoop traffic (bytes)
< system.cpu0.toL2Bus.snoop_fanout::samples 30471409 # Request fanout histogram
< system.cpu0.toL2Bus.snoop_fanout::mean 0.066979 # Request fanout histogram
< system.cpu0.toL2Bus.snoop_fanout::stdev 0.250027 # Request fanout histogram
---
> system.cpu0.toL2Bus.pkt_size::total 1463731936 # Cumulative packet size per connected master and slave (bytes)
> system.cpu0.toL2Bus.snoops 4670427 # Total snoops (count)
> system.cpu0.toL2Bus.snoopTraffic 101174852 # Total snoop traffic (bytes)
> system.cpu0.toL2Bus.snoop_fanout::samples 29058250 # Request fanout histogram
> system.cpu0.toL2Bus.snoop_fanout::mean 0.019576 # Request fanout histogram
> system.cpu0.toL2Bus.snoop_fanout::stdev 0.138538 # Request fanout histogram
663,665c662,664
< system.cpu0.toL2Bus.snoop_fanout::0 28430762 93.30% 93.30% # Request fanout histogram
< system.cpu0.toL2Bus.snoop_fanout::1 2040336 6.70% 100.00% # Request fanout histogram
< system.cpu0.toL2Bus.snoop_fanout::2 311 0.00% 100.00% # Request fanout histogram
---
> system.cpu0.toL2Bus.snoop_fanout::0 28489407 98.04% 98.04% # Request fanout histogram
> system.cpu0.toL2Bus.snoop_fanout::1 568843 1.96% 100.00% # Request fanout histogram
> system.cpu0.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
668,669c667,668
< system.cpu0.toL2Bus.snoop_fanout::max_value 2 # Request fanout histogram
< system.cpu0.toL2Bus.snoop_fanout::total 30471409 # Request fanout histogram
---
> system.cpu0.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram
> system.cpu0.toL2Bus.snoop_fanout::total 29058250 # Request fanout histogram
891c890
< system.cpu1.dcache.tags.replacements 5970882 # number of replacements
---
> system.cpu1.dcache.tags.replacements 5970884 # number of replacements
893,895c892,894
< system.cpu1.dcache.tags.total_refs 166384450 # Total number of references to valid blocks.
< system.cpu1.dcache.tags.sampled_refs 5971393 # Sample count of references to valid blocks.
< system.cpu1.dcache.tags.avg_refs 27.863591 # Average number of references to valid blocks.
---
> system.cpu1.dcache.tags.total_refs 166384448 # Total number of references to valid blocks.
> system.cpu1.dcache.tags.sampled_refs 5971395 # Sample count of references to valid blocks.
> system.cpu1.dcache.tags.avg_refs 27.863581 # Average number of references to valid blocks.
905,906c904,905
< system.cpu1.dcache.tags.tag_accesses 350957209 # Number of tag accesses
< system.cpu1.dcache.tags.data_accesses 350957209 # Number of data accesses
---
> system.cpu1.dcache.tags.tag_accesses 350957211 # Number of tag accesses
> system.cpu1.dcache.tags.data_accesses 350957211 # Number of data accesses
908,911c907,910
< system.cpu1.dcache.ReadReq_hits::cpu1.data 84198599 # number of ReadReq hits
< system.cpu1.dcache.ReadReq_hits::total 84198599 # number of ReadReq hits
< system.cpu1.dcache.WriteReq_hits::cpu1.data 77532107 # number of WriteReq hits
< system.cpu1.dcache.WriteReq_hits::total 77532107 # number of WriteReq hits
---
> system.cpu1.dcache.ReadReq_hits::cpu1.data 84198598 # number of ReadReq hits
> system.cpu1.dcache.ReadReq_hits::total 84198598 # number of ReadReq hits
> system.cpu1.dcache.WriteReq_hits::cpu1.data 77531561 # number of WriteReq hits
> system.cpu1.dcache.WriteReq_hits::total 77531561 # number of WriteReq hits
914,927c913,926
< system.cpu1.dcache.WriteLineReq_hits::cpu1.data 64879 # number of WriteLineReq hits
< system.cpu1.dcache.WriteLineReq_hits::total 64879 # number of WriteLineReq hits
< system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 2055501 # number of LoadLockedReq hits
< system.cpu1.dcache.LoadLockedReq_hits::total 2055501 # number of LoadLockedReq hits
< system.cpu1.dcache.StoreCondReq_hits::cpu1.data 2044925 # number of StoreCondReq hits
< system.cpu1.dcache.StoreCondReq_hits::total 2044925 # number of StoreCondReq hits
< system.cpu1.dcache.demand_hits::cpu1.data 161795585 # number of demand (read+write) hits
< system.cpu1.dcache.demand_hits::total 161795585 # number of demand (read+write) hits
< system.cpu1.dcache.overall_hits::cpu1.data 161982848 # number of overall hits
< system.cpu1.dcache.overall_hits::total 161982848 # number of overall hits
< system.cpu1.dcache.ReadReq_misses::cpu1.data 3367289 # number of ReadReq misses
< system.cpu1.dcache.ReadReq_misses::total 3367289 # number of ReadReq misses
< system.cpu1.dcache.WriteReq_misses::cpu1.data 1465578 # number of WriteReq misses
< system.cpu1.dcache.WriteReq_misses::total 1465578 # number of WriteReq misses
---
> system.cpu1.dcache.WriteLineReq_hits::cpu1.data 64886 # number of WriteLineReq hits
> system.cpu1.dcache.WriteLineReq_hits::total 64886 # number of WriteLineReq hits
> system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 2055500 # number of LoadLockedReq hits
> system.cpu1.dcache.LoadLockedReq_hits::total 2055500 # number of LoadLockedReq hits
> system.cpu1.dcache.StoreCondReq_hits::cpu1.data 2044725 # number of StoreCondReq hits
> system.cpu1.dcache.StoreCondReq_hits::total 2044725 # number of StoreCondReq hits
> system.cpu1.dcache.demand_hits::cpu1.data 161795045 # number of demand (read+write) hits
> system.cpu1.dcache.demand_hits::total 161795045 # number of demand (read+write) hits
> system.cpu1.dcache.overall_hits::cpu1.data 161982308 # number of overall hits
> system.cpu1.dcache.overall_hits::total 161982308 # number of overall hits
> system.cpu1.dcache.ReadReq_misses::cpu1.data 3367290 # number of ReadReq misses
> system.cpu1.dcache.ReadReq_misses::total 3367290 # number of ReadReq misses
> system.cpu1.dcache.WriteReq_misses::cpu1.data 1466124 # number of WriteReq misses
> system.cpu1.dcache.WriteReq_misses::total 1466124 # number of WriteReq misses
930,939c929,938
< system.cpu1.dcache.WriteLineReq_misses::cpu1.data 433878 # number of WriteLineReq misses
< system.cpu1.dcache.WriteLineReq_misses::total 433878 # number of WriteLineReq misses
< system.cpu1.dcache.LoadLockedReq_misses::cpu1.data 147104 # number of LoadLockedReq misses
< system.cpu1.dcache.LoadLockedReq_misses::total 147104 # number of LoadLockedReq misses
< system.cpu1.dcache.StoreCondReq_misses::cpu1.data 156474 # number of StoreCondReq misses
< system.cpu1.dcache.StoreCondReq_misses::total 156474 # number of StoreCondReq misses
< system.cpu1.dcache.demand_misses::cpu1.data 5266745 # number of demand (read+write) misses
< system.cpu1.dcache.demand_misses::total 5266745 # number of demand (read+write) misses
< system.cpu1.dcache.overall_misses::cpu1.data 6060368 # number of overall misses
< system.cpu1.dcache.overall_misses::total 6060368 # number of overall misses
---
> system.cpu1.dcache.WriteLineReq_misses::cpu1.data 433871 # number of WriteLineReq misses
> system.cpu1.dcache.WriteLineReq_misses::total 433871 # number of WriteLineReq misses
> system.cpu1.dcache.LoadLockedReq_misses::cpu1.data 147105 # number of LoadLockedReq misses
> system.cpu1.dcache.LoadLockedReq_misses::total 147105 # number of LoadLockedReq misses
> system.cpu1.dcache.StoreCondReq_misses::cpu1.data 156674 # number of StoreCondReq misses
> system.cpu1.dcache.StoreCondReq_misses::total 156674 # number of StoreCondReq misses
> system.cpu1.dcache.demand_misses::cpu1.data 5267285 # number of demand (read+write) misses
> system.cpu1.dcache.demand_misses::total 5267285 # number of demand (read+write) misses
> system.cpu1.dcache.overall_misses::cpu1.data 6060908 # number of overall misses
> system.cpu1.dcache.overall_misses::total 6060908 # number of overall misses
958,959c957,958
< system.cpu1.dcache.WriteReq_miss_rate::cpu1.data 0.018552 # miss rate for WriteReq accesses
< system.cpu1.dcache.WriteReq_miss_rate::total 0.018552 # miss rate for WriteReq accesses
---
> system.cpu1.dcache.WriteReq_miss_rate::cpu1.data 0.018559 # miss rate for WriteReq accesses
> system.cpu1.dcache.WriteReq_miss_rate::total 0.018559 # miss rate for WriteReq accesses
962,971c961,970
< system.cpu1.dcache.WriteLineReq_miss_rate::cpu1.data 0.869919 # miss rate for WriteLineReq accesses
< system.cpu1.dcache.WriteLineReq_miss_rate::total 0.869919 # miss rate for WriteLineReq accesses
< system.cpu1.dcache.LoadLockedReq_miss_rate::cpu1.data 0.066786 # miss rate for LoadLockedReq accesses
< system.cpu1.dcache.LoadLockedReq_miss_rate::total 0.066786 # miss rate for LoadLockedReq accesses
< system.cpu1.dcache.StoreCondReq_miss_rate::cpu1.data 0.071079 # miss rate for StoreCondReq accesses
< system.cpu1.dcache.StoreCondReq_miss_rate::total 0.071079 # miss rate for StoreCondReq accesses
< system.cpu1.dcache.demand_miss_rate::cpu1.data 0.031526 # miss rate for demand accesses
< system.cpu1.dcache.demand_miss_rate::total 0.031526 # miss rate for demand accesses
< system.cpu1.dcache.overall_miss_rate::cpu1.data 0.036064 # miss rate for overall accesses
< system.cpu1.dcache.overall_miss_rate::total 0.036064 # miss rate for overall accesses
---
> system.cpu1.dcache.WriteLineReq_miss_rate::cpu1.data 0.869905 # miss rate for WriteLineReq accesses
> system.cpu1.dcache.WriteLineReq_miss_rate::total 0.869905 # miss rate for WriteLineReq accesses
> system.cpu1.dcache.LoadLockedReq_miss_rate::cpu1.data 0.066787 # miss rate for LoadLockedReq accesses
> system.cpu1.dcache.LoadLockedReq_miss_rate::total 0.066787 # miss rate for LoadLockedReq accesses
> system.cpu1.dcache.StoreCondReq_miss_rate::cpu1.data 0.071170 # miss rate for StoreCondReq accesses
> system.cpu1.dcache.StoreCondReq_miss_rate::total 0.071170 # miss rate for StoreCondReq accesses
> system.cpu1.dcache.demand_miss_rate::cpu1.data 0.031529 # miss rate for demand accesses
> system.cpu1.dcache.demand_miss_rate::total 0.031529 # miss rate for demand accesses
> system.cpu1.dcache.overall_miss_rate::cpu1.data 0.036068 # miss rate for overall accesses
> system.cpu1.dcache.overall_miss_rate::total 0.036068 # miss rate for overall accesses
978,979c977,978
< system.cpu1.dcache.writebacks::writebacks 5970882 # number of writebacks
< system.cpu1.dcache.writebacks::total 5970882 # number of writebacks
---
> system.cpu1.dcache.writebacks::writebacks 5970884 # number of writebacks
> system.cpu1.dcache.writebacks::total 5970884 # number of writebacks
1038,1054c1037,1053
< system.cpu1.l2cache.tags.replacements 2262891 # number of replacements
< system.cpu1.l2cache.tags.tagsinuse 13357.261726 # Cycle average of tags in use
< system.cpu1.l2cache.tags.total_refs 14305129 # Total number of references to valid blocks.
< system.cpu1.l2cache.tags.sampled_refs 2278874 # Sample count of references to valid blocks.
< system.cpu1.l2cache.tags.avg_refs 6.277279 # Average number of references to valid blocks.
< system.cpu1.l2cache.tags.warmup_cycle 9829187815500 # Cycle when the warmup percentage was hit.
< system.cpu1.l2cache.tags.occ_blocks::writebacks 13247.067066 # Average occupied blocks per requestor
< system.cpu1.l2cache.tags.occ_blocks::cpu1.dtb.walker 51.785938 # Average occupied blocks per requestor
< system.cpu1.l2cache.tags.occ_blocks::cpu1.itb.walker 58.408722 # Average occupied blocks per requestor
< system.cpu1.l2cache.tags.occ_percent::writebacks 0.808537 # Average percentage of cache occupancy
< system.cpu1.l2cache.tags.occ_percent::cpu1.dtb.walker 0.003161 # Average percentage of cache occupancy
< system.cpu1.l2cache.tags.occ_percent::cpu1.itb.walker 0.003565 # Average percentage of cache occupancy
< system.cpu1.l2cache.tags.occ_percent::total 0.815263 # Average percentage of cache occupancy
< system.cpu1.l2cache.tags.occ_task_id_blocks::1023 91 # Occupied blocks per task id
< system.cpu1.l2cache.tags.occ_task_id_blocks::1024 15892 # Occupied blocks per task id
< system.cpu1.l2cache.tags.age_task_id_blocks_1023::2 53 # Occupied blocks per task id
< system.cpu1.l2cache.tags.age_task_id_blocks_1023::3 17 # Occupied blocks per task id
---
> system.cpu1.l2cache.tags.replacements 2174770 # number of replacements
> system.cpu1.l2cache.tags.tagsinuse 13105.960937 # Cycle average of tags in use
> system.cpu1.l2cache.tags.total_refs 8815603 # Total number of references to valid blocks.
> system.cpu1.l2cache.tags.sampled_refs 2190453 # Sample count of references to valid blocks.
> system.cpu1.l2cache.tags.avg_refs 4.024557 # Average number of references to valid blocks.
> system.cpu1.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
> system.cpu1.l2cache.tags.occ_blocks::writebacks 13068.855777 # Average occupied blocks per requestor
> system.cpu1.l2cache.tags.occ_blocks::cpu1.dtb.walker 21.863128 # Average occupied blocks per requestor
> system.cpu1.l2cache.tags.occ_blocks::cpu1.itb.walker 15.242032 # Average occupied blocks per requestor
> system.cpu1.l2cache.tags.occ_percent::writebacks 0.797660 # Average percentage of cache occupancy
> system.cpu1.l2cache.tags.occ_percent::cpu1.dtb.walker 0.001334 # Average percentage of cache occupancy
> system.cpu1.l2cache.tags.occ_percent::cpu1.itb.walker 0.000930 # Average percentage of cache occupancy
> system.cpu1.l2cache.tags.occ_percent::total 0.799924 # Average percentage of cache occupancy
> system.cpu1.l2cache.tags.occ_task_id_blocks::1023 90 # Occupied blocks per task id
> system.cpu1.l2cache.tags.occ_task_id_blocks::1024 15593 # Occupied blocks per task id
> system.cpu1.l2cache.tags.age_task_id_blocks_1023::2 57 # Occupied blocks per task id
> system.cpu1.l2cache.tags.age_task_id_blocks_1023::3 12 # Occupied blocks per task id
1056,1064c1055,1063
< system.cpu1.l2cache.tags.age_task_id_blocks_1024::0 152 # Occupied blocks per task id
< system.cpu1.l2cache.tags.age_task_id_blocks_1024::1 1574 # Occupied blocks per task id
< system.cpu1.l2cache.tags.age_task_id_blocks_1024::2 6119 # Occupied blocks per task id
< system.cpu1.l2cache.tags.age_task_id_blocks_1024::3 4359 # Occupied blocks per task id
< system.cpu1.l2cache.tags.age_task_id_blocks_1024::4 3688 # Occupied blocks per task id
< system.cpu1.l2cache.tags.occ_task_id_percent::1023 0.005554 # Percentage of cache occupancy per task id
< system.cpu1.l2cache.tags.occ_task_id_percent::1024 0.969971 # Percentage of cache occupancy per task id
< system.cpu1.l2cache.tags.tag_accesses 363588050 # Number of tag accesses
< system.cpu1.l2cache.tags.data_accesses 363588050 # Number of data accesses
---
> system.cpu1.l2cache.tags.age_task_id_blocks_1024::0 246 # Occupied blocks per task id
> system.cpu1.l2cache.tags.age_task_id_blocks_1024::1 2414 # Occupied blocks per task id
> system.cpu1.l2cache.tags.age_task_id_blocks_1024::2 7618 # Occupied blocks per task id
> system.cpu1.l2cache.tags.age_task_id_blocks_1024::3 3564 # Occupied blocks per task id
> system.cpu1.l2cache.tags.age_task_id_blocks_1024::4 1751 # Occupied blocks per task id
> system.cpu1.l2cache.tags.occ_task_id_percent::1023 0.005493 # Percentage of cache occupancy per task id
> system.cpu1.l2cache.tags.occ_task_id_percent::1024 0.951721 # Percentage of cache occupancy per task id
> system.cpu1.l2cache.tags.tag_accesses 369059783 # Number of tag accesses
> system.cpu1.l2cache.tags.data_accesses 369059783 # Number of data accesses
1066,1128c1065,1125
< system.cpu1.l2cache.ReadReq_hits::cpu1.dtb.walker 348760 # number of ReadReq hits
< system.cpu1.l2cache.ReadReq_hits::cpu1.itb.walker 155429 # number of ReadReq hits
< system.cpu1.l2cache.ReadReq_hits::total 504189 # number of ReadReq hits
< system.cpu1.l2cache.WritebackDirty_hits::writebacks 4050331 # number of WritebackDirty hits
< system.cpu1.l2cache.WritebackDirty_hits::total 4050331 # number of WritebackDirty hits
< system.cpu1.l2cache.WritebackClean_hits::writebacks 6688666 # number of WritebackClean hits
< system.cpu1.l2cache.WritebackClean_hits::total 6688666 # number of WritebackClean hits
< system.cpu1.l2cache.UpgradeReq_hits::cpu1.data 1054 # number of UpgradeReq hits
< system.cpu1.l2cache.UpgradeReq_hits::total 1054 # number of UpgradeReq hits
< system.cpu1.l2cache.ReadExReq_hits::cpu1.data 613437 # number of ReadExReq hits
< system.cpu1.l2cache.ReadExReq_hits::total 613437 # number of ReadExReq hits
< system.cpu1.l2cache.ReadCleanReq_hits::cpu1.inst 4306709 # number of ReadCleanReq hits
< system.cpu1.l2cache.ReadCleanReq_hits::total 4306709 # number of ReadCleanReq hits
< system.cpu1.l2cache.ReadSharedReq_hits::cpu1.data 3087044 # number of ReadSharedReq hits
< system.cpu1.l2cache.ReadSharedReq_hits::total 3087044 # number of ReadSharedReq hits
< system.cpu1.l2cache.InvalidateReq_hits::cpu1.data 164780 # number of InvalidateReq hits
< system.cpu1.l2cache.InvalidateReq_hits::total 164780 # number of InvalidateReq hits
< system.cpu1.l2cache.demand_hits::cpu1.dtb.walker 348760 # number of demand (read+write) hits
< system.cpu1.l2cache.demand_hits::cpu1.itb.walker 155429 # number of demand (read+write) hits
< system.cpu1.l2cache.demand_hits::cpu1.inst 4306709 # number of demand (read+write) hits
< system.cpu1.l2cache.demand_hits::cpu1.data 3700481 # number of demand (read+write) hits
< system.cpu1.l2cache.demand_hits::total 8511379 # number of demand (read+write) hits
< system.cpu1.l2cache.overall_hits::cpu1.dtb.walker 348760 # number of overall hits
< system.cpu1.l2cache.overall_hits::cpu1.itb.walker 155429 # number of overall hits
< system.cpu1.l2cache.overall_hits::cpu1.inst 4306709 # number of overall hits
< system.cpu1.l2cache.overall_hits::cpu1.data 3700481 # number of overall hits
< system.cpu1.l2cache.overall_hits::total 8511379 # number of overall hits
< system.cpu1.l2cache.ReadReq_misses::cpu1.dtb.walker 12218 # number of ReadReq misses
< system.cpu1.l2cache.ReadReq_misses::cpu1.itb.walker 9629 # number of ReadReq misses
< system.cpu1.l2cache.ReadReq_misses::total 21847 # number of ReadReq misses
< system.cpu1.l2cache.UpgradeReq_misses::cpu1.data 143649 # number of UpgradeReq misses
< system.cpu1.l2cache.UpgradeReq_misses::total 143649 # number of UpgradeReq misses
< system.cpu1.l2cache.SCUpgradeReq_misses::cpu1.data 156474 # number of SCUpgradeReq misses
< system.cpu1.l2cache.SCUpgradeReq_misses::total 156474 # number of SCUpgradeReq misses
< system.cpu1.l2cache.ReadExReq_misses::cpu1.data 707649 # number of ReadExReq misses
< system.cpu1.l2cache.ReadExReq_misses::total 707649 # number of ReadExReq misses
< system.cpu1.l2cache.ReadCleanReq_misses::cpu1.inst 462285 # number of ReadCleanReq misses
< system.cpu1.l2cache.ReadCleanReq_misses::total 462285 # number of ReadCleanReq misses
< system.cpu1.l2cache.ReadSharedReq_misses::cpu1.data 1220972 # number of ReadSharedReq misses
< system.cpu1.l2cache.ReadSharedReq_misses::total 1220972 # number of ReadSharedReq misses
< system.cpu1.l2cache.InvalidateReq_misses::cpu1.data 268887 # number of InvalidateReq misses
< system.cpu1.l2cache.InvalidateReq_misses::total 268887 # number of InvalidateReq misses
< system.cpu1.l2cache.demand_misses::cpu1.dtb.walker 12218 # number of demand (read+write) misses
< system.cpu1.l2cache.demand_misses::cpu1.itb.walker 9629 # number of demand (read+write) misses
< system.cpu1.l2cache.demand_misses::cpu1.inst 462285 # number of demand (read+write) misses
< system.cpu1.l2cache.demand_misses::cpu1.data 1928621 # number of demand (read+write) misses
< system.cpu1.l2cache.demand_misses::total 2412753 # number of demand (read+write) misses
< system.cpu1.l2cache.overall_misses::cpu1.dtb.walker 12218 # number of overall misses
< system.cpu1.l2cache.overall_misses::cpu1.itb.walker 9629 # number of overall misses
< system.cpu1.l2cache.overall_misses::cpu1.inst 462285 # number of overall misses
< system.cpu1.l2cache.overall_misses::cpu1.data 1928621 # number of overall misses
< system.cpu1.l2cache.overall_misses::total 2412753 # number of overall misses
< system.cpu1.l2cache.ReadReq_accesses::cpu1.dtb.walker 360978 # number of ReadReq accesses(hits+misses)
< system.cpu1.l2cache.ReadReq_accesses::cpu1.itb.walker 165058 # number of ReadReq accesses(hits+misses)
< system.cpu1.l2cache.ReadReq_accesses::total 526036 # number of ReadReq accesses(hits+misses)
< system.cpu1.l2cache.WritebackDirty_accesses::writebacks 4050331 # number of WritebackDirty accesses(hits+misses)
< system.cpu1.l2cache.WritebackDirty_accesses::total 4050331 # number of WritebackDirty accesses(hits+misses)
< system.cpu1.l2cache.WritebackClean_accesses::writebacks 6688666 # number of WritebackClean accesses(hits+misses)
< system.cpu1.l2cache.WritebackClean_accesses::total 6688666 # number of WritebackClean accesses(hits+misses)
< system.cpu1.l2cache.UpgradeReq_accesses::cpu1.data 144703 # number of UpgradeReq accesses(hits+misses)
< system.cpu1.l2cache.UpgradeReq_accesses::total 144703 # number of UpgradeReq accesses(hits+misses)
< system.cpu1.l2cache.SCUpgradeReq_accesses::cpu1.data 156474 # number of SCUpgradeReq accesses(hits+misses)
< system.cpu1.l2cache.SCUpgradeReq_accesses::total 156474 # number of SCUpgradeReq accesses(hits+misses)
---
> system.cpu1.l2cache.ReadReq_hits::cpu1.dtb.walker 338101 # number of ReadReq hits
> system.cpu1.l2cache.ReadReq_hits::cpu1.itb.walker 153667 # number of ReadReq hits
> system.cpu1.l2cache.ReadReq_hits::total 491768 # number of ReadReq hits
> system.cpu1.l2cache.WritebackDirty_hits::writebacks 4061526 # number of WritebackDirty hits
> system.cpu1.l2cache.WritebackDirty_hits::total 4061526 # number of WritebackDirty hits
> system.cpu1.l2cache.WritebackClean_hits::writebacks 6677473 # number of WritebackClean hits
> system.cpu1.l2cache.WritebackClean_hits::total 6677473 # number of WritebackClean hits
> system.cpu1.l2cache.ReadExReq_hits::cpu1.data 614785 # number of ReadExReq hits
> system.cpu1.l2cache.ReadExReq_hits::total 614785 # number of ReadExReq hits
> system.cpu1.l2cache.ReadCleanReq_hits::cpu1.inst 4308825 # number of ReadCleanReq hits
> system.cpu1.l2cache.ReadCleanReq_hits::total 4308825 # number of ReadCleanReq hits
> system.cpu1.l2cache.ReadSharedReq_hits::cpu1.data 3093892 # number of ReadSharedReq hits
> system.cpu1.l2cache.ReadSharedReq_hits::total 3093892 # number of ReadSharedReq hits
> system.cpu1.l2cache.InvalidateReq_hits::cpu1.data 164960 # number of InvalidateReq hits
> system.cpu1.l2cache.InvalidateReq_hits::total 164960 # number of InvalidateReq hits
> system.cpu1.l2cache.demand_hits::cpu1.dtb.walker 338101 # number of demand (read+write) hits
> system.cpu1.l2cache.demand_hits::cpu1.itb.walker 153667 # number of demand (read+write) hits
> system.cpu1.l2cache.demand_hits::cpu1.inst 4308825 # number of demand (read+write) hits
> system.cpu1.l2cache.demand_hits::cpu1.data 3708677 # number of demand (read+write) hits
> system.cpu1.l2cache.demand_hits::total 8509270 # number of demand (read+write) hits
> system.cpu1.l2cache.overall_hits::cpu1.dtb.walker 338101 # number of overall hits
> system.cpu1.l2cache.overall_hits::cpu1.itb.walker 153667 # number of overall hits
> system.cpu1.l2cache.overall_hits::cpu1.inst 4308825 # number of overall hits
> system.cpu1.l2cache.overall_hits::cpu1.data 3708677 # number of overall hits
> system.cpu1.l2cache.overall_hits::total 8509270 # number of overall hits
> system.cpu1.l2cache.ReadReq_misses::cpu1.dtb.walker 22355 # number of ReadReq misses
> system.cpu1.l2cache.ReadReq_misses::cpu1.itb.walker 10972 # number of ReadReq misses
> system.cpu1.l2cache.ReadReq_misses::total 33327 # number of ReadReq misses
> system.cpu1.l2cache.UpgradeReq_misses::cpu1.data 145242 # number of UpgradeReq misses
> system.cpu1.l2cache.UpgradeReq_misses::total 145242 # number of UpgradeReq misses
> system.cpu1.l2cache.SCUpgradeReq_misses::cpu1.data 156674 # number of SCUpgradeReq misses
> system.cpu1.l2cache.SCUpgradeReq_misses::total 156674 # number of SCUpgradeReq misses
> system.cpu1.l2cache.ReadExReq_misses::cpu1.data 706301 # number of ReadExReq misses
> system.cpu1.l2cache.ReadExReq_misses::total 706301 # number of ReadExReq misses
> system.cpu1.l2cache.ReadCleanReq_misses::cpu1.inst 460169 # number of ReadCleanReq misses
> system.cpu1.l2cache.ReadCleanReq_misses::total 460169 # number of ReadCleanReq misses
> system.cpu1.l2cache.ReadSharedReq_misses::cpu1.data 1214126 # number of ReadSharedReq misses
> system.cpu1.l2cache.ReadSharedReq_misses::total 1214126 # number of ReadSharedReq misses
> system.cpu1.l2cache.InvalidateReq_misses::cpu1.data 268707 # number of InvalidateReq misses
> system.cpu1.l2cache.InvalidateReq_misses::total 268707 # number of InvalidateReq misses
> system.cpu1.l2cache.demand_misses::cpu1.dtb.walker 22355 # number of demand (read+write) misses
> system.cpu1.l2cache.demand_misses::cpu1.itb.walker 10972 # number of demand (read+write) misses
> system.cpu1.l2cache.demand_misses::cpu1.inst 460169 # number of demand (read+write) misses
> system.cpu1.l2cache.demand_misses::cpu1.data 1920427 # number of demand (read+write) misses
> system.cpu1.l2cache.demand_misses::total 2413923 # number of demand (read+write) misses
> system.cpu1.l2cache.overall_misses::cpu1.dtb.walker 22355 # number of overall misses
> system.cpu1.l2cache.overall_misses::cpu1.itb.walker 10972 # number of overall misses
> system.cpu1.l2cache.overall_misses::cpu1.inst 460169 # number of overall misses
> system.cpu1.l2cache.overall_misses::cpu1.data 1920427 # number of overall misses
> system.cpu1.l2cache.overall_misses::total 2413923 # number of overall misses
> system.cpu1.l2cache.ReadReq_accesses::cpu1.dtb.walker 360456 # number of ReadReq accesses(hits+misses)
> system.cpu1.l2cache.ReadReq_accesses::cpu1.itb.walker 164639 # number of ReadReq accesses(hits+misses)
> system.cpu1.l2cache.ReadReq_accesses::total 525095 # number of ReadReq accesses(hits+misses)
> system.cpu1.l2cache.WritebackDirty_accesses::writebacks 4061526 # number of WritebackDirty accesses(hits+misses)
> system.cpu1.l2cache.WritebackDirty_accesses::total 4061526 # number of WritebackDirty accesses(hits+misses)
> system.cpu1.l2cache.WritebackClean_accesses::writebacks 6677473 # number of WritebackClean accesses(hits+misses)
> system.cpu1.l2cache.WritebackClean_accesses::total 6677473 # number of WritebackClean accesses(hits+misses)
> system.cpu1.l2cache.UpgradeReq_accesses::cpu1.data 145242 # number of UpgradeReq accesses(hits+misses)
> system.cpu1.l2cache.UpgradeReq_accesses::total 145242 # number of UpgradeReq accesses(hits+misses)
> system.cpu1.l2cache.SCUpgradeReq_accesses::cpu1.data 156674 # number of SCUpgradeReq accesses(hits+misses)
> system.cpu1.l2cache.SCUpgradeReq_accesses::total 156674 # number of SCUpgradeReq accesses(hits+misses)
1133,1134c1130,1131
< system.cpu1.l2cache.ReadSharedReq_accesses::cpu1.data 4308016 # number of ReadSharedReq accesses(hits+misses)
< system.cpu1.l2cache.ReadSharedReq_accesses::total 4308016 # number of ReadSharedReq accesses(hits+misses)
---
> system.cpu1.l2cache.ReadSharedReq_accesses::cpu1.data 4308018 # number of ReadSharedReq accesses(hits+misses)
> system.cpu1.l2cache.ReadSharedReq_accesses::total 4308018 # number of ReadSharedReq accesses(hits+misses)
1137,1138c1134,1135
< system.cpu1.l2cache.demand_accesses::cpu1.dtb.walker 360978 # number of demand (read+write) accesses
< system.cpu1.l2cache.demand_accesses::cpu1.itb.walker 165058 # number of demand (read+write) accesses
---
> system.cpu1.l2cache.demand_accesses::cpu1.dtb.walker 360456 # number of demand (read+write) accesses
> system.cpu1.l2cache.demand_accesses::cpu1.itb.walker 164639 # number of demand (read+write) accesses
1140,1143c1137,1140
< system.cpu1.l2cache.demand_accesses::cpu1.data 5629102 # number of demand (read+write) accesses
< system.cpu1.l2cache.demand_accesses::total 10924132 # number of demand (read+write) accesses
< system.cpu1.l2cache.overall_accesses::cpu1.dtb.walker 360978 # number of overall (read+write) accesses
< system.cpu1.l2cache.overall_accesses::cpu1.itb.walker 165058 # number of overall (read+write) accesses
---
> system.cpu1.l2cache.demand_accesses::cpu1.data 5629104 # number of demand (read+write) accesses
> system.cpu1.l2cache.demand_accesses::total 10923193 # number of demand (read+write) accesses
> system.cpu1.l2cache.overall_accesses::cpu1.dtb.walker 360456 # number of overall (read+write) accesses
> system.cpu1.l2cache.overall_accesses::cpu1.itb.walker 164639 # number of overall (read+write) accesses
1145,1151c1142,1148
< system.cpu1.l2cache.overall_accesses::cpu1.data 5629102 # number of overall (read+write) accesses
< system.cpu1.l2cache.overall_accesses::total 10924132 # number of overall (read+write) accesses
< system.cpu1.l2cache.ReadReq_miss_rate::cpu1.dtb.walker 0.033847 # miss rate for ReadReq accesses
< system.cpu1.l2cache.ReadReq_miss_rate::cpu1.itb.walker 0.058337 # miss rate for ReadReq accesses
< system.cpu1.l2cache.ReadReq_miss_rate::total 0.041531 # miss rate for ReadReq accesses
< system.cpu1.l2cache.UpgradeReq_miss_rate::cpu1.data 0.992716 # miss rate for UpgradeReq accesses
< system.cpu1.l2cache.UpgradeReq_miss_rate::total 0.992716 # miss rate for UpgradeReq accesses
---
> system.cpu1.l2cache.overall_accesses::cpu1.data 5629104 # number of overall (read+write) accesses
> system.cpu1.l2cache.overall_accesses::total 10923193 # number of overall (read+write) accesses
> system.cpu1.l2cache.ReadReq_miss_rate::cpu1.dtb.walker 0.062019 # miss rate for ReadReq accesses
> system.cpu1.l2cache.ReadReq_miss_rate::cpu1.itb.walker 0.066643 # miss rate for ReadReq accesses
> system.cpu1.l2cache.ReadReq_miss_rate::total 0.063469 # miss rate for ReadReq accesses
> system.cpu1.l2cache.UpgradeReq_miss_rate::cpu1.data 1 # miss rate for UpgradeReq accesses
> system.cpu1.l2cache.UpgradeReq_miss_rate::total 1 # miss rate for UpgradeReq accesses
1154,1171c1151,1168
< system.cpu1.l2cache.ReadExReq_miss_rate::cpu1.data 0.535657 # miss rate for ReadExReq accesses
< system.cpu1.l2cache.ReadExReq_miss_rate::total 0.535657 # miss rate for ReadExReq accesses
< system.cpu1.l2cache.ReadCleanReq_miss_rate::cpu1.inst 0.096936 # miss rate for ReadCleanReq accesses
< system.cpu1.l2cache.ReadCleanReq_miss_rate::total 0.096936 # miss rate for ReadCleanReq accesses
< system.cpu1.l2cache.ReadSharedReq_miss_rate::cpu1.data 0.283419 # miss rate for ReadSharedReq accesses
< system.cpu1.l2cache.ReadSharedReq_miss_rate::total 0.283419 # miss rate for ReadSharedReq accesses
< system.cpu1.l2cache.InvalidateReq_miss_rate::cpu1.data 0.620031 # miss rate for InvalidateReq accesses
< system.cpu1.l2cache.InvalidateReq_miss_rate::total 0.620031 # miss rate for InvalidateReq accesses
< system.cpu1.l2cache.demand_miss_rate::cpu1.dtb.walker 0.033847 # miss rate for demand accesses
< system.cpu1.l2cache.demand_miss_rate::cpu1.itb.walker 0.058337 # miss rate for demand accesses
< system.cpu1.l2cache.demand_miss_rate::cpu1.inst 0.096936 # miss rate for demand accesses
< system.cpu1.l2cache.demand_miss_rate::cpu1.data 0.342616 # miss rate for demand accesses
< system.cpu1.l2cache.demand_miss_rate::total 0.220865 # miss rate for demand accesses
< system.cpu1.l2cache.overall_miss_rate::cpu1.dtb.walker 0.033847 # miss rate for overall accesses
< system.cpu1.l2cache.overall_miss_rate::cpu1.itb.walker 0.058337 # miss rate for overall accesses
< system.cpu1.l2cache.overall_miss_rate::cpu1.inst 0.096936 # miss rate for overall accesses
< system.cpu1.l2cache.overall_miss_rate::cpu1.data 0.342616 # miss rate for overall accesses
< system.cpu1.l2cache.overall_miss_rate::total 0.220865 # miss rate for overall accesses
---
> system.cpu1.l2cache.ReadExReq_miss_rate::cpu1.data 0.534637 # miss rate for ReadExReq accesses
> system.cpu1.l2cache.ReadExReq_miss_rate::total 0.534637 # miss rate for ReadExReq accesses
> system.cpu1.l2cache.ReadCleanReq_miss_rate::cpu1.inst 0.096492 # miss rate for ReadCleanReq accesses
> system.cpu1.l2cache.ReadCleanReq_miss_rate::total 0.096492 # miss rate for ReadCleanReq accesses
> system.cpu1.l2cache.ReadSharedReq_miss_rate::cpu1.data 0.281829 # miss rate for ReadSharedReq accesses
> system.cpu1.l2cache.ReadSharedReq_miss_rate::total 0.281829 # miss rate for ReadSharedReq accesses
> system.cpu1.l2cache.InvalidateReq_miss_rate::cpu1.data 0.619616 # miss rate for InvalidateReq accesses
> system.cpu1.l2cache.InvalidateReq_miss_rate::total 0.619616 # miss rate for InvalidateReq accesses
> system.cpu1.l2cache.demand_miss_rate::cpu1.dtb.walker 0.062019 # miss rate for demand accesses
> system.cpu1.l2cache.demand_miss_rate::cpu1.itb.walker 0.066643 # miss rate for demand accesses
> system.cpu1.l2cache.demand_miss_rate::cpu1.inst 0.096492 # miss rate for demand accesses
> system.cpu1.l2cache.demand_miss_rate::cpu1.data 0.341160 # miss rate for demand accesses
> system.cpu1.l2cache.demand_miss_rate::total 0.220991 # miss rate for demand accesses
> system.cpu1.l2cache.overall_miss_rate::cpu1.dtb.walker 0.062019 # miss rate for overall accesses
> system.cpu1.l2cache.overall_miss_rate::cpu1.itb.walker 0.066643 # miss rate for overall accesses
> system.cpu1.l2cache.overall_miss_rate::cpu1.inst 0.096492 # miss rate for overall accesses
> system.cpu1.l2cache.overall_miss_rate::cpu1.data 0.341160 # miss rate for overall accesses
> system.cpu1.l2cache.overall_miss_rate::total 0.220991 # miss rate for overall accesses
1178,1181c1175,1178
< system.cpu1.l2cache.writebacks::writebacks 1200117 # number of writebacks
< system.cpu1.l2cache.writebacks::total 1200117 # number of writebacks
< system.cpu1.toL2Bus.snoop_filter.tot_requests 22145801 # Total number of requests made to the snoop filter.
< system.cpu1.toL2Bus.snoop_filter.hit_single_requests 11314039 # Number of requests hitting in the snoop filter with a single holder of the requested data.
---
> system.cpu1.l2cache.writebacks::writebacks 1197912 # number of writebacks
> system.cpu1.l2cache.writebacks::total 1197912 # number of writebacks
> system.cpu1.toL2Bus.snoop_filter.tot_requests 22146544 # Total number of requests made to the snoop filter.
> system.cpu1.toL2Bus.snoop_filter.hit_single_requests 11314780 # Number of requests hitting in the snoop filter with a single holder of the requested data.
1183,1185c1180,1182
< system.cpu1.toL2Bus.snoop_filter.tot_snoops 1748963 # Total number of snoops made to the snoop filter.
< system.cpu1.toL2Bus.snoop_filter.hit_single_snoops 1748793 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
< system.cpu1.toL2Bus.snoop_filter.hit_multi_snoops 170 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
---
> system.cpu1.toL2Bus.snoop_filter.tot_snoops 285761 # Total number of snoops made to the snoop filter.
> system.cpu1.toL2Bus.snoop_filter.hit_single_snoops 285759 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
> system.cpu1.toL2Bus.snoop_filter.hit_multi_snoops 2 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
1188c1185
< system.cpu1.toL2Bus.trans_dist::ReadResp 9684671 # Transaction distribution
---
> system.cpu1.toL2Bus.trans_dist::ReadResp 9684673 # Transaction distribution
1191,1195c1188,1192
< system.cpu1.toL2Bus.trans_dist::WritebackDirty 4050331 # Transaction distribution
< system.cpu1.toL2Bus.trans_dist::WritebackClean 6689033 # Transaction distribution
< system.cpu1.toL2Bus.trans_dist::UpgradeReq 144703 # Transaction distribution
< system.cpu1.toL2Bus.trans_dist::SCUpgradeReq 156474 # Transaction distribution
< system.cpu1.toL2Bus.trans_dist::UpgradeResp 301177 # Transaction distribution
---
> system.cpu1.toL2Bus.trans_dist::WritebackDirty 4061526 # Transaction distribution
> system.cpu1.toL2Bus.trans_dist::WritebackClean 6677840 # Transaction distribution
> system.cpu1.toL2Bus.trans_dist::UpgradeReq 145242 # Transaction distribution
> system.cpu1.toL2Bus.trans_dist::SCUpgradeReq 156674 # Transaction distribution
> system.cpu1.toL2Bus.trans_dist::UpgradeResp 301916 # Transaction distribution
1199c1196
< system.cpu1.toL2Bus.trans_dist::ReadSharedReq 4308016 # Transaction distribution
---
> system.cpu1.toL2Bus.trans_dist::ReadSharedReq 4308018 # Transaction distribution
1203c1200
< system.cpu1.toL2Bus.pkt_count_system.cpu1.dcache.mem_side::system.cpu1.l2cache.cpu_side 18721524 # Packet count per connected master and slave (bytes)
---
> system.cpu1.toL2Bus.pkt_count_system.cpu1.dcache.mem_side::system.cpu1.l2cache.cpu_side 18723008 # Packet count per connected master and slave (bytes)
1206c1203
< system.cpu1.toL2Bus.pkt_count::total 34231694 # Packet count per connected master and slave (bytes)
---
> system.cpu1.toL2Bus.pkt_count::total 34233178 # Packet count per connected master and slave (bytes)
1208c1205
< system.cpu1.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.cpu1.l2cache.cpu_side 742432303 # Cumulative packet size per connected master and slave (bytes)
---
> system.cpu1.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.cpu1.l2cache.cpu_side 742432559 # Cumulative packet size per connected master and slave (bytes)
1211,1216c1208,1213
< system.cpu1.toL2Bus.pkt_size::total 1357645047 # Cumulative packet size per connected master and slave (bytes)
< system.cpu1.toL2Bus.snoops 5675394 # Total snoops (count)
< system.cpu1.toL2Bus.snoopTraffic 79399936 # Total snoop traffic (bytes)
< system.cpu1.toL2Bus.snoop_fanout::samples 28001988 # Request fanout histogram
< system.cpu1.toL2Bus.snoop_fanout::mean 0.072258 # Request fanout histogram
< system.cpu1.toL2Bus.snoop_fanout::stdev 0.258938 # Request fanout histogram
---
> system.cpu1.toL2Bus.pkt_size::total 1357645303 # Cumulative packet size per connected master and slave (bytes)
> system.cpu1.toL2Bus.snoops 4277162 # Total snoops (count)
> system.cpu1.toL2Bus.snoopTraffic 79243712 # Total snoop traffic (bytes)
> system.cpu1.toL2Bus.snoop_fanout::samples 26604267 # Request fanout histogram
> system.cpu1.toL2Bus.snoop_fanout::mean 0.021049 # Request fanout histogram
> system.cpu1.toL2Bus.snoop_fanout::stdev 0.143548 # Request fanout histogram
1218,1220c1215,1217
< system.cpu1.toL2Bus.snoop_fanout::0 25978793 92.77% 92.77% # Request fanout histogram
< system.cpu1.toL2Bus.snoop_fanout::1 2023025 7.22% 100.00% # Request fanout histogram
< system.cpu1.toL2Bus.snoop_fanout::2 170 0.00% 100.00% # Request fanout histogram
---
> system.cpu1.toL2Bus.snoop_fanout::0 26044274 97.90% 97.90% # Request fanout histogram
> system.cpu1.toL2Bus.snoop_fanout::1 559991 2.10% 100.00% # Request fanout histogram
> system.cpu1.toL2Bus.snoop_fanout::2 2 0.00% 100.00% # Request fanout histogram
1224c1221
< system.cpu1.toL2Bus.snoop_fanout::total 28001988 # Request fanout histogram
---
> system.cpu1.toL2Bus.snoop_fanout::total 26604267 # Request fanout histogram
1334,1360c1331,1357
< system.l2c.tags.replacements 1774395 # number of replacements
< system.l2c.tags.tagsinuse 63409.930559 # Cycle average of tags in use
< system.l2c.tags.total_refs 4611925 # Total number of references to valid blocks.
< system.l2c.tags.sampled_refs 1833378 # Sample count of references to valid blocks.
< system.l2c.tags.avg_refs 2.515534 # Average number of references to valid blocks.
< system.l2c.tags.warmup_cycle 514828500 # Cycle when the warmup percentage was hit.
< system.l2c.tags.occ_blocks::writebacks 34658.678488 # Average occupied blocks per requestor
< system.l2c.tags.occ_blocks::cpu0.dtb.walker 33.446161 # Average occupied blocks per requestor
< system.l2c.tags.occ_blocks::cpu0.itb.walker 43.299197 # Average occupied blocks per requestor
< system.l2c.tags.occ_blocks::cpu0.inst 3299.237288 # Average occupied blocks per requestor
< system.l2c.tags.occ_blocks::cpu0.data 7180.746684 # Average occupied blocks per requestor
< system.l2c.tags.occ_blocks::cpu1.dtb.walker 272.688902 # Average occupied blocks per requestor
< system.l2c.tags.occ_blocks::cpu1.itb.walker 432.688870 # Average occupied blocks per requestor
< system.l2c.tags.occ_blocks::cpu1.inst 2834.364418 # Average occupied blocks per requestor
< system.l2c.tags.occ_blocks::cpu1.data 14654.780551 # Average occupied blocks per requestor
< system.l2c.tags.occ_percent::writebacks 0.528849 # Average percentage of cache occupancy
< system.l2c.tags.occ_percent::cpu0.dtb.walker 0.000510 # Average percentage of cache occupancy
< system.l2c.tags.occ_percent::cpu0.itb.walker 0.000661 # Average percentage of cache occupancy
< system.l2c.tags.occ_percent::cpu0.inst 0.050342 # Average percentage of cache occupancy
< system.l2c.tags.occ_percent::cpu0.data 0.109569 # Average percentage of cache occupancy
< system.l2c.tags.occ_percent::cpu1.dtb.walker 0.004161 # Average percentage of cache occupancy
< system.l2c.tags.occ_percent::cpu1.itb.walker 0.006602 # Average percentage of cache occupancy
< system.l2c.tags.occ_percent::cpu1.inst 0.043249 # Average percentage of cache occupancy
< system.l2c.tags.occ_percent::cpu1.data 0.223614 # Average percentage of cache occupancy
< system.l2c.tags.occ_percent::total 0.967559 # Average percentage of cache occupancy
< system.l2c.tags.occ_task_id_blocks::1023 232 # Occupied blocks per task id
< system.l2c.tags.occ_task_id_blocks::1024 58751 # Occupied blocks per task id
---
> system.l2c.tags.replacements 1924793 # number of replacements
> system.l2c.tags.tagsinuse 65250.197909 # Cycle average of tags in use
> system.l2c.tags.total_refs 5713780 # Total number of references to valid blocks.
> system.l2c.tags.sampled_refs 1986359 # Sample count of references to valid blocks.
> system.l2c.tags.avg_refs 2.876509 # Average number of references to valid blocks.
> system.l2c.tags.warmup_cycle 477350500 # Cycle when the warmup percentage was hit.
> system.l2c.tags.occ_blocks::writebacks 10662.392220 # Average occupied blocks per requestor
> system.l2c.tags.occ_blocks::cpu0.dtb.walker 41.728586 # Average occupied blocks per requestor
> system.l2c.tags.occ_blocks::cpu0.itb.walker 44.787257 # Average occupied blocks per requestor
> system.l2c.tags.occ_blocks::cpu0.inst 3175.849688 # Average occupied blocks per requestor
> system.l2c.tags.occ_blocks::cpu0.data 15990.343630 # Average occupied blocks per requestor
> system.l2c.tags.occ_blocks::cpu1.dtb.walker 362.595804 # Average occupied blocks per requestor
> system.l2c.tags.occ_blocks::cpu1.itb.walker 421.087250 # Average occupied blocks per requestor
> system.l2c.tags.occ_blocks::cpu1.inst 2804.760651 # Average occupied blocks per requestor
> system.l2c.tags.occ_blocks::cpu1.data 31746.652822 # Average occupied blocks per requestor
> system.l2c.tags.occ_percent::writebacks 0.162695 # Average percentage of cache occupancy
> system.l2c.tags.occ_percent::cpu0.dtb.walker 0.000637 # Average percentage of cache occupancy
> system.l2c.tags.occ_percent::cpu0.itb.walker 0.000683 # Average percentage of cache occupancy
> system.l2c.tags.occ_percent::cpu0.inst 0.048460 # Average percentage of cache occupancy
> system.l2c.tags.occ_percent::cpu0.data 0.243993 # Average percentage of cache occupancy
> system.l2c.tags.occ_percent::cpu1.dtb.walker 0.005533 # Average percentage of cache occupancy
> system.l2c.tags.occ_percent::cpu1.itb.walker 0.006425 # Average percentage of cache occupancy
> system.l2c.tags.occ_percent::cpu1.inst 0.042797 # Average percentage of cache occupancy
> system.l2c.tags.occ_percent::cpu1.data 0.484415 # Average percentage of cache occupancy
> system.l2c.tags.occ_percent::total 0.995639 # Average percentage of cache occupancy
> system.l2c.tags.occ_task_id_blocks::1023 224 # Occupied blocks per task id
> system.l2c.tags.occ_task_id_blocks::1024 61342 # Occupied blocks per task id
1362,1371c1359,1368
< system.l2c.tags.age_task_id_blocks_1023::4 231 # Occupied blocks per task id
< system.l2c.tags.age_task_id_blocks_1024::0 46 # Occupied blocks per task id
< system.l2c.tags.age_task_id_blocks_1024::1 463 # Occupied blocks per task id
< system.l2c.tags.age_task_id_blocks_1024::2 3223 # Occupied blocks per task id
< system.l2c.tags.age_task_id_blocks_1024::3 5259 # Occupied blocks per task id
< system.l2c.tags.age_task_id_blocks_1024::4 49760 # Occupied blocks per task id
< system.l2c.tags.occ_task_id_percent::1023 0.003540 # Percentage of cache occupancy per task id
< system.l2c.tags.occ_task_id_percent::1024 0.896469 # Percentage of cache occupancy per task id
< system.l2c.tags.tag_accesses 73267769 # Number of tag accesses
< system.l2c.tags.data_accesses 73267769 # Number of data accesses
---
> system.l2c.tags.age_task_id_blocks_1023::4 223 # Occupied blocks per task id
> system.l2c.tags.age_task_id_blocks_1024::0 26 # Occupied blocks per task id
> system.l2c.tags.age_task_id_blocks_1024::1 260 # Occupied blocks per task id
> system.l2c.tags.age_task_id_blocks_1024::2 3566 # Occupied blocks per task id
> system.l2c.tags.age_task_id_blocks_1024::3 4579 # Occupied blocks per task id
> system.l2c.tags.age_task_id_blocks_1024::4 52911 # Occupied blocks per task id
> system.l2c.tags.occ_task_id_percent::1023 0.003418 # Percentage of cache occupancy per task id
> system.l2c.tags.occ_task_id_percent::1024 0.936005 # Percentage of cache occupancy per task id
> system.l2c.tags.tag_accesses 71904156 # Number of tag accesses
> system.l2c.tags.data_accesses 71904156 # Number of data accesses
1373,1532c1370,1529
< system.l2c.WritebackDirty_hits::writebacks 2760080 # number of WritebackDirty hits
< system.l2c.WritebackDirty_hits::total 2760080 # number of WritebackDirty hits
< system.l2c.UpgradeReq_hits::cpu0.data 17858 # number of UpgradeReq hits
< system.l2c.UpgradeReq_hits::cpu1.data 15288 # number of UpgradeReq hits
< system.l2c.UpgradeReq_hits::total 33146 # number of UpgradeReq hits
< system.l2c.SCUpgradeReq_hits::cpu0.data 2554 # number of SCUpgradeReq hits
< system.l2c.SCUpgradeReq_hits::cpu1.data 2409 # number of SCUpgradeReq hits
< system.l2c.SCUpgradeReq_hits::total 4963 # number of SCUpgradeReq hits
< system.l2c.ReadExReq_hits::cpu0.data 196672 # number of ReadExReq hits
< system.l2c.ReadExReq_hits::cpu1.data 175397 # number of ReadExReq hits
< system.l2c.ReadExReq_hits::total 372069 # number of ReadExReq hits
< system.l2c.ReadSharedReq_hits::cpu0.dtb.walker 6428 # number of ReadSharedReq hits
< system.l2c.ReadSharedReq_hits::cpu0.itb.walker 4634 # number of ReadSharedReq hits
< system.l2c.ReadSharedReq_hits::cpu0.inst 441340 # number of ReadSharedReq hits
< system.l2c.ReadSharedReq_hits::cpu0.data 728132 # number of ReadSharedReq hits
< system.l2c.ReadSharedReq_hits::cpu1.dtb.walker 5456 # number of ReadSharedReq hits
< system.l2c.ReadSharedReq_hits::cpu1.itb.walker 3654 # number of ReadSharedReq hits
< system.l2c.ReadSharedReq_hits::cpu1.inst 420919 # number of ReadSharedReq hits
< system.l2c.ReadSharedReq_hits::cpu1.data 680845 # number of ReadSharedReq hits
< system.l2c.ReadSharedReq_hits::total 2291408 # number of ReadSharedReq hits
< system.l2c.InvalidateReq_hits::cpu0.data 115975 # number of InvalidateReq hits
< system.l2c.InvalidateReq_hits::cpu1.data 102728 # number of InvalidateReq hits
< system.l2c.InvalidateReq_hits::total 218703 # number of InvalidateReq hits
< system.l2c.demand_hits::cpu0.dtb.walker 6428 # number of demand (read+write) hits
< system.l2c.demand_hits::cpu0.itb.walker 4634 # number of demand (read+write) hits
< system.l2c.demand_hits::cpu0.inst 441340 # number of demand (read+write) hits
< system.l2c.demand_hits::cpu0.data 924804 # number of demand (read+write) hits
< system.l2c.demand_hits::cpu1.dtb.walker 5456 # number of demand (read+write) hits
< system.l2c.demand_hits::cpu1.itb.walker 3654 # number of demand (read+write) hits
< system.l2c.demand_hits::cpu1.inst 420919 # number of demand (read+write) hits
< system.l2c.demand_hits::cpu1.data 856242 # number of demand (read+write) hits
< system.l2c.demand_hits::total 2663477 # number of demand (read+write) hits
< system.l2c.overall_hits::cpu0.dtb.walker 6428 # number of overall hits
< system.l2c.overall_hits::cpu0.itb.walker 4634 # number of overall hits
< system.l2c.overall_hits::cpu0.inst 441340 # number of overall hits
< system.l2c.overall_hits::cpu0.data 924804 # number of overall hits
< system.l2c.overall_hits::cpu1.dtb.walker 5456 # number of overall hits
< system.l2c.overall_hits::cpu1.itb.walker 3654 # number of overall hits
< system.l2c.overall_hits::cpu1.inst 420919 # number of overall hits
< system.l2c.overall_hits::cpu1.data 856242 # number of overall hits
< system.l2c.overall_hits::total 2663477 # number of overall hits
< system.l2c.UpgradeReq_misses::cpu0.data 65292 # number of UpgradeReq misses
< system.l2c.UpgradeReq_misses::cpu1.data 60363 # number of UpgradeReq misses
< system.l2c.UpgradeReq_misses::total 125655 # number of UpgradeReq misses
< system.l2c.SCUpgradeReq_misses::cpu0.data 6568 # number of SCUpgradeReq misses
< system.l2c.SCUpgradeReq_misses::cpu1.data 6268 # number of SCUpgradeReq misses
< system.l2c.SCUpgradeReq_misses::total 12836 # number of SCUpgradeReq misses
< system.l2c.ReadExReq_misses::cpu0.data 377580 # number of ReadExReq misses
< system.l2c.ReadExReq_misses::cpu1.data 423134 # number of ReadExReq misses
< system.l2c.ReadExReq_misses::total 800714 # number of ReadExReq misses
< system.l2c.ReadSharedReq_misses::cpu0.dtb.walker 2366 # number of ReadSharedReq misses
< system.l2c.ReadSharedReq_misses::cpu0.itb.walker 1943 # number of ReadSharedReq misses
< system.l2c.ReadSharedReq_misses::cpu0.inst 57862 # number of ReadSharedReq misses
< system.l2c.ReadSharedReq_misses::cpu0.data 180178 # number of ReadSharedReq misses
< system.l2c.ReadSharedReq_misses::cpu1.dtb.walker 3474 # number of ReadSharedReq misses
< system.l2c.ReadSharedReq_misses::cpu1.itb.walker 3458 # number of ReadSharedReq misses
< system.l2c.ReadSharedReq_misses::cpu1.inst 41366 # number of ReadSharedReq misses
< system.l2c.ReadSharedReq_misses::cpu1.data 189464 # number of ReadSharedReq misses
< system.l2c.ReadSharedReq_misses::total 480111 # number of ReadSharedReq misses
< system.l2c.InvalidateReq_misses::cpu0.data 478573 # number of InvalidateReq misses
< system.l2c.InvalidateReq_misses::cpu1.data 160244 # number of InvalidateReq misses
< system.l2c.InvalidateReq_misses::total 638817 # number of InvalidateReq misses
< system.l2c.demand_misses::cpu0.dtb.walker 2366 # number of demand (read+write) misses
< system.l2c.demand_misses::cpu0.itb.walker 1943 # number of demand (read+write) misses
< system.l2c.demand_misses::cpu0.inst 57862 # number of demand (read+write) misses
< system.l2c.demand_misses::cpu0.data 557758 # number of demand (read+write) misses
< system.l2c.demand_misses::cpu1.dtb.walker 3474 # number of demand (read+write) misses
< system.l2c.demand_misses::cpu1.itb.walker 3458 # number of demand (read+write) misses
< system.l2c.demand_misses::cpu1.inst 41366 # number of demand (read+write) misses
< system.l2c.demand_misses::cpu1.data 612598 # number of demand (read+write) misses
< system.l2c.demand_misses::total 1280825 # number of demand (read+write) misses
< system.l2c.overall_misses::cpu0.dtb.walker 2366 # number of overall misses
< system.l2c.overall_misses::cpu0.itb.walker 1943 # number of overall misses
< system.l2c.overall_misses::cpu0.inst 57862 # number of overall misses
< system.l2c.overall_misses::cpu0.data 557758 # number of overall misses
< system.l2c.overall_misses::cpu1.dtb.walker 3474 # number of overall misses
< system.l2c.overall_misses::cpu1.itb.walker 3458 # number of overall misses
< system.l2c.overall_misses::cpu1.inst 41366 # number of overall misses
< system.l2c.overall_misses::cpu1.data 612598 # number of overall misses
< system.l2c.overall_misses::total 1280825 # number of overall misses
< system.l2c.WritebackDirty_accesses::writebacks 2760080 # number of WritebackDirty accesses(hits+misses)
< system.l2c.WritebackDirty_accesses::total 2760080 # number of WritebackDirty accesses(hits+misses)
< system.l2c.UpgradeReq_accesses::cpu0.data 83150 # number of UpgradeReq accesses(hits+misses)
< system.l2c.UpgradeReq_accesses::cpu1.data 75651 # number of UpgradeReq accesses(hits+misses)
< system.l2c.UpgradeReq_accesses::total 158801 # number of UpgradeReq accesses(hits+misses)
< system.l2c.SCUpgradeReq_accesses::cpu0.data 9122 # number of SCUpgradeReq accesses(hits+misses)
< system.l2c.SCUpgradeReq_accesses::cpu1.data 8677 # number of SCUpgradeReq accesses(hits+misses)
< system.l2c.SCUpgradeReq_accesses::total 17799 # number of SCUpgradeReq accesses(hits+misses)
< system.l2c.ReadExReq_accesses::cpu0.data 574252 # number of ReadExReq accesses(hits+misses)
< system.l2c.ReadExReq_accesses::cpu1.data 598531 # number of ReadExReq accesses(hits+misses)
< system.l2c.ReadExReq_accesses::total 1172783 # number of ReadExReq accesses(hits+misses)
< system.l2c.ReadSharedReq_accesses::cpu0.dtb.walker 8794 # number of ReadSharedReq accesses(hits+misses)
< system.l2c.ReadSharedReq_accesses::cpu0.itb.walker 6577 # number of ReadSharedReq accesses(hits+misses)
< system.l2c.ReadSharedReq_accesses::cpu0.inst 499202 # number of ReadSharedReq accesses(hits+misses)
< system.l2c.ReadSharedReq_accesses::cpu0.data 908310 # number of ReadSharedReq accesses(hits+misses)
< system.l2c.ReadSharedReq_accesses::cpu1.dtb.walker 8930 # number of ReadSharedReq accesses(hits+misses)
< system.l2c.ReadSharedReq_accesses::cpu1.itb.walker 7112 # number of ReadSharedReq accesses(hits+misses)
< system.l2c.ReadSharedReq_accesses::cpu1.inst 462285 # number of ReadSharedReq accesses(hits+misses)
< system.l2c.ReadSharedReq_accesses::cpu1.data 870309 # number of ReadSharedReq accesses(hits+misses)
< system.l2c.ReadSharedReq_accesses::total 2771519 # number of ReadSharedReq accesses(hits+misses)
< system.l2c.InvalidateReq_accesses::cpu0.data 594548 # number of InvalidateReq accesses(hits+misses)
< system.l2c.InvalidateReq_accesses::cpu1.data 262972 # number of InvalidateReq accesses(hits+misses)
< system.l2c.InvalidateReq_accesses::total 857520 # number of InvalidateReq accesses(hits+misses)
< system.l2c.demand_accesses::cpu0.dtb.walker 8794 # number of demand (read+write) accesses
< system.l2c.demand_accesses::cpu0.itb.walker 6577 # number of demand (read+write) accesses
< system.l2c.demand_accesses::cpu0.inst 499202 # number of demand (read+write) accesses
< system.l2c.demand_accesses::cpu0.data 1482562 # number of demand (read+write) accesses
< system.l2c.demand_accesses::cpu1.dtb.walker 8930 # number of demand (read+write) accesses
< system.l2c.demand_accesses::cpu1.itb.walker 7112 # number of demand (read+write) accesses
< system.l2c.demand_accesses::cpu1.inst 462285 # number of demand (read+write) accesses
< system.l2c.demand_accesses::cpu1.data 1468840 # number of demand (read+write) accesses
< system.l2c.demand_accesses::total 3944302 # number of demand (read+write) accesses
< system.l2c.overall_accesses::cpu0.dtb.walker 8794 # number of overall (read+write) accesses
< system.l2c.overall_accesses::cpu0.itb.walker 6577 # number of overall (read+write) accesses
< system.l2c.overall_accesses::cpu0.inst 499202 # number of overall (read+write) accesses
< system.l2c.overall_accesses::cpu0.data 1482562 # number of overall (read+write) accesses
< system.l2c.overall_accesses::cpu1.dtb.walker 8930 # number of overall (read+write) accesses
< system.l2c.overall_accesses::cpu1.itb.walker 7112 # number of overall (read+write) accesses
< system.l2c.overall_accesses::cpu1.inst 462285 # number of overall (read+write) accesses
< system.l2c.overall_accesses::cpu1.data 1468840 # number of overall (read+write) accesses
< system.l2c.overall_accesses::total 3944302 # number of overall (read+write) accesses
< system.l2c.UpgradeReq_miss_rate::cpu0.data 0.785232 # miss rate for UpgradeReq accesses
< system.l2c.UpgradeReq_miss_rate::cpu1.data 0.797914 # miss rate for UpgradeReq accesses
< system.l2c.UpgradeReq_miss_rate::total 0.791273 # miss rate for UpgradeReq accesses
< system.l2c.SCUpgradeReq_miss_rate::cpu0.data 0.720018 # miss rate for SCUpgradeReq accesses
< system.l2c.SCUpgradeReq_miss_rate::cpu1.data 0.722369 # miss rate for SCUpgradeReq accesses
< system.l2c.SCUpgradeReq_miss_rate::total 0.721164 # miss rate for SCUpgradeReq accesses
< system.l2c.ReadExReq_miss_rate::cpu0.data 0.657516 # miss rate for ReadExReq accesses
< system.l2c.ReadExReq_miss_rate::cpu1.data 0.706954 # miss rate for ReadExReq accesses
< system.l2c.ReadExReq_miss_rate::total 0.682747 # miss rate for ReadExReq accesses
< system.l2c.ReadSharedReq_miss_rate::cpu0.dtb.walker 0.269047 # miss rate for ReadSharedReq accesses
< system.l2c.ReadSharedReq_miss_rate::cpu0.itb.walker 0.295423 # miss rate for ReadSharedReq accesses
< system.l2c.ReadSharedReq_miss_rate::cpu0.inst 0.115909 # miss rate for ReadSharedReq accesses
< system.l2c.ReadSharedReq_miss_rate::cpu0.data 0.198366 # miss rate for ReadSharedReq accesses
< system.l2c.ReadSharedReq_miss_rate::cpu1.dtb.walker 0.389026 # miss rate for ReadSharedReq accesses
< system.l2c.ReadSharedReq_miss_rate::cpu1.itb.walker 0.486220 # miss rate for ReadSharedReq accesses
< system.l2c.ReadSharedReq_miss_rate::cpu1.inst 0.089482 # miss rate for ReadSharedReq accesses
< system.l2c.ReadSharedReq_miss_rate::cpu1.data 0.217697 # miss rate for ReadSharedReq accesses
< system.l2c.ReadSharedReq_miss_rate::total 0.173230 # miss rate for ReadSharedReq accesses
< system.l2c.InvalidateReq_miss_rate::cpu0.data 0.804936 # miss rate for InvalidateReq accesses
< system.l2c.InvalidateReq_miss_rate::cpu1.data 0.609358 # miss rate for InvalidateReq accesses
< system.l2c.InvalidateReq_miss_rate::total 0.744959 # miss rate for InvalidateReq accesses
< system.l2c.demand_miss_rate::cpu0.dtb.walker 0.269047 # miss rate for demand accesses
< system.l2c.demand_miss_rate::cpu0.itb.walker 0.295423 # miss rate for demand accesses
< system.l2c.demand_miss_rate::cpu0.inst 0.115909 # miss rate for demand accesses
< system.l2c.demand_miss_rate::cpu0.data 0.376212 # miss rate for demand accesses
< system.l2c.demand_miss_rate::cpu1.dtb.walker 0.389026 # miss rate for demand accesses
< system.l2c.demand_miss_rate::cpu1.itb.walker 0.486220 # miss rate for demand accesses
< system.l2c.demand_miss_rate::cpu1.inst 0.089482 # miss rate for demand accesses
< system.l2c.demand_miss_rate::cpu1.data 0.417062 # miss rate for demand accesses
< system.l2c.demand_miss_rate::total 0.324728 # miss rate for demand accesses
< system.l2c.overall_miss_rate::cpu0.dtb.walker 0.269047 # miss rate for overall accesses
< system.l2c.overall_miss_rate::cpu0.itb.walker 0.295423 # miss rate for overall accesses
< system.l2c.overall_miss_rate::cpu0.inst 0.115909 # miss rate for overall accesses
< system.l2c.overall_miss_rate::cpu0.data 0.376212 # miss rate for overall accesses
< system.l2c.overall_miss_rate::cpu1.dtb.walker 0.389026 # miss rate for overall accesses
< system.l2c.overall_miss_rate::cpu1.itb.walker 0.486220 # miss rate for overall accesses
< system.l2c.overall_miss_rate::cpu1.inst 0.089482 # miss rate for overall accesses
< system.l2c.overall_miss_rate::cpu1.data 0.417062 # miss rate for overall accesses
< system.l2c.overall_miss_rate::total 0.324728 # miss rate for overall accesses
---
> system.l2c.WritebackDirty_hits::writebacks 2750852 # number of WritebackDirty hits
> system.l2c.WritebackDirty_hits::total 2750852 # number of WritebackDirty hits
> system.l2c.UpgradeReq_hits::cpu0.data 60132 # number of UpgradeReq hits
> system.l2c.UpgradeReq_hits::cpu1.data 51539 # number of UpgradeReq hits
> system.l2c.UpgradeReq_hits::total 111671 # number of UpgradeReq hits
> system.l2c.SCUpgradeReq_hits::cpu0.data 8500 # number of SCUpgradeReq hits
> system.l2c.SCUpgradeReq_hits::cpu1.data 7695 # number of SCUpgradeReq hits
> system.l2c.SCUpgradeReq_hits::total 16195 # number of SCUpgradeReq hits
> system.l2c.ReadExReq_hits::cpu0.data 199510 # number of ReadExReq hits
> system.l2c.ReadExReq_hits::cpu1.data 176557 # number of ReadExReq hits
> system.l2c.ReadExReq_hits::total 376067 # number of ReadExReq hits
> system.l2c.ReadSharedReq_hits::cpu0.dtb.walker 12368 # number of ReadSharedReq hits
> system.l2c.ReadSharedReq_hits::cpu0.itb.walker 5246 # number of ReadSharedReq hits
> system.l2c.ReadSharedReq_hits::cpu0.inst 435137 # number of ReadSharedReq hits
> system.l2c.ReadSharedReq_hits::cpu0.data 707607 # number of ReadSharedReq hits
> system.l2c.ReadSharedReq_hits::cpu1.dtb.walker 12105 # number of ReadSharedReq hits
> system.l2c.ReadSharedReq_hits::cpu1.itb.walker 4097 # number of ReadSharedReq hits
> system.l2c.ReadSharedReq_hits::cpu1.inst 413141 # number of ReadSharedReq hits
> system.l2c.ReadSharedReq_hits::cpu1.data 664483 # number of ReadSharedReq hits
> system.l2c.ReadSharedReq_hits::total 2254184 # number of ReadSharedReq hits
> system.l2c.InvalidateReq_hits::cpu0.data 130356 # number of InvalidateReq hits
> system.l2c.InvalidateReq_hits::cpu1.data 113567 # number of InvalidateReq hits
> system.l2c.InvalidateReq_hits::total 243923 # number of InvalidateReq hits
> system.l2c.demand_hits::cpu0.dtb.walker 12368 # number of demand (read+write) hits
> system.l2c.demand_hits::cpu0.itb.walker 5246 # number of demand (read+write) hits
> system.l2c.demand_hits::cpu0.inst 435137 # number of demand (read+write) hits
> system.l2c.demand_hits::cpu0.data 907117 # number of demand (read+write) hits
> system.l2c.demand_hits::cpu1.dtb.walker 12105 # number of demand (read+write) hits
> system.l2c.demand_hits::cpu1.itb.walker 4097 # number of demand (read+write) hits
> system.l2c.demand_hits::cpu1.inst 413141 # number of demand (read+write) hits
> system.l2c.demand_hits::cpu1.data 841040 # number of demand (read+write) hits
> system.l2c.demand_hits::total 2630251 # number of demand (read+write) hits
> system.l2c.overall_hits::cpu0.dtb.walker 12368 # number of overall hits
> system.l2c.overall_hits::cpu0.itb.walker 5246 # number of overall hits
> system.l2c.overall_hits::cpu0.inst 435137 # number of overall hits
> system.l2c.overall_hits::cpu0.data 907117 # number of overall hits
> system.l2c.overall_hits::cpu1.dtb.walker 12105 # number of overall hits
> system.l2c.overall_hits::cpu1.itb.walker 4097 # number of overall hits
> system.l2c.overall_hits::cpu1.inst 413141 # number of overall hits
> system.l2c.overall_hits::cpu1.data 841040 # number of overall hits
> system.l2c.overall_hits::total 2630251 # number of overall hits
> system.l2c.UpgradeReq_misses::cpu0.data 21889 # number of UpgradeReq misses
> system.l2c.UpgradeReq_misses::cpu1.data 25427 # number of UpgradeReq misses
> system.l2c.UpgradeReq_misses::total 47316 # number of UpgradeReq misses
> system.l2c.SCUpgradeReq_misses::cpu0.data 415 # number of SCUpgradeReq misses
> system.l2c.SCUpgradeReq_misses::cpu1.data 794 # number of SCUpgradeReq misses
> system.l2c.SCUpgradeReq_misses::total 1209 # number of SCUpgradeReq misses
> system.l2c.ReadExReq_misses::cpu0.data 372583 # number of ReadExReq misses
> system.l2c.ReadExReq_misses::cpu1.data 420111 # number of ReadExReq misses
> system.l2c.ReadExReq_misses::total 792694 # number of ReadExReq misses
> system.l2c.ReadSharedReq_misses::cpu0.dtb.walker 2419 # number of ReadSharedReq misses
> system.l2c.ReadSharedReq_misses::cpu0.itb.walker 2002 # number of ReadSharedReq misses
> system.l2c.ReadSharedReq_misses::cpu0.inst 63535 # number of ReadSharedReq misses
> system.l2c.ReadSharedReq_misses::cpu0.data 191729 # number of ReadSharedReq misses
> system.l2c.ReadSharedReq_misses::cpu1.dtb.walker 3502 # number of ReadSharedReq misses
> system.l2c.ReadSharedReq_misses::cpu1.itb.walker 3484 # number of ReadSharedReq misses
> system.l2c.ReadSharedReq_misses::cpu1.inst 47028 # number of ReadSharedReq misses
> system.l2c.ReadSharedReq_misses::cpu1.data 197713 # number of ReadSharedReq misses
> system.l2c.ReadSharedReq_misses::total 511412 # number of ReadSharedReq misses
> system.l2c.InvalidateReq_misses::cpu0.data 462716 # number of InvalidateReq misses
> system.l2c.InvalidateReq_misses::cpu1.data 149158 # number of InvalidateReq misses
> system.l2c.InvalidateReq_misses::total 611874 # number of InvalidateReq misses
> system.l2c.demand_misses::cpu0.dtb.walker 2419 # number of demand (read+write) misses
> system.l2c.demand_misses::cpu0.itb.walker 2002 # number of demand (read+write) misses
> system.l2c.demand_misses::cpu0.inst 63535 # number of demand (read+write) misses
> system.l2c.demand_misses::cpu0.data 564312 # number of demand (read+write) misses
> system.l2c.demand_misses::cpu1.dtb.walker 3502 # number of demand (read+write) misses
> system.l2c.demand_misses::cpu1.itb.walker 3484 # number of demand (read+write) misses
> system.l2c.demand_misses::cpu1.inst 47028 # number of demand (read+write) misses
> system.l2c.demand_misses::cpu1.data 617824 # number of demand (read+write) misses
> system.l2c.demand_misses::total 1304106 # number of demand (read+write) misses
> system.l2c.overall_misses::cpu0.dtb.walker 2419 # number of overall misses
> system.l2c.overall_misses::cpu0.itb.walker 2002 # number of overall misses
> system.l2c.overall_misses::cpu0.inst 63535 # number of overall misses
> system.l2c.overall_misses::cpu0.data 564312 # number of overall misses
> system.l2c.overall_misses::cpu1.dtb.walker 3502 # number of overall misses
> system.l2c.overall_misses::cpu1.itb.walker 3484 # number of overall misses
> system.l2c.overall_misses::cpu1.inst 47028 # number of overall misses
> system.l2c.overall_misses::cpu1.data 617824 # number of overall misses
> system.l2c.overall_misses::total 1304106 # number of overall misses
> system.l2c.WritebackDirty_accesses::writebacks 2750852 # number of WritebackDirty accesses(hits+misses)
> system.l2c.WritebackDirty_accesses::total 2750852 # number of WritebackDirty accesses(hits+misses)
> system.l2c.UpgradeReq_accesses::cpu0.data 82021 # number of UpgradeReq accesses(hits+misses)
> system.l2c.UpgradeReq_accesses::cpu1.data 76966 # number of UpgradeReq accesses(hits+misses)
> system.l2c.UpgradeReq_accesses::total 158987 # number of UpgradeReq accesses(hits+misses)
> system.l2c.SCUpgradeReq_accesses::cpu0.data 8915 # number of SCUpgradeReq accesses(hits+misses)
> system.l2c.SCUpgradeReq_accesses::cpu1.data 8489 # number of SCUpgradeReq accesses(hits+misses)
> system.l2c.SCUpgradeReq_accesses::total 17404 # number of SCUpgradeReq accesses(hits+misses)
> system.l2c.ReadExReq_accesses::cpu0.data 572093 # number of ReadExReq accesses(hits+misses)
> system.l2c.ReadExReq_accesses::cpu1.data 596668 # number of ReadExReq accesses(hits+misses)
> system.l2c.ReadExReq_accesses::total 1168761 # number of ReadExReq accesses(hits+misses)
> system.l2c.ReadSharedReq_accesses::cpu0.dtb.walker 14787 # number of ReadSharedReq accesses(hits+misses)
> system.l2c.ReadSharedReq_accesses::cpu0.itb.walker 7248 # number of ReadSharedReq accesses(hits+misses)
> system.l2c.ReadSharedReq_accesses::cpu0.inst 498672 # number of ReadSharedReq accesses(hits+misses)
> system.l2c.ReadSharedReq_accesses::cpu0.data 899336 # number of ReadSharedReq accesses(hits+misses)
> system.l2c.ReadSharedReq_accesses::cpu1.dtb.walker 15607 # number of ReadSharedReq accesses(hits+misses)
> system.l2c.ReadSharedReq_accesses::cpu1.itb.walker 7581 # number of ReadSharedReq accesses(hits+misses)
> system.l2c.ReadSharedReq_accesses::cpu1.inst 460169 # number of ReadSharedReq accesses(hits+misses)
> system.l2c.ReadSharedReq_accesses::cpu1.data 862196 # number of ReadSharedReq accesses(hits+misses)
> system.l2c.ReadSharedReq_accesses::total 2765596 # number of ReadSharedReq accesses(hits+misses)
> system.l2c.InvalidateReq_accesses::cpu0.data 593072 # number of InvalidateReq accesses(hits+misses)
> system.l2c.InvalidateReq_accesses::cpu1.data 262725 # number of InvalidateReq accesses(hits+misses)
> system.l2c.InvalidateReq_accesses::total 855797 # number of InvalidateReq accesses(hits+misses)
> system.l2c.demand_accesses::cpu0.dtb.walker 14787 # number of demand (read+write) accesses
> system.l2c.demand_accesses::cpu0.itb.walker 7248 # number of demand (read+write) accesses
> system.l2c.demand_accesses::cpu0.inst 498672 # number of demand (read+write) accesses
> system.l2c.demand_accesses::cpu0.data 1471429 # number of demand (read+write) accesses
> system.l2c.demand_accesses::cpu1.dtb.walker 15607 # number of demand (read+write) accesses
> system.l2c.demand_accesses::cpu1.itb.walker 7581 # number of demand (read+write) accesses
> system.l2c.demand_accesses::cpu1.inst 460169 # number of demand (read+write) accesses
> system.l2c.demand_accesses::cpu1.data 1458864 # number of demand (read+write) accesses
> system.l2c.demand_accesses::total 3934357 # number of demand (read+write) accesses
> system.l2c.overall_accesses::cpu0.dtb.walker 14787 # number of overall (read+write) accesses
> system.l2c.overall_accesses::cpu0.itb.walker 7248 # number of overall (read+write) accesses
> system.l2c.overall_accesses::cpu0.inst 498672 # number of overall (read+write) accesses
> system.l2c.overall_accesses::cpu0.data 1471429 # number of overall (read+write) accesses
> system.l2c.overall_accesses::cpu1.dtb.walker 15607 # number of overall (read+write) accesses
> system.l2c.overall_accesses::cpu1.itb.walker 7581 # number of overall (read+write) accesses
> system.l2c.overall_accesses::cpu1.inst 460169 # number of overall (read+write) accesses
> system.l2c.overall_accesses::cpu1.data 1458864 # number of overall (read+write) accesses
> system.l2c.overall_accesses::total 3934357 # number of overall (read+write) accesses
> system.l2c.UpgradeReq_miss_rate::cpu0.data 0.266871 # miss rate for UpgradeReq accesses
> system.l2c.UpgradeReq_miss_rate::cpu1.data 0.330367 # miss rate for UpgradeReq accesses
> system.l2c.UpgradeReq_miss_rate::total 0.297609 # miss rate for UpgradeReq accesses
> system.l2c.SCUpgradeReq_miss_rate::cpu0.data 0.046551 # miss rate for SCUpgradeReq accesses
> system.l2c.SCUpgradeReq_miss_rate::cpu1.data 0.093533 # miss rate for SCUpgradeReq accesses
> system.l2c.SCUpgradeReq_miss_rate::total 0.069467 # miss rate for SCUpgradeReq accesses
> system.l2c.ReadExReq_miss_rate::cpu0.data 0.651263 # miss rate for ReadExReq accesses
> system.l2c.ReadExReq_miss_rate::cpu1.data 0.704095 # miss rate for ReadExReq accesses
> system.l2c.ReadExReq_miss_rate::total 0.678234 # miss rate for ReadExReq accesses
> system.l2c.ReadSharedReq_miss_rate::cpu0.dtb.walker 0.163590 # miss rate for ReadSharedReq accesses
> system.l2c.ReadSharedReq_miss_rate::cpu0.itb.walker 0.276214 # miss rate for ReadSharedReq accesses
> system.l2c.ReadSharedReq_miss_rate::cpu0.inst 0.127408 # miss rate for ReadSharedReq accesses
> system.l2c.ReadSharedReq_miss_rate::cpu0.data 0.213190 # miss rate for ReadSharedReq accesses
> system.l2c.ReadSharedReq_miss_rate::cpu1.dtb.walker 0.224386 # miss rate for ReadSharedReq accesses
> system.l2c.ReadSharedReq_miss_rate::cpu1.itb.walker 0.459570 # miss rate for ReadSharedReq accesses
> system.l2c.ReadSharedReq_miss_rate::cpu1.inst 0.102197 # miss rate for ReadSharedReq accesses
> system.l2c.ReadSharedReq_miss_rate::cpu1.data 0.229313 # miss rate for ReadSharedReq accesses
> system.l2c.ReadSharedReq_miss_rate::total 0.184919 # miss rate for ReadSharedReq accesses
> system.l2c.InvalidateReq_miss_rate::cpu0.data 0.780202 # miss rate for InvalidateReq accesses
> system.l2c.InvalidateReq_miss_rate::cpu1.data 0.567734 # miss rate for InvalidateReq accesses
> system.l2c.InvalidateReq_miss_rate::total 0.714976 # miss rate for InvalidateReq accesses
> system.l2c.demand_miss_rate::cpu0.dtb.walker 0.163590 # miss rate for demand accesses
> system.l2c.demand_miss_rate::cpu0.itb.walker 0.276214 # miss rate for demand accesses
> system.l2c.demand_miss_rate::cpu0.inst 0.127408 # miss rate for demand accesses
> system.l2c.demand_miss_rate::cpu0.data 0.383513 # miss rate for demand accesses
> system.l2c.demand_miss_rate::cpu1.dtb.walker 0.224386 # miss rate for demand accesses
> system.l2c.demand_miss_rate::cpu1.itb.walker 0.459570 # miss rate for demand accesses
> system.l2c.demand_miss_rate::cpu1.inst 0.102197 # miss rate for demand accesses
> system.l2c.demand_miss_rate::cpu1.data 0.423497 # miss rate for demand accesses
> system.l2c.demand_miss_rate::total 0.331466 # miss rate for demand accesses
> system.l2c.overall_miss_rate::cpu0.dtb.walker 0.163590 # miss rate for overall accesses
> system.l2c.overall_miss_rate::cpu0.itb.walker 0.276214 # miss rate for overall accesses
> system.l2c.overall_miss_rate::cpu0.inst 0.127408 # miss rate for overall accesses
> system.l2c.overall_miss_rate::cpu0.data 0.383513 # miss rate for overall accesses
> system.l2c.overall_miss_rate::cpu1.dtb.walker 0.224386 # miss rate for overall accesses
> system.l2c.overall_miss_rate::cpu1.itb.walker 0.459570 # miss rate for overall accesses
> system.l2c.overall_miss_rate::cpu1.inst 0.102197 # miss rate for overall accesses
> system.l2c.overall_miss_rate::cpu1.data 0.423497 # miss rate for overall accesses
> system.l2c.overall_miss_rate::total 0.331466 # miss rate for overall accesses
1539,1543c1536,1540
< system.l2c.writebacks::writebacks 1478540 # number of writebacks
< system.l2c.writebacks::total 1478540 # number of writebacks
< system.membus.snoop_filter.tot_requests 4495065 # Total number of requests made to the snoop filter.
< system.membus.snoop_filter.hit_single_requests 2597713 # Number of requests hitting in the snoop filter with a single holder of the requested data.
< system.membus.snoop_filter.hit_multi_requests 3483 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
---
> system.l2c.writebacks::writebacks 1492845 # number of writebacks
> system.l2c.writebacks::total 1492845 # number of writebacks
> system.membus.snoop_filter.tot_requests 4436915 # Total number of requests made to the snoop filter.
> system.membus.snoop_filter.hit_single_requests 2508187 # Number of requests hitting in the snoop filter with a single holder of the requested data.
> system.membus.snoop_filter.hit_multi_requests 3478 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
1549c1546
< system.membus.trans_dist::ReadResp 571159 # Transaction distribution
---
> system.membus.trans_dist::ReadResp 602460 # Transaction distribution
1552,1561c1549,1558
< system.membus.trans_dist::WritebackDirty 1585234 # Transaction distribution
< system.membus.trans_dist::CleanEvict 247687 # Transaction distribution
< system.membus.trans_dist::UpgradeReq 337993 # Transaction distribution
< system.membus.trans_dist::SCUpgradeReq 306149 # Transaction distribution
< system.membus.trans_dist::UpgradeResp 159131 # Transaction distribution
< system.membus.trans_dist::ReadExReq 787924 # Transaction distribution
< system.membus.trans_dist::ReadExResp 784573 # Transaction distribution
< system.membus.trans_dist::ReadSharedReq 489029 # Transaction distribution
< system.membus.trans_dist::InvalidateReq 741049 # Transaction distribution
< system.membus.trans_dist::InvalidateResp 741049 # Transaction distribution
---
> system.membus.trans_dist::WritebackDirty 1599539 # Transaction distribution
> system.membus.trans_dist::CleanEvict 267122 # Transaction distribution
> system.membus.trans_dist::UpgradeReq 245150 # Transaction distribution
> system.membus.trans_dist::SCUpgradeReq 295293 # Transaction distribution
> system.membus.trans_dist::UpgradeResp 53835 # Transaction distribution
> system.membus.trans_dist::ReadExReq 792754 # Transaction distribution
> system.membus.trans_dist::ReadExResp 789263 # Transaction distribution
> system.membus.trans_dist::ReadSharedReq 520330 # Transaction distribution
> system.membus.trans_dist::InvalidateReq 716726 # Transaction distribution
> system.membus.trans_dist::InvalidateResp 716726 # Transaction distribution
1565,1566c1562,1563
< system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 6413605 # Packet count per connected master and slave (bytes)
< system.membus.pkt_count_system.l2c.mem_side::total 6563815 # Packet count per connected master and slave (bytes)
---
> system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 6261826 # Packet count per connected master and slave (bytes)
> system.membus.pkt_count_system.l2c.mem_side::total 6412036 # Packet count per connected master and slave (bytes)
1569c1566
< system.membus.pkt_count::total 6910703 # Packet count per connected master and slave (bytes)
---
> system.membus.pkt_count::total 6758924 # Packet count per connected master and slave (bytes)
1573,1574c1570,1571
< system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 175760092 # Cumulative packet size per connected master and slave (bytes)
< system.membus.pkt_size_system.l2c.mem_side::total 175971063 # Cumulative packet size per connected master and slave (bytes)
---
> system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 178979036 # Cumulative packet size per connected master and slave (bytes)
> system.membus.pkt_size_system.l2c.mem_side::total 179190007 # Cumulative packet size per connected master and slave (bytes)
1577c1574
< system.membus.pkt_size::total 183370231 # Cumulative packet size per connected master and slave (bytes)
---
> system.membus.pkt_size::total 186589175 # Cumulative packet size per connected master and slave (bytes)
1580,1582c1577,1579
< system.membus.snoop_fanout::samples 4615993 # Request fanout histogram
< system.membus.snoop_fanout::mean 0.007281 # Request fanout histogram
< system.membus.snoop_fanout::stdev 0.085020 # Request fanout histogram
---
> system.membus.snoop_fanout::samples 4557842 # Request fanout histogram
> system.membus.snoop_fanout::mean 0.007340 # Request fanout histogram
> system.membus.snoop_fanout::stdev 0.085359 # Request fanout histogram
1584,1585c1581,1582
< system.membus.snoop_fanout::0 4582382 99.27% 99.27% # Request fanout histogram
< system.membus.snoop_fanout::1 33611 0.73% 100.00% # Request fanout histogram
---
> system.membus.snoop_fanout::0 4524387 99.27% 99.27% # Request fanout histogram
> system.membus.snoop_fanout::1 33455 0.73% 100.00% # Request fanout histogram
1590c1587
< system.membus.snoop_fanout::total 4615993 # Request fanout histogram
---
> system.membus.snoop_fanout::total 4557842 # Request fanout histogram
1671,1676c1668,1673
< system.toL2Bus.snoop_filter.tot_requests 11098491 # Total number of requests made to the snoop filter.
< system.toL2Bus.snoop_filter.hit_single_requests 5714084 # Number of requests hitting in the snoop filter with a single holder of the requested data.
< system.toL2Bus.snoop_filter.hit_multi_requests 1638499 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
< system.toL2Bus.snoop_filter.tot_snoops 134977 # Total number of snoops made to the snoop filter.
< system.toL2Bus.snoop_filter.hit_single_snoops 121387 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
< system.toL2Bus.snoop_filter.hit_multi_snoops 13590 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
---
> system.toL2Bus.snoop_filter.tot_requests 11075061 # Total number of requests made to the snoop filter.
> system.toL2Bus.snoop_filter.hit_single_requests 5706480 # Number of requests hitting in the snoop filter with a single holder of the requested data.
> system.toL2Bus.snoop_filter.hit_multi_requests 1648775 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
> system.toL2Bus.snoop_filter.tot_snoops 269190 # Total number of snoops made to the snoop filter.
> system.toL2Bus.snoop_filter.hit_single_snoops 248390 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
> system.toL2Bus.snoop_filter.hit_multi_snoops 20800 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
1679c1676
< system.toL2Bus.trans_dist::ReadResp 3539371 # Transaction distribution
---
> system.toL2Bus.trans_dist::ReadResp 3544615 # Transaction distribution
1682,1702c1679,1699
< system.toL2Bus.trans_dist::WritebackDirty 2760080 # Transaction distribution
< system.toL2Bus.trans_dist::CleanEvict 2007636 # Transaction distribution
< system.toL2Bus.trans_dist::UpgradeReq 350499 # Transaction distribution
< system.toL2Bus.trans_dist::SCUpgradeReq 311112 # Transaction distribution
< system.toL2Bus.trans_dist::UpgradeResp 661611 # Transaction distribution
< system.toL2Bus.trans_dist::ReadExReq 1354403 # Transaction distribution
< system.toL2Bus.trans_dist::ReadExResp 1354403 # Transaction distribution
< system.toL2Bus.trans_dist::ReadSharedReq 3457239 # Transaction distribution
< system.toL2Bus.trans_dist::InvalidateReq 857520 # Transaction distribution
< system.toL2Bus.trans_dist::InvalidateResp 857520 # Transaction distribution
< system.toL2Bus.pkt_count_system.cpu0.l2cache.mem_side::system.l2c.cpu_side 9497179 # Packet count per connected master and slave (bytes)
< system.toL2Bus.pkt_count_system.cpu1.l2cache.mem_side::system.l2c.cpu_side 8173943 # Packet count per connected master and slave (bytes)
< system.toL2Bus.pkt_count::total 17671122 # Packet count per connected master and slave (bytes)
< system.toL2Bus.pkt_size_system.cpu0.l2cache.mem_side::system.l2c.cpu_side 255360528 # Cumulative packet size per connected master and slave (bytes)
< system.toL2Bus.pkt_size_system.cpu1.l2cache.mem_side::system.l2c.cpu_side 229634423 # Cumulative packet size per connected master and slave (bytes)
< system.toL2Bus.pkt_size::total 484994951 # Cumulative packet size per connected master and slave (bytes)
< system.toL2Bus.snoops 1809010 # Total snoops (count)
< system.toL2Bus.snoopTraffic 94667072 # Total snoop traffic (bytes)
< system.toL2Bus.snoop_fanout::samples 13026748 # Request fanout histogram
< system.toL2Bus.snoop_fanout::mean 0.284748 # Request fanout histogram
< system.toL2Bus.snoop_fanout::stdev 0.453600 # Request fanout histogram
---
> system.toL2Bus.trans_dist::WritebackDirty 2750852 # Transaction distribution
> system.toL2Bus.trans_dist::CleanEvict 1991304 # Transaction distribution
> system.toL2Bus.trans_dist::UpgradeReq 351511 # Transaction distribution
> system.toL2Bus.trans_dist::SCUpgradeReq 311488 # Transaction distribution
> system.toL2Bus.trans_dist::UpgradeResp 662999 # Transaction distribution
> system.toL2Bus.trans_dist::ReadExReq 1351623 # Transaction distribution
> system.toL2Bus.trans_dist::ReadExResp 1351623 # Transaction distribution
> system.toL2Bus.trans_dist::ReadSharedReq 3462483 # Transaction distribution
> system.toL2Bus.trans_dist::InvalidateReq 855797 # Transaction distribution
> system.toL2Bus.trans_dist::InvalidateResp 855797 # Transaction distribution
> system.toL2Bus.pkt_count_system.cpu0.l2cache.mem_side::system.l2c.cpu_side 9483041 # Packet count per connected master and slave (bytes)
> system.toL2Bus.pkt_count_system.cpu1.l2cache.mem_side::system.l2c.cpu_side 8166779 # Packet count per connected master and slave (bytes)
> system.toL2Bus.pkt_count::total 17649820 # Packet count per connected master and slave (bytes)
> system.toL2Bus.pkt_size_system.cpu0.l2cache.mem_side::system.l2c.cpu_side 254997904 # Cumulative packet size per connected master and slave (bytes)
> system.toL2Bus.pkt_size_system.cpu1.l2cache.mem_side::system.l2c.cpu_side 229564151 # Cumulative packet size per connected master and slave (bytes)
> system.toL2Bus.pkt_size::total 484562055 # Cumulative packet size per connected master and slave (bytes)
> system.toL2Bus.snoops 1959256 # Total snoops (count)
> system.toL2Bus.snoopTraffic 95582592 # Total snoop traffic (bytes)
> system.toL2Bus.snoop_fanout::samples 13153559 # Request fanout histogram
> system.toL2Bus.snoop_fanout::mean 0.293824 # Request fanout histogram
> system.toL2Bus.snoop_fanout::stdev 0.458971 # Request fanout histogram
1704,1706c1701,1703
< system.toL2Bus.snoop_fanout::0 9330997 71.63% 71.63% # Request fanout histogram
< system.toL2Bus.snoop_fanout::1 3682161 28.27% 99.90% # Request fanout histogram
< system.toL2Bus.snoop_fanout::2 13590 0.10% 100.00% # Request fanout histogram
---
> system.toL2Bus.snoop_fanout::0 9309527 70.78% 70.78% # Request fanout histogram
> system.toL2Bus.snoop_fanout::1 3823232 29.07% 99.84% # Request fanout histogram
> system.toL2Bus.snoop_fanout::2 20800 0.16% 100.00% # Request fanout histogram
1710c1707
< system.toL2Bus.snoop_fanout::total 13026748 # Request fanout histogram
---
> system.toL2Bus.snoop_fanout::total 13153559 # Request fanout histogram