Cross Reference: /gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/config.ini

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config.ini (11570:4aac82f10951)	config.ini (11589:af2f7fef4875)
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain 14atags_addr=134217728 15boot_loader=/arm/projectscratch/randd/systems/dist/binaries/boot_emm.arm64 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19default_p_state=UNDEFINED 20dtb_filename=/arm/projectscratch/randd/systems/dist/binaries/vexpress.aarch64.20140821.dtb 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24exit_on_work_items=false 25flags_addr=469827632 26gic_cpu_addr=738205696 27have_large_asid_64=false 28have_lpae=true 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 33kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch64.20140821 34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM64 38mem_mode=timing 39mem_ranges=2147483648:2415919103 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16 45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000 48panic_on_oops=true 49panic_on_panic=true 50phys_addr_range_64=40 51power_model=Null 52readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh 53reset_addr_64=0 54symbolfile= 55thermal_components= 56thermal_model=Null 57work_begin_ckpt_count=0 58work_begin_cpu_id_exit=-1 59work_begin_exit_count=0 60work_cpus_ckpt_count=0 61work_end_ckpt_count=0 62work_end_exit_count=0 63work_item_id=-1 64system_port=system.membus.slave[1] 65 66[system.bridge] 67type=Bridge 68clk_domain=system.clk_domain 69default_p_state=UNDEFINED 70delay=50000 71eventq_index=0 72p_state_clk_gate_bins=20 73p_state_clk_gate_max=1000000000000 74p_state_clk_gate_min=1000 75power_model=Null 76ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911 77req_size=16 78resp_size=16 79master=system.iobus.slave[0] 80slave=system.membus.master[0] 81 82[system.cf0] 83type=IdeDisk 84children=image 85delay=1000000 86driveID=master 87eventq_index=0 88image=system.cf0.image 89 90[system.cf0.image] 91type=CowDiskImage 92children=child 93child=system.cf0.image.child 94eventq_index=0 95image_file= 96read_only=false 97table_size=65536 98 99[system.cf0.image.child] 100type=RawDiskImage 101eventq_index=0 102image_file=/arm/projectscratch/randd/systems/dist/disks/linaro-minimal-aarch64.img 103read_only=true 104 105[system.clk_domain] 106type=SrcClockDomain 107clock=1000 108domain_id=-1 109eventq_index=0 110init_perf_level=0 111voltage_domain=system.voltage_domain 112 113[system.cpu0] 114type=DerivO3CPU 115children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 116LFSTSize=1024 117LQEntries=16 118LSQCheckLoads=true 119LSQDepCheckShift=0 120SQEntries=16 121SSITSize=1024 122activity=0 123backComSize=5 124branchPred=system.cpu0.branchPred 125cachePorts=200 126checker=Null 127clk_domain=system.cpu_clk_domain 128commitToDecodeDelay=1 129commitToFetchDelay=1 130commitToIEWDelay=1 131commitToRenameDelay=1 132commitWidth=8 133cpu_id=0 134decodeToFetchDelay=1 135decodeToRenameDelay=2 136decodeWidth=3 137default_p_state=UNDEFINED 138dispatchWidth=6 139do_checkpoint_insts=true 140do_quiesce=true 141do_statistics_insts=true 142dstage2_mmu=system.cpu0.dstage2_mmu 143dtb=system.cpu0.dtb 144eventq_index=0 145fetchBufferSize=16 146fetchQueueSize=32 147fetchToDecodeDelay=3 148fetchTrapLatency=1 149fetchWidth=3 150forwardComSize=5 151fuPool=system.cpu0.fuPool 152function_trace=false 153function_trace_start=0 154iewToCommitDelay=1 155iewToDecodeDelay=1 156iewToFetchDelay=1 157iewToRenameDelay=1 158interrupts=system.cpu0.interrupts 159isa=system.cpu0.isa 160issueToExecuteDelay=1 161issueWidth=8 162istage2_mmu=system.cpu0.istage2_mmu 163itb=system.cpu0.itb 164max_insts_all_threads=0 165max_insts_any_thread=0 166max_loads_all_threads=0 167max_loads_any_thread=0 168needsTSO=false 169numIQEntries=32 170numPhysCCRegs=640 171numPhysFloatRegs=192 172numPhysIntRegs=128 173numROBEntries=40 174numRobs=1 175numThreads=1 176p_state_clk_gate_bins=20 177p_state_clk_gate_max=1000000000000 178p_state_clk_gate_min=1000 179power_model=Null 180profile=0 181progress_interval=0 182renameToDecodeDelay=1 183renameToFetchDelay=1 184renameToIEWDelay=1 185renameToROBDelay=1 186renameWidth=3 187simpoint_start_insts= 188smtCommitPolicy=RoundRobin 189smtFetchPolicy=SingleThread 190smtIQPolicy=Partitioned 191smtIQThreshold=100 192smtLSQPolicy=Partitioned 193smtLSQThreshold=100 194smtNumFetchingThreads=1 195smtROBPolicy=Partitioned 196smtROBThreshold=100 197socket_id=0 198squashWidth=8 199store_set_clear_period=250000 200switched_out=false 201system=system 202tracer=system.cpu0.tracer 203trapLatency=13 204wbWidth=8 205workload= 206dcache_port=system.cpu0.dcache.cpu_side 207icache_port=system.cpu0.icache.cpu_side 208 209[system.cpu0.branchPred] 210type=BiModeBP 211BTBEntries=2048 212BTBTagSize=18 213RASSize=16 214choiceCtrBits=2 215choicePredictorSize=8192 216eventq_index=0 217globalCtrBits=2 218globalPredictorSize=8192 219indirectHashGHR=true 220indirectHashTargets=true 221indirectPathLength=3 222indirectSets=256 223indirectTagSize=16 224indirectWays=2 225instShiftAmt=2 226numThreads=1 227useIndirect=true 228 229[system.cpu0.dcache] 230type=Cache 231children=tags 232addr_ranges=0:18446744073709551615 233assoc=2 234clk_domain=system.cpu_clk_domain 235clusivity=mostly_incl 236default_p_state=UNDEFINED 237demand_mshr_reserve=1 238eventq_index=0 239hit_latency=2 240is_read_only=false 241max_miss_count=0 242mshrs=6 243p_state_clk_gate_bins=20 244p_state_clk_gate_max=1000000000000 245p_state_clk_gate_min=1000 246power_model=Null 247prefetch_on_access=false 248prefetcher=Null 249response_latency=2 250sequential_access=false 251size=32768 252system=system 253tags=system.cpu0.dcache.tags 254tgts_per_mshr=8 255write_buffers=16 256writeback_clean=true 257cpu_side=system.cpu0.dcache_port 258mem_side=system.cpu0.toL2Bus.slave[1] 259 260[system.cpu0.dcache.tags] 261type=LRU 262assoc=2 263block_size=64 264clk_domain=system.cpu_clk_domain 265default_p_state=UNDEFINED 266eventq_index=0 267hit_latency=2 268p_state_clk_gate_bins=20 269p_state_clk_gate_max=1000000000000 270p_state_clk_gate_min=1000 271power_model=Null 272sequential_access=false 273size=32768 274 275[system.cpu0.dstage2_mmu] 276type=ArmStage2MMU 277children=stage2_tlb 278eventq_index=0 279stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb 280sys=system 281tlb=system.cpu0.dtb 282 283[system.cpu0.dstage2_mmu.stage2_tlb] 284type=ArmTLB 285children=walker 286eventq_index=0 287is_stage2=true 288size=32 289walker=system.cpu0.dstage2_mmu.stage2_tlb.walker 290 291[system.cpu0.dstage2_mmu.stage2_tlb.walker] 292type=ArmTableWalker 293clk_domain=system.cpu_clk_domain 294default_p_state=UNDEFINED 295eventq_index=0 296is_stage2=true 297num_squash_per_cycle=2 298p_state_clk_gate_bins=20 299p_state_clk_gate_max=1000000000000 300p_state_clk_gate_min=1000 301power_model=Null 302sys=system 303 304[system.cpu0.dtb] 305type=ArmTLB 306children=walker 307eventq_index=0 308is_stage2=false 309size=64 310walker=system.cpu0.dtb.walker 311 312[system.cpu0.dtb.walker] 313type=ArmTableWalker 314clk_domain=system.cpu_clk_domain 315default_p_state=UNDEFINED 316eventq_index=0 317is_stage2=false 318num_squash_per_cycle=2 319p_state_clk_gate_bins=20 320p_state_clk_gate_max=1000000000000 321p_state_clk_gate_min=1000 322power_model=Null 323sys=system 324port=system.cpu0.toL2Bus.slave[3] 325 326[system.cpu0.fuPool] 327type=FUPool 328children=FUList0 FUList1 FUList2 FUList3 FUList4 329FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 330eventq_index=0 331 332[system.cpu0.fuPool.FUList0] 333type=FUDesc 334children=opList 335count=2 336eventq_index=0 337opList=system.cpu0.fuPool.FUList0.opList 338 339[system.cpu0.fuPool.FUList0.opList] 340type=OpDesc 341eventq_index=0 342opClass=IntAlu 343opLat=1 344pipelined=true 345 346[system.cpu0.fuPool.FUList1] 347type=FUDesc 348children=opList0 opList1 opList2 349count=1 350eventq_index=0 351opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 system.cpu0.fuPool.FUList1.opList2 352 353[system.cpu0.fuPool.FUList1.opList0] 354type=OpDesc 355eventq_index=0 356opClass=IntMult 357opLat=3 358pipelined=true 359 360[system.cpu0.fuPool.FUList1.opList1] 361type=OpDesc 362eventq_index=0 363opClass=IntDiv 364opLat=12 365pipelined=false 366 367[system.cpu0.fuPool.FUList1.opList2] 368type=OpDesc 369eventq_index=0 370opClass=IprAccess 371opLat=3 372pipelined=true 373 374[system.cpu0.fuPool.FUList2] 375type=FUDesc 376children=opList 377count=1 378eventq_index=0 379opList=system.cpu0.fuPool.FUList2.opList 380 381[system.cpu0.fuPool.FUList2.opList] 382type=OpDesc 383eventq_index=0 384opClass=MemRead 385opLat=2 386pipelined=true 387 388[system.cpu0.fuPool.FUList3] 389type=FUDesc 390children=opList 391count=1 392eventq_index=0 393opList=system.cpu0.fuPool.FUList3.opList 394 395[system.cpu0.fuPool.FUList3.opList] 396type=OpDesc 397eventq_index=0 398opClass=MemWrite 399opLat=2 400pipelined=true 401 402[system.cpu0.fuPool.FUList4] 403type=FUDesc 404children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 405count=2 406eventq_index=0 407opList=system.cpu0.fuPool.FUList4.opList00 system.cpu0.fuPool.FUList4.opList01 system.cpu0.fuPool.FUList4.opList02 system.cpu0.fuPool.FUList4.opList03 system.cpu0.fuPool.FUList4.opList04 system.cpu0.fuPool.FUList4.opList05 system.cpu0.fuPool.FUList4.opList06 system.cpu0.fuPool.FUList4.opList07 system.cpu0.fuPool.FUList4.opList08 system.cpu0.fuPool.FUList4.opList09 system.cpu0.fuPool.FUList4.opList10 system.cpu0.fuPool.FUList4.opList11 system.cpu0.fuPool.FUList4.opList12 system.cpu0.fuPool.FUList4.opList13 system.cpu0.fuPool.FUList4.opList14 system.cpu0.fuPool.FUList4.opList15 system.cpu0.fuPool.FUList4.opList16 system.cpu0.fuPool.FUList4.opList17 system.cpu0.fuPool.FUList4.opList18 system.cpu0.fuPool.FUList4.opList19 system.cpu0.fuPool.FUList4.opList20 system.cpu0.fuPool.FUList4.opList21 system.cpu0.fuPool.FUList4.opList22 system.cpu0.fuPool.FUList4.opList23 system.cpu0.fuPool.FUList4.opList24 system.cpu0.fuPool.FUList4.opList25 408 409[system.cpu0.fuPool.FUList4.opList00] 410type=OpDesc 411eventq_index=0 412opClass=SimdAdd 413opLat=4 414pipelined=true 415 416[system.cpu0.fuPool.FUList4.opList01] 417type=OpDesc 418eventq_index=0 419opClass=SimdAddAcc 420opLat=4 421pipelined=true 422 423[system.cpu0.fuPool.FUList4.opList02] 424type=OpDesc 425eventq_index=0 426opClass=SimdAlu 427opLat=4 428pipelined=true 429 430[system.cpu0.fuPool.FUList4.opList03] 431type=OpDesc 432eventq_index=0 433opClass=SimdCmp 434opLat=4 435pipelined=true 436 437[system.cpu0.fuPool.FUList4.opList04] 438type=OpDesc 439eventq_index=0 440opClass=SimdCvt 441opLat=3 442pipelined=true 443 444[system.cpu0.fuPool.FUList4.opList05] 445type=OpDesc 446eventq_index=0 447opClass=SimdMisc 448opLat=3 449pipelined=true 450 451[system.cpu0.fuPool.FUList4.opList06] 452type=OpDesc 453eventq_index=0 454opClass=SimdMult 455opLat=5 456pipelined=true 457 458[system.cpu0.fuPool.FUList4.opList07] 459type=OpDesc 460eventq_index=0 461opClass=SimdMultAcc 462opLat=5 463pipelined=true 464 465[system.cpu0.fuPool.FUList4.opList08] 466type=OpDesc 467eventq_index=0 468opClass=SimdShift 469opLat=3 470pipelined=true 471 472[system.cpu0.fuPool.FUList4.opList09] 473type=OpDesc 474eventq_index=0 475opClass=SimdShiftAcc 476opLat=3 477pipelined=true 478 479[system.cpu0.fuPool.FUList4.opList10] 480type=OpDesc 481eventq_index=0 482opClass=SimdSqrt 483opLat=9 484pipelined=true 485 486[system.cpu0.fuPool.FUList4.opList11] 487type=OpDesc 488eventq_index=0 489opClass=SimdFloatAdd 490opLat=5 491pipelined=true 492 493[system.cpu0.fuPool.FUList4.opList12] 494type=OpDesc 495eventq_index=0 496opClass=SimdFloatAlu 497opLat=5 498pipelined=true 499 500[system.cpu0.fuPool.FUList4.opList13] 501type=OpDesc 502eventq_index=0 503opClass=SimdFloatCmp 504opLat=3 505pipelined=true 506 507[system.cpu0.fuPool.FUList4.opList14] 508type=OpDesc 509eventq_index=0 510opClass=SimdFloatCvt 511opLat=3 512pipelined=true 513 514[system.cpu0.fuPool.FUList4.opList15] 515type=OpDesc 516eventq_index=0 517opClass=SimdFloatDiv 518opLat=3 519pipelined=true 520 521[system.cpu0.fuPool.FUList4.opList16] 522type=OpDesc 523eventq_index=0 524opClass=SimdFloatMisc 525opLat=3 526pipelined=true 527 528[system.cpu0.fuPool.FUList4.opList17] 529type=OpDesc 530eventq_index=0 531opClass=SimdFloatMult 532opLat=3 533pipelined=true 534 535[system.cpu0.fuPool.FUList4.opList18] 536type=OpDesc 537eventq_index=0 538opClass=SimdFloatMultAcc 539opLat=1 540pipelined=true 541 542[system.cpu0.fuPool.FUList4.opList19] 543type=OpDesc 544eventq_index=0 545opClass=SimdFloatSqrt 546opLat=9 547pipelined=true 548 549[system.cpu0.fuPool.FUList4.opList20] 550type=OpDesc 551eventq_index=0 552opClass=FloatAdd 553opLat=5 554pipelined=true 555 556[system.cpu0.fuPool.FUList4.opList21] 557type=OpDesc 558eventq_index=0 559opClass=FloatCmp 560opLat=5 561pipelined=true 562 563[system.cpu0.fuPool.FUList4.opList22] 564type=OpDesc 565eventq_index=0 566opClass=FloatCvt 567opLat=5 568pipelined=true 569 570[system.cpu0.fuPool.FUList4.opList23] 571type=OpDesc 572eventq_index=0 573opClass=FloatDiv 574opLat=9 575pipelined=false 576 577[system.cpu0.fuPool.FUList4.opList24] 578type=OpDesc 579eventq_index=0 580opClass=FloatSqrt 581opLat=33 582pipelined=false 583 584[system.cpu0.fuPool.FUList4.opList25] 585type=OpDesc 586eventq_index=0 587opClass=FloatMult 588opLat=4 589pipelined=true 590 591[system.cpu0.icache] 592type=Cache 593children=tags 594addr_ranges=0:18446744073709551615 595assoc=2 596clk_domain=system.cpu_clk_domain 597clusivity=mostly_incl 598default_p_state=UNDEFINED 599demand_mshr_reserve=1 600eventq_index=0 601hit_latency=1 602is_read_only=true 603max_miss_count=0 604mshrs=2 605p_state_clk_gate_bins=20 606p_state_clk_gate_max=1000000000000 607p_state_clk_gate_min=1000 608power_model=Null 609prefetch_on_access=false 610prefetcher=Null 611response_latency=1 612sequential_access=false 613size=32768 614system=system 615tags=system.cpu0.icache.tags 616tgts_per_mshr=8 617write_buffers=8 618writeback_clean=true 619cpu_side=system.cpu0.icache_port 620mem_side=system.cpu0.toL2Bus.slave[0] 621 622[system.cpu0.icache.tags] 623type=LRU 624assoc=2 625block_size=64 626clk_domain=system.cpu_clk_domain 627default_p_state=UNDEFINED 628eventq_index=0 629hit_latency=1 630p_state_clk_gate_bins=20 631p_state_clk_gate_max=1000000000000 632p_state_clk_gate_min=1000 633power_model=Null 634sequential_access=false 635size=32768 636 637[system.cpu0.interrupts] 638type=ArmInterrupts 639eventq_index=0 640 641[system.cpu0.isa] 642type=ArmISA 643decoderFlavour=Generic 644eventq_index=0 645fpsid=1090793632 646id_aa64afr0_el1=0 647id_aa64afr1_el1=0 648id_aa64dfr0_el1=1052678 649id_aa64dfr1_el1=0 650id_aa64isar0_el1=0 651id_aa64isar1_el1=0 652id_aa64mmfr0_el1=15728642 653id_aa64mmfr1_el1=0	1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain 14atags_addr=134217728 15boot_loader=/arm/projectscratch/randd/systems/dist/binaries/boot_emm.arm64 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19default_p_state=UNDEFINED 20dtb_filename=/arm/projectscratch/randd/systems/dist/binaries/vexpress.aarch64.20140821.dtb 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24exit_on_work_items=false 25flags_addr=469827632 26gic_cpu_addr=738205696 27have_large_asid_64=false 28have_lpae=true 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 33kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch64.20140821 34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM64 38mem_mode=timing 39mem_ranges=2147483648:2415919103 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16 45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000 48panic_on_oops=true 49panic_on_panic=true 50phys_addr_range_64=40 51power_model=Null 52readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh 53reset_addr_64=0 54symbolfile= 55thermal_components= 56thermal_model=Null 57work_begin_ckpt_count=0 58work_begin_cpu_id_exit=-1 59work_begin_exit_count=0 60work_cpus_ckpt_count=0 61work_end_ckpt_count=0 62work_end_exit_count=0 63work_item_id=-1 64system_port=system.membus.slave[1] 65 66[system.bridge] 67type=Bridge 68clk_domain=system.clk_domain 69default_p_state=UNDEFINED 70delay=50000 71eventq_index=0 72p_state_clk_gate_bins=20 73p_state_clk_gate_max=1000000000000 74p_state_clk_gate_min=1000 75power_model=Null 76ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911 77req_size=16 78resp_size=16 79master=system.iobus.slave[0] 80slave=system.membus.master[0] 81 82[system.cf0] 83type=IdeDisk 84children=image 85delay=1000000 86driveID=master 87eventq_index=0 88image=system.cf0.image 89 90[system.cf0.image] 91type=CowDiskImage 92children=child 93child=system.cf0.image.child 94eventq_index=0 95image_file= 96read_only=false 97table_size=65536 98 99[system.cf0.image.child] 100type=RawDiskImage 101eventq_index=0 102image_file=/arm/projectscratch/randd/systems/dist/disks/linaro-minimal-aarch64.img 103read_only=true 104 105[system.clk_domain] 106type=SrcClockDomain 107clock=1000 108domain_id=-1 109eventq_index=0 110init_perf_level=0 111voltage_domain=system.voltage_domain 112 113[system.cpu0] 114type=DerivO3CPU 115children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 116LFSTSize=1024 117LQEntries=16 118LSQCheckLoads=true 119LSQDepCheckShift=0 120SQEntries=16 121SSITSize=1024 122activity=0 123backComSize=5 124branchPred=system.cpu0.branchPred 125cachePorts=200 126checker=Null 127clk_domain=system.cpu_clk_domain 128commitToDecodeDelay=1 129commitToFetchDelay=1 130commitToIEWDelay=1 131commitToRenameDelay=1 132commitWidth=8 133cpu_id=0 134decodeToFetchDelay=1 135decodeToRenameDelay=2 136decodeWidth=3 137default_p_state=UNDEFINED 138dispatchWidth=6 139do_checkpoint_insts=true 140do_quiesce=true 141do_statistics_insts=true 142dstage2_mmu=system.cpu0.dstage2_mmu 143dtb=system.cpu0.dtb 144eventq_index=0 145fetchBufferSize=16 146fetchQueueSize=32 147fetchToDecodeDelay=3 148fetchTrapLatency=1 149fetchWidth=3 150forwardComSize=5 151fuPool=system.cpu0.fuPool 152function_trace=false 153function_trace_start=0 154iewToCommitDelay=1 155iewToDecodeDelay=1 156iewToFetchDelay=1 157iewToRenameDelay=1 158interrupts=system.cpu0.interrupts 159isa=system.cpu0.isa 160issueToExecuteDelay=1 161issueWidth=8 162istage2_mmu=system.cpu0.istage2_mmu 163itb=system.cpu0.itb 164max_insts_all_threads=0 165max_insts_any_thread=0 166max_loads_all_threads=0 167max_loads_any_thread=0 168needsTSO=false 169numIQEntries=32 170numPhysCCRegs=640 171numPhysFloatRegs=192 172numPhysIntRegs=128 173numROBEntries=40 174numRobs=1 175numThreads=1 176p_state_clk_gate_bins=20 177p_state_clk_gate_max=1000000000000 178p_state_clk_gate_min=1000 179power_model=Null 180profile=0 181progress_interval=0 182renameToDecodeDelay=1 183renameToFetchDelay=1 184renameToIEWDelay=1 185renameToROBDelay=1 186renameWidth=3 187simpoint_start_insts= 188smtCommitPolicy=RoundRobin 189smtFetchPolicy=SingleThread 190smtIQPolicy=Partitioned 191smtIQThreshold=100 192smtLSQPolicy=Partitioned 193smtLSQThreshold=100 194smtNumFetchingThreads=1 195smtROBPolicy=Partitioned 196smtROBThreshold=100 197socket_id=0 198squashWidth=8 199store_set_clear_period=250000 200switched_out=false 201system=system 202tracer=system.cpu0.tracer 203trapLatency=13 204wbWidth=8 205workload= 206dcache_port=system.cpu0.dcache.cpu_side 207icache_port=system.cpu0.icache.cpu_side 208 209[system.cpu0.branchPred] 210type=BiModeBP 211BTBEntries=2048 212BTBTagSize=18 213RASSize=16 214choiceCtrBits=2 215choicePredictorSize=8192 216eventq_index=0 217globalCtrBits=2 218globalPredictorSize=8192 219indirectHashGHR=true 220indirectHashTargets=true 221indirectPathLength=3 222indirectSets=256 223indirectTagSize=16 224indirectWays=2 225instShiftAmt=2 226numThreads=1 227useIndirect=true 228 229[system.cpu0.dcache] 230type=Cache 231children=tags 232addr_ranges=0:18446744073709551615 233assoc=2 234clk_domain=system.cpu_clk_domain 235clusivity=mostly_incl 236default_p_state=UNDEFINED 237demand_mshr_reserve=1 238eventq_index=0 239hit_latency=2 240is_read_only=false 241max_miss_count=0 242mshrs=6 243p_state_clk_gate_bins=20 244p_state_clk_gate_max=1000000000000 245p_state_clk_gate_min=1000 246power_model=Null 247prefetch_on_access=false 248prefetcher=Null 249response_latency=2 250sequential_access=false 251size=32768 252system=system 253tags=system.cpu0.dcache.tags 254tgts_per_mshr=8 255write_buffers=16 256writeback_clean=true 257cpu_side=system.cpu0.dcache_port 258mem_side=system.cpu0.toL2Bus.slave[1] 259 260[system.cpu0.dcache.tags] 261type=LRU 262assoc=2 263block_size=64 264clk_domain=system.cpu_clk_domain 265default_p_state=UNDEFINED 266eventq_index=0 267hit_latency=2 268p_state_clk_gate_bins=20 269p_state_clk_gate_max=1000000000000 270p_state_clk_gate_min=1000 271power_model=Null 272sequential_access=false 273size=32768 274 275[system.cpu0.dstage2_mmu] 276type=ArmStage2MMU 277children=stage2_tlb 278eventq_index=0 279stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb 280sys=system 281tlb=system.cpu0.dtb 282 283[system.cpu0.dstage2_mmu.stage2_tlb] 284type=ArmTLB 285children=walker 286eventq_index=0 287is_stage2=true 288size=32 289walker=system.cpu0.dstage2_mmu.stage2_tlb.walker 290 291[system.cpu0.dstage2_mmu.stage2_tlb.walker] 292type=ArmTableWalker 293clk_domain=system.cpu_clk_domain 294default_p_state=UNDEFINED 295eventq_index=0 296is_stage2=true 297num_squash_per_cycle=2 298p_state_clk_gate_bins=20 299p_state_clk_gate_max=1000000000000 300p_state_clk_gate_min=1000 301power_model=Null 302sys=system 303 304[system.cpu0.dtb] 305type=ArmTLB 306children=walker 307eventq_index=0 308is_stage2=false 309size=64 310walker=system.cpu0.dtb.walker 311 312[system.cpu0.dtb.walker] 313type=ArmTableWalker 314clk_domain=system.cpu_clk_domain 315default_p_state=UNDEFINED 316eventq_index=0 317is_stage2=false 318num_squash_per_cycle=2 319p_state_clk_gate_bins=20 320p_state_clk_gate_max=1000000000000 321p_state_clk_gate_min=1000 322power_model=Null 323sys=system 324port=system.cpu0.toL2Bus.slave[3] 325 326[system.cpu0.fuPool] 327type=FUPool 328children=FUList0 FUList1 FUList2 FUList3 FUList4 329FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 330eventq_index=0 331 332[system.cpu0.fuPool.FUList0] 333type=FUDesc 334children=opList 335count=2 336eventq_index=0 337opList=system.cpu0.fuPool.FUList0.opList 338 339[system.cpu0.fuPool.FUList0.opList] 340type=OpDesc 341eventq_index=0 342opClass=IntAlu 343opLat=1 344pipelined=true 345 346[system.cpu0.fuPool.FUList1] 347type=FUDesc 348children=opList0 opList1 opList2 349count=1 350eventq_index=0 351opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 system.cpu0.fuPool.FUList1.opList2 352 353[system.cpu0.fuPool.FUList1.opList0] 354type=OpDesc 355eventq_index=0 356opClass=IntMult 357opLat=3 358pipelined=true 359 360[system.cpu0.fuPool.FUList1.opList1] 361type=OpDesc 362eventq_index=0 363opClass=IntDiv 364opLat=12 365pipelined=false 366 367[system.cpu0.fuPool.FUList1.opList2] 368type=OpDesc 369eventq_index=0 370opClass=IprAccess 371opLat=3 372pipelined=true 373 374[system.cpu0.fuPool.FUList2] 375type=FUDesc 376children=opList 377count=1 378eventq_index=0 379opList=system.cpu0.fuPool.FUList2.opList 380 381[system.cpu0.fuPool.FUList2.opList] 382type=OpDesc 383eventq_index=0 384opClass=MemRead 385opLat=2 386pipelined=true 387 388[system.cpu0.fuPool.FUList3] 389type=FUDesc 390children=opList 391count=1 392eventq_index=0 393opList=system.cpu0.fuPool.FUList3.opList 394 395[system.cpu0.fuPool.FUList3.opList] 396type=OpDesc 397eventq_index=0 398opClass=MemWrite 399opLat=2 400pipelined=true 401 402[system.cpu0.fuPool.FUList4] 403type=FUDesc 404children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 405count=2 406eventq_index=0 407opList=system.cpu0.fuPool.FUList4.opList00 system.cpu0.fuPool.FUList4.opList01 system.cpu0.fuPool.FUList4.opList02 system.cpu0.fuPool.FUList4.opList03 system.cpu0.fuPool.FUList4.opList04 system.cpu0.fuPool.FUList4.opList05 system.cpu0.fuPool.FUList4.opList06 system.cpu0.fuPool.FUList4.opList07 system.cpu0.fuPool.FUList4.opList08 system.cpu0.fuPool.FUList4.opList09 system.cpu0.fuPool.FUList4.opList10 system.cpu0.fuPool.FUList4.opList11 system.cpu0.fuPool.FUList4.opList12 system.cpu0.fuPool.FUList4.opList13 system.cpu0.fuPool.FUList4.opList14 system.cpu0.fuPool.FUList4.opList15 system.cpu0.fuPool.FUList4.opList16 system.cpu0.fuPool.FUList4.opList17 system.cpu0.fuPool.FUList4.opList18 system.cpu0.fuPool.FUList4.opList19 system.cpu0.fuPool.FUList4.opList20 system.cpu0.fuPool.FUList4.opList21 system.cpu0.fuPool.FUList4.opList22 system.cpu0.fuPool.FUList4.opList23 system.cpu0.fuPool.FUList4.opList24 system.cpu0.fuPool.FUList4.opList25 408 409[system.cpu0.fuPool.FUList4.opList00] 410type=OpDesc 411eventq_index=0 412opClass=SimdAdd 413opLat=4 414pipelined=true 415 416[system.cpu0.fuPool.FUList4.opList01] 417type=OpDesc 418eventq_index=0 419opClass=SimdAddAcc 420opLat=4 421pipelined=true 422 423[system.cpu0.fuPool.FUList4.opList02] 424type=OpDesc 425eventq_index=0 426opClass=SimdAlu 427opLat=4 428pipelined=true 429 430[system.cpu0.fuPool.FUList4.opList03] 431type=OpDesc 432eventq_index=0 433opClass=SimdCmp 434opLat=4 435pipelined=true 436 437[system.cpu0.fuPool.FUList4.opList04] 438type=OpDesc 439eventq_index=0 440opClass=SimdCvt 441opLat=3 442pipelined=true 443 444[system.cpu0.fuPool.FUList4.opList05] 445type=OpDesc 446eventq_index=0 447opClass=SimdMisc 448opLat=3 449pipelined=true 450 451[system.cpu0.fuPool.FUList4.opList06] 452type=OpDesc 453eventq_index=0 454opClass=SimdMult 455opLat=5 456pipelined=true 457 458[system.cpu0.fuPool.FUList4.opList07] 459type=OpDesc 460eventq_index=0 461opClass=SimdMultAcc 462opLat=5 463pipelined=true 464 465[system.cpu0.fuPool.FUList4.opList08] 466type=OpDesc 467eventq_index=0 468opClass=SimdShift 469opLat=3 470pipelined=true 471 472[system.cpu0.fuPool.FUList4.opList09] 473type=OpDesc 474eventq_index=0 475opClass=SimdShiftAcc 476opLat=3 477pipelined=true 478 479[system.cpu0.fuPool.FUList4.opList10] 480type=OpDesc 481eventq_index=0 482opClass=SimdSqrt 483opLat=9 484pipelined=true 485 486[system.cpu0.fuPool.FUList4.opList11] 487type=OpDesc 488eventq_index=0 489opClass=SimdFloatAdd 490opLat=5 491pipelined=true 492 493[system.cpu0.fuPool.FUList4.opList12] 494type=OpDesc 495eventq_index=0 496opClass=SimdFloatAlu 497opLat=5 498pipelined=true 499 500[system.cpu0.fuPool.FUList4.opList13] 501type=OpDesc 502eventq_index=0 503opClass=SimdFloatCmp 504opLat=3 505pipelined=true 506 507[system.cpu0.fuPool.FUList4.opList14] 508type=OpDesc 509eventq_index=0 510opClass=SimdFloatCvt 511opLat=3 512pipelined=true 513 514[system.cpu0.fuPool.FUList4.opList15] 515type=OpDesc 516eventq_index=0 517opClass=SimdFloatDiv 518opLat=3 519pipelined=true 520 521[system.cpu0.fuPool.FUList4.opList16] 522type=OpDesc 523eventq_index=0 524opClass=SimdFloatMisc 525opLat=3 526pipelined=true 527 528[system.cpu0.fuPool.FUList4.opList17] 529type=OpDesc 530eventq_index=0 531opClass=SimdFloatMult 532opLat=3 533pipelined=true 534 535[system.cpu0.fuPool.FUList4.opList18] 536type=OpDesc 537eventq_index=0 538opClass=SimdFloatMultAcc 539opLat=1 540pipelined=true 541 542[system.cpu0.fuPool.FUList4.opList19] 543type=OpDesc 544eventq_index=0 545opClass=SimdFloatSqrt 546opLat=9 547pipelined=true 548 549[system.cpu0.fuPool.FUList4.opList20] 550type=OpDesc 551eventq_index=0 552opClass=FloatAdd 553opLat=5 554pipelined=true 555 556[system.cpu0.fuPool.FUList4.opList21] 557type=OpDesc 558eventq_index=0 559opClass=FloatCmp 560opLat=5 561pipelined=true 562 563[system.cpu0.fuPool.FUList4.opList22] 564type=OpDesc 565eventq_index=0 566opClass=FloatCvt 567opLat=5 568pipelined=true 569 570[system.cpu0.fuPool.FUList4.opList23] 571type=OpDesc 572eventq_index=0 573opClass=FloatDiv 574opLat=9 575pipelined=false 576 577[system.cpu0.fuPool.FUList4.opList24] 578type=OpDesc 579eventq_index=0 580opClass=FloatSqrt 581opLat=33 582pipelined=false 583 584[system.cpu0.fuPool.FUList4.opList25] 585type=OpDesc 586eventq_index=0 587opClass=FloatMult 588opLat=4 589pipelined=true 590 591[system.cpu0.icache] 592type=Cache 593children=tags 594addr_ranges=0:18446744073709551615 595assoc=2 596clk_domain=system.cpu_clk_domain 597clusivity=mostly_incl 598default_p_state=UNDEFINED 599demand_mshr_reserve=1 600eventq_index=0 601hit_latency=1 602is_read_only=true 603max_miss_count=0 604mshrs=2 605p_state_clk_gate_bins=20 606p_state_clk_gate_max=1000000000000 607p_state_clk_gate_min=1000 608power_model=Null 609prefetch_on_access=false 610prefetcher=Null 611response_latency=1 612sequential_access=false 613size=32768 614system=system 615tags=system.cpu0.icache.tags 616tgts_per_mshr=8 617write_buffers=8 618writeback_clean=true 619cpu_side=system.cpu0.icache_port 620mem_side=system.cpu0.toL2Bus.slave[0] 621 622[system.cpu0.icache.tags] 623type=LRU 624assoc=2 625block_size=64 626clk_domain=system.cpu_clk_domain 627default_p_state=UNDEFINED 628eventq_index=0 629hit_latency=1 630p_state_clk_gate_bins=20 631p_state_clk_gate_max=1000000000000 632p_state_clk_gate_min=1000 633power_model=Null 634sequential_access=false 635size=32768 636 637[system.cpu0.interrupts] 638type=ArmInterrupts 639eventq_index=0 640 641[system.cpu0.isa] 642type=ArmISA 643decoderFlavour=Generic 644eventq_index=0 645fpsid=1090793632 646id_aa64afr0_el1=0 647id_aa64afr1_el1=0 648id_aa64dfr0_el1=1052678 649id_aa64dfr1_el1=0 650id_aa64isar0_el1=0 651id_aa64isar1_el1=0 652id_aa64mmfr0_el1=15728642 653id_aa64mmfr1_el1=0
654id_aa64pfr0_el1=17	654id_aa64pfr0_el1=34
655id_aa64pfr1_el1=0 656id_isar0=34607377 657id_isar1=34677009 658id_isar2=555950401 659id_isar3=17899825 660id_isar4=268501314 661id_isar5=0 662id_mmfr0=270536963 663id_mmfr1=0 664id_mmfr2=19070976 665id_mmfr3=34611729 666id_pfr0=49 667id_pfr1=4113 668midr=1091551472 669pmu=Null 670system=system 671 672[system.cpu0.istage2_mmu] 673type=ArmStage2MMU 674children=stage2_tlb 675eventq_index=0 676stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb 677sys=system 678tlb=system.cpu0.itb 679 680[system.cpu0.istage2_mmu.stage2_tlb] 681type=ArmTLB 682children=walker 683eventq_index=0 684is_stage2=true 685size=32 686walker=system.cpu0.istage2_mmu.stage2_tlb.walker 687 688[system.cpu0.istage2_mmu.stage2_tlb.walker] 689type=ArmTableWalker 690clk_domain=system.cpu_clk_domain 691default_p_state=UNDEFINED 692eventq_index=0 693is_stage2=true 694num_squash_per_cycle=2 695p_state_clk_gate_bins=20 696p_state_clk_gate_max=1000000000000 697p_state_clk_gate_min=1000 698power_model=Null 699sys=system 700 701[system.cpu0.itb] 702type=ArmTLB 703children=walker 704eventq_index=0 705is_stage2=false 706size=64 707walker=system.cpu0.itb.walker 708 709[system.cpu0.itb.walker] 710type=ArmTableWalker 711clk_domain=system.cpu_clk_domain 712default_p_state=UNDEFINED 713eventq_index=0 714is_stage2=false 715num_squash_per_cycle=2 716p_state_clk_gate_bins=20 717p_state_clk_gate_max=1000000000000 718p_state_clk_gate_min=1000 719power_model=Null 720sys=system 721port=system.cpu0.toL2Bus.slave[2] 722 723[system.cpu0.l2cache] 724type=Cache 725children=prefetcher tags 726addr_ranges=0:18446744073709551615 727assoc=16 728clk_domain=system.cpu_clk_domain 729clusivity=mostly_excl 730default_p_state=UNDEFINED 731demand_mshr_reserve=1 732eventq_index=0 733hit_latency=12 734is_read_only=false 735max_miss_count=0 736mshrs=16 737p_state_clk_gate_bins=20 738p_state_clk_gate_max=1000000000000 739p_state_clk_gate_min=1000 740power_model=Null 741prefetch_on_access=true 742prefetcher=system.cpu0.l2cache.prefetcher 743response_latency=12 744sequential_access=false 745size=1048576 746system=system 747tags=system.cpu0.l2cache.tags 748tgts_per_mshr=8 749write_buffers=8 750writeback_clean=false 751cpu_side=system.cpu0.toL2Bus.master[0] 752mem_side=system.toL2Bus.slave[0] 753 754[system.cpu0.l2cache.prefetcher] 755type=StridePrefetcher 756cache_snoop=false 757clk_domain=system.cpu_clk_domain 758default_p_state=UNDEFINED 759degree=8 760eventq_index=0 761latency=1 762max_conf=7 763min_conf=0 764on_data=true 765on_inst=true 766on_miss=false 767on_read=true 768on_write=true 769p_state_clk_gate_bins=20 770p_state_clk_gate_max=1000000000000 771p_state_clk_gate_min=1000 772power_model=Null 773queue_filter=true 774queue_size=32 775queue_squash=true 776start_conf=4 777sys=system 778table_assoc=4 779table_sets=16 780tag_prefetch=true 781thresh_conf=4 782use_master_id=true 783 784[system.cpu0.l2cache.tags] 785type=RandomRepl 786assoc=16 787block_size=64 788clk_domain=system.cpu_clk_domain 789default_p_state=UNDEFINED 790eventq_index=0 791hit_latency=12 792p_state_clk_gate_bins=20 793p_state_clk_gate_max=1000000000000 794p_state_clk_gate_min=1000 795power_model=Null 796sequential_access=false 797size=1048576 798 799[system.cpu0.toL2Bus] 800type=CoherentXBar 801children=snoop_filter 802clk_domain=system.cpu_clk_domain 803default_p_state=UNDEFINED 804eventq_index=0 805forward_latency=0 806frontend_latency=1 807p_state_clk_gate_bins=20 808p_state_clk_gate_max=1000000000000 809p_state_clk_gate_min=1000 810point_of_coherency=false 811power_model=Null 812response_latency=1 813snoop_filter=system.cpu0.toL2Bus.snoop_filter 814snoop_response_latency=1 815system=system 816use_default_range=false 817width=32 818master=system.cpu0.l2cache.cpu_side 819slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port 820 821[system.cpu0.toL2Bus.snoop_filter] 822type=SnoopFilter 823eventq_index=0 824lookup_latency=0 825max_capacity=8388608 826system=system 827 828[system.cpu0.tracer] 829type=ExeTracer 830eventq_index=0 831 832[system.cpu1] 833type=DerivO3CPU 834children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 835LFSTSize=1024 836LQEntries=16 837LSQCheckLoads=true 838LSQDepCheckShift=0 839SQEntries=16 840SSITSize=1024 841activity=0 842backComSize=5 843branchPred=system.cpu1.branchPred 844cachePorts=200 845checker=Null 846clk_domain=system.cpu_clk_domain 847commitToDecodeDelay=1 848commitToFetchDelay=1 849commitToIEWDelay=1 850commitToRenameDelay=1 851commitWidth=8 852cpu_id=1 853decodeToFetchDelay=1 854decodeToRenameDelay=2 855decodeWidth=3 856default_p_state=UNDEFINED 857dispatchWidth=6 858do_checkpoint_insts=true 859do_quiesce=true 860do_statistics_insts=true 861dstage2_mmu=system.cpu1.dstage2_mmu 862dtb=system.cpu1.dtb 863eventq_index=0 864fetchBufferSize=16 865fetchQueueSize=32 866fetchToDecodeDelay=3 867fetchTrapLatency=1 868fetchWidth=3 869forwardComSize=5 870fuPool=system.cpu1.fuPool 871function_trace=false 872function_trace_start=0 873iewToCommitDelay=1 874iewToDecodeDelay=1 875iewToFetchDelay=1 876iewToRenameDelay=1 877interrupts=system.cpu1.interrupts 878isa=system.cpu1.isa 879issueToExecuteDelay=1 880issueWidth=8 881istage2_mmu=system.cpu1.istage2_mmu 882itb=system.cpu1.itb 883max_insts_all_threads=0 884max_insts_any_thread=0 885max_loads_all_threads=0 886max_loads_any_thread=0 887needsTSO=false 888numIQEntries=32 889numPhysCCRegs=640 890numPhysFloatRegs=192 891numPhysIntRegs=128 892numROBEntries=40 893numRobs=1 894numThreads=1 895p_state_clk_gate_bins=20 896p_state_clk_gate_max=1000000000000 897p_state_clk_gate_min=1000 898power_model=Null 899profile=0 900progress_interval=0 901renameToDecodeDelay=1 902renameToFetchDelay=1 903renameToIEWDelay=1 904renameToROBDelay=1 905renameWidth=3 906simpoint_start_insts= 907smtCommitPolicy=RoundRobin 908smtFetchPolicy=SingleThread 909smtIQPolicy=Partitioned 910smtIQThreshold=100 911smtLSQPolicy=Partitioned 912smtLSQThreshold=100 913smtNumFetchingThreads=1 914smtROBPolicy=Partitioned 915smtROBThreshold=100 916socket_id=0 917squashWidth=8 918store_set_clear_period=250000 919switched_out=false 920system=system 921tracer=system.cpu1.tracer 922trapLatency=13 923wbWidth=8 924workload= 925dcache_port=system.cpu1.dcache.cpu_side 926icache_port=system.cpu1.icache.cpu_side 927 928[system.cpu1.branchPred] 929type=BiModeBP 930BTBEntries=2048 931BTBTagSize=18 932RASSize=16 933choiceCtrBits=2 934choicePredictorSize=8192 935eventq_index=0 936globalCtrBits=2 937globalPredictorSize=8192 938indirectHashGHR=true 939indirectHashTargets=true 940indirectPathLength=3 941indirectSets=256 942indirectTagSize=16 943indirectWays=2 944instShiftAmt=2 945numThreads=1 946useIndirect=true 947 948[system.cpu1.dcache] 949type=Cache 950children=tags 951addr_ranges=0:18446744073709551615 952assoc=2 953clk_domain=system.cpu_clk_domain 954clusivity=mostly_incl 955default_p_state=UNDEFINED 956demand_mshr_reserve=1 957eventq_index=0 958hit_latency=2 959is_read_only=false 960max_miss_count=0 961mshrs=6 962p_state_clk_gate_bins=20 963p_state_clk_gate_max=1000000000000 964p_state_clk_gate_min=1000 965power_model=Null 966prefetch_on_access=false 967prefetcher=Null 968response_latency=2 969sequential_access=false 970size=32768 971system=system 972tags=system.cpu1.dcache.tags 973tgts_per_mshr=8 974write_buffers=16 975writeback_clean=true 976cpu_side=system.cpu1.dcache_port 977mem_side=system.cpu1.toL2Bus.slave[1] 978 979[system.cpu1.dcache.tags] 980type=LRU 981assoc=2 982block_size=64 983clk_domain=system.cpu_clk_domain 984default_p_state=UNDEFINED 985eventq_index=0 986hit_latency=2 987p_state_clk_gate_bins=20 988p_state_clk_gate_max=1000000000000 989p_state_clk_gate_min=1000 990power_model=Null 991sequential_access=false 992size=32768 993 994[system.cpu1.dstage2_mmu] 995type=ArmStage2MMU 996children=stage2_tlb 997eventq_index=0 998stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb 999sys=system 1000tlb=system.cpu1.dtb 1001 1002[system.cpu1.dstage2_mmu.stage2_tlb] 1003type=ArmTLB 1004children=walker 1005eventq_index=0 1006is_stage2=true 1007size=32 1008walker=system.cpu1.dstage2_mmu.stage2_tlb.walker 1009 1010[system.cpu1.dstage2_mmu.stage2_tlb.walker] 1011type=ArmTableWalker 1012clk_domain=system.cpu_clk_domain 1013default_p_state=UNDEFINED 1014eventq_index=0 1015is_stage2=true 1016num_squash_per_cycle=2 1017p_state_clk_gate_bins=20 1018p_state_clk_gate_max=1000000000000 1019p_state_clk_gate_min=1000 1020power_model=Null 1021sys=system 1022 1023[system.cpu1.dtb] 1024type=ArmTLB 1025children=walker 1026eventq_index=0 1027is_stage2=false 1028size=64 1029walker=system.cpu1.dtb.walker 1030 1031[system.cpu1.dtb.walker] 1032type=ArmTableWalker 1033clk_domain=system.cpu_clk_domain 1034default_p_state=UNDEFINED 1035eventq_index=0 1036is_stage2=false 1037num_squash_per_cycle=2 1038p_state_clk_gate_bins=20 1039p_state_clk_gate_max=1000000000000 1040p_state_clk_gate_min=1000 1041power_model=Null 1042sys=system 1043port=system.cpu1.toL2Bus.slave[3] 1044 1045[system.cpu1.fuPool] 1046type=FUPool 1047children=FUList0 FUList1 FUList2 FUList3 FUList4 1048FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 1049eventq_index=0 1050 1051[system.cpu1.fuPool.FUList0] 1052type=FUDesc 1053children=opList 1054count=2 1055eventq_index=0 1056opList=system.cpu1.fuPool.FUList0.opList 1057 1058[system.cpu1.fuPool.FUList0.opList] 1059type=OpDesc 1060eventq_index=0 1061opClass=IntAlu 1062opLat=1 1063pipelined=true 1064 1065[system.cpu1.fuPool.FUList1] 1066type=FUDesc 1067children=opList0 opList1 opList2 1068count=1 1069eventq_index=0 1070opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 system.cpu1.fuPool.FUList1.opList2 1071 1072[system.cpu1.fuPool.FUList1.opList0] 1073type=OpDesc 1074eventq_index=0 1075opClass=IntMult 1076opLat=3 1077pipelined=true 1078 1079[system.cpu1.fuPool.FUList1.opList1] 1080type=OpDesc 1081eventq_index=0 1082opClass=IntDiv 1083opLat=12 1084pipelined=false 1085 1086[system.cpu1.fuPool.FUList1.opList2] 1087type=OpDesc 1088eventq_index=0 1089opClass=IprAccess 1090opLat=3 1091pipelined=true 1092 1093[system.cpu1.fuPool.FUList2] 1094type=FUDesc 1095children=opList 1096count=1 1097eventq_index=0 1098opList=system.cpu1.fuPool.FUList2.opList 1099 1100[system.cpu1.fuPool.FUList2.opList] 1101type=OpDesc 1102eventq_index=0 1103opClass=MemRead 1104opLat=2 1105pipelined=true 1106 1107[system.cpu1.fuPool.FUList3] 1108type=FUDesc 1109children=opList 1110count=1 1111eventq_index=0 1112opList=system.cpu1.fuPool.FUList3.opList 1113 1114[system.cpu1.fuPool.FUList3.opList] 1115type=OpDesc 1116eventq_index=0 1117opClass=MemWrite 1118opLat=2 1119pipelined=true 1120 1121[system.cpu1.fuPool.FUList4] 1122type=FUDesc 1123children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 1124count=2 1125eventq_index=0 1126opList=system.cpu1.fuPool.FUList4.opList00 system.cpu1.fuPool.FUList4.opList01 system.cpu1.fuPool.FUList4.opList02 system.cpu1.fuPool.FUList4.opList03 system.cpu1.fuPool.FUList4.opList04 system.cpu1.fuPool.FUList4.opList05 system.cpu1.fuPool.FUList4.opList06 system.cpu1.fuPool.FUList4.opList07 system.cpu1.fuPool.FUList4.opList08 system.cpu1.fuPool.FUList4.opList09 system.cpu1.fuPool.FUList4.opList10 system.cpu1.fuPool.FUList4.opList11 system.cpu1.fuPool.FUList4.opList12 system.cpu1.fuPool.FUList4.opList13 system.cpu1.fuPool.FUList4.opList14 system.cpu1.fuPool.FUList4.opList15 system.cpu1.fuPool.FUList4.opList16 system.cpu1.fuPool.FUList4.opList17 system.cpu1.fuPool.FUList4.opList18 system.cpu1.fuPool.FUList4.opList19 system.cpu1.fuPool.FUList4.opList20 system.cpu1.fuPool.FUList4.opList21 system.cpu1.fuPool.FUList4.opList22 system.cpu1.fuPool.FUList4.opList23 system.cpu1.fuPool.FUList4.opList24 system.cpu1.fuPool.FUList4.opList25 1127 1128[system.cpu1.fuPool.FUList4.opList00] 1129type=OpDesc 1130eventq_index=0 1131opClass=SimdAdd 1132opLat=4 1133pipelined=true 1134 1135[system.cpu1.fuPool.FUList4.opList01] 1136type=OpDesc 1137eventq_index=0 1138opClass=SimdAddAcc 1139opLat=4 1140pipelined=true 1141 1142[system.cpu1.fuPool.FUList4.opList02] 1143type=OpDesc 1144eventq_index=0 1145opClass=SimdAlu 1146opLat=4 1147pipelined=true 1148 1149[system.cpu1.fuPool.FUList4.opList03] 1150type=OpDesc 1151eventq_index=0 1152opClass=SimdCmp 1153opLat=4 1154pipelined=true 1155 1156[system.cpu1.fuPool.FUList4.opList04] 1157type=OpDesc 1158eventq_index=0 1159opClass=SimdCvt 1160opLat=3 1161pipelined=true 1162 1163[system.cpu1.fuPool.FUList4.opList05] 1164type=OpDesc 1165eventq_index=0 1166opClass=SimdMisc 1167opLat=3 1168pipelined=true 1169 1170[system.cpu1.fuPool.FUList4.opList06] 1171type=OpDesc 1172eventq_index=0 1173opClass=SimdMult 1174opLat=5 1175pipelined=true 1176 1177[system.cpu1.fuPool.FUList4.opList07] 1178type=OpDesc 1179eventq_index=0 1180opClass=SimdMultAcc 1181opLat=5 1182pipelined=true 1183 1184[system.cpu1.fuPool.FUList4.opList08] 1185type=OpDesc 1186eventq_index=0 1187opClass=SimdShift 1188opLat=3 1189pipelined=true 1190 1191[system.cpu1.fuPool.FUList4.opList09] 1192type=OpDesc 1193eventq_index=0 1194opClass=SimdShiftAcc 1195opLat=3 1196pipelined=true 1197 1198[system.cpu1.fuPool.FUList4.opList10] 1199type=OpDesc 1200eventq_index=0 1201opClass=SimdSqrt 1202opLat=9 1203pipelined=true 1204 1205[system.cpu1.fuPool.FUList4.opList11] 1206type=OpDesc 1207eventq_index=0 1208opClass=SimdFloatAdd 1209opLat=5 1210pipelined=true 1211 1212[system.cpu1.fuPool.FUList4.opList12] 1213type=OpDesc 1214eventq_index=0 1215opClass=SimdFloatAlu 1216opLat=5 1217pipelined=true 1218 1219[system.cpu1.fuPool.FUList4.opList13] 1220type=OpDesc 1221eventq_index=0 1222opClass=SimdFloatCmp 1223opLat=3 1224pipelined=true 1225 1226[system.cpu1.fuPool.FUList4.opList14] 1227type=OpDesc 1228eventq_index=0 1229opClass=SimdFloatCvt 1230opLat=3 1231pipelined=true 1232 1233[system.cpu1.fuPool.FUList4.opList15] 1234type=OpDesc 1235eventq_index=0 1236opClass=SimdFloatDiv 1237opLat=3 1238pipelined=true 1239 1240[system.cpu1.fuPool.FUList4.opList16] 1241type=OpDesc 1242eventq_index=0 1243opClass=SimdFloatMisc 1244opLat=3 1245pipelined=true 1246 1247[system.cpu1.fuPool.FUList4.opList17] 1248type=OpDesc 1249eventq_index=0 1250opClass=SimdFloatMult 1251opLat=3 1252pipelined=true 1253 1254[system.cpu1.fuPool.FUList4.opList18] 1255type=OpDesc 1256eventq_index=0 1257opClass=SimdFloatMultAcc 1258opLat=1 1259pipelined=true 1260 1261[system.cpu1.fuPool.FUList4.opList19] 1262type=OpDesc 1263eventq_index=0 1264opClass=SimdFloatSqrt 1265opLat=9 1266pipelined=true 1267 1268[system.cpu1.fuPool.FUList4.opList20] 1269type=OpDesc 1270eventq_index=0 1271opClass=FloatAdd 1272opLat=5 1273pipelined=true 1274 1275[system.cpu1.fuPool.FUList4.opList21] 1276type=OpDesc 1277eventq_index=0 1278opClass=FloatCmp 1279opLat=5 1280pipelined=true 1281 1282[system.cpu1.fuPool.FUList4.opList22] 1283type=OpDesc 1284eventq_index=0 1285opClass=FloatCvt 1286opLat=5 1287pipelined=true 1288 1289[system.cpu1.fuPool.FUList4.opList23] 1290type=OpDesc 1291eventq_index=0 1292opClass=FloatDiv 1293opLat=9 1294pipelined=false 1295 1296[system.cpu1.fuPool.FUList4.opList24] 1297type=OpDesc 1298eventq_index=0 1299opClass=FloatSqrt 1300opLat=33 1301pipelined=false 1302 1303[system.cpu1.fuPool.FUList4.opList25] 1304type=OpDesc 1305eventq_index=0 1306opClass=FloatMult 1307opLat=4 1308pipelined=true 1309 1310[system.cpu1.icache] 1311type=Cache 1312children=tags 1313addr_ranges=0:18446744073709551615 1314assoc=2 1315clk_domain=system.cpu_clk_domain 1316clusivity=mostly_incl 1317default_p_state=UNDEFINED 1318demand_mshr_reserve=1 1319eventq_index=0 1320hit_latency=1 1321is_read_only=true 1322max_miss_count=0 1323mshrs=2 1324p_state_clk_gate_bins=20 1325p_state_clk_gate_max=1000000000000 1326p_state_clk_gate_min=1000 1327power_model=Null 1328prefetch_on_access=false 1329prefetcher=Null 1330response_latency=1 1331sequential_access=false 1332size=32768 1333system=system 1334tags=system.cpu1.icache.tags 1335tgts_per_mshr=8 1336write_buffers=8 1337writeback_clean=true 1338cpu_side=system.cpu1.icache_port 1339mem_side=system.cpu1.toL2Bus.slave[0] 1340 1341[system.cpu1.icache.tags] 1342type=LRU 1343assoc=2 1344block_size=64 1345clk_domain=system.cpu_clk_domain 1346default_p_state=UNDEFINED 1347eventq_index=0 1348hit_latency=1 1349p_state_clk_gate_bins=20 1350p_state_clk_gate_max=1000000000000 1351p_state_clk_gate_min=1000 1352power_model=Null 1353sequential_access=false 1354size=32768 1355 1356[system.cpu1.interrupts] 1357type=ArmInterrupts 1358eventq_index=0 1359 1360[system.cpu1.isa] 1361type=ArmISA 1362decoderFlavour=Generic 1363eventq_index=0 1364fpsid=1090793632 1365id_aa64afr0_el1=0 1366id_aa64afr1_el1=0 1367id_aa64dfr0_el1=1052678 1368id_aa64dfr1_el1=0 1369id_aa64isar0_el1=0 1370id_aa64isar1_el1=0 1371id_aa64mmfr0_el1=15728642 1372id_aa64mmfr1_el1=0	655id_aa64pfr1_el1=0 656id_isar0=34607377 657id_isar1=34677009 658id_isar2=555950401 659id_isar3=17899825 660id_isar4=268501314 661id_isar5=0 662id_mmfr0=270536963 663id_mmfr1=0 664id_mmfr2=19070976 665id_mmfr3=34611729 666id_pfr0=49 667id_pfr1=4113 668midr=1091551472 669pmu=Null 670system=system 671 672[system.cpu0.istage2_mmu] 673type=ArmStage2MMU 674children=stage2_tlb 675eventq_index=0 676stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb 677sys=system 678tlb=system.cpu0.itb 679 680[system.cpu0.istage2_mmu.stage2_tlb] 681type=ArmTLB 682children=walker 683eventq_index=0 684is_stage2=true 685size=32 686walker=system.cpu0.istage2_mmu.stage2_tlb.walker 687 688[system.cpu0.istage2_mmu.stage2_tlb.walker] 689type=ArmTableWalker 690clk_domain=system.cpu_clk_domain 691default_p_state=UNDEFINED 692eventq_index=0 693is_stage2=true 694num_squash_per_cycle=2 695p_state_clk_gate_bins=20 696p_state_clk_gate_max=1000000000000 697p_state_clk_gate_min=1000 698power_model=Null 699sys=system 700 701[system.cpu0.itb] 702type=ArmTLB 703children=walker 704eventq_index=0 705is_stage2=false 706size=64 707walker=system.cpu0.itb.walker 708 709[system.cpu0.itb.walker] 710type=ArmTableWalker 711clk_domain=system.cpu_clk_domain 712default_p_state=UNDEFINED 713eventq_index=0 714is_stage2=false 715num_squash_per_cycle=2 716p_state_clk_gate_bins=20 717p_state_clk_gate_max=1000000000000 718p_state_clk_gate_min=1000 719power_model=Null 720sys=system 721port=system.cpu0.toL2Bus.slave[2] 722 723[system.cpu0.l2cache] 724type=Cache 725children=prefetcher tags 726addr_ranges=0:18446744073709551615 727assoc=16 728clk_domain=system.cpu_clk_domain 729clusivity=mostly_excl 730default_p_state=UNDEFINED 731demand_mshr_reserve=1 732eventq_index=0 733hit_latency=12 734is_read_only=false 735max_miss_count=0 736mshrs=16 737p_state_clk_gate_bins=20 738p_state_clk_gate_max=1000000000000 739p_state_clk_gate_min=1000 740power_model=Null 741prefetch_on_access=true 742prefetcher=system.cpu0.l2cache.prefetcher 743response_latency=12 744sequential_access=false 745size=1048576 746system=system 747tags=system.cpu0.l2cache.tags 748tgts_per_mshr=8 749write_buffers=8 750writeback_clean=false 751cpu_side=system.cpu0.toL2Bus.master[0] 752mem_side=system.toL2Bus.slave[0] 753 754[system.cpu0.l2cache.prefetcher] 755type=StridePrefetcher 756cache_snoop=false 757clk_domain=system.cpu_clk_domain 758default_p_state=UNDEFINED 759degree=8 760eventq_index=0 761latency=1 762max_conf=7 763min_conf=0 764on_data=true 765on_inst=true 766on_miss=false 767on_read=true 768on_write=true 769p_state_clk_gate_bins=20 770p_state_clk_gate_max=1000000000000 771p_state_clk_gate_min=1000 772power_model=Null 773queue_filter=true 774queue_size=32 775queue_squash=true 776start_conf=4 777sys=system 778table_assoc=4 779table_sets=16 780tag_prefetch=true 781thresh_conf=4 782use_master_id=true 783 784[system.cpu0.l2cache.tags] 785type=RandomRepl 786assoc=16 787block_size=64 788clk_domain=system.cpu_clk_domain 789default_p_state=UNDEFINED 790eventq_index=0 791hit_latency=12 792p_state_clk_gate_bins=20 793p_state_clk_gate_max=1000000000000 794p_state_clk_gate_min=1000 795power_model=Null 796sequential_access=false 797size=1048576 798 799[system.cpu0.toL2Bus] 800type=CoherentXBar 801children=snoop_filter 802clk_domain=system.cpu_clk_domain 803default_p_state=UNDEFINED 804eventq_index=0 805forward_latency=0 806frontend_latency=1 807p_state_clk_gate_bins=20 808p_state_clk_gate_max=1000000000000 809p_state_clk_gate_min=1000 810point_of_coherency=false 811power_model=Null 812response_latency=1 813snoop_filter=system.cpu0.toL2Bus.snoop_filter 814snoop_response_latency=1 815system=system 816use_default_range=false 817width=32 818master=system.cpu0.l2cache.cpu_side 819slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port 820 821[system.cpu0.toL2Bus.snoop_filter] 822type=SnoopFilter 823eventq_index=0 824lookup_latency=0 825max_capacity=8388608 826system=system 827 828[system.cpu0.tracer] 829type=ExeTracer 830eventq_index=0 831 832[system.cpu1] 833type=DerivO3CPU 834children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 835LFSTSize=1024 836LQEntries=16 837LSQCheckLoads=true 838LSQDepCheckShift=0 839SQEntries=16 840SSITSize=1024 841activity=0 842backComSize=5 843branchPred=system.cpu1.branchPred 844cachePorts=200 845checker=Null 846clk_domain=system.cpu_clk_domain 847commitToDecodeDelay=1 848commitToFetchDelay=1 849commitToIEWDelay=1 850commitToRenameDelay=1 851commitWidth=8 852cpu_id=1 853decodeToFetchDelay=1 854decodeToRenameDelay=2 855decodeWidth=3 856default_p_state=UNDEFINED 857dispatchWidth=6 858do_checkpoint_insts=true 859do_quiesce=true 860do_statistics_insts=true 861dstage2_mmu=system.cpu1.dstage2_mmu 862dtb=system.cpu1.dtb 863eventq_index=0 864fetchBufferSize=16 865fetchQueueSize=32 866fetchToDecodeDelay=3 867fetchTrapLatency=1 868fetchWidth=3 869forwardComSize=5 870fuPool=system.cpu1.fuPool 871function_trace=false 872function_trace_start=0 873iewToCommitDelay=1 874iewToDecodeDelay=1 875iewToFetchDelay=1 876iewToRenameDelay=1 877interrupts=system.cpu1.interrupts 878isa=system.cpu1.isa 879issueToExecuteDelay=1 880issueWidth=8 881istage2_mmu=system.cpu1.istage2_mmu 882itb=system.cpu1.itb 883max_insts_all_threads=0 884max_insts_any_thread=0 885max_loads_all_threads=0 886max_loads_any_thread=0 887needsTSO=false 888numIQEntries=32 889numPhysCCRegs=640 890numPhysFloatRegs=192 891numPhysIntRegs=128 892numROBEntries=40 893numRobs=1 894numThreads=1 895p_state_clk_gate_bins=20 896p_state_clk_gate_max=1000000000000 897p_state_clk_gate_min=1000 898power_model=Null 899profile=0 900progress_interval=0 901renameToDecodeDelay=1 902renameToFetchDelay=1 903renameToIEWDelay=1 904renameToROBDelay=1 905renameWidth=3 906simpoint_start_insts= 907smtCommitPolicy=RoundRobin 908smtFetchPolicy=SingleThread 909smtIQPolicy=Partitioned 910smtIQThreshold=100 911smtLSQPolicy=Partitioned 912smtLSQThreshold=100 913smtNumFetchingThreads=1 914smtROBPolicy=Partitioned 915smtROBThreshold=100 916socket_id=0 917squashWidth=8 918store_set_clear_period=250000 919switched_out=false 920system=system 921tracer=system.cpu1.tracer 922trapLatency=13 923wbWidth=8 924workload= 925dcache_port=system.cpu1.dcache.cpu_side 926icache_port=system.cpu1.icache.cpu_side 927 928[system.cpu1.branchPred] 929type=BiModeBP 930BTBEntries=2048 931BTBTagSize=18 932RASSize=16 933choiceCtrBits=2 934choicePredictorSize=8192 935eventq_index=0 936globalCtrBits=2 937globalPredictorSize=8192 938indirectHashGHR=true 939indirectHashTargets=true 940indirectPathLength=3 941indirectSets=256 942indirectTagSize=16 943indirectWays=2 944instShiftAmt=2 945numThreads=1 946useIndirect=true 947 948[system.cpu1.dcache] 949type=Cache 950children=tags 951addr_ranges=0:18446744073709551615 952assoc=2 953clk_domain=system.cpu_clk_domain 954clusivity=mostly_incl 955default_p_state=UNDEFINED 956demand_mshr_reserve=1 957eventq_index=0 958hit_latency=2 959is_read_only=false 960max_miss_count=0 961mshrs=6 962p_state_clk_gate_bins=20 963p_state_clk_gate_max=1000000000000 964p_state_clk_gate_min=1000 965power_model=Null 966prefetch_on_access=false 967prefetcher=Null 968response_latency=2 969sequential_access=false 970size=32768 971system=system 972tags=system.cpu1.dcache.tags 973tgts_per_mshr=8 974write_buffers=16 975writeback_clean=true 976cpu_side=system.cpu1.dcache_port 977mem_side=system.cpu1.toL2Bus.slave[1] 978 979[system.cpu1.dcache.tags] 980type=LRU 981assoc=2 982block_size=64 983clk_domain=system.cpu_clk_domain 984default_p_state=UNDEFINED 985eventq_index=0 986hit_latency=2 987p_state_clk_gate_bins=20 988p_state_clk_gate_max=1000000000000 989p_state_clk_gate_min=1000 990power_model=Null 991sequential_access=false 992size=32768 993 994[system.cpu1.dstage2_mmu] 995type=ArmStage2MMU 996children=stage2_tlb 997eventq_index=0 998stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb 999sys=system 1000tlb=system.cpu1.dtb 1001 1002[system.cpu1.dstage2_mmu.stage2_tlb] 1003type=ArmTLB 1004children=walker 1005eventq_index=0 1006is_stage2=true 1007size=32 1008walker=system.cpu1.dstage2_mmu.stage2_tlb.walker 1009 1010[system.cpu1.dstage2_mmu.stage2_tlb.walker] 1011type=ArmTableWalker 1012clk_domain=system.cpu_clk_domain 1013default_p_state=UNDEFINED 1014eventq_index=0 1015is_stage2=true 1016num_squash_per_cycle=2 1017p_state_clk_gate_bins=20 1018p_state_clk_gate_max=1000000000000 1019p_state_clk_gate_min=1000 1020power_model=Null 1021sys=system 1022 1023[system.cpu1.dtb] 1024type=ArmTLB 1025children=walker 1026eventq_index=0 1027is_stage2=false 1028size=64 1029walker=system.cpu1.dtb.walker 1030 1031[system.cpu1.dtb.walker] 1032type=ArmTableWalker 1033clk_domain=system.cpu_clk_domain 1034default_p_state=UNDEFINED 1035eventq_index=0 1036is_stage2=false 1037num_squash_per_cycle=2 1038p_state_clk_gate_bins=20 1039p_state_clk_gate_max=1000000000000 1040p_state_clk_gate_min=1000 1041power_model=Null 1042sys=system 1043port=system.cpu1.toL2Bus.slave[3] 1044 1045[system.cpu1.fuPool] 1046type=FUPool 1047children=FUList0 FUList1 FUList2 FUList3 FUList4 1048FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 1049eventq_index=0 1050 1051[system.cpu1.fuPool.FUList0] 1052type=FUDesc 1053children=opList 1054count=2 1055eventq_index=0 1056opList=system.cpu1.fuPool.FUList0.opList 1057 1058[system.cpu1.fuPool.FUList0.opList] 1059type=OpDesc 1060eventq_index=0 1061opClass=IntAlu 1062opLat=1 1063pipelined=true 1064 1065[system.cpu1.fuPool.FUList1] 1066type=FUDesc 1067children=opList0 opList1 opList2 1068count=1 1069eventq_index=0 1070opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 system.cpu1.fuPool.FUList1.opList2 1071 1072[system.cpu1.fuPool.FUList1.opList0] 1073type=OpDesc 1074eventq_index=0 1075opClass=IntMult 1076opLat=3 1077pipelined=true 1078 1079[system.cpu1.fuPool.FUList1.opList1] 1080type=OpDesc 1081eventq_index=0 1082opClass=IntDiv 1083opLat=12 1084pipelined=false 1085 1086[system.cpu1.fuPool.FUList1.opList2] 1087type=OpDesc 1088eventq_index=0 1089opClass=IprAccess 1090opLat=3 1091pipelined=true 1092 1093[system.cpu1.fuPool.FUList2] 1094type=FUDesc 1095children=opList 1096count=1 1097eventq_index=0 1098opList=system.cpu1.fuPool.FUList2.opList 1099 1100[system.cpu1.fuPool.FUList2.opList] 1101type=OpDesc 1102eventq_index=0 1103opClass=MemRead 1104opLat=2 1105pipelined=true 1106 1107[system.cpu1.fuPool.FUList3] 1108type=FUDesc 1109children=opList 1110count=1 1111eventq_index=0 1112opList=system.cpu1.fuPool.FUList3.opList 1113 1114[system.cpu1.fuPool.FUList3.opList] 1115type=OpDesc 1116eventq_index=0 1117opClass=MemWrite 1118opLat=2 1119pipelined=true 1120 1121[system.cpu1.fuPool.FUList4] 1122type=FUDesc 1123children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 1124count=2 1125eventq_index=0 1126opList=system.cpu1.fuPool.FUList4.opList00 system.cpu1.fuPool.FUList4.opList01 system.cpu1.fuPool.FUList4.opList02 system.cpu1.fuPool.FUList4.opList03 system.cpu1.fuPool.FUList4.opList04 system.cpu1.fuPool.FUList4.opList05 system.cpu1.fuPool.FUList4.opList06 system.cpu1.fuPool.FUList4.opList07 system.cpu1.fuPool.FUList4.opList08 system.cpu1.fuPool.FUList4.opList09 system.cpu1.fuPool.FUList4.opList10 system.cpu1.fuPool.FUList4.opList11 system.cpu1.fuPool.FUList4.opList12 system.cpu1.fuPool.FUList4.opList13 system.cpu1.fuPool.FUList4.opList14 system.cpu1.fuPool.FUList4.opList15 system.cpu1.fuPool.FUList4.opList16 system.cpu1.fuPool.FUList4.opList17 system.cpu1.fuPool.FUList4.opList18 system.cpu1.fuPool.FUList4.opList19 system.cpu1.fuPool.FUList4.opList20 system.cpu1.fuPool.FUList4.opList21 system.cpu1.fuPool.FUList4.opList22 system.cpu1.fuPool.FUList4.opList23 system.cpu1.fuPool.FUList4.opList24 system.cpu1.fuPool.FUList4.opList25 1127 1128[system.cpu1.fuPool.FUList4.opList00] 1129type=OpDesc 1130eventq_index=0 1131opClass=SimdAdd 1132opLat=4 1133pipelined=true 1134 1135[system.cpu1.fuPool.FUList4.opList01] 1136type=OpDesc 1137eventq_index=0 1138opClass=SimdAddAcc 1139opLat=4 1140pipelined=true 1141 1142[system.cpu1.fuPool.FUList4.opList02] 1143type=OpDesc 1144eventq_index=0 1145opClass=SimdAlu 1146opLat=4 1147pipelined=true 1148 1149[system.cpu1.fuPool.FUList4.opList03] 1150type=OpDesc 1151eventq_index=0 1152opClass=SimdCmp 1153opLat=4 1154pipelined=true 1155 1156[system.cpu1.fuPool.FUList4.opList04] 1157type=OpDesc 1158eventq_index=0 1159opClass=SimdCvt 1160opLat=3 1161pipelined=true 1162 1163[system.cpu1.fuPool.FUList4.opList05] 1164type=OpDesc 1165eventq_index=0 1166opClass=SimdMisc 1167opLat=3 1168pipelined=true 1169 1170[system.cpu1.fuPool.FUList4.opList06] 1171type=OpDesc 1172eventq_index=0 1173opClass=SimdMult 1174opLat=5 1175pipelined=true 1176 1177[system.cpu1.fuPool.FUList4.opList07] 1178type=OpDesc 1179eventq_index=0 1180opClass=SimdMultAcc 1181opLat=5 1182pipelined=true 1183 1184[system.cpu1.fuPool.FUList4.opList08] 1185type=OpDesc 1186eventq_index=0 1187opClass=SimdShift 1188opLat=3 1189pipelined=true 1190 1191[system.cpu1.fuPool.FUList4.opList09] 1192type=OpDesc 1193eventq_index=0 1194opClass=SimdShiftAcc 1195opLat=3 1196pipelined=true 1197 1198[system.cpu1.fuPool.FUList4.opList10] 1199type=OpDesc 1200eventq_index=0 1201opClass=SimdSqrt 1202opLat=9 1203pipelined=true 1204 1205[system.cpu1.fuPool.FUList4.opList11] 1206type=OpDesc 1207eventq_index=0 1208opClass=SimdFloatAdd 1209opLat=5 1210pipelined=true 1211 1212[system.cpu1.fuPool.FUList4.opList12] 1213type=OpDesc 1214eventq_index=0 1215opClass=SimdFloatAlu 1216opLat=5 1217pipelined=true 1218 1219[system.cpu1.fuPool.FUList4.opList13] 1220type=OpDesc 1221eventq_index=0 1222opClass=SimdFloatCmp 1223opLat=3 1224pipelined=true 1225 1226[system.cpu1.fuPool.FUList4.opList14] 1227type=OpDesc 1228eventq_index=0 1229opClass=SimdFloatCvt 1230opLat=3 1231pipelined=true 1232 1233[system.cpu1.fuPool.FUList4.opList15] 1234type=OpDesc 1235eventq_index=0 1236opClass=SimdFloatDiv 1237opLat=3 1238pipelined=true 1239 1240[system.cpu1.fuPool.FUList4.opList16] 1241type=OpDesc 1242eventq_index=0 1243opClass=SimdFloatMisc 1244opLat=3 1245pipelined=true 1246 1247[system.cpu1.fuPool.FUList4.opList17] 1248type=OpDesc 1249eventq_index=0 1250opClass=SimdFloatMult 1251opLat=3 1252pipelined=true 1253 1254[system.cpu1.fuPool.FUList4.opList18] 1255type=OpDesc 1256eventq_index=0 1257opClass=SimdFloatMultAcc 1258opLat=1 1259pipelined=true 1260 1261[system.cpu1.fuPool.FUList4.opList19] 1262type=OpDesc 1263eventq_index=0 1264opClass=SimdFloatSqrt 1265opLat=9 1266pipelined=true 1267 1268[system.cpu1.fuPool.FUList4.opList20] 1269type=OpDesc 1270eventq_index=0 1271opClass=FloatAdd 1272opLat=5 1273pipelined=true 1274 1275[system.cpu1.fuPool.FUList4.opList21] 1276type=OpDesc 1277eventq_index=0 1278opClass=FloatCmp 1279opLat=5 1280pipelined=true 1281 1282[system.cpu1.fuPool.FUList4.opList22] 1283type=OpDesc 1284eventq_index=0 1285opClass=FloatCvt 1286opLat=5 1287pipelined=true 1288 1289[system.cpu1.fuPool.FUList4.opList23] 1290type=OpDesc 1291eventq_index=0 1292opClass=FloatDiv 1293opLat=9 1294pipelined=false 1295 1296[system.cpu1.fuPool.FUList4.opList24] 1297type=OpDesc 1298eventq_index=0 1299opClass=FloatSqrt 1300opLat=33 1301pipelined=false 1302 1303[system.cpu1.fuPool.FUList4.opList25] 1304type=OpDesc 1305eventq_index=0 1306opClass=FloatMult 1307opLat=4 1308pipelined=true 1309 1310[system.cpu1.icache] 1311type=Cache 1312children=tags 1313addr_ranges=0:18446744073709551615 1314assoc=2 1315clk_domain=system.cpu_clk_domain 1316clusivity=mostly_incl 1317default_p_state=UNDEFINED 1318demand_mshr_reserve=1 1319eventq_index=0 1320hit_latency=1 1321is_read_only=true 1322max_miss_count=0 1323mshrs=2 1324p_state_clk_gate_bins=20 1325p_state_clk_gate_max=1000000000000 1326p_state_clk_gate_min=1000 1327power_model=Null 1328prefetch_on_access=false 1329prefetcher=Null 1330response_latency=1 1331sequential_access=false 1332size=32768 1333system=system 1334tags=system.cpu1.icache.tags 1335tgts_per_mshr=8 1336write_buffers=8 1337writeback_clean=true 1338cpu_side=system.cpu1.icache_port 1339mem_side=system.cpu1.toL2Bus.slave[0] 1340 1341[system.cpu1.icache.tags] 1342type=LRU 1343assoc=2 1344block_size=64 1345clk_domain=system.cpu_clk_domain 1346default_p_state=UNDEFINED 1347eventq_index=0 1348hit_latency=1 1349p_state_clk_gate_bins=20 1350p_state_clk_gate_max=1000000000000 1351p_state_clk_gate_min=1000 1352power_model=Null 1353sequential_access=false 1354size=32768 1355 1356[system.cpu1.interrupts] 1357type=ArmInterrupts 1358eventq_index=0 1359 1360[system.cpu1.isa] 1361type=ArmISA 1362decoderFlavour=Generic 1363eventq_index=0 1364fpsid=1090793632 1365id_aa64afr0_el1=0 1366id_aa64afr1_el1=0 1367id_aa64dfr0_el1=1052678 1368id_aa64dfr1_el1=0 1369id_aa64isar0_el1=0 1370id_aa64isar1_el1=0 1371id_aa64mmfr0_el1=15728642 1372id_aa64mmfr1_el1=0
1373id_aa64pfr0_el1=17	1373id_aa64pfr0_el1=34
1374id_aa64pfr1_el1=0 1375id_isar0=34607377 1376id_isar1=34677009 1377id_isar2=555950401 1378id_isar3=17899825 1379id_isar4=268501314 1380id_isar5=0 1381id_mmfr0=270536963 1382id_mmfr1=0 1383id_mmfr2=19070976 1384id_mmfr3=34611729 1385id_pfr0=49 1386id_pfr1=4113 1387midr=1091551472 1388pmu=Null 1389system=system 1390 1391[system.cpu1.istage2_mmu] 1392type=ArmStage2MMU 1393children=stage2_tlb 1394eventq_index=0 1395stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb 1396sys=system 1397tlb=system.cpu1.itb 1398 1399[system.cpu1.istage2_mmu.stage2_tlb] 1400type=ArmTLB 1401children=walker 1402eventq_index=0 1403is_stage2=true 1404size=32 1405walker=system.cpu1.istage2_mmu.stage2_tlb.walker 1406 1407[system.cpu1.istage2_mmu.stage2_tlb.walker] 1408type=ArmTableWalker 1409clk_domain=system.cpu_clk_domain 1410default_p_state=UNDEFINED 1411eventq_index=0 1412is_stage2=true 1413num_squash_per_cycle=2 1414p_state_clk_gate_bins=20 1415p_state_clk_gate_max=1000000000000 1416p_state_clk_gate_min=1000 1417power_model=Null 1418sys=system 1419 1420[system.cpu1.itb] 1421type=ArmTLB 1422children=walker 1423eventq_index=0 1424is_stage2=false 1425size=64 1426walker=system.cpu1.itb.walker 1427 1428[system.cpu1.itb.walker] 1429type=ArmTableWalker 1430clk_domain=system.cpu_clk_domain 1431default_p_state=UNDEFINED 1432eventq_index=0 1433is_stage2=false 1434num_squash_per_cycle=2 1435p_state_clk_gate_bins=20 1436p_state_clk_gate_max=1000000000000 1437p_state_clk_gate_min=1000 1438power_model=Null 1439sys=system 1440port=system.cpu1.toL2Bus.slave[2] 1441 1442[system.cpu1.l2cache] 1443type=Cache 1444children=prefetcher tags 1445addr_ranges=0:18446744073709551615 1446assoc=16 1447clk_domain=system.cpu_clk_domain 1448clusivity=mostly_excl 1449default_p_state=UNDEFINED 1450demand_mshr_reserve=1 1451eventq_index=0 1452hit_latency=12 1453is_read_only=false 1454max_miss_count=0 1455mshrs=16 1456p_state_clk_gate_bins=20 1457p_state_clk_gate_max=1000000000000 1458p_state_clk_gate_min=1000 1459power_model=Null 1460prefetch_on_access=true 1461prefetcher=system.cpu1.l2cache.prefetcher 1462response_latency=12 1463sequential_access=false 1464size=1048576 1465system=system 1466tags=system.cpu1.l2cache.tags 1467tgts_per_mshr=8 1468write_buffers=8 1469writeback_clean=false 1470cpu_side=system.cpu1.toL2Bus.master[0] 1471mem_side=system.toL2Bus.slave[1] 1472 1473[system.cpu1.l2cache.prefetcher] 1474type=StridePrefetcher 1475cache_snoop=false 1476clk_domain=system.cpu_clk_domain 1477default_p_state=UNDEFINED 1478degree=8 1479eventq_index=0 1480latency=1 1481max_conf=7 1482min_conf=0 1483on_data=true 1484on_inst=true 1485on_miss=false 1486on_read=true 1487on_write=true 1488p_state_clk_gate_bins=20 1489p_state_clk_gate_max=1000000000000 1490p_state_clk_gate_min=1000 1491power_model=Null 1492queue_filter=true 1493queue_size=32 1494queue_squash=true 1495start_conf=4 1496sys=system 1497table_assoc=4 1498table_sets=16 1499tag_prefetch=true 1500thresh_conf=4 1501use_master_id=true 1502 1503[system.cpu1.l2cache.tags] 1504type=RandomRepl 1505assoc=16 1506block_size=64 1507clk_domain=system.cpu_clk_domain 1508default_p_state=UNDEFINED 1509eventq_index=0 1510hit_latency=12 1511p_state_clk_gate_bins=20 1512p_state_clk_gate_max=1000000000000 1513p_state_clk_gate_min=1000 1514power_model=Null 1515sequential_access=false 1516size=1048576 1517 1518[system.cpu1.toL2Bus] 1519type=CoherentXBar 1520children=snoop_filter 1521clk_domain=system.cpu_clk_domain 1522default_p_state=UNDEFINED 1523eventq_index=0 1524forward_latency=0 1525frontend_latency=1 1526p_state_clk_gate_bins=20 1527p_state_clk_gate_max=1000000000000 1528p_state_clk_gate_min=1000 1529point_of_coherency=false 1530power_model=Null 1531response_latency=1 1532snoop_filter=system.cpu1.toL2Bus.snoop_filter 1533snoop_response_latency=1 1534system=system 1535use_default_range=false 1536width=32 1537master=system.cpu1.l2cache.cpu_side 1538slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port 1539 1540[system.cpu1.toL2Bus.snoop_filter] 1541type=SnoopFilter 1542eventq_index=0 1543lookup_latency=0 1544max_capacity=8388608 1545system=system 1546 1547[system.cpu1.tracer] 1548type=ExeTracer 1549eventq_index=0 1550 1551[system.cpu_clk_domain] 1552type=SrcClockDomain 1553clock=500 1554domain_id=-1 1555eventq_index=0 1556init_perf_level=0 1557voltage_domain=system.voltage_domain 1558 1559[system.dvfs_handler] 1560type=DVFSHandler 1561domains= 1562enable=false 1563eventq_index=0 1564sys_clk_domain=system.clk_domain 1565transition_latency=100000000 1566 1567[system.intrctrl] 1568type=IntrControl 1569eventq_index=0 1570sys=system 1571 1572[system.iobus] 1573type=NoncoherentXBar 1574clk_domain=system.clk_domain 1575default_p_state=UNDEFINED 1576eventq_index=0 1577forward_latency=1 1578frontend_latency=2 1579p_state_clk_gate_bins=20 1580p_state_clk_gate_max=1000000000000 1581p_state_clk_gate_min=1000 1582power_model=Null 1583response_latency=2 1584use_default_range=false 1585width=16 1586master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side 1587slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 1588 1589[system.iocache] 1590type=Cache 1591children=tags 1592addr_ranges=2147483648:2415919103 1593assoc=8 1594clk_domain=system.clk_domain 1595clusivity=mostly_incl 1596default_p_state=UNDEFINED 1597demand_mshr_reserve=1 1598eventq_index=0 1599hit_latency=50 1600is_read_only=false 1601max_miss_count=0 1602mshrs=20 1603p_state_clk_gate_bins=20 1604p_state_clk_gate_max=1000000000000 1605p_state_clk_gate_min=1000 1606power_model=Null 1607prefetch_on_access=false 1608prefetcher=Null 1609response_latency=50 1610sequential_access=false 1611size=1024 1612system=system 1613tags=system.iocache.tags 1614tgts_per_mshr=12 1615write_buffers=8 1616writeback_clean=false 1617cpu_side=system.iobus.master[25] 1618mem_side=system.membus.slave[3] 1619 1620[system.iocache.tags] 1621type=LRU 1622assoc=8 1623block_size=64 1624clk_domain=system.clk_domain 1625default_p_state=UNDEFINED 1626eventq_index=0 1627hit_latency=50 1628p_state_clk_gate_bins=20 1629p_state_clk_gate_max=1000000000000 1630p_state_clk_gate_min=1000 1631power_model=Null 1632sequential_access=false 1633size=1024 1634 1635[system.l2c] 1636type=Cache 1637children=tags 1638addr_ranges=0:18446744073709551615 1639assoc=8 1640clk_domain=system.cpu_clk_domain 1641clusivity=mostly_incl 1642default_p_state=UNDEFINED 1643demand_mshr_reserve=1 1644eventq_index=0 1645hit_latency=20 1646is_read_only=false 1647max_miss_count=0 1648mshrs=20 1649p_state_clk_gate_bins=20 1650p_state_clk_gate_max=1000000000000 1651p_state_clk_gate_min=1000 1652power_model=Null 1653prefetch_on_access=false 1654prefetcher=Null 1655response_latency=20 1656sequential_access=false 1657size=4194304 1658system=system 1659tags=system.l2c.tags 1660tgts_per_mshr=12 1661write_buffers=8 1662writeback_clean=false 1663cpu_side=system.toL2Bus.master[0] 1664mem_side=system.membus.slave[2] 1665 1666[system.l2c.tags] 1667type=LRU 1668assoc=8 1669block_size=64 1670clk_domain=system.cpu_clk_domain 1671default_p_state=UNDEFINED 1672eventq_index=0 1673hit_latency=20 1674p_state_clk_gate_bins=20 1675p_state_clk_gate_max=1000000000000 1676p_state_clk_gate_min=1000 1677power_model=Null 1678sequential_access=false 1679size=4194304 1680 1681[system.membus] 1682type=CoherentXBar 1683children=badaddr_responder snoop_filter 1684clk_domain=system.clk_domain 1685default_p_state=UNDEFINED 1686eventq_index=0 1687forward_latency=4 1688frontend_latency=3 1689p_state_clk_gate_bins=20 1690p_state_clk_gate_max=1000000000000 1691p_state_clk_gate_min=1000 1692point_of_coherency=true 1693power_model=Null 1694response_latency=2 1695snoop_filter=system.membus.snoop_filter 1696snoop_response_latency=4 1697system=system 1698use_default_range=false 1699width=16 1700default=system.membus.badaddr_responder.pio 1701master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port 1702slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side 1703 1704[system.membus.badaddr_responder] 1705type=IsaFake 1706clk_domain=system.clk_domain 1707default_p_state=UNDEFINED 1708eventq_index=0 1709fake_mem=false 1710p_state_clk_gate_bins=20 1711p_state_clk_gate_max=1000000000000 1712p_state_clk_gate_min=1000 1713pio_addr=0 1714pio_latency=100000 1715pio_size=8 1716power_model=Null 1717ret_bad_addr=true 1718ret_data16=65535 1719ret_data32=4294967295 1720ret_data64=18446744073709551615 1721ret_data8=255 1722system=system 1723update_data=false 1724warn_access=warn 1725pio=system.membus.default 1726 1727[system.membus.snoop_filter] 1728type=SnoopFilter 1729eventq_index=0 1730lookup_latency=1 1731max_capacity=8388608 1732system=system 1733 1734[system.physmem] 1735type=DRAMCtrl 1736IDD0=0.075000 1737IDD02=0.000000 1738IDD2N=0.050000 1739IDD2N2=0.000000 1740IDD2P0=0.000000 1741IDD2P02=0.000000 1742IDD2P1=0.000000 1743IDD2P12=0.000000 1744IDD3N=0.057000 1745IDD3N2=0.000000 1746IDD3P0=0.000000 1747IDD3P02=0.000000 1748IDD3P1=0.000000 1749IDD3P12=0.000000 1750IDD4R=0.187000 1751IDD4R2=0.000000 1752IDD4W=0.165000 1753IDD4W2=0.000000 1754IDD5=0.220000 1755IDD52=0.000000 1756IDD6=0.000000 1757IDD62=0.000000 1758VDD=1.500000 1759VDD2=0.000000 1760activation_limit=4 1761addr_mapping=RoRaBaCoCh 1762bank_groups_per_rank=0 1763banks_per_rank=8 1764burst_length=8 1765channels=1 1766clk_domain=system.clk_domain 1767conf_table_reported=true 1768default_p_state=UNDEFINED 1769device_bus_width=8 1770device_rowbuffer_size=1024 1771device_size=536870912 1772devices_per_rank=8 1773dll=true 1774eventq_index=0 1775in_addr_map=true 1776max_accesses_per_row=16 1777mem_sched_policy=frfcfs 1778min_writes_per_switch=16 1779null=false 1780p_state_clk_gate_bins=20 1781p_state_clk_gate_max=1000000000000 1782p_state_clk_gate_min=1000 1783page_policy=open_adaptive 1784power_model=Null 1785range=2147483648:2415919103 1786ranks_per_channel=2 1787read_buffer_size=32 1788static_backend_latency=10000 1789static_frontend_latency=10000 1790tBURST=5000 1791tCCD_L=0 1792tCK=1250 1793tCL=13750 1794tCS=2500 1795tRAS=35000 1796tRCD=13750 1797tREFI=7800000 1798tRFC=260000 1799tRP=13750 1800tRRD=6000 1801tRRD_L=0 1802tRTP=7500 1803tRTW=2500 1804tWR=15000 1805tWTR=7500 1806tXAW=30000 1807tXP=0 1808tXPDLL=0 1809tXS=0 1810tXSDLL=0 1811write_buffer_size=64 1812write_high_thresh_perc=85 1813write_low_thresh_perc=50 1814port=system.membus.master[5] 1815 1816[system.realview] 1817type=RealView 1818children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake 1819eventq_index=0 1820intrctrl=system.intrctrl 1821system=system 1822 1823[system.realview.aaci_fake] 1824type=AmbaFake 1825amba_id=0 1826clk_domain=system.clk_domain 1827default_p_state=UNDEFINED 1828eventq_index=0 1829ignore_access=false 1830p_state_clk_gate_bins=20 1831p_state_clk_gate_max=1000000000000 1832p_state_clk_gate_min=1000 1833pio_addr=470024192 1834pio_latency=100000 1835power_model=Null 1836system=system 1837pio=system.iobus.master[18] 1838 1839[system.realview.cf_ctrl] 1840type=IdeController 1841BAR0=471465984 1842BAR0LegacyIO=true 1843BAR0Size=256 1844BAR1=471466240 1845BAR1LegacyIO=true 1846BAR1Size=4096 1847BAR2=1 1848BAR2LegacyIO=false 1849BAR2Size=8 1850BAR3=1 1851BAR3LegacyIO=false 1852BAR3Size=4 1853BAR4=1 1854BAR4LegacyIO=false 1855BAR4Size=16 1856BAR5=1 1857BAR5LegacyIO=false 1858BAR5Size=0 1859BIST=0 1860CacheLineSize=0 1861CapabilityPtr=0 1862CardbusCIS=0 1863ClassCode=1 1864Command=1 1865DeviceID=28945 1866ExpansionROM=0 1867HeaderType=0 1868InterruptLine=31 1869InterruptPin=1 1870LatencyTimer=0 1871LegacyIOBase=0 1872MSICAPBaseOffset=0 1873MSICAPCapId=0 1874MSICAPMaskBits=0 1875MSICAPMsgAddr=0 1876MSICAPMsgCtrl=0 1877MSICAPMsgData=0 1878MSICAPMsgUpperAddr=0 1879MSICAPNextCapability=0 1880MSICAPPendingBits=0 1881MSIXCAPBaseOffset=0 1882MSIXCAPCapId=0 1883MSIXCAPNextCapability=0 1884MSIXMsgCtrl=0 1885MSIXPbaOffset=0 1886MSIXTableOffset=0 1887MaximumLatency=0 1888MinimumGrant=0 1889PMCAPBaseOffset=0 1890PMCAPCapId=0 1891PMCAPCapabilities=0 1892PMCAPCtrlStatus=0 1893PMCAPNextCapability=0 1894PXCAPBaseOffset=0 1895PXCAPCapId=0 1896PXCAPCapabilities=0 1897PXCAPDevCap2=0 1898PXCAPDevCapabilities=0 1899PXCAPDevCtrl=0 1900PXCAPDevCtrl2=0 1901PXCAPDevStatus=0 1902PXCAPLinkCap=0 1903PXCAPLinkCtrl=0 1904PXCAPLinkStatus=0 1905PXCAPNextCapability=0 1906ProgIF=133 1907Revision=0 1908Status=640 1909SubClassCode=1 1910SubsystemID=0 1911SubsystemVendorID=0 1912VendorID=32902 1913clk_domain=system.clk_domain 1914config_latency=20000 1915ctrl_offset=2 1916default_p_state=UNDEFINED 1917disks= 1918eventq_index=0 1919host=system.realview.pci_host 1920io_shift=2 1921p_state_clk_gate_bins=20 1922p_state_clk_gate_max=1000000000000 1923p_state_clk_gate_min=1000 1924pci_bus=2 1925pci_dev=0 1926pci_func=0 1927pio_latency=30000 1928power_model=Null 1929system=system 1930dma=system.iobus.slave[2] 1931pio=system.iobus.master[9] 1932 1933[system.realview.clcd] 1934type=Pl111 1935amba_id=1315089 1936clk_domain=system.clk_domain 1937default_p_state=UNDEFINED 1938enable_capture=true 1939eventq_index=0 1940gic=system.realview.gic 1941int_num=46 1942p_state_clk_gate_bins=20 1943p_state_clk_gate_max=1000000000000 1944p_state_clk_gate_min=1000 1945pio_addr=471793664 1946pio_latency=10000 1947pixel_clock=41667 1948power_model=Null 1949system=system 1950vnc=system.vncserver 1951dma=system.iobus.slave[1] 1952pio=system.iobus.master[5] 1953 1954[system.realview.dcc] 1955type=SubSystem 1956children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys 1957eventq_index=0 1958thermal_domain=Null 1959 1960[system.realview.dcc.osc_cpu] 1961type=RealViewOsc 1962dcc=0 1963device=0 1964eventq_index=0 1965freq=16667 1966parent=system.realview.realview_io 1967position=0 1968site=1 1969voltage_domain=system.voltage_domain 1970 1971[system.realview.dcc.osc_ddr] 1972type=RealViewOsc 1973dcc=0 1974device=8 1975eventq_index=0 1976freq=25000 1977parent=system.realview.realview_io 1978position=0 1979site=1 1980voltage_domain=system.voltage_domain 1981 1982[system.realview.dcc.osc_hsbm] 1983type=RealViewOsc 1984dcc=0 1985device=4 1986eventq_index=0 1987freq=25000 1988parent=system.realview.realview_io 1989position=0 1990site=1 1991voltage_domain=system.voltage_domain 1992 1993[system.realview.dcc.osc_pxl] 1994type=RealViewOsc 1995dcc=0 1996device=5 1997eventq_index=0 1998freq=42105 1999parent=system.realview.realview_io 2000position=0 2001site=1 2002voltage_domain=system.voltage_domain 2003 2004[system.realview.dcc.osc_smb] 2005type=RealViewOsc 2006dcc=0 2007device=6 2008eventq_index=0 2009freq=20000 2010parent=system.realview.realview_io 2011position=0 2012site=1 2013voltage_domain=system.voltage_domain 2014 2015[system.realview.dcc.osc_sys] 2016type=RealViewOsc 2017dcc=0 2018device=7 2019eventq_index=0 2020freq=16667 2021parent=system.realview.realview_io 2022position=0 2023site=1 2024voltage_domain=system.voltage_domain 2025 2026[system.realview.energy_ctrl] 2027type=EnergyCtrl 2028clk_domain=system.clk_domain 2029default_p_state=UNDEFINED 2030dvfs_handler=system.dvfs_handler 2031eventq_index=0 2032p_state_clk_gate_bins=20 2033p_state_clk_gate_max=1000000000000 2034p_state_clk_gate_min=1000 2035pio_addr=470286336 2036pio_latency=100000 2037power_model=Null 2038system=system 2039pio=system.iobus.master[22] 2040 2041[system.realview.ethernet] 2042type=IGbE 2043BAR0=0 2044BAR0LegacyIO=false 2045BAR0Size=131072 2046BAR1=0 2047BAR1LegacyIO=false 2048BAR1Size=0 2049BAR2=0 2050BAR2LegacyIO=false 2051BAR2Size=0 2052BAR3=0 2053BAR3LegacyIO=false 2054BAR3Size=0 2055BAR4=0 2056BAR4LegacyIO=false 2057BAR4Size=0 2058BAR5=0 2059BAR5LegacyIO=false 2060BAR5Size=0 2061BIST=0 2062CacheLineSize=0 2063CapabilityPtr=0 2064CardbusCIS=0 2065ClassCode=2 2066Command=0 2067DeviceID=4213 2068ExpansionROM=0 2069HeaderType=0 2070InterruptLine=1 2071InterruptPin=1 2072LatencyTimer=0 2073LegacyIOBase=0 2074MSICAPBaseOffset=0 2075MSICAPCapId=0 2076MSICAPMaskBits=0 2077MSICAPMsgAddr=0 2078MSICAPMsgCtrl=0 2079MSICAPMsgData=0 2080MSICAPMsgUpperAddr=0 2081MSICAPNextCapability=0 2082MSICAPPendingBits=0 2083MSIXCAPBaseOffset=0 2084MSIXCAPCapId=0 2085MSIXCAPNextCapability=0 2086MSIXMsgCtrl=0 2087MSIXPbaOffset=0 2088MSIXTableOffset=0 2089MaximumLatency=0 2090MinimumGrant=255 2091PMCAPBaseOffset=0 2092PMCAPCapId=0 2093PMCAPCapabilities=0 2094PMCAPCtrlStatus=0 2095PMCAPNextCapability=0 2096PXCAPBaseOffset=0 2097PXCAPCapId=0 2098PXCAPCapabilities=0 2099PXCAPDevCap2=0 2100PXCAPDevCapabilities=0 2101PXCAPDevCtrl=0 2102PXCAPDevCtrl2=0 2103PXCAPDevStatus=0 2104PXCAPLinkCap=0 2105PXCAPLinkCtrl=0 2106PXCAPLinkStatus=0 2107PXCAPNextCapability=0 2108ProgIF=0 2109Revision=0 2110Status=0 2111SubClassCode=0 2112SubsystemID=4104 2113SubsystemVendorID=32902 2114VendorID=32902 2115clk_domain=system.clk_domain 2116config_latency=20000 2117default_p_state=UNDEFINED 2118eventq_index=0 2119fetch_comp_delay=10000 2120fetch_delay=10000 2121hardware_address=00:90:00:00:00:01 2122host=system.realview.pci_host 2123p_state_clk_gate_bins=20 2124p_state_clk_gate_max=1000000000000 2125p_state_clk_gate_min=1000 2126pci_bus=0 2127pci_dev=0 2128pci_func=0 2129phy_epid=896 2130phy_pid=680 2131pio_latency=30000 2132power_model=Null 2133rx_desc_cache_size=64 2134rx_fifo_size=393216 2135rx_write_delay=0 2136system=system 2137tx_desc_cache_size=64 2138tx_fifo_size=393216 2139tx_read_delay=0 2140wb_comp_delay=10000 2141wb_delay=10000 2142dma=system.iobus.slave[4] 2143pio=system.iobus.master[24] 2144 2145[system.realview.generic_timer] 2146type=GenericTimer 2147eventq_index=0 2148gic=system.realview.gic 2149int_phys=29 2150int_virt=27 2151system=system 2152 2153[system.realview.gic] 2154type=Pl390 2155clk_domain=system.clk_domain 2156cpu_addr=738205696 2157cpu_pio_delay=10000 2158default_p_state=UNDEFINED 2159dist_addr=738201600 2160dist_pio_delay=10000 2161eventq_index=0 2162gem5_extensions=true 2163int_latency=10000 2164it_lines=128 2165p_state_clk_gate_bins=20 2166p_state_clk_gate_max=1000000000000 2167p_state_clk_gate_min=1000 2168platform=system.realview 2169power_model=Null 2170system=system 2171pio=system.membus.master[2] 2172 2173[system.realview.hdlcd] 2174type=HDLcd 2175amba_id=1314816 2176clk_domain=system.clk_domain 2177default_p_state=UNDEFINED 2178enable_capture=true 2179eventq_index=0 2180gic=system.realview.gic 2181int_num=117 2182p_state_clk_gate_bins=20 2183p_state_clk_gate_max=1000000000000 2184p_state_clk_gate_min=1000 2185pio_addr=721420288 2186pio_latency=10000 2187pixel_buffer_size=2048 2188pixel_chunk=32 2189power_model=Null 2190pxl_clk=system.realview.dcc.osc_pxl 2191system=system 2192vnc=system.vncserver 2193workaround_dma_line_count=true 2194workaround_swap_rb=true 2195dma=system.membus.slave[0] 2196pio=system.iobus.master[6] 2197 2198[system.realview.ide] 2199type=IdeController 2200BAR0=1 2201BAR0LegacyIO=false 2202BAR0Size=8 2203BAR1=1 2204BAR1LegacyIO=false 2205BAR1Size=4 2206BAR2=1 2207BAR2LegacyIO=false 2208BAR2Size=8 2209BAR3=1 2210BAR3LegacyIO=false 2211BAR3Size=4 2212BAR4=1 2213BAR4LegacyIO=false 2214BAR4Size=16 2215BAR5=1 2216BAR5LegacyIO=false 2217BAR5Size=0 2218BIST=0 2219CacheLineSize=0 2220CapabilityPtr=0 2221CardbusCIS=0 2222ClassCode=1 2223Command=0 2224DeviceID=28945 2225ExpansionROM=0 2226HeaderType=0 2227InterruptLine=2 2228InterruptPin=2 2229LatencyTimer=0 2230LegacyIOBase=0 2231MSICAPBaseOffset=0 2232MSICAPCapId=0 2233MSICAPMaskBits=0 2234MSICAPMsgAddr=0 2235MSICAPMsgCtrl=0 2236MSICAPMsgData=0 2237MSICAPMsgUpperAddr=0 2238MSICAPNextCapability=0 2239MSICAPPendingBits=0 2240MSIXCAPBaseOffset=0 2241MSIXCAPCapId=0 2242MSIXCAPNextCapability=0 2243MSIXMsgCtrl=0 2244MSIXPbaOffset=0 2245MSIXTableOffset=0 2246MaximumLatency=0 2247MinimumGrant=0 2248PMCAPBaseOffset=0 2249PMCAPCapId=0 2250PMCAPCapabilities=0 2251PMCAPCtrlStatus=0 2252PMCAPNextCapability=0 2253PXCAPBaseOffset=0 2254PXCAPCapId=0 2255PXCAPCapabilities=0 2256PXCAPDevCap2=0 2257PXCAPDevCapabilities=0 2258PXCAPDevCtrl=0 2259PXCAPDevCtrl2=0 2260PXCAPDevStatus=0 2261PXCAPLinkCap=0 2262PXCAPLinkCtrl=0 2263PXCAPLinkStatus=0 2264PXCAPNextCapability=0 2265ProgIF=133 2266Revision=0 2267Status=640 2268SubClassCode=1 2269SubsystemID=0 2270SubsystemVendorID=0 2271VendorID=32902 2272clk_domain=system.clk_domain 2273config_latency=20000 2274ctrl_offset=0 2275default_p_state=UNDEFINED 2276disks=system.cf0 2277eventq_index=0 2278host=system.realview.pci_host 2279io_shift=0 2280p_state_clk_gate_bins=20 2281p_state_clk_gate_max=1000000000000 2282p_state_clk_gate_min=1000 2283pci_bus=0 2284pci_dev=1 2285pci_func=0 2286pio_latency=30000 2287power_model=Null 2288system=system 2289dma=system.iobus.slave[3] 2290pio=system.iobus.master[23] 2291 2292[system.realview.kmi0] 2293type=Pl050 2294amba_id=1314896 2295clk_domain=system.clk_domain 2296default_p_state=UNDEFINED 2297eventq_index=0 2298gic=system.realview.gic 2299int_delay=1000000 2300int_num=44 2301is_mouse=false 2302p_state_clk_gate_bins=20 2303p_state_clk_gate_max=1000000000000 2304p_state_clk_gate_min=1000 2305pio_addr=470155264 2306pio_latency=100000 2307power_model=Null 2308system=system 2309vnc=system.vncserver 2310pio=system.iobus.master[7] 2311 2312[system.realview.kmi1] 2313type=Pl050 2314amba_id=1314896 2315clk_domain=system.clk_domain 2316default_p_state=UNDEFINED 2317eventq_index=0 2318gic=system.realview.gic 2319int_delay=1000000 2320int_num=45 2321is_mouse=true 2322p_state_clk_gate_bins=20 2323p_state_clk_gate_max=1000000000000 2324p_state_clk_gate_min=1000 2325pio_addr=470220800 2326pio_latency=100000 2327power_model=Null 2328system=system 2329vnc=system.vncserver 2330pio=system.iobus.master[8] 2331 2332[system.realview.l2x0_fake] 2333type=IsaFake 2334clk_domain=system.clk_domain 2335default_p_state=UNDEFINED 2336eventq_index=0 2337fake_mem=false 2338p_state_clk_gate_bins=20 2339p_state_clk_gate_max=1000000000000 2340p_state_clk_gate_min=1000 2341pio_addr=739246080 2342pio_latency=100000 2343pio_size=4095 2344power_model=Null 2345ret_bad_addr=false 2346ret_data16=65535 2347ret_data32=4294967295 2348ret_data64=18446744073709551615 2349ret_data8=255 2350system=system 2351update_data=false 2352warn_access= 2353pio=system.iobus.master[12] 2354 2355[system.realview.lan_fake] 2356type=IsaFake 2357clk_domain=system.clk_domain 2358default_p_state=UNDEFINED 2359eventq_index=0 2360fake_mem=false 2361p_state_clk_gate_bins=20 2362p_state_clk_gate_max=1000000000000 2363p_state_clk_gate_min=1000 2364pio_addr=436207616 2365pio_latency=100000 2366pio_size=65535 2367power_model=Null 2368ret_bad_addr=false 2369ret_data16=65535 2370ret_data32=4294967295 2371ret_data64=18446744073709551615 2372ret_data8=255 2373system=system 2374update_data=false 2375warn_access= 2376pio=system.iobus.master[19] 2377 2378[system.realview.local_cpu_timer] 2379type=CpuLocalTimer 2380clk_domain=system.clk_domain 2381default_p_state=UNDEFINED 2382eventq_index=0 2383gic=system.realview.gic 2384int_num_timer=29 2385int_num_watchdog=30 2386p_state_clk_gate_bins=20 2387p_state_clk_gate_max=1000000000000 2388p_state_clk_gate_min=1000 2389pio_addr=738721792 2390pio_latency=100000 2391power_model=Null 2392system=system 2393pio=system.membus.master[4] 2394 2395[system.realview.mcc] 2396type=SubSystem 2397children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl 2398eventq_index=0 2399thermal_domain=Null 2400 2401[system.realview.mcc.osc_clcd] 2402type=RealViewOsc 2403dcc=0 2404device=1 2405eventq_index=0 2406freq=42105 2407parent=system.realview.realview_io 2408position=0 2409site=0 2410voltage_domain=system.voltage_domain 2411 2412[system.realview.mcc.osc_mcc] 2413type=RealViewOsc 2414dcc=0 2415device=0 2416eventq_index=0 2417freq=20000 2418parent=system.realview.realview_io 2419position=0 2420site=0 2421voltage_domain=system.voltage_domain 2422 2423[system.realview.mcc.osc_peripheral] 2424type=RealViewOsc 2425dcc=0 2426device=2 2427eventq_index=0 2428freq=41667 2429parent=system.realview.realview_io 2430position=0 2431site=0 2432voltage_domain=system.voltage_domain 2433 2434[system.realview.mcc.osc_system_bus] 2435type=RealViewOsc 2436dcc=0 2437device=4 2438eventq_index=0 2439freq=41667 2440parent=system.realview.realview_io 2441position=0 2442site=0 2443voltage_domain=system.voltage_domain 2444 2445[system.realview.mcc.temp_crtl] 2446type=RealViewTemperatureSensor 2447dcc=0 2448device=0 2449eventq_index=0 2450parent=system.realview.realview_io 2451position=0 2452site=0 2453system=system 2454 2455[system.realview.mmc_fake] 2456type=AmbaFake 2457amba_id=0 2458clk_domain=system.clk_domain 2459default_p_state=UNDEFINED 2460eventq_index=0 2461ignore_access=false 2462p_state_clk_gate_bins=20 2463p_state_clk_gate_max=1000000000000 2464p_state_clk_gate_min=1000 2465pio_addr=470089728 2466pio_latency=100000 2467power_model=Null 2468system=system 2469pio=system.iobus.master[21] 2470 2471[system.realview.nvmem] 2472type=SimpleMemory 2473bandwidth=73.000000 2474clk_domain=system.clk_domain 2475conf_table_reported=true 2476default_p_state=UNDEFINED 2477eventq_index=0 2478in_addr_map=true 2479latency=30000 2480latency_var=0 2481null=false 2482p_state_clk_gate_bins=20 2483p_state_clk_gate_max=1000000000000 2484p_state_clk_gate_min=1000 2485power_model=Null 2486range=0:67108863 2487port=system.membus.master[1] 2488 2489[system.realview.pci_host] 2490type=GenericPciHost 2491clk_domain=system.clk_domain 2492conf_base=805306368 2493conf_device_bits=12 2494conf_size=268435456 2495default_p_state=UNDEFINED 2496eventq_index=0 2497p_state_clk_gate_bins=20 2498p_state_clk_gate_max=1000000000000 2499p_state_clk_gate_min=1000 2500pci_dma_base=0 2501pci_mem_base=0 2502pci_pio_base=788529152 2503platform=system.realview 2504power_model=Null 2505system=system 2506pio=system.iobus.master[2] 2507 2508[system.realview.realview_io] 2509type=RealViewCtrl 2510clk_domain=system.clk_domain 2511default_p_state=UNDEFINED 2512eventq_index=0 2513idreg=35979264 2514p_state_clk_gate_bins=20 2515p_state_clk_gate_max=1000000000000 2516p_state_clk_gate_min=1000 2517pio_addr=469827584 2518pio_latency=100000 2519power_model=Null 2520proc_id0=335544320 2521proc_id1=335544320 2522system=system 2523pio=system.iobus.master[1] 2524 2525[system.realview.rtc] 2526type=PL031 2527amba_id=3412017 2528clk_domain=system.clk_domain 2529default_p_state=UNDEFINED 2530eventq_index=0 2531gic=system.realview.gic 2532int_delay=100000 2533int_num=36 2534p_state_clk_gate_bins=20 2535p_state_clk_gate_max=1000000000000 2536p_state_clk_gate_min=1000 2537pio_addr=471269376 2538pio_latency=100000 2539power_model=Null 2540system=system 2541time=Thu Jan 1 00:00:00 2009 2542pio=system.iobus.master[10] 2543 2544[system.realview.sp810_fake] 2545type=AmbaFake 2546amba_id=0 2547clk_domain=system.clk_domain 2548default_p_state=UNDEFINED 2549eventq_index=0 2550ignore_access=true 2551p_state_clk_gate_bins=20 2552p_state_clk_gate_max=1000000000000 2553p_state_clk_gate_min=1000 2554pio_addr=469893120 2555pio_latency=100000 2556power_model=Null 2557system=system 2558pio=system.iobus.master[16] 2559 2560[system.realview.timer0] 2561type=Sp804 2562amba_id=1316868 2563clk_domain=system.clk_domain 2564clock0=1000000 2565clock1=1000000 2566default_p_state=UNDEFINED 2567eventq_index=0 2568gic=system.realview.gic 2569int_num0=34 2570int_num1=34 2571p_state_clk_gate_bins=20 2572p_state_clk_gate_max=1000000000000 2573p_state_clk_gate_min=1000 2574pio_addr=470876160 2575pio_latency=100000 2576power_model=Null 2577system=system 2578pio=system.iobus.master[3] 2579 2580[system.realview.timer1] 2581type=Sp804 2582amba_id=1316868 2583clk_domain=system.clk_domain 2584clock0=1000000 2585clock1=1000000 2586default_p_state=UNDEFINED 2587eventq_index=0 2588gic=system.realview.gic 2589int_num0=35 2590int_num1=35 2591p_state_clk_gate_bins=20 2592p_state_clk_gate_max=1000000000000 2593p_state_clk_gate_min=1000 2594pio_addr=470941696 2595pio_latency=100000 2596power_model=Null 2597system=system 2598pio=system.iobus.master[4] 2599 2600[system.realview.uart] 2601type=Pl011 2602clk_domain=system.clk_domain 2603default_p_state=UNDEFINED 2604end_on_eot=false 2605eventq_index=0 2606gic=system.realview.gic 2607int_delay=100000 2608int_num=37 2609p_state_clk_gate_bins=20 2610p_state_clk_gate_max=1000000000000 2611p_state_clk_gate_min=1000 2612pio_addr=470351872 2613pio_latency=100000 2614platform=system.realview 2615power_model=Null 2616system=system 2617terminal=system.terminal 2618pio=system.iobus.master[0] 2619 2620[system.realview.uart1_fake] 2621type=AmbaFake 2622amba_id=0 2623clk_domain=system.clk_domain 2624default_p_state=UNDEFINED 2625eventq_index=0 2626ignore_access=false 2627p_state_clk_gate_bins=20 2628p_state_clk_gate_max=1000000000000 2629p_state_clk_gate_min=1000 2630pio_addr=470417408 2631pio_latency=100000 2632power_model=Null 2633system=system 2634pio=system.iobus.master[13] 2635 2636[system.realview.uart2_fake] 2637type=AmbaFake 2638amba_id=0 2639clk_domain=system.clk_domain 2640default_p_state=UNDEFINED 2641eventq_index=0 2642ignore_access=false 2643p_state_clk_gate_bins=20 2644p_state_clk_gate_max=1000000000000 2645p_state_clk_gate_min=1000 2646pio_addr=470482944 2647pio_latency=100000 2648power_model=Null 2649system=system 2650pio=system.iobus.master[14] 2651 2652[system.realview.uart3_fake] 2653type=AmbaFake 2654amba_id=0 2655clk_domain=system.clk_domain 2656default_p_state=UNDEFINED 2657eventq_index=0 2658ignore_access=false 2659p_state_clk_gate_bins=20 2660p_state_clk_gate_max=1000000000000 2661p_state_clk_gate_min=1000 2662pio_addr=470548480 2663pio_latency=100000 2664power_model=Null 2665system=system 2666pio=system.iobus.master[15] 2667 2668[system.realview.usb_fake] 2669type=IsaFake 2670clk_domain=system.clk_domain 2671default_p_state=UNDEFINED 2672eventq_index=0 2673fake_mem=false 2674p_state_clk_gate_bins=20 2675p_state_clk_gate_max=1000000000000 2676p_state_clk_gate_min=1000 2677pio_addr=452984832 2678pio_latency=100000 2679pio_size=131071 2680power_model=Null 2681ret_bad_addr=false 2682ret_data16=65535 2683ret_data32=4294967295 2684ret_data64=18446744073709551615 2685ret_data8=255 2686system=system 2687update_data=false 2688warn_access= 2689pio=system.iobus.master[20] 2690 2691[system.realview.vgic] 2692type=VGic 2693clk_domain=system.clk_domain 2694default_p_state=UNDEFINED 2695eventq_index=0 2696gic=system.realview.gic 2697hv_addr=738213888 2698p_state_clk_gate_bins=20 2699p_state_clk_gate_max=1000000000000 2700p_state_clk_gate_min=1000 2701pio_delay=10000 2702platform=system.realview 2703power_model=Null 2704ppint=25 2705system=system 2706vcpu_addr=738222080 2707pio=system.membus.master[3] 2708 2709[system.realview.vram] 2710type=SimpleMemory 2711bandwidth=73.000000 2712clk_domain=system.clk_domain 2713conf_table_reported=false 2714default_p_state=UNDEFINED 2715eventq_index=0 2716in_addr_map=true 2717latency=30000 2718latency_var=0 2719null=false 2720p_state_clk_gate_bins=20 2721p_state_clk_gate_max=1000000000000 2722p_state_clk_gate_min=1000 2723power_model=Null 2724range=402653184:436207615 2725port=system.iobus.master[11] 2726 2727[system.realview.watchdog_fake] 2728type=AmbaFake 2729amba_id=0 2730clk_domain=system.clk_domain 2731default_p_state=UNDEFINED 2732eventq_index=0 2733ignore_access=false 2734p_state_clk_gate_bins=20 2735p_state_clk_gate_max=1000000000000 2736p_state_clk_gate_min=1000 2737pio_addr=470745088 2738pio_latency=100000 2739power_model=Null 2740system=system 2741pio=system.iobus.master[17] 2742 2743[system.terminal] 2744type=Terminal 2745eventq_index=0 2746intr_control=system.intrctrl 2747number=0 2748output=true 2749port=3456 2750 2751[system.toL2Bus] 2752type=CoherentXBar 2753children=snoop_filter 2754clk_domain=system.cpu_clk_domain 2755default_p_state=UNDEFINED 2756eventq_index=0 2757forward_latency=0 2758frontend_latency=1 2759p_state_clk_gate_bins=20 2760p_state_clk_gate_max=1000000000000 2761p_state_clk_gate_min=1000 2762point_of_coherency=false 2763power_model=Null 2764response_latency=1 2765snoop_filter=system.toL2Bus.snoop_filter 2766snoop_response_latency=1 2767system=system 2768use_default_range=false 2769width=32 2770master=system.l2c.cpu_side 2771slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side 2772 2773[system.toL2Bus.snoop_filter] 2774type=SnoopFilter 2775eventq_index=0 2776lookup_latency=0 2777max_capacity=8388608 2778system=system 2779 2780[system.vncserver] 2781type=VncServer 2782eventq_index=0 2783frame_capture=false 2784number=0 2785port=5900 2786 2787[system.voltage_domain] 2788type=VoltageDomain 2789eventq_index=0 2790voltage=1.000000 2791	1374id_aa64pfr1_el1=0 1375id_isar0=34607377 1376id_isar1=34677009 1377id_isar2=555950401 1378id_isar3=17899825 1379id_isar4=268501314 1380id_isar5=0 1381id_mmfr0=270536963 1382id_mmfr1=0 1383id_mmfr2=19070976 1384id_mmfr3=34611729 1385id_pfr0=49 1386id_pfr1=4113 1387midr=1091551472 1388pmu=Null 1389system=system 1390 1391[system.cpu1.istage2_mmu] 1392type=ArmStage2MMU 1393children=stage2_tlb 1394eventq_index=0 1395stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb 1396sys=system 1397tlb=system.cpu1.itb 1398 1399[system.cpu1.istage2_mmu.stage2_tlb] 1400type=ArmTLB 1401children=walker 1402eventq_index=0 1403is_stage2=true 1404size=32 1405walker=system.cpu1.istage2_mmu.stage2_tlb.walker 1406 1407[system.cpu1.istage2_mmu.stage2_tlb.walker] 1408type=ArmTableWalker 1409clk_domain=system.cpu_clk_domain 1410default_p_state=UNDEFINED 1411eventq_index=0 1412is_stage2=true 1413num_squash_per_cycle=2 1414p_state_clk_gate_bins=20 1415p_state_clk_gate_max=1000000000000 1416p_state_clk_gate_min=1000 1417power_model=Null 1418sys=system 1419 1420[system.cpu1.itb] 1421type=ArmTLB 1422children=walker 1423eventq_index=0 1424is_stage2=false 1425size=64 1426walker=system.cpu1.itb.walker 1427 1428[system.cpu1.itb.walker] 1429type=ArmTableWalker 1430clk_domain=system.cpu_clk_domain 1431default_p_state=UNDEFINED 1432eventq_index=0 1433is_stage2=false 1434num_squash_per_cycle=2 1435p_state_clk_gate_bins=20 1436p_state_clk_gate_max=1000000000000 1437p_state_clk_gate_min=1000 1438power_model=Null 1439sys=system 1440port=system.cpu1.toL2Bus.slave[2] 1441 1442[system.cpu1.l2cache] 1443type=Cache 1444children=prefetcher tags 1445addr_ranges=0:18446744073709551615 1446assoc=16 1447clk_domain=system.cpu_clk_domain 1448clusivity=mostly_excl 1449default_p_state=UNDEFINED 1450demand_mshr_reserve=1 1451eventq_index=0 1452hit_latency=12 1453is_read_only=false 1454max_miss_count=0 1455mshrs=16 1456p_state_clk_gate_bins=20 1457p_state_clk_gate_max=1000000000000 1458p_state_clk_gate_min=1000 1459power_model=Null 1460prefetch_on_access=true 1461prefetcher=system.cpu1.l2cache.prefetcher 1462response_latency=12 1463sequential_access=false 1464size=1048576 1465system=system 1466tags=system.cpu1.l2cache.tags 1467tgts_per_mshr=8 1468write_buffers=8 1469writeback_clean=false 1470cpu_side=system.cpu1.toL2Bus.master[0] 1471mem_side=system.toL2Bus.slave[1] 1472 1473[system.cpu1.l2cache.prefetcher] 1474type=StridePrefetcher 1475cache_snoop=false 1476clk_domain=system.cpu_clk_domain 1477default_p_state=UNDEFINED 1478degree=8 1479eventq_index=0 1480latency=1 1481max_conf=7 1482min_conf=0 1483on_data=true 1484on_inst=true 1485on_miss=false 1486on_read=true 1487on_write=true 1488p_state_clk_gate_bins=20 1489p_state_clk_gate_max=1000000000000 1490p_state_clk_gate_min=1000 1491power_model=Null 1492queue_filter=true 1493queue_size=32 1494queue_squash=true 1495start_conf=4 1496sys=system 1497table_assoc=4 1498table_sets=16 1499tag_prefetch=true 1500thresh_conf=4 1501use_master_id=true 1502 1503[system.cpu1.l2cache.tags] 1504type=RandomRepl 1505assoc=16 1506block_size=64 1507clk_domain=system.cpu_clk_domain 1508default_p_state=UNDEFINED 1509eventq_index=0 1510hit_latency=12 1511p_state_clk_gate_bins=20 1512p_state_clk_gate_max=1000000000000 1513p_state_clk_gate_min=1000 1514power_model=Null 1515sequential_access=false 1516size=1048576 1517 1518[system.cpu1.toL2Bus] 1519type=CoherentXBar 1520children=snoop_filter 1521clk_domain=system.cpu_clk_domain 1522default_p_state=UNDEFINED 1523eventq_index=0 1524forward_latency=0 1525frontend_latency=1 1526p_state_clk_gate_bins=20 1527p_state_clk_gate_max=1000000000000 1528p_state_clk_gate_min=1000 1529point_of_coherency=false 1530power_model=Null 1531response_latency=1 1532snoop_filter=system.cpu1.toL2Bus.snoop_filter 1533snoop_response_latency=1 1534system=system 1535use_default_range=false 1536width=32 1537master=system.cpu1.l2cache.cpu_side 1538slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port 1539 1540[system.cpu1.toL2Bus.snoop_filter] 1541type=SnoopFilter 1542eventq_index=0 1543lookup_latency=0 1544max_capacity=8388608 1545system=system 1546 1547[system.cpu1.tracer] 1548type=ExeTracer 1549eventq_index=0 1550 1551[system.cpu_clk_domain] 1552type=SrcClockDomain 1553clock=500 1554domain_id=-1 1555eventq_index=0 1556init_perf_level=0 1557voltage_domain=system.voltage_domain 1558 1559[system.dvfs_handler] 1560type=DVFSHandler 1561domains= 1562enable=false 1563eventq_index=0 1564sys_clk_domain=system.clk_domain 1565transition_latency=100000000 1566 1567[system.intrctrl] 1568type=IntrControl 1569eventq_index=0 1570sys=system 1571 1572[system.iobus] 1573type=NoncoherentXBar 1574clk_domain=system.clk_domain 1575default_p_state=UNDEFINED 1576eventq_index=0 1577forward_latency=1 1578frontend_latency=2 1579p_state_clk_gate_bins=20 1580p_state_clk_gate_max=1000000000000 1581p_state_clk_gate_min=1000 1582power_model=Null 1583response_latency=2 1584use_default_range=false 1585width=16 1586master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side 1587slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 1588 1589[system.iocache] 1590type=Cache 1591children=tags 1592addr_ranges=2147483648:2415919103 1593assoc=8 1594clk_domain=system.clk_domain 1595clusivity=mostly_incl 1596default_p_state=UNDEFINED 1597demand_mshr_reserve=1 1598eventq_index=0 1599hit_latency=50 1600is_read_only=false 1601max_miss_count=0 1602mshrs=20 1603p_state_clk_gate_bins=20 1604p_state_clk_gate_max=1000000000000 1605p_state_clk_gate_min=1000 1606power_model=Null 1607prefetch_on_access=false 1608prefetcher=Null 1609response_latency=50 1610sequential_access=false 1611size=1024 1612system=system 1613tags=system.iocache.tags 1614tgts_per_mshr=12 1615write_buffers=8 1616writeback_clean=false 1617cpu_side=system.iobus.master[25] 1618mem_side=system.membus.slave[3] 1619 1620[system.iocache.tags] 1621type=LRU 1622assoc=8 1623block_size=64 1624clk_domain=system.clk_domain 1625default_p_state=UNDEFINED 1626eventq_index=0 1627hit_latency=50 1628p_state_clk_gate_bins=20 1629p_state_clk_gate_max=1000000000000 1630p_state_clk_gate_min=1000 1631power_model=Null 1632sequential_access=false 1633size=1024 1634 1635[system.l2c] 1636type=Cache 1637children=tags 1638addr_ranges=0:18446744073709551615 1639assoc=8 1640clk_domain=system.cpu_clk_domain 1641clusivity=mostly_incl 1642default_p_state=UNDEFINED 1643demand_mshr_reserve=1 1644eventq_index=0 1645hit_latency=20 1646is_read_only=false 1647max_miss_count=0 1648mshrs=20 1649p_state_clk_gate_bins=20 1650p_state_clk_gate_max=1000000000000 1651p_state_clk_gate_min=1000 1652power_model=Null 1653prefetch_on_access=false 1654prefetcher=Null 1655response_latency=20 1656sequential_access=false 1657size=4194304 1658system=system 1659tags=system.l2c.tags 1660tgts_per_mshr=12 1661write_buffers=8 1662writeback_clean=false 1663cpu_side=system.toL2Bus.master[0] 1664mem_side=system.membus.slave[2] 1665 1666[system.l2c.tags] 1667type=LRU 1668assoc=8 1669block_size=64 1670clk_domain=system.cpu_clk_domain 1671default_p_state=UNDEFINED 1672eventq_index=0 1673hit_latency=20 1674p_state_clk_gate_bins=20 1675p_state_clk_gate_max=1000000000000 1676p_state_clk_gate_min=1000 1677power_model=Null 1678sequential_access=false 1679size=4194304 1680 1681[system.membus] 1682type=CoherentXBar 1683children=badaddr_responder snoop_filter 1684clk_domain=system.clk_domain 1685default_p_state=UNDEFINED 1686eventq_index=0 1687forward_latency=4 1688frontend_latency=3 1689p_state_clk_gate_bins=20 1690p_state_clk_gate_max=1000000000000 1691p_state_clk_gate_min=1000 1692point_of_coherency=true 1693power_model=Null 1694response_latency=2 1695snoop_filter=system.membus.snoop_filter 1696snoop_response_latency=4 1697system=system 1698use_default_range=false 1699width=16 1700default=system.membus.badaddr_responder.pio 1701master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port 1702slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side 1703 1704[system.membus.badaddr_responder] 1705type=IsaFake 1706clk_domain=system.clk_domain 1707default_p_state=UNDEFINED 1708eventq_index=0 1709fake_mem=false 1710p_state_clk_gate_bins=20 1711p_state_clk_gate_max=1000000000000 1712p_state_clk_gate_min=1000 1713pio_addr=0 1714pio_latency=100000 1715pio_size=8 1716power_model=Null 1717ret_bad_addr=true 1718ret_data16=65535 1719ret_data32=4294967295 1720ret_data64=18446744073709551615 1721ret_data8=255 1722system=system 1723update_data=false 1724warn_access=warn 1725pio=system.membus.default 1726 1727[system.membus.snoop_filter] 1728type=SnoopFilter 1729eventq_index=0 1730lookup_latency=1 1731max_capacity=8388608 1732system=system 1733 1734[system.physmem] 1735type=DRAMCtrl 1736IDD0=0.075000 1737IDD02=0.000000 1738IDD2N=0.050000 1739IDD2N2=0.000000 1740IDD2P0=0.000000 1741IDD2P02=0.000000 1742IDD2P1=0.000000 1743IDD2P12=0.000000 1744IDD3N=0.057000 1745IDD3N2=0.000000 1746IDD3P0=0.000000 1747IDD3P02=0.000000 1748IDD3P1=0.000000 1749IDD3P12=0.000000 1750IDD4R=0.187000 1751IDD4R2=0.000000 1752IDD4W=0.165000 1753IDD4W2=0.000000 1754IDD5=0.220000 1755IDD52=0.000000 1756IDD6=0.000000 1757IDD62=0.000000 1758VDD=1.500000 1759VDD2=0.000000 1760activation_limit=4 1761addr_mapping=RoRaBaCoCh 1762bank_groups_per_rank=0 1763banks_per_rank=8 1764burst_length=8 1765channels=1 1766clk_domain=system.clk_domain 1767conf_table_reported=true 1768default_p_state=UNDEFINED 1769device_bus_width=8 1770device_rowbuffer_size=1024 1771device_size=536870912 1772devices_per_rank=8 1773dll=true 1774eventq_index=0 1775in_addr_map=true 1776max_accesses_per_row=16 1777mem_sched_policy=frfcfs 1778min_writes_per_switch=16 1779null=false 1780p_state_clk_gate_bins=20 1781p_state_clk_gate_max=1000000000000 1782p_state_clk_gate_min=1000 1783page_policy=open_adaptive 1784power_model=Null 1785range=2147483648:2415919103 1786ranks_per_channel=2 1787read_buffer_size=32 1788static_backend_latency=10000 1789static_frontend_latency=10000 1790tBURST=5000 1791tCCD_L=0 1792tCK=1250 1793tCL=13750 1794tCS=2500 1795tRAS=35000 1796tRCD=13750 1797tREFI=7800000 1798tRFC=260000 1799tRP=13750 1800tRRD=6000 1801tRRD_L=0 1802tRTP=7500 1803tRTW=2500 1804tWR=15000 1805tWTR=7500 1806tXAW=30000 1807tXP=0 1808tXPDLL=0 1809tXS=0 1810tXSDLL=0 1811write_buffer_size=64 1812write_high_thresh_perc=85 1813write_low_thresh_perc=50 1814port=system.membus.master[5] 1815 1816[system.realview] 1817type=RealView 1818children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake 1819eventq_index=0 1820intrctrl=system.intrctrl 1821system=system 1822 1823[system.realview.aaci_fake] 1824type=AmbaFake 1825amba_id=0 1826clk_domain=system.clk_domain 1827default_p_state=UNDEFINED 1828eventq_index=0 1829ignore_access=false 1830p_state_clk_gate_bins=20 1831p_state_clk_gate_max=1000000000000 1832p_state_clk_gate_min=1000 1833pio_addr=470024192 1834pio_latency=100000 1835power_model=Null 1836system=system 1837pio=system.iobus.master[18] 1838 1839[system.realview.cf_ctrl] 1840type=IdeController 1841BAR0=471465984 1842BAR0LegacyIO=true 1843BAR0Size=256 1844BAR1=471466240 1845BAR1LegacyIO=true 1846BAR1Size=4096 1847BAR2=1 1848BAR2LegacyIO=false 1849BAR2Size=8 1850BAR3=1 1851BAR3LegacyIO=false 1852BAR3Size=4 1853BAR4=1 1854BAR4LegacyIO=false 1855BAR4Size=16 1856BAR5=1 1857BAR5LegacyIO=false 1858BAR5Size=0 1859BIST=0 1860CacheLineSize=0 1861CapabilityPtr=0 1862CardbusCIS=0 1863ClassCode=1 1864Command=1 1865DeviceID=28945 1866ExpansionROM=0 1867HeaderType=0 1868InterruptLine=31 1869InterruptPin=1 1870LatencyTimer=0 1871LegacyIOBase=0 1872MSICAPBaseOffset=0 1873MSICAPCapId=0 1874MSICAPMaskBits=0 1875MSICAPMsgAddr=0 1876MSICAPMsgCtrl=0 1877MSICAPMsgData=0 1878MSICAPMsgUpperAddr=0 1879MSICAPNextCapability=0 1880MSICAPPendingBits=0 1881MSIXCAPBaseOffset=0 1882MSIXCAPCapId=0 1883MSIXCAPNextCapability=0 1884MSIXMsgCtrl=0 1885MSIXPbaOffset=0 1886MSIXTableOffset=0 1887MaximumLatency=0 1888MinimumGrant=0 1889PMCAPBaseOffset=0 1890PMCAPCapId=0 1891PMCAPCapabilities=0 1892PMCAPCtrlStatus=0 1893PMCAPNextCapability=0 1894PXCAPBaseOffset=0 1895PXCAPCapId=0 1896PXCAPCapabilities=0 1897PXCAPDevCap2=0 1898PXCAPDevCapabilities=0 1899PXCAPDevCtrl=0 1900PXCAPDevCtrl2=0 1901PXCAPDevStatus=0 1902PXCAPLinkCap=0 1903PXCAPLinkCtrl=0 1904PXCAPLinkStatus=0 1905PXCAPNextCapability=0 1906ProgIF=133 1907Revision=0 1908Status=640 1909SubClassCode=1 1910SubsystemID=0 1911SubsystemVendorID=0 1912VendorID=32902 1913clk_domain=system.clk_domain 1914config_latency=20000 1915ctrl_offset=2 1916default_p_state=UNDEFINED 1917disks= 1918eventq_index=0 1919host=system.realview.pci_host 1920io_shift=2 1921p_state_clk_gate_bins=20 1922p_state_clk_gate_max=1000000000000 1923p_state_clk_gate_min=1000 1924pci_bus=2 1925pci_dev=0 1926pci_func=0 1927pio_latency=30000 1928power_model=Null 1929system=system 1930dma=system.iobus.slave[2] 1931pio=system.iobus.master[9] 1932 1933[system.realview.clcd] 1934type=Pl111 1935amba_id=1315089 1936clk_domain=system.clk_domain 1937default_p_state=UNDEFINED 1938enable_capture=true 1939eventq_index=0 1940gic=system.realview.gic 1941int_num=46 1942p_state_clk_gate_bins=20 1943p_state_clk_gate_max=1000000000000 1944p_state_clk_gate_min=1000 1945pio_addr=471793664 1946pio_latency=10000 1947pixel_clock=41667 1948power_model=Null 1949system=system 1950vnc=system.vncserver 1951dma=system.iobus.slave[1] 1952pio=system.iobus.master[5] 1953 1954[system.realview.dcc] 1955type=SubSystem 1956children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys 1957eventq_index=0 1958thermal_domain=Null 1959 1960[system.realview.dcc.osc_cpu] 1961type=RealViewOsc 1962dcc=0 1963device=0 1964eventq_index=0 1965freq=16667 1966parent=system.realview.realview_io 1967position=0 1968site=1 1969voltage_domain=system.voltage_domain 1970 1971[system.realview.dcc.osc_ddr] 1972type=RealViewOsc 1973dcc=0 1974device=8 1975eventq_index=0 1976freq=25000 1977parent=system.realview.realview_io 1978position=0 1979site=1 1980voltage_domain=system.voltage_domain 1981 1982[system.realview.dcc.osc_hsbm] 1983type=RealViewOsc 1984dcc=0 1985device=4 1986eventq_index=0 1987freq=25000 1988parent=system.realview.realview_io 1989position=0 1990site=1 1991voltage_domain=system.voltage_domain 1992 1993[system.realview.dcc.osc_pxl] 1994type=RealViewOsc 1995dcc=0 1996device=5 1997eventq_index=0 1998freq=42105 1999parent=system.realview.realview_io 2000position=0 2001site=1 2002voltage_domain=system.voltage_domain 2003 2004[system.realview.dcc.osc_smb] 2005type=RealViewOsc 2006dcc=0 2007device=6 2008eventq_index=0 2009freq=20000 2010parent=system.realview.realview_io 2011position=0 2012site=1 2013voltage_domain=system.voltage_domain 2014 2015[system.realview.dcc.osc_sys] 2016type=RealViewOsc 2017dcc=0 2018device=7 2019eventq_index=0 2020freq=16667 2021parent=system.realview.realview_io 2022position=0 2023site=1 2024voltage_domain=system.voltage_domain 2025 2026[system.realview.energy_ctrl] 2027type=EnergyCtrl 2028clk_domain=system.clk_domain 2029default_p_state=UNDEFINED 2030dvfs_handler=system.dvfs_handler 2031eventq_index=0 2032p_state_clk_gate_bins=20 2033p_state_clk_gate_max=1000000000000 2034p_state_clk_gate_min=1000 2035pio_addr=470286336 2036pio_latency=100000 2037power_model=Null 2038system=system 2039pio=system.iobus.master[22] 2040 2041[system.realview.ethernet] 2042type=IGbE 2043BAR0=0 2044BAR0LegacyIO=false 2045BAR0Size=131072 2046BAR1=0 2047BAR1LegacyIO=false 2048BAR1Size=0 2049BAR2=0 2050BAR2LegacyIO=false 2051BAR2Size=0 2052BAR3=0 2053BAR3LegacyIO=false 2054BAR3Size=0 2055BAR4=0 2056BAR4LegacyIO=false 2057BAR4Size=0 2058BAR5=0 2059BAR5LegacyIO=false 2060BAR5Size=0 2061BIST=0 2062CacheLineSize=0 2063CapabilityPtr=0 2064CardbusCIS=0 2065ClassCode=2 2066Command=0 2067DeviceID=4213 2068ExpansionROM=0 2069HeaderType=0 2070InterruptLine=1 2071InterruptPin=1 2072LatencyTimer=0 2073LegacyIOBase=0 2074MSICAPBaseOffset=0 2075MSICAPCapId=0 2076MSICAPMaskBits=0 2077MSICAPMsgAddr=0 2078MSICAPMsgCtrl=0 2079MSICAPMsgData=0 2080MSICAPMsgUpperAddr=0 2081MSICAPNextCapability=0 2082MSICAPPendingBits=0 2083MSIXCAPBaseOffset=0 2084MSIXCAPCapId=0 2085MSIXCAPNextCapability=0 2086MSIXMsgCtrl=0 2087MSIXPbaOffset=0 2088MSIXTableOffset=0 2089MaximumLatency=0 2090MinimumGrant=255 2091PMCAPBaseOffset=0 2092PMCAPCapId=0 2093PMCAPCapabilities=0 2094PMCAPCtrlStatus=0 2095PMCAPNextCapability=0 2096PXCAPBaseOffset=0 2097PXCAPCapId=0 2098PXCAPCapabilities=0 2099PXCAPDevCap2=0 2100PXCAPDevCapabilities=0 2101PXCAPDevCtrl=0 2102PXCAPDevCtrl2=0 2103PXCAPDevStatus=0 2104PXCAPLinkCap=0 2105PXCAPLinkCtrl=0 2106PXCAPLinkStatus=0 2107PXCAPNextCapability=0 2108ProgIF=0 2109Revision=0 2110Status=0 2111SubClassCode=0 2112SubsystemID=4104 2113SubsystemVendorID=32902 2114VendorID=32902 2115clk_domain=system.clk_domain 2116config_latency=20000 2117default_p_state=UNDEFINED 2118eventq_index=0 2119fetch_comp_delay=10000 2120fetch_delay=10000 2121hardware_address=00:90:00:00:00:01 2122host=system.realview.pci_host 2123p_state_clk_gate_bins=20 2124p_state_clk_gate_max=1000000000000 2125p_state_clk_gate_min=1000 2126pci_bus=0 2127pci_dev=0 2128pci_func=0 2129phy_epid=896 2130phy_pid=680 2131pio_latency=30000 2132power_model=Null 2133rx_desc_cache_size=64 2134rx_fifo_size=393216 2135rx_write_delay=0 2136system=system 2137tx_desc_cache_size=64 2138tx_fifo_size=393216 2139tx_read_delay=0 2140wb_comp_delay=10000 2141wb_delay=10000 2142dma=system.iobus.slave[4] 2143pio=system.iobus.master[24] 2144 2145[system.realview.generic_timer] 2146type=GenericTimer 2147eventq_index=0 2148gic=system.realview.gic 2149int_phys=29 2150int_virt=27 2151system=system 2152 2153[system.realview.gic] 2154type=Pl390 2155clk_domain=system.clk_domain 2156cpu_addr=738205696 2157cpu_pio_delay=10000 2158default_p_state=UNDEFINED 2159dist_addr=738201600 2160dist_pio_delay=10000 2161eventq_index=0 2162gem5_extensions=true 2163int_latency=10000 2164it_lines=128 2165p_state_clk_gate_bins=20 2166p_state_clk_gate_max=1000000000000 2167p_state_clk_gate_min=1000 2168platform=system.realview 2169power_model=Null 2170system=system 2171pio=system.membus.master[2] 2172 2173[system.realview.hdlcd] 2174type=HDLcd 2175amba_id=1314816 2176clk_domain=system.clk_domain 2177default_p_state=UNDEFINED 2178enable_capture=true 2179eventq_index=0 2180gic=system.realview.gic 2181int_num=117 2182p_state_clk_gate_bins=20 2183p_state_clk_gate_max=1000000000000 2184p_state_clk_gate_min=1000 2185pio_addr=721420288 2186pio_latency=10000 2187pixel_buffer_size=2048 2188pixel_chunk=32 2189power_model=Null 2190pxl_clk=system.realview.dcc.osc_pxl 2191system=system 2192vnc=system.vncserver 2193workaround_dma_line_count=true 2194workaround_swap_rb=true 2195dma=system.membus.slave[0] 2196pio=system.iobus.master[6] 2197 2198[system.realview.ide] 2199type=IdeController 2200BAR0=1 2201BAR0LegacyIO=false 2202BAR0Size=8 2203BAR1=1 2204BAR1LegacyIO=false 2205BAR1Size=4 2206BAR2=1 2207BAR2LegacyIO=false 2208BAR2Size=8 2209BAR3=1 2210BAR3LegacyIO=false 2211BAR3Size=4 2212BAR4=1 2213BAR4LegacyIO=false 2214BAR4Size=16 2215BAR5=1 2216BAR5LegacyIO=false 2217BAR5Size=0 2218BIST=0 2219CacheLineSize=0 2220CapabilityPtr=0 2221CardbusCIS=0 2222ClassCode=1 2223Command=0 2224DeviceID=28945 2225ExpansionROM=0 2226HeaderType=0 2227InterruptLine=2 2228InterruptPin=2 2229LatencyTimer=0 2230LegacyIOBase=0 2231MSICAPBaseOffset=0 2232MSICAPCapId=0 2233MSICAPMaskBits=0 2234MSICAPMsgAddr=0 2235MSICAPMsgCtrl=0 2236MSICAPMsgData=0 2237MSICAPMsgUpperAddr=0 2238MSICAPNextCapability=0 2239MSICAPPendingBits=0 2240MSIXCAPBaseOffset=0 2241MSIXCAPCapId=0 2242MSIXCAPNextCapability=0 2243MSIXMsgCtrl=0 2244MSIXPbaOffset=0 2245MSIXTableOffset=0 2246MaximumLatency=0 2247MinimumGrant=0 2248PMCAPBaseOffset=0 2249PMCAPCapId=0 2250PMCAPCapabilities=0 2251PMCAPCtrlStatus=0 2252PMCAPNextCapability=0 2253PXCAPBaseOffset=0 2254PXCAPCapId=0 2255PXCAPCapabilities=0 2256PXCAPDevCap2=0 2257PXCAPDevCapabilities=0 2258PXCAPDevCtrl=0 2259PXCAPDevCtrl2=0 2260PXCAPDevStatus=0 2261PXCAPLinkCap=0 2262PXCAPLinkCtrl=0 2263PXCAPLinkStatus=0 2264PXCAPNextCapability=0 2265ProgIF=133 2266Revision=0 2267Status=640 2268SubClassCode=1 2269SubsystemID=0 2270SubsystemVendorID=0 2271VendorID=32902 2272clk_domain=system.clk_domain 2273config_latency=20000 2274ctrl_offset=0 2275default_p_state=UNDEFINED 2276disks=system.cf0 2277eventq_index=0 2278host=system.realview.pci_host 2279io_shift=0 2280p_state_clk_gate_bins=20 2281p_state_clk_gate_max=1000000000000 2282p_state_clk_gate_min=1000 2283pci_bus=0 2284pci_dev=1 2285pci_func=0 2286pio_latency=30000 2287power_model=Null 2288system=system 2289dma=system.iobus.slave[3] 2290pio=system.iobus.master[23] 2291 2292[system.realview.kmi0] 2293type=Pl050 2294amba_id=1314896 2295clk_domain=system.clk_domain 2296default_p_state=UNDEFINED 2297eventq_index=0 2298gic=system.realview.gic 2299int_delay=1000000 2300int_num=44 2301is_mouse=false 2302p_state_clk_gate_bins=20 2303p_state_clk_gate_max=1000000000000 2304p_state_clk_gate_min=1000 2305pio_addr=470155264 2306pio_latency=100000 2307power_model=Null 2308system=system 2309vnc=system.vncserver 2310pio=system.iobus.master[7] 2311 2312[system.realview.kmi1] 2313type=Pl050 2314amba_id=1314896 2315clk_domain=system.clk_domain 2316default_p_state=UNDEFINED 2317eventq_index=0 2318gic=system.realview.gic 2319int_delay=1000000 2320int_num=45 2321is_mouse=true 2322p_state_clk_gate_bins=20 2323p_state_clk_gate_max=1000000000000 2324p_state_clk_gate_min=1000 2325pio_addr=470220800 2326pio_latency=100000 2327power_model=Null 2328system=system 2329vnc=system.vncserver 2330pio=system.iobus.master[8] 2331 2332[system.realview.l2x0_fake] 2333type=IsaFake 2334clk_domain=system.clk_domain 2335default_p_state=UNDEFINED 2336eventq_index=0 2337fake_mem=false 2338p_state_clk_gate_bins=20 2339p_state_clk_gate_max=1000000000000 2340p_state_clk_gate_min=1000 2341pio_addr=739246080 2342pio_latency=100000 2343pio_size=4095 2344power_model=Null 2345ret_bad_addr=false 2346ret_data16=65535 2347ret_data32=4294967295 2348ret_data64=18446744073709551615 2349ret_data8=255 2350system=system 2351update_data=false 2352warn_access= 2353pio=system.iobus.master[12] 2354 2355[system.realview.lan_fake] 2356type=IsaFake 2357clk_domain=system.clk_domain 2358default_p_state=UNDEFINED 2359eventq_index=0 2360fake_mem=false 2361p_state_clk_gate_bins=20 2362p_state_clk_gate_max=1000000000000 2363p_state_clk_gate_min=1000 2364pio_addr=436207616 2365pio_latency=100000 2366pio_size=65535 2367power_model=Null 2368ret_bad_addr=false 2369ret_data16=65535 2370ret_data32=4294967295 2371ret_data64=18446744073709551615 2372ret_data8=255 2373system=system 2374update_data=false 2375warn_access= 2376pio=system.iobus.master[19] 2377 2378[system.realview.local_cpu_timer] 2379type=CpuLocalTimer 2380clk_domain=system.clk_domain 2381default_p_state=UNDEFINED 2382eventq_index=0 2383gic=system.realview.gic 2384int_num_timer=29 2385int_num_watchdog=30 2386p_state_clk_gate_bins=20 2387p_state_clk_gate_max=1000000000000 2388p_state_clk_gate_min=1000 2389pio_addr=738721792 2390pio_latency=100000 2391power_model=Null 2392system=system 2393pio=system.membus.master[4] 2394 2395[system.realview.mcc] 2396type=SubSystem 2397children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl 2398eventq_index=0 2399thermal_domain=Null 2400 2401[system.realview.mcc.osc_clcd] 2402type=RealViewOsc 2403dcc=0 2404device=1 2405eventq_index=0 2406freq=42105 2407parent=system.realview.realview_io 2408position=0 2409site=0 2410voltage_domain=system.voltage_domain 2411 2412[system.realview.mcc.osc_mcc] 2413type=RealViewOsc 2414dcc=0 2415device=0 2416eventq_index=0 2417freq=20000 2418parent=system.realview.realview_io 2419position=0 2420site=0 2421voltage_domain=system.voltage_domain 2422 2423[system.realview.mcc.osc_peripheral] 2424type=RealViewOsc 2425dcc=0 2426device=2 2427eventq_index=0 2428freq=41667 2429parent=system.realview.realview_io 2430position=0 2431site=0 2432voltage_domain=system.voltage_domain 2433 2434[system.realview.mcc.osc_system_bus] 2435type=RealViewOsc 2436dcc=0 2437device=4 2438eventq_index=0 2439freq=41667 2440parent=system.realview.realview_io 2441position=0 2442site=0 2443voltage_domain=system.voltage_domain 2444 2445[system.realview.mcc.temp_crtl] 2446type=RealViewTemperatureSensor 2447dcc=0 2448device=0 2449eventq_index=0 2450parent=system.realview.realview_io 2451position=0 2452site=0 2453system=system 2454 2455[system.realview.mmc_fake] 2456type=AmbaFake 2457amba_id=0 2458clk_domain=system.clk_domain 2459default_p_state=UNDEFINED 2460eventq_index=0 2461ignore_access=false 2462p_state_clk_gate_bins=20 2463p_state_clk_gate_max=1000000000000 2464p_state_clk_gate_min=1000 2465pio_addr=470089728 2466pio_latency=100000 2467power_model=Null 2468system=system 2469pio=system.iobus.master[21] 2470 2471[system.realview.nvmem] 2472type=SimpleMemory 2473bandwidth=73.000000 2474clk_domain=system.clk_domain 2475conf_table_reported=true 2476default_p_state=UNDEFINED 2477eventq_index=0 2478in_addr_map=true 2479latency=30000 2480latency_var=0 2481null=false 2482p_state_clk_gate_bins=20 2483p_state_clk_gate_max=1000000000000 2484p_state_clk_gate_min=1000 2485power_model=Null 2486range=0:67108863 2487port=system.membus.master[1] 2488 2489[system.realview.pci_host] 2490type=GenericPciHost 2491clk_domain=system.clk_domain 2492conf_base=805306368 2493conf_device_bits=12 2494conf_size=268435456 2495default_p_state=UNDEFINED 2496eventq_index=0 2497p_state_clk_gate_bins=20 2498p_state_clk_gate_max=1000000000000 2499p_state_clk_gate_min=1000 2500pci_dma_base=0 2501pci_mem_base=0 2502pci_pio_base=788529152 2503platform=system.realview 2504power_model=Null 2505system=system 2506pio=system.iobus.master[2] 2507 2508[system.realview.realview_io] 2509type=RealViewCtrl 2510clk_domain=system.clk_domain 2511default_p_state=UNDEFINED 2512eventq_index=0 2513idreg=35979264 2514p_state_clk_gate_bins=20 2515p_state_clk_gate_max=1000000000000 2516p_state_clk_gate_min=1000 2517pio_addr=469827584 2518pio_latency=100000 2519power_model=Null 2520proc_id0=335544320 2521proc_id1=335544320 2522system=system 2523pio=system.iobus.master[1] 2524 2525[system.realview.rtc] 2526type=PL031 2527amba_id=3412017 2528clk_domain=system.clk_domain 2529default_p_state=UNDEFINED 2530eventq_index=0 2531gic=system.realview.gic 2532int_delay=100000 2533int_num=36 2534p_state_clk_gate_bins=20 2535p_state_clk_gate_max=1000000000000 2536p_state_clk_gate_min=1000 2537pio_addr=471269376 2538pio_latency=100000 2539power_model=Null 2540system=system 2541time=Thu Jan 1 00:00:00 2009 2542pio=system.iobus.master[10] 2543 2544[system.realview.sp810_fake] 2545type=AmbaFake 2546amba_id=0 2547clk_domain=system.clk_domain 2548default_p_state=UNDEFINED 2549eventq_index=0 2550ignore_access=true 2551p_state_clk_gate_bins=20 2552p_state_clk_gate_max=1000000000000 2553p_state_clk_gate_min=1000 2554pio_addr=469893120 2555pio_latency=100000 2556power_model=Null 2557system=system 2558pio=system.iobus.master[16] 2559 2560[system.realview.timer0] 2561type=Sp804 2562amba_id=1316868 2563clk_domain=system.clk_domain 2564clock0=1000000 2565clock1=1000000 2566default_p_state=UNDEFINED 2567eventq_index=0 2568gic=system.realview.gic 2569int_num0=34 2570int_num1=34 2571p_state_clk_gate_bins=20 2572p_state_clk_gate_max=1000000000000 2573p_state_clk_gate_min=1000 2574pio_addr=470876160 2575pio_latency=100000 2576power_model=Null 2577system=system 2578pio=system.iobus.master[3] 2579 2580[system.realview.timer1] 2581type=Sp804 2582amba_id=1316868 2583clk_domain=system.clk_domain 2584clock0=1000000 2585clock1=1000000 2586default_p_state=UNDEFINED 2587eventq_index=0 2588gic=system.realview.gic 2589int_num0=35 2590int_num1=35 2591p_state_clk_gate_bins=20 2592p_state_clk_gate_max=1000000000000 2593p_state_clk_gate_min=1000 2594pio_addr=470941696 2595pio_latency=100000 2596power_model=Null 2597system=system 2598pio=system.iobus.master[4] 2599 2600[system.realview.uart] 2601type=Pl011 2602clk_domain=system.clk_domain 2603default_p_state=UNDEFINED 2604end_on_eot=false 2605eventq_index=0 2606gic=system.realview.gic 2607int_delay=100000 2608int_num=37 2609p_state_clk_gate_bins=20 2610p_state_clk_gate_max=1000000000000 2611p_state_clk_gate_min=1000 2612pio_addr=470351872 2613pio_latency=100000 2614platform=system.realview 2615power_model=Null 2616system=system 2617terminal=system.terminal 2618pio=system.iobus.master[0] 2619 2620[system.realview.uart1_fake] 2621type=AmbaFake 2622amba_id=0 2623clk_domain=system.clk_domain 2624default_p_state=UNDEFINED 2625eventq_index=0 2626ignore_access=false 2627p_state_clk_gate_bins=20 2628p_state_clk_gate_max=1000000000000 2629p_state_clk_gate_min=1000 2630pio_addr=470417408 2631pio_latency=100000 2632power_model=Null 2633system=system 2634pio=system.iobus.master[13] 2635 2636[system.realview.uart2_fake] 2637type=AmbaFake 2638amba_id=0 2639clk_domain=system.clk_domain 2640default_p_state=UNDEFINED 2641eventq_index=0 2642ignore_access=false 2643p_state_clk_gate_bins=20 2644p_state_clk_gate_max=1000000000000 2645p_state_clk_gate_min=1000 2646pio_addr=470482944 2647pio_latency=100000 2648power_model=Null 2649system=system 2650pio=system.iobus.master[14] 2651 2652[system.realview.uart3_fake] 2653type=AmbaFake 2654amba_id=0 2655clk_domain=system.clk_domain 2656default_p_state=UNDEFINED 2657eventq_index=0 2658ignore_access=false 2659p_state_clk_gate_bins=20 2660p_state_clk_gate_max=1000000000000 2661p_state_clk_gate_min=1000 2662pio_addr=470548480 2663pio_latency=100000 2664power_model=Null 2665system=system 2666pio=system.iobus.master[15] 2667 2668[system.realview.usb_fake] 2669type=IsaFake 2670clk_domain=system.clk_domain 2671default_p_state=UNDEFINED 2672eventq_index=0 2673fake_mem=false 2674p_state_clk_gate_bins=20 2675p_state_clk_gate_max=1000000000000 2676p_state_clk_gate_min=1000 2677pio_addr=452984832 2678pio_latency=100000 2679pio_size=131071 2680power_model=Null 2681ret_bad_addr=false 2682ret_data16=65535 2683ret_data32=4294967295 2684ret_data64=18446744073709551615 2685ret_data8=255 2686system=system 2687update_data=false 2688warn_access= 2689pio=system.iobus.master[20] 2690 2691[system.realview.vgic] 2692type=VGic 2693clk_domain=system.clk_domain 2694default_p_state=UNDEFINED 2695eventq_index=0 2696gic=system.realview.gic 2697hv_addr=738213888 2698p_state_clk_gate_bins=20 2699p_state_clk_gate_max=1000000000000 2700p_state_clk_gate_min=1000 2701pio_delay=10000 2702platform=system.realview 2703power_model=Null 2704ppint=25 2705system=system 2706vcpu_addr=738222080 2707pio=system.membus.master[3] 2708 2709[system.realview.vram] 2710type=SimpleMemory 2711bandwidth=73.000000 2712clk_domain=system.clk_domain 2713conf_table_reported=false 2714default_p_state=UNDEFINED 2715eventq_index=0 2716in_addr_map=true 2717latency=30000 2718latency_var=0 2719null=false 2720p_state_clk_gate_bins=20 2721p_state_clk_gate_max=1000000000000 2722p_state_clk_gate_min=1000 2723power_model=Null 2724range=402653184:436207615 2725port=system.iobus.master[11] 2726 2727[system.realview.watchdog_fake] 2728type=AmbaFake 2729amba_id=0 2730clk_domain=system.clk_domain 2731default_p_state=UNDEFINED 2732eventq_index=0 2733ignore_access=false 2734p_state_clk_gate_bins=20 2735p_state_clk_gate_max=1000000000000 2736p_state_clk_gate_min=1000 2737pio_addr=470745088 2738pio_latency=100000 2739power_model=Null 2740system=system 2741pio=system.iobus.master[17] 2742 2743[system.terminal] 2744type=Terminal 2745eventq_index=0 2746intr_control=system.intrctrl 2747number=0 2748output=true 2749port=3456 2750 2751[system.toL2Bus] 2752type=CoherentXBar 2753children=snoop_filter 2754clk_domain=system.cpu_clk_domain 2755default_p_state=UNDEFINED 2756eventq_index=0 2757forward_latency=0 2758frontend_latency=1 2759p_state_clk_gate_bins=20 2760p_state_clk_gate_max=1000000000000 2761p_state_clk_gate_min=1000 2762point_of_coherency=false 2763power_model=Null 2764response_latency=1 2765snoop_filter=system.toL2Bus.snoop_filter 2766snoop_response_latency=1 2767system=system 2768use_default_range=false 2769width=32 2770master=system.l2c.cpu_side 2771slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side 2772 2773[system.toL2Bus.snoop_filter] 2774type=SnoopFilter 2775eventq_index=0 2776lookup_latency=0 2777max_capacity=8388608 2778system=system 2779 2780[system.vncserver] 2781type=VncServer 2782eventq_index=0 2783frame_capture=false 2784number=0 2785port=5900 2786 2787[system.voltage_domain] 2788type=VoltageDomain 2789eventq_index=0 2790voltage=1.000000 2791