Cross Reference: /gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/config.ini

Deleted Added

sdiff udiff text old ( 11245:1c5102c0a7a9 ) new ( 11570:4aac82f10951 )

full compact

config.ini (11245:1c5102c0a7a9)	config.ini (11570:4aac82f10951)
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain 14atags_addr=134217728	1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain 14atags_addr=134217728
15boot_loader=/work/gem5/dist/binaries/boot_emm.arm64	15boot_loader=/arm/projectscratch/randd/systems/dist/binaries/boot_emm.arm64
16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain	16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain
19dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb	19default_p_state=UNDEFINED 20dtb_filename=/arm/projectscratch/randd/systems/dist/binaries/vexpress.aarch64.20140821.dtb
20early_kernel_symbols=false 21enable_context_switch_stats_dump=false 22eventq_index=0	21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0
	24exit_on_work_items=false
23flags_addr=469827632 24gic_cpu_addr=738205696 25have_large_asid_64=false	25flags_addr=469827632 26gic_cpu_addr=738205696 27have_large_asid_64=false
26have_lpae=false	28have_lpae=true
27have_security=false 28have_virtualization=false 29highest_el_is_64=false 30init_param=0	29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0
31kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821	33kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch64.20140821
32kernel_addr_check=true 33load_addr_mask=268435455 34load_offset=2147483648 35machine_type=VExpress_EMM64 36mem_mode=timing 37mem_ranges=2147483648:2415919103 38memories=system.physmem system.realview.nvmem system.realview.vram 39mmap_using_noreserve=false 40multi_proc=true 41multi_thread=false 42num_work_ids=16	34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM64 38mem_mode=timing 39mem_ranges=2147483648:2415919103 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16
	45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000
43panic_on_oops=true 44panic_on_panic=true 45phys_addr_range_64=40	48panic_on_oops=true 49panic_on_panic=true 50phys_addr_range_64=40
46readfile=/work/gem5/outgoing/gem5_2/tests/halt.sh	51power_model=Null 52readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh
47reset_addr_64=0 48symbolfile=	53reset_addr_64=0 54symbolfile=
	55thermal_components= 56thermal_model=Null
49work_begin_ckpt_count=0 50work_begin_cpu_id_exit=-1 51work_begin_exit_count=0 52work_cpus_ckpt_count=0 53work_end_ckpt_count=0 54work_end_exit_count=0 55work_item_id=-1 56system_port=system.membus.slave[1] 57 58[system.bridge] 59type=Bridge 60clk_domain=system.clk_domain	57work_begin_ckpt_count=0 58work_begin_cpu_id_exit=-1 59work_begin_exit_count=0 60work_cpus_ckpt_count=0 61work_end_ckpt_count=0 62work_end_exit_count=0 63work_item_id=-1 64system_port=system.membus.slave[1] 65 66[system.bridge] 67type=Bridge 68clk_domain=system.clk_domain
	69default_p_state=UNDEFINED
61delay=50000 62eventq_index=0	70delay=50000 71eventq_index=0
	72p_state_clk_gate_bins=20 73p_state_clk_gate_max=1000000000000 74p_state_clk_gate_min=1000 75power_model=Null
63ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911 64req_size=16 65resp_size=16 66master=system.iobus.slave[0] 67slave=system.membus.master[0] 68 69[system.cf0] 70type=IdeDisk 71children=image 72delay=1000000 73driveID=master 74eventq_index=0 75image=system.cf0.image 76 77[system.cf0.image] 78type=CowDiskImage 79children=child 80child=system.cf0.image.child 81eventq_index=0 82image_file= 83read_only=false 84table_size=65536 85 86[system.cf0.image.child] 87type=RawDiskImage 88eventq_index=0	76ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911 77req_size=16 78resp_size=16 79master=system.iobus.slave[0] 80slave=system.membus.master[0] 81 82[system.cf0] 83type=IdeDisk 84children=image 85delay=1000000 86driveID=master 87eventq_index=0 88image=system.cf0.image 89 90[system.cf0.image] 91type=CowDiskImage 92children=child 93child=system.cf0.image.child 94eventq_index=0 95image_file= 96read_only=false 97table_size=65536 98 99[system.cf0.image.child] 100type=RawDiskImage 101eventq_index=0
89image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img	102image_file=/arm/projectscratch/randd/systems/dist/disks/linaro-minimal-aarch64.img
90read_only=true 91 92[system.clk_domain] 93type=SrcClockDomain 94clock=1000 95domain_id=-1 96eventq_index=0 97init_perf_level=0 98voltage_domain=system.voltage_domain 99 100[system.cpu0] 101type=DerivO3CPU 102children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 103LFSTSize=1024 104LQEntries=16 105LSQCheckLoads=true 106LSQDepCheckShift=0 107SQEntries=16 108SSITSize=1024 109activity=0 110backComSize=5 111branchPred=system.cpu0.branchPred 112cachePorts=200 113checker=Null 114clk_domain=system.cpu_clk_domain 115commitToDecodeDelay=1 116commitToFetchDelay=1 117commitToIEWDelay=1 118commitToRenameDelay=1 119commitWidth=8 120cpu_id=0 121decodeToFetchDelay=1 122decodeToRenameDelay=2 123decodeWidth=3	103read_only=true 104 105[system.clk_domain] 106type=SrcClockDomain 107clock=1000 108domain_id=-1 109eventq_index=0 110init_perf_level=0 111voltage_domain=system.voltage_domain 112 113[system.cpu0] 114type=DerivO3CPU 115children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 116LFSTSize=1024 117LQEntries=16 118LSQCheckLoads=true 119LSQDepCheckShift=0 120SQEntries=16 121SSITSize=1024 122activity=0 123backComSize=5 124branchPred=system.cpu0.branchPred 125cachePorts=200 126checker=Null 127clk_domain=system.cpu_clk_domain 128commitToDecodeDelay=1 129commitToFetchDelay=1 130commitToIEWDelay=1 131commitToRenameDelay=1 132commitWidth=8 133cpu_id=0 134decodeToFetchDelay=1 135decodeToRenameDelay=2 136decodeWidth=3
	137default_p_state=UNDEFINED
124dispatchWidth=6 125do_checkpoint_insts=true 126do_quiesce=true 127do_statistics_insts=true 128dstage2_mmu=system.cpu0.dstage2_mmu 129dtb=system.cpu0.dtb 130eventq_index=0 131fetchBufferSize=16 132fetchQueueSize=32 133fetchToDecodeDelay=3 134fetchTrapLatency=1 135fetchWidth=3 136forwardComSize=5 137fuPool=system.cpu0.fuPool 138function_trace=false 139function_trace_start=0 140iewToCommitDelay=1 141iewToDecodeDelay=1 142iewToFetchDelay=1 143iewToRenameDelay=1 144interrupts=system.cpu0.interrupts 145isa=system.cpu0.isa 146issueToExecuteDelay=1 147issueWidth=8 148istage2_mmu=system.cpu0.istage2_mmu 149itb=system.cpu0.itb 150max_insts_all_threads=0 151max_insts_any_thread=0 152max_loads_all_threads=0 153max_loads_any_thread=0 154needsTSO=false 155numIQEntries=32 156numPhysCCRegs=640 157numPhysFloatRegs=192 158numPhysIntRegs=128 159numROBEntries=40 160numRobs=1 161numThreads=1	138dispatchWidth=6 139do_checkpoint_insts=true 140do_quiesce=true 141do_statistics_insts=true 142dstage2_mmu=system.cpu0.dstage2_mmu 143dtb=system.cpu0.dtb 144eventq_index=0 145fetchBufferSize=16 146fetchQueueSize=32 147fetchToDecodeDelay=3 148fetchTrapLatency=1 149fetchWidth=3 150forwardComSize=5 151fuPool=system.cpu0.fuPool 152function_trace=false 153function_trace_start=0 154iewToCommitDelay=1 155iewToDecodeDelay=1 156iewToFetchDelay=1 157iewToRenameDelay=1 158interrupts=system.cpu0.interrupts 159isa=system.cpu0.isa 160issueToExecuteDelay=1 161issueWidth=8 162istage2_mmu=system.cpu0.istage2_mmu 163itb=system.cpu0.itb 164max_insts_all_threads=0 165max_insts_any_thread=0 166max_loads_all_threads=0 167max_loads_any_thread=0 168needsTSO=false 169numIQEntries=32 170numPhysCCRegs=640 171numPhysFloatRegs=192 172numPhysIntRegs=128 173numROBEntries=40 174numRobs=1 175numThreads=1
	176p_state_clk_gate_bins=20 177p_state_clk_gate_max=1000000000000 178p_state_clk_gate_min=1000 179power_model=Null
162profile=0 163progress_interval=0 164renameToDecodeDelay=1 165renameToFetchDelay=1 166renameToIEWDelay=1 167renameToROBDelay=1 168renameWidth=3 169simpoint_start_insts= 170smtCommitPolicy=RoundRobin 171smtFetchPolicy=SingleThread 172smtIQPolicy=Partitioned 173smtIQThreshold=100 174smtLSQPolicy=Partitioned 175smtLSQThreshold=100 176smtNumFetchingThreads=1 177smtROBPolicy=Partitioned 178smtROBThreshold=100 179socket_id=0 180squashWidth=8 181store_set_clear_period=250000 182switched_out=false 183system=system 184tracer=system.cpu0.tracer 185trapLatency=13 186wbWidth=8 187workload= 188dcache_port=system.cpu0.dcache.cpu_side 189icache_port=system.cpu0.icache.cpu_side 190 191[system.cpu0.branchPred] 192type=BiModeBP 193BTBEntries=2048 194BTBTagSize=18 195RASSize=16 196choiceCtrBits=2 197choicePredictorSize=8192 198eventq_index=0 199globalCtrBits=2 200globalPredictorSize=8192	180profile=0 181progress_interval=0 182renameToDecodeDelay=1 183renameToFetchDelay=1 184renameToIEWDelay=1 185renameToROBDelay=1 186renameWidth=3 187simpoint_start_insts= 188smtCommitPolicy=RoundRobin 189smtFetchPolicy=SingleThread 190smtIQPolicy=Partitioned 191smtIQThreshold=100 192smtLSQPolicy=Partitioned 193smtLSQThreshold=100 194smtNumFetchingThreads=1 195smtROBPolicy=Partitioned 196smtROBThreshold=100 197socket_id=0 198squashWidth=8 199store_set_clear_period=250000 200switched_out=false 201system=system 202tracer=system.cpu0.tracer 203trapLatency=13 204wbWidth=8 205workload= 206dcache_port=system.cpu0.dcache.cpu_side 207icache_port=system.cpu0.icache.cpu_side 208 209[system.cpu0.branchPred] 210type=BiModeBP 211BTBEntries=2048 212BTBTagSize=18 213RASSize=16 214choiceCtrBits=2 215choicePredictorSize=8192 216eventq_index=0 217globalCtrBits=2 218globalPredictorSize=8192
	219indirectHashGHR=true 220indirectHashTargets=true 221indirectPathLength=3 222indirectSets=256 223indirectTagSize=16 224indirectWays=2
201instShiftAmt=2 202numThreads=1	225instShiftAmt=2 226numThreads=1
	227useIndirect=true
203 204[system.cpu0.dcache] 205type=Cache 206children=tags 207addr_ranges=0:18446744073709551615 208assoc=2 209clk_domain=system.cpu_clk_domain 210clusivity=mostly_incl	228 229[system.cpu0.dcache] 230type=Cache 231children=tags 232addr_ranges=0:18446744073709551615 233assoc=2 234clk_domain=system.cpu_clk_domain 235clusivity=mostly_incl
	236default_p_state=UNDEFINED
211demand_mshr_reserve=1 212eventq_index=0	237demand_mshr_reserve=1 238eventq_index=0
213forward_snoops=true
214hit_latency=2 215is_read_only=false 216max_miss_count=0 217mshrs=6	239hit_latency=2 240is_read_only=false 241max_miss_count=0 242mshrs=6
	243p_state_clk_gate_bins=20 244p_state_clk_gate_max=1000000000000 245p_state_clk_gate_min=1000 246power_model=Null
218prefetch_on_access=false 219prefetcher=Null 220response_latency=2 221sequential_access=false 222size=32768 223system=system 224tags=system.cpu0.dcache.tags 225tgts_per_mshr=8 226write_buffers=16 227writeback_clean=true 228cpu_side=system.cpu0.dcache_port 229mem_side=system.cpu0.toL2Bus.slave[1] 230 231[system.cpu0.dcache.tags] 232type=LRU 233assoc=2 234block_size=64 235clk_domain=system.cpu_clk_domain	247prefetch_on_access=false 248prefetcher=Null 249response_latency=2 250sequential_access=false 251size=32768 252system=system 253tags=system.cpu0.dcache.tags 254tgts_per_mshr=8 255write_buffers=16 256writeback_clean=true 257cpu_side=system.cpu0.dcache_port 258mem_side=system.cpu0.toL2Bus.slave[1] 259 260[system.cpu0.dcache.tags] 261type=LRU 262assoc=2 263block_size=64 264clk_domain=system.cpu_clk_domain
	265default_p_state=UNDEFINED
236eventq_index=0 237hit_latency=2	266eventq_index=0 267hit_latency=2
	268p_state_clk_gate_bins=20 269p_state_clk_gate_max=1000000000000 270p_state_clk_gate_min=1000 271power_model=Null
238sequential_access=false 239size=32768 240 241[system.cpu0.dstage2_mmu] 242type=ArmStage2MMU 243children=stage2_tlb 244eventq_index=0 245stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb 246sys=system 247tlb=system.cpu0.dtb 248 249[system.cpu0.dstage2_mmu.stage2_tlb] 250type=ArmTLB 251children=walker 252eventq_index=0 253is_stage2=true 254size=32 255walker=system.cpu0.dstage2_mmu.stage2_tlb.walker 256 257[system.cpu0.dstage2_mmu.stage2_tlb.walker] 258type=ArmTableWalker 259clk_domain=system.cpu_clk_domain	272sequential_access=false 273size=32768 274 275[system.cpu0.dstage2_mmu] 276type=ArmStage2MMU 277children=stage2_tlb 278eventq_index=0 279stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb 280sys=system 281tlb=system.cpu0.dtb 282 283[system.cpu0.dstage2_mmu.stage2_tlb] 284type=ArmTLB 285children=walker 286eventq_index=0 287is_stage2=true 288size=32 289walker=system.cpu0.dstage2_mmu.stage2_tlb.walker 290 291[system.cpu0.dstage2_mmu.stage2_tlb.walker] 292type=ArmTableWalker 293clk_domain=system.cpu_clk_domain
	294default_p_state=UNDEFINED
260eventq_index=0 261is_stage2=true 262num_squash_per_cycle=2	295eventq_index=0 296is_stage2=true 297num_squash_per_cycle=2
	298p_state_clk_gate_bins=20 299p_state_clk_gate_max=1000000000000 300p_state_clk_gate_min=1000 301power_model=Null
263sys=system 264 265[system.cpu0.dtb] 266type=ArmTLB 267children=walker 268eventq_index=0 269is_stage2=false 270size=64 271walker=system.cpu0.dtb.walker 272 273[system.cpu0.dtb.walker] 274type=ArmTableWalker 275clk_domain=system.cpu_clk_domain	302sys=system 303 304[system.cpu0.dtb] 305type=ArmTLB 306children=walker 307eventq_index=0 308is_stage2=false 309size=64 310walker=system.cpu0.dtb.walker 311 312[system.cpu0.dtb.walker] 313type=ArmTableWalker 314clk_domain=system.cpu_clk_domain
	315default_p_state=UNDEFINED
276eventq_index=0 277is_stage2=false 278num_squash_per_cycle=2	316eventq_index=0 317is_stage2=false 318num_squash_per_cycle=2
	319p_state_clk_gate_bins=20 320p_state_clk_gate_max=1000000000000 321p_state_clk_gate_min=1000 322power_model=Null
279sys=system 280port=system.cpu0.toL2Bus.slave[3] 281 282[system.cpu0.fuPool] 283type=FUPool 284children=FUList0 FUList1 FUList2 FUList3 FUList4 285FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 286eventq_index=0 287 288[system.cpu0.fuPool.FUList0] 289type=FUDesc 290children=opList 291count=2 292eventq_index=0 293opList=system.cpu0.fuPool.FUList0.opList 294 295[system.cpu0.fuPool.FUList0.opList] 296type=OpDesc 297eventq_index=0 298opClass=IntAlu 299opLat=1 300pipelined=true 301 302[system.cpu0.fuPool.FUList1] 303type=FUDesc 304children=opList0 opList1 opList2 305count=1 306eventq_index=0 307opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 system.cpu0.fuPool.FUList1.opList2 308 309[system.cpu0.fuPool.FUList1.opList0] 310type=OpDesc 311eventq_index=0 312opClass=IntMult 313opLat=3 314pipelined=true 315 316[system.cpu0.fuPool.FUList1.opList1] 317type=OpDesc 318eventq_index=0 319opClass=IntDiv 320opLat=12 321pipelined=false 322 323[system.cpu0.fuPool.FUList1.opList2] 324type=OpDesc 325eventq_index=0 326opClass=IprAccess 327opLat=3 328pipelined=true 329 330[system.cpu0.fuPool.FUList2] 331type=FUDesc 332children=opList 333count=1 334eventq_index=0 335opList=system.cpu0.fuPool.FUList2.opList 336 337[system.cpu0.fuPool.FUList2.opList] 338type=OpDesc 339eventq_index=0 340opClass=MemRead 341opLat=2 342pipelined=true 343 344[system.cpu0.fuPool.FUList3] 345type=FUDesc 346children=opList 347count=1 348eventq_index=0 349opList=system.cpu0.fuPool.FUList3.opList 350 351[system.cpu0.fuPool.FUList3.opList] 352type=OpDesc 353eventq_index=0 354opClass=MemWrite 355opLat=2 356pipelined=true 357 358[system.cpu0.fuPool.FUList4] 359type=FUDesc 360children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 361count=2 362eventq_index=0 363opList=system.cpu0.fuPool.FUList4.opList00 system.cpu0.fuPool.FUList4.opList01 system.cpu0.fuPool.FUList4.opList02 system.cpu0.fuPool.FUList4.opList03 system.cpu0.fuPool.FUList4.opList04 system.cpu0.fuPool.FUList4.opList05 system.cpu0.fuPool.FUList4.opList06 system.cpu0.fuPool.FUList4.opList07 system.cpu0.fuPool.FUList4.opList08 system.cpu0.fuPool.FUList4.opList09 system.cpu0.fuPool.FUList4.opList10 system.cpu0.fuPool.FUList4.opList11 system.cpu0.fuPool.FUList4.opList12 system.cpu0.fuPool.FUList4.opList13 system.cpu0.fuPool.FUList4.opList14 system.cpu0.fuPool.FUList4.opList15 system.cpu0.fuPool.FUList4.opList16 system.cpu0.fuPool.FUList4.opList17 system.cpu0.fuPool.FUList4.opList18 system.cpu0.fuPool.FUList4.opList19 system.cpu0.fuPool.FUList4.opList20 system.cpu0.fuPool.FUList4.opList21 system.cpu0.fuPool.FUList4.opList22 system.cpu0.fuPool.FUList4.opList23 system.cpu0.fuPool.FUList4.opList24 system.cpu0.fuPool.FUList4.opList25 364 365[system.cpu0.fuPool.FUList4.opList00] 366type=OpDesc 367eventq_index=0 368opClass=SimdAdd 369opLat=4 370pipelined=true 371 372[system.cpu0.fuPool.FUList4.opList01] 373type=OpDesc 374eventq_index=0 375opClass=SimdAddAcc 376opLat=4 377pipelined=true 378 379[system.cpu0.fuPool.FUList4.opList02] 380type=OpDesc 381eventq_index=0 382opClass=SimdAlu 383opLat=4 384pipelined=true 385 386[system.cpu0.fuPool.FUList4.opList03] 387type=OpDesc 388eventq_index=0 389opClass=SimdCmp 390opLat=4 391pipelined=true 392 393[system.cpu0.fuPool.FUList4.opList04] 394type=OpDesc 395eventq_index=0 396opClass=SimdCvt 397opLat=3 398pipelined=true 399 400[system.cpu0.fuPool.FUList4.opList05] 401type=OpDesc 402eventq_index=0 403opClass=SimdMisc 404opLat=3 405pipelined=true 406 407[system.cpu0.fuPool.FUList4.opList06] 408type=OpDesc 409eventq_index=0 410opClass=SimdMult 411opLat=5 412pipelined=true 413 414[system.cpu0.fuPool.FUList4.opList07] 415type=OpDesc 416eventq_index=0 417opClass=SimdMultAcc 418opLat=5 419pipelined=true 420 421[system.cpu0.fuPool.FUList4.opList08] 422type=OpDesc 423eventq_index=0 424opClass=SimdShift 425opLat=3 426pipelined=true 427 428[system.cpu0.fuPool.FUList4.opList09] 429type=OpDesc 430eventq_index=0 431opClass=SimdShiftAcc 432opLat=3 433pipelined=true 434 435[system.cpu0.fuPool.FUList4.opList10] 436type=OpDesc 437eventq_index=0 438opClass=SimdSqrt 439opLat=9 440pipelined=true 441 442[system.cpu0.fuPool.FUList4.opList11] 443type=OpDesc 444eventq_index=0 445opClass=SimdFloatAdd 446opLat=5 447pipelined=true 448 449[system.cpu0.fuPool.FUList4.opList12] 450type=OpDesc 451eventq_index=0 452opClass=SimdFloatAlu 453opLat=5 454pipelined=true 455 456[system.cpu0.fuPool.FUList4.opList13] 457type=OpDesc 458eventq_index=0 459opClass=SimdFloatCmp 460opLat=3 461pipelined=true 462 463[system.cpu0.fuPool.FUList4.opList14] 464type=OpDesc 465eventq_index=0 466opClass=SimdFloatCvt 467opLat=3 468pipelined=true 469 470[system.cpu0.fuPool.FUList4.opList15] 471type=OpDesc 472eventq_index=0 473opClass=SimdFloatDiv 474opLat=3 475pipelined=true 476 477[system.cpu0.fuPool.FUList4.opList16] 478type=OpDesc 479eventq_index=0 480opClass=SimdFloatMisc 481opLat=3 482pipelined=true 483 484[system.cpu0.fuPool.FUList4.opList17] 485type=OpDesc 486eventq_index=0 487opClass=SimdFloatMult 488opLat=3 489pipelined=true 490 491[system.cpu0.fuPool.FUList4.opList18] 492type=OpDesc 493eventq_index=0 494opClass=SimdFloatMultAcc 495opLat=1 496pipelined=true 497 498[system.cpu0.fuPool.FUList4.opList19] 499type=OpDesc 500eventq_index=0 501opClass=SimdFloatSqrt 502opLat=9 503pipelined=true 504 505[system.cpu0.fuPool.FUList4.opList20] 506type=OpDesc 507eventq_index=0 508opClass=FloatAdd 509opLat=5 510pipelined=true 511 512[system.cpu0.fuPool.FUList4.opList21] 513type=OpDesc 514eventq_index=0 515opClass=FloatCmp 516opLat=5 517pipelined=true 518 519[system.cpu0.fuPool.FUList4.opList22] 520type=OpDesc 521eventq_index=0 522opClass=FloatCvt 523opLat=5 524pipelined=true 525 526[system.cpu0.fuPool.FUList4.opList23] 527type=OpDesc 528eventq_index=0 529opClass=FloatDiv 530opLat=9 531pipelined=false 532 533[system.cpu0.fuPool.FUList4.opList24] 534type=OpDesc 535eventq_index=0 536opClass=FloatSqrt 537opLat=33 538pipelined=false 539 540[system.cpu0.fuPool.FUList4.opList25] 541type=OpDesc 542eventq_index=0 543opClass=FloatMult 544opLat=4 545pipelined=true 546 547[system.cpu0.icache] 548type=Cache 549children=tags 550addr_ranges=0:18446744073709551615 551assoc=2 552clk_domain=system.cpu_clk_domain 553clusivity=mostly_incl	323sys=system 324port=system.cpu0.toL2Bus.slave[3] 325 326[system.cpu0.fuPool] 327type=FUPool 328children=FUList0 FUList1 FUList2 FUList3 FUList4 329FUList=system.cpu0.fuPool.FUList0 system.cpu0.fuPool.FUList1 system.cpu0.fuPool.FUList2 system.cpu0.fuPool.FUList3 system.cpu0.fuPool.FUList4 330eventq_index=0 331 332[system.cpu0.fuPool.FUList0] 333type=FUDesc 334children=opList 335count=2 336eventq_index=0 337opList=system.cpu0.fuPool.FUList0.opList 338 339[system.cpu0.fuPool.FUList0.opList] 340type=OpDesc 341eventq_index=0 342opClass=IntAlu 343opLat=1 344pipelined=true 345 346[system.cpu0.fuPool.FUList1] 347type=FUDesc 348children=opList0 opList1 opList2 349count=1 350eventq_index=0 351opList=system.cpu0.fuPool.FUList1.opList0 system.cpu0.fuPool.FUList1.opList1 system.cpu0.fuPool.FUList1.opList2 352 353[system.cpu0.fuPool.FUList1.opList0] 354type=OpDesc 355eventq_index=0 356opClass=IntMult 357opLat=3 358pipelined=true 359 360[system.cpu0.fuPool.FUList1.opList1] 361type=OpDesc 362eventq_index=0 363opClass=IntDiv 364opLat=12 365pipelined=false 366 367[system.cpu0.fuPool.FUList1.opList2] 368type=OpDesc 369eventq_index=0 370opClass=IprAccess 371opLat=3 372pipelined=true 373 374[system.cpu0.fuPool.FUList2] 375type=FUDesc 376children=opList 377count=1 378eventq_index=0 379opList=system.cpu0.fuPool.FUList2.opList 380 381[system.cpu0.fuPool.FUList2.opList] 382type=OpDesc 383eventq_index=0 384opClass=MemRead 385opLat=2 386pipelined=true 387 388[system.cpu0.fuPool.FUList3] 389type=FUDesc 390children=opList 391count=1 392eventq_index=0 393opList=system.cpu0.fuPool.FUList3.opList 394 395[system.cpu0.fuPool.FUList3.opList] 396type=OpDesc 397eventq_index=0 398opClass=MemWrite 399opLat=2 400pipelined=true 401 402[system.cpu0.fuPool.FUList4] 403type=FUDesc 404children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 405count=2 406eventq_index=0 407opList=system.cpu0.fuPool.FUList4.opList00 system.cpu0.fuPool.FUList4.opList01 system.cpu0.fuPool.FUList4.opList02 system.cpu0.fuPool.FUList4.opList03 system.cpu0.fuPool.FUList4.opList04 system.cpu0.fuPool.FUList4.opList05 system.cpu0.fuPool.FUList4.opList06 system.cpu0.fuPool.FUList4.opList07 system.cpu0.fuPool.FUList4.opList08 system.cpu0.fuPool.FUList4.opList09 system.cpu0.fuPool.FUList4.opList10 system.cpu0.fuPool.FUList4.opList11 system.cpu0.fuPool.FUList4.opList12 system.cpu0.fuPool.FUList4.opList13 system.cpu0.fuPool.FUList4.opList14 system.cpu0.fuPool.FUList4.opList15 system.cpu0.fuPool.FUList4.opList16 system.cpu0.fuPool.FUList4.opList17 system.cpu0.fuPool.FUList4.opList18 system.cpu0.fuPool.FUList4.opList19 system.cpu0.fuPool.FUList4.opList20 system.cpu0.fuPool.FUList4.opList21 system.cpu0.fuPool.FUList4.opList22 system.cpu0.fuPool.FUList4.opList23 system.cpu0.fuPool.FUList4.opList24 system.cpu0.fuPool.FUList4.opList25 408 409[system.cpu0.fuPool.FUList4.opList00] 410type=OpDesc 411eventq_index=0 412opClass=SimdAdd 413opLat=4 414pipelined=true 415 416[system.cpu0.fuPool.FUList4.opList01] 417type=OpDesc 418eventq_index=0 419opClass=SimdAddAcc 420opLat=4 421pipelined=true 422 423[system.cpu0.fuPool.FUList4.opList02] 424type=OpDesc 425eventq_index=0 426opClass=SimdAlu 427opLat=4 428pipelined=true 429 430[system.cpu0.fuPool.FUList4.opList03] 431type=OpDesc 432eventq_index=0 433opClass=SimdCmp 434opLat=4 435pipelined=true 436 437[system.cpu0.fuPool.FUList4.opList04] 438type=OpDesc 439eventq_index=0 440opClass=SimdCvt 441opLat=3 442pipelined=true 443 444[system.cpu0.fuPool.FUList4.opList05] 445type=OpDesc 446eventq_index=0 447opClass=SimdMisc 448opLat=3 449pipelined=true 450 451[system.cpu0.fuPool.FUList4.opList06] 452type=OpDesc 453eventq_index=0 454opClass=SimdMult 455opLat=5 456pipelined=true 457 458[system.cpu0.fuPool.FUList4.opList07] 459type=OpDesc 460eventq_index=0 461opClass=SimdMultAcc 462opLat=5 463pipelined=true 464 465[system.cpu0.fuPool.FUList4.opList08] 466type=OpDesc 467eventq_index=0 468opClass=SimdShift 469opLat=3 470pipelined=true 471 472[system.cpu0.fuPool.FUList4.opList09] 473type=OpDesc 474eventq_index=0 475opClass=SimdShiftAcc 476opLat=3 477pipelined=true 478 479[system.cpu0.fuPool.FUList4.opList10] 480type=OpDesc 481eventq_index=0 482opClass=SimdSqrt 483opLat=9 484pipelined=true 485 486[system.cpu0.fuPool.FUList4.opList11] 487type=OpDesc 488eventq_index=0 489opClass=SimdFloatAdd 490opLat=5 491pipelined=true 492 493[system.cpu0.fuPool.FUList4.opList12] 494type=OpDesc 495eventq_index=0 496opClass=SimdFloatAlu 497opLat=5 498pipelined=true 499 500[system.cpu0.fuPool.FUList4.opList13] 501type=OpDesc 502eventq_index=0 503opClass=SimdFloatCmp 504opLat=3 505pipelined=true 506 507[system.cpu0.fuPool.FUList4.opList14] 508type=OpDesc 509eventq_index=0 510opClass=SimdFloatCvt 511opLat=3 512pipelined=true 513 514[system.cpu0.fuPool.FUList4.opList15] 515type=OpDesc 516eventq_index=0 517opClass=SimdFloatDiv 518opLat=3 519pipelined=true 520 521[system.cpu0.fuPool.FUList4.opList16] 522type=OpDesc 523eventq_index=0 524opClass=SimdFloatMisc 525opLat=3 526pipelined=true 527 528[system.cpu0.fuPool.FUList4.opList17] 529type=OpDesc 530eventq_index=0 531opClass=SimdFloatMult 532opLat=3 533pipelined=true 534 535[system.cpu0.fuPool.FUList4.opList18] 536type=OpDesc 537eventq_index=0 538opClass=SimdFloatMultAcc 539opLat=1 540pipelined=true 541 542[system.cpu0.fuPool.FUList4.opList19] 543type=OpDesc 544eventq_index=0 545opClass=SimdFloatSqrt 546opLat=9 547pipelined=true 548 549[system.cpu0.fuPool.FUList4.opList20] 550type=OpDesc 551eventq_index=0 552opClass=FloatAdd 553opLat=5 554pipelined=true 555 556[system.cpu0.fuPool.FUList4.opList21] 557type=OpDesc 558eventq_index=0 559opClass=FloatCmp 560opLat=5 561pipelined=true 562 563[system.cpu0.fuPool.FUList4.opList22] 564type=OpDesc 565eventq_index=0 566opClass=FloatCvt 567opLat=5 568pipelined=true 569 570[system.cpu0.fuPool.FUList4.opList23] 571type=OpDesc 572eventq_index=0 573opClass=FloatDiv 574opLat=9 575pipelined=false 576 577[system.cpu0.fuPool.FUList4.opList24] 578type=OpDesc 579eventq_index=0 580opClass=FloatSqrt 581opLat=33 582pipelined=false 583 584[system.cpu0.fuPool.FUList4.opList25] 585type=OpDesc 586eventq_index=0 587opClass=FloatMult 588opLat=4 589pipelined=true 590 591[system.cpu0.icache] 592type=Cache 593children=tags 594addr_ranges=0:18446744073709551615 595assoc=2 596clk_domain=system.cpu_clk_domain 597clusivity=mostly_incl
	598default_p_state=UNDEFINED
554demand_mshr_reserve=1 555eventq_index=0	599demand_mshr_reserve=1 600eventq_index=0
556forward_snoops=false
557hit_latency=1 558is_read_only=true 559max_miss_count=0 560mshrs=2	601hit_latency=1 602is_read_only=true 603max_miss_count=0 604mshrs=2
	605p_state_clk_gate_bins=20 606p_state_clk_gate_max=1000000000000 607p_state_clk_gate_min=1000 608power_model=Null
561prefetch_on_access=false 562prefetcher=Null 563response_latency=1 564sequential_access=false 565size=32768 566system=system 567tags=system.cpu0.icache.tags 568tgts_per_mshr=8 569write_buffers=8 570writeback_clean=true 571cpu_side=system.cpu0.icache_port 572mem_side=system.cpu0.toL2Bus.slave[0] 573 574[system.cpu0.icache.tags] 575type=LRU 576assoc=2 577block_size=64 578clk_domain=system.cpu_clk_domain	609prefetch_on_access=false 610prefetcher=Null 611response_latency=1 612sequential_access=false 613size=32768 614system=system 615tags=system.cpu0.icache.tags 616tgts_per_mshr=8 617write_buffers=8 618writeback_clean=true 619cpu_side=system.cpu0.icache_port 620mem_side=system.cpu0.toL2Bus.slave[0] 621 622[system.cpu0.icache.tags] 623type=LRU 624assoc=2 625block_size=64 626clk_domain=system.cpu_clk_domain
	627default_p_state=UNDEFINED
579eventq_index=0 580hit_latency=1	628eventq_index=0 629hit_latency=1
	630p_state_clk_gate_bins=20 631p_state_clk_gate_max=1000000000000 632p_state_clk_gate_min=1000 633power_model=Null
581sequential_access=false 582size=32768 583 584[system.cpu0.interrupts] 585type=ArmInterrupts 586eventq_index=0 587 588[system.cpu0.isa] 589type=ArmISA 590decoderFlavour=Generic 591eventq_index=0 592fpsid=1090793632 593id_aa64afr0_el1=0 594id_aa64afr1_el1=0 595id_aa64dfr0_el1=1052678 596id_aa64dfr1_el1=0 597id_aa64isar0_el1=0 598id_aa64isar1_el1=0 599id_aa64mmfr0_el1=15728642 600id_aa64mmfr1_el1=0 601id_aa64pfr0_el1=17 602id_aa64pfr1_el1=0 603id_isar0=34607377 604id_isar1=34677009 605id_isar2=555950401 606id_isar3=17899825 607id_isar4=268501314 608id_isar5=0 609id_mmfr0=270536963 610id_mmfr1=0 611id_mmfr2=19070976 612id_mmfr3=34611729 613id_pfr0=49 614id_pfr1=4113 615midr=1091551472 616pmu=Null 617system=system 618 619[system.cpu0.istage2_mmu] 620type=ArmStage2MMU 621children=stage2_tlb 622eventq_index=0 623stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb 624sys=system 625tlb=system.cpu0.itb 626 627[system.cpu0.istage2_mmu.stage2_tlb] 628type=ArmTLB 629children=walker 630eventq_index=0 631is_stage2=true 632size=32 633walker=system.cpu0.istage2_mmu.stage2_tlb.walker 634 635[system.cpu0.istage2_mmu.stage2_tlb.walker] 636type=ArmTableWalker 637clk_domain=system.cpu_clk_domain	634sequential_access=false 635size=32768 636 637[system.cpu0.interrupts] 638type=ArmInterrupts 639eventq_index=0 640 641[system.cpu0.isa] 642type=ArmISA 643decoderFlavour=Generic 644eventq_index=0 645fpsid=1090793632 646id_aa64afr0_el1=0 647id_aa64afr1_el1=0 648id_aa64dfr0_el1=1052678 649id_aa64dfr1_el1=0 650id_aa64isar0_el1=0 651id_aa64isar1_el1=0 652id_aa64mmfr0_el1=15728642 653id_aa64mmfr1_el1=0 654id_aa64pfr0_el1=17 655id_aa64pfr1_el1=0 656id_isar0=34607377 657id_isar1=34677009 658id_isar2=555950401 659id_isar3=17899825 660id_isar4=268501314 661id_isar5=0 662id_mmfr0=270536963 663id_mmfr1=0 664id_mmfr2=19070976 665id_mmfr3=34611729 666id_pfr0=49 667id_pfr1=4113 668midr=1091551472 669pmu=Null 670system=system 671 672[system.cpu0.istage2_mmu] 673type=ArmStage2MMU 674children=stage2_tlb 675eventq_index=0 676stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb 677sys=system 678tlb=system.cpu0.itb 679 680[system.cpu0.istage2_mmu.stage2_tlb] 681type=ArmTLB 682children=walker 683eventq_index=0 684is_stage2=true 685size=32 686walker=system.cpu0.istage2_mmu.stage2_tlb.walker 687 688[system.cpu0.istage2_mmu.stage2_tlb.walker] 689type=ArmTableWalker 690clk_domain=system.cpu_clk_domain
	691default_p_state=UNDEFINED
638eventq_index=0 639is_stage2=true 640num_squash_per_cycle=2	692eventq_index=0 693is_stage2=true 694num_squash_per_cycle=2
	695p_state_clk_gate_bins=20 696p_state_clk_gate_max=1000000000000 697p_state_clk_gate_min=1000 698power_model=Null
641sys=system 642 643[system.cpu0.itb] 644type=ArmTLB 645children=walker 646eventq_index=0 647is_stage2=false 648size=64 649walker=system.cpu0.itb.walker 650 651[system.cpu0.itb.walker] 652type=ArmTableWalker 653clk_domain=system.cpu_clk_domain	699sys=system 700 701[system.cpu0.itb] 702type=ArmTLB 703children=walker 704eventq_index=0 705is_stage2=false 706size=64 707walker=system.cpu0.itb.walker 708 709[system.cpu0.itb.walker] 710type=ArmTableWalker 711clk_domain=system.cpu_clk_domain
	712default_p_state=UNDEFINED
654eventq_index=0 655is_stage2=false 656num_squash_per_cycle=2	713eventq_index=0 714is_stage2=false 715num_squash_per_cycle=2
	716p_state_clk_gate_bins=20 717p_state_clk_gate_max=1000000000000 718p_state_clk_gate_min=1000 719power_model=Null
657sys=system 658port=system.cpu0.toL2Bus.slave[2] 659 660[system.cpu0.l2cache] 661type=Cache 662children=prefetcher tags 663addr_ranges=0:18446744073709551615 664assoc=16 665clk_domain=system.cpu_clk_domain 666clusivity=mostly_excl	720sys=system 721port=system.cpu0.toL2Bus.slave[2] 722 723[system.cpu0.l2cache] 724type=Cache 725children=prefetcher tags 726addr_ranges=0:18446744073709551615 727assoc=16 728clk_domain=system.cpu_clk_domain 729clusivity=mostly_excl
	730default_p_state=UNDEFINED
667demand_mshr_reserve=1 668eventq_index=0	731demand_mshr_reserve=1 732eventq_index=0
669forward_snoops=true
670hit_latency=12 671is_read_only=false 672max_miss_count=0 673mshrs=16	733hit_latency=12 734is_read_only=false 735max_miss_count=0 736mshrs=16
	737p_state_clk_gate_bins=20 738p_state_clk_gate_max=1000000000000 739p_state_clk_gate_min=1000 740power_model=Null
674prefetch_on_access=true 675prefetcher=system.cpu0.l2cache.prefetcher 676response_latency=12 677sequential_access=false 678size=1048576 679system=system 680tags=system.cpu0.l2cache.tags 681tgts_per_mshr=8 682write_buffers=8 683writeback_clean=false 684cpu_side=system.cpu0.toL2Bus.master[0] 685mem_side=system.toL2Bus.slave[0] 686 687[system.cpu0.l2cache.prefetcher] 688type=StridePrefetcher 689cache_snoop=false 690clk_domain=system.cpu_clk_domain	741prefetch_on_access=true 742prefetcher=system.cpu0.l2cache.prefetcher 743response_latency=12 744sequential_access=false 745size=1048576 746system=system 747tags=system.cpu0.l2cache.tags 748tgts_per_mshr=8 749write_buffers=8 750writeback_clean=false 751cpu_side=system.cpu0.toL2Bus.master[0] 752mem_side=system.toL2Bus.slave[0] 753 754[system.cpu0.l2cache.prefetcher] 755type=StridePrefetcher 756cache_snoop=false 757clk_domain=system.cpu_clk_domain
	758default_p_state=UNDEFINED
691degree=8 692eventq_index=0 693latency=1 694max_conf=7 695min_conf=0 696on_data=true 697on_inst=true 698on_miss=false 699on_read=true 700on_write=true	759degree=8 760eventq_index=0 761latency=1 762max_conf=7 763min_conf=0 764on_data=true 765on_inst=true 766on_miss=false 767on_read=true 768on_write=true
	769p_state_clk_gate_bins=20 770p_state_clk_gate_max=1000000000000 771p_state_clk_gate_min=1000 772power_model=Null
701queue_filter=true 702queue_size=32 703queue_squash=true 704start_conf=4 705sys=system 706table_assoc=4 707table_sets=16 708tag_prefetch=true 709thresh_conf=4 710use_master_id=true 711 712[system.cpu0.l2cache.tags] 713type=RandomRepl 714assoc=16 715block_size=64 716clk_domain=system.cpu_clk_domain	773queue_filter=true 774queue_size=32 775queue_squash=true 776start_conf=4 777sys=system 778table_assoc=4 779table_sets=16 780tag_prefetch=true 781thresh_conf=4 782use_master_id=true 783 784[system.cpu0.l2cache.tags] 785type=RandomRepl 786assoc=16 787block_size=64 788clk_domain=system.cpu_clk_domain
	789default_p_state=UNDEFINED
717eventq_index=0 718hit_latency=12	790eventq_index=0 791hit_latency=12
	792p_state_clk_gate_bins=20 793p_state_clk_gate_max=1000000000000 794p_state_clk_gate_min=1000 795power_model=Null
719sequential_access=false 720size=1048576 721 722[system.cpu0.toL2Bus] 723type=CoherentXBar 724children=snoop_filter 725clk_domain=system.cpu_clk_domain	796sequential_access=false 797size=1048576 798 799[system.cpu0.toL2Bus] 800type=CoherentXBar 801children=snoop_filter 802clk_domain=system.cpu_clk_domain
	803default_p_state=UNDEFINED
726eventq_index=0 727forward_latency=0 728frontend_latency=1	804eventq_index=0 805forward_latency=0 806frontend_latency=1
	807p_state_clk_gate_bins=20 808p_state_clk_gate_max=1000000000000 809p_state_clk_gate_min=1000 810point_of_coherency=false 811power_model=Null
729response_latency=1 730snoop_filter=system.cpu0.toL2Bus.snoop_filter 731snoop_response_latency=1 732system=system 733use_default_range=false 734width=32 735master=system.cpu0.l2cache.cpu_side 736slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port 737 738[system.cpu0.toL2Bus.snoop_filter] 739type=SnoopFilter 740eventq_index=0 741lookup_latency=0 742max_capacity=8388608 743system=system 744 745[system.cpu0.tracer] 746type=ExeTracer 747eventq_index=0 748 749[system.cpu1] 750type=DerivO3CPU 751children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 752LFSTSize=1024 753LQEntries=16 754LSQCheckLoads=true 755LSQDepCheckShift=0 756SQEntries=16 757SSITSize=1024 758activity=0 759backComSize=5 760branchPred=system.cpu1.branchPred 761cachePorts=200 762checker=Null 763clk_domain=system.cpu_clk_domain 764commitToDecodeDelay=1 765commitToFetchDelay=1 766commitToIEWDelay=1 767commitToRenameDelay=1 768commitWidth=8 769cpu_id=1 770decodeToFetchDelay=1 771decodeToRenameDelay=2 772decodeWidth=3	812response_latency=1 813snoop_filter=system.cpu0.toL2Bus.snoop_filter 814snoop_response_latency=1 815system=system 816use_default_range=false 817width=32 818master=system.cpu0.l2cache.cpu_side 819slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port 820 821[system.cpu0.toL2Bus.snoop_filter] 822type=SnoopFilter 823eventq_index=0 824lookup_latency=0 825max_capacity=8388608 826system=system 827 828[system.cpu0.tracer] 829type=ExeTracer 830eventq_index=0 831 832[system.cpu1] 833type=DerivO3CPU 834children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 835LFSTSize=1024 836LQEntries=16 837LSQCheckLoads=true 838LSQDepCheckShift=0 839SQEntries=16 840SSITSize=1024 841activity=0 842backComSize=5 843branchPred=system.cpu1.branchPred 844cachePorts=200 845checker=Null 846clk_domain=system.cpu_clk_domain 847commitToDecodeDelay=1 848commitToFetchDelay=1 849commitToIEWDelay=1 850commitToRenameDelay=1 851commitWidth=8 852cpu_id=1 853decodeToFetchDelay=1 854decodeToRenameDelay=2 855decodeWidth=3
	856default_p_state=UNDEFINED
773dispatchWidth=6 774do_checkpoint_insts=true 775do_quiesce=true 776do_statistics_insts=true 777dstage2_mmu=system.cpu1.dstage2_mmu 778dtb=system.cpu1.dtb 779eventq_index=0 780fetchBufferSize=16 781fetchQueueSize=32 782fetchToDecodeDelay=3 783fetchTrapLatency=1 784fetchWidth=3 785forwardComSize=5 786fuPool=system.cpu1.fuPool 787function_trace=false 788function_trace_start=0 789iewToCommitDelay=1 790iewToDecodeDelay=1 791iewToFetchDelay=1 792iewToRenameDelay=1 793interrupts=system.cpu1.interrupts 794isa=system.cpu1.isa 795issueToExecuteDelay=1 796issueWidth=8 797istage2_mmu=system.cpu1.istage2_mmu 798itb=system.cpu1.itb 799max_insts_all_threads=0 800max_insts_any_thread=0 801max_loads_all_threads=0 802max_loads_any_thread=0 803needsTSO=false 804numIQEntries=32 805numPhysCCRegs=640 806numPhysFloatRegs=192 807numPhysIntRegs=128 808numROBEntries=40 809numRobs=1 810numThreads=1	857dispatchWidth=6 858do_checkpoint_insts=true 859do_quiesce=true 860do_statistics_insts=true 861dstage2_mmu=system.cpu1.dstage2_mmu 862dtb=system.cpu1.dtb 863eventq_index=0 864fetchBufferSize=16 865fetchQueueSize=32 866fetchToDecodeDelay=3 867fetchTrapLatency=1 868fetchWidth=3 869forwardComSize=5 870fuPool=system.cpu1.fuPool 871function_trace=false 872function_trace_start=0 873iewToCommitDelay=1 874iewToDecodeDelay=1 875iewToFetchDelay=1 876iewToRenameDelay=1 877interrupts=system.cpu1.interrupts 878isa=system.cpu1.isa 879issueToExecuteDelay=1 880issueWidth=8 881istage2_mmu=system.cpu1.istage2_mmu 882itb=system.cpu1.itb 883max_insts_all_threads=0 884max_insts_any_thread=0 885max_loads_all_threads=0 886max_loads_any_thread=0 887needsTSO=false 888numIQEntries=32 889numPhysCCRegs=640 890numPhysFloatRegs=192 891numPhysIntRegs=128 892numROBEntries=40 893numRobs=1 894numThreads=1
	895p_state_clk_gate_bins=20 896p_state_clk_gate_max=1000000000000 897p_state_clk_gate_min=1000 898power_model=Null
811profile=0 812progress_interval=0 813renameToDecodeDelay=1 814renameToFetchDelay=1 815renameToIEWDelay=1 816renameToROBDelay=1 817renameWidth=3 818simpoint_start_insts= 819smtCommitPolicy=RoundRobin 820smtFetchPolicy=SingleThread 821smtIQPolicy=Partitioned 822smtIQThreshold=100 823smtLSQPolicy=Partitioned 824smtLSQThreshold=100 825smtNumFetchingThreads=1 826smtROBPolicy=Partitioned 827smtROBThreshold=100 828socket_id=0 829squashWidth=8 830store_set_clear_period=250000 831switched_out=false 832system=system 833tracer=system.cpu1.tracer 834trapLatency=13 835wbWidth=8 836workload= 837dcache_port=system.cpu1.dcache.cpu_side 838icache_port=system.cpu1.icache.cpu_side 839 840[system.cpu1.branchPred] 841type=BiModeBP 842BTBEntries=2048 843BTBTagSize=18 844RASSize=16 845choiceCtrBits=2 846choicePredictorSize=8192 847eventq_index=0 848globalCtrBits=2 849globalPredictorSize=8192	899profile=0 900progress_interval=0 901renameToDecodeDelay=1 902renameToFetchDelay=1 903renameToIEWDelay=1 904renameToROBDelay=1 905renameWidth=3 906simpoint_start_insts= 907smtCommitPolicy=RoundRobin 908smtFetchPolicy=SingleThread 909smtIQPolicy=Partitioned 910smtIQThreshold=100 911smtLSQPolicy=Partitioned 912smtLSQThreshold=100 913smtNumFetchingThreads=1 914smtROBPolicy=Partitioned 915smtROBThreshold=100 916socket_id=0 917squashWidth=8 918store_set_clear_period=250000 919switched_out=false 920system=system 921tracer=system.cpu1.tracer 922trapLatency=13 923wbWidth=8 924workload= 925dcache_port=system.cpu1.dcache.cpu_side 926icache_port=system.cpu1.icache.cpu_side 927 928[system.cpu1.branchPred] 929type=BiModeBP 930BTBEntries=2048 931BTBTagSize=18 932RASSize=16 933choiceCtrBits=2 934choicePredictorSize=8192 935eventq_index=0 936globalCtrBits=2 937globalPredictorSize=8192
	938indirectHashGHR=true 939indirectHashTargets=true 940indirectPathLength=3 941indirectSets=256 942indirectTagSize=16 943indirectWays=2
850instShiftAmt=2 851numThreads=1	944instShiftAmt=2 945numThreads=1
	946useIndirect=true
852 853[system.cpu1.dcache] 854type=Cache 855children=tags 856addr_ranges=0:18446744073709551615 857assoc=2 858clk_domain=system.cpu_clk_domain 859clusivity=mostly_incl	947 948[system.cpu1.dcache] 949type=Cache 950children=tags 951addr_ranges=0:18446744073709551615 952assoc=2 953clk_domain=system.cpu_clk_domain 954clusivity=mostly_incl
	955default_p_state=UNDEFINED
860demand_mshr_reserve=1 861eventq_index=0	956demand_mshr_reserve=1 957eventq_index=0
862forward_snoops=true
863hit_latency=2 864is_read_only=false 865max_miss_count=0 866mshrs=6	958hit_latency=2 959is_read_only=false 960max_miss_count=0 961mshrs=6
	962p_state_clk_gate_bins=20 963p_state_clk_gate_max=1000000000000 964p_state_clk_gate_min=1000 965power_model=Null
867prefetch_on_access=false 868prefetcher=Null 869response_latency=2 870sequential_access=false 871size=32768 872system=system 873tags=system.cpu1.dcache.tags 874tgts_per_mshr=8 875write_buffers=16 876writeback_clean=true 877cpu_side=system.cpu1.dcache_port 878mem_side=system.cpu1.toL2Bus.slave[1] 879 880[system.cpu1.dcache.tags] 881type=LRU 882assoc=2 883block_size=64 884clk_domain=system.cpu_clk_domain	966prefetch_on_access=false 967prefetcher=Null 968response_latency=2 969sequential_access=false 970size=32768 971system=system 972tags=system.cpu1.dcache.tags 973tgts_per_mshr=8 974write_buffers=16 975writeback_clean=true 976cpu_side=system.cpu1.dcache_port 977mem_side=system.cpu1.toL2Bus.slave[1] 978 979[system.cpu1.dcache.tags] 980type=LRU 981assoc=2 982block_size=64 983clk_domain=system.cpu_clk_domain
	984default_p_state=UNDEFINED
885eventq_index=0 886hit_latency=2	985eventq_index=0 986hit_latency=2
	987p_state_clk_gate_bins=20 988p_state_clk_gate_max=1000000000000 989p_state_clk_gate_min=1000 990power_model=Null
887sequential_access=false 888size=32768 889 890[system.cpu1.dstage2_mmu] 891type=ArmStage2MMU 892children=stage2_tlb 893eventq_index=0 894stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb 895sys=system 896tlb=system.cpu1.dtb 897 898[system.cpu1.dstage2_mmu.stage2_tlb] 899type=ArmTLB 900children=walker 901eventq_index=0 902is_stage2=true 903size=32 904walker=system.cpu1.dstage2_mmu.stage2_tlb.walker 905 906[system.cpu1.dstage2_mmu.stage2_tlb.walker] 907type=ArmTableWalker 908clk_domain=system.cpu_clk_domain	991sequential_access=false 992size=32768 993 994[system.cpu1.dstage2_mmu] 995type=ArmStage2MMU 996children=stage2_tlb 997eventq_index=0 998stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb 999sys=system 1000tlb=system.cpu1.dtb 1001 1002[system.cpu1.dstage2_mmu.stage2_tlb] 1003type=ArmTLB 1004children=walker 1005eventq_index=0 1006is_stage2=true 1007size=32 1008walker=system.cpu1.dstage2_mmu.stage2_tlb.walker 1009 1010[system.cpu1.dstage2_mmu.stage2_tlb.walker] 1011type=ArmTableWalker 1012clk_domain=system.cpu_clk_domain
	1013default_p_state=UNDEFINED
909eventq_index=0 910is_stage2=true 911num_squash_per_cycle=2	1014eventq_index=0 1015is_stage2=true 1016num_squash_per_cycle=2
	1017p_state_clk_gate_bins=20 1018p_state_clk_gate_max=1000000000000 1019p_state_clk_gate_min=1000 1020power_model=Null
912sys=system 913 914[system.cpu1.dtb] 915type=ArmTLB 916children=walker 917eventq_index=0 918is_stage2=false 919size=64 920walker=system.cpu1.dtb.walker 921 922[system.cpu1.dtb.walker] 923type=ArmTableWalker 924clk_domain=system.cpu_clk_domain	1021sys=system 1022 1023[system.cpu1.dtb] 1024type=ArmTLB 1025children=walker 1026eventq_index=0 1027is_stage2=false 1028size=64 1029walker=system.cpu1.dtb.walker 1030 1031[system.cpu1.dtb.walker] 1032type=ArmTableWalker 1033clk_domain=system.cpu_clk_domain
	1034default_p_state=UNDEFINED
925eventq_index=0 926is_stage2=false 927num_squash_per_cycle=2	1035eventq_index=0 1036is_stage2=false 1037num_squash_per_cycle=2
	1038p_state_clk_gate_bins=20 1039p_state_clk_gate_max=1000000000000 1040p_state_clk_gate_min=1000 1041power_model=Null
928sys=system 929port=system.cpu1.toL2Bus.slave[3] 930 931[system.cpu1.fuPool] 932type=FUPool 933children=FUList0 FUList1 FUList2 FUList3 FUList4 934FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 935eventq_index=0 936 937[system.cpu1.fuPool.FUList0] 938type=FUDesc 939children=opList 940count=2 941eventq_index=0 942opList=system.cpu1.fuPool.FUList0.opList 943 944[system.cpu1.fuPool.FUList0.opList] 945type=OpDesc 946eventq_index=0 947opClass=IntAlu 948opLat=1 949pipelined=true 950 951[system.cpu1.fuPool.FUList1] 952type=FUDesc 953children=opList0 opList1 opList2 954count=1 955eventq_index=0 956opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 system.cpu1.fuPool.FUList1.opList2 957 958[system.cpu1.fuPool.FUList1.opList0] 959type=OpDesc 960eventq_index=0 961opClass=IntMult 962opLat=3 963pipelined=true 964 965[system.cpu1.fuPool.FUList1.opList1] 966type=OpDesc 967eventq_index=0 968opClass=IntDiv 969opLat=12 970pipelined=false 971 972[system.cpu1.fuPool.FUList1.opList2] 973type=OpDesc 974eventq_index=0 975opClass=IprAccess 976opLat=3 977pipelined=true 978 979[system.cpu1.fuPool.FUList2] 980type=FUDesc 981children=opList 982count=1 983eventq_index=0 984opList=system.cpu1.fuPool.FUList2.opList 985 986[system.cpu1.fuPool.FUList2.opList] 987type=OpDesc 988eventq_index=0 989opClass=MemRead 990opLat=2 991pipelined=true 992 993[system.cpu1.fuPool.FUList3] 994type=FUDesc 995children=opList 996count=1 997eventq_index=0 998opList=system.cpu1.fuPool.FUList3.opList 999 1000[system.cpu1.fuPool.FUList3.opList] 1001type=OpDesc 1002eventq_index=0 1003opClass=MemWrite 1004opLat=2 1005pipelined=true 1006 1007[system.cpu1.fuPool.FUList4] 1008type=FUDesc 1009children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 1010count=2 1011eventq_index=0 1012opList=system.cpu1.fuPool.FUList4.opList00 system.cpu1.fuPool.FUList4.opList01 system.cpu1.fuPool.FUList4.opList02 system.cpu1.fuPool.FUList4.opList03 system.cpu1.fuPool.FUList4.opList04 system.cpu1.fuPool.FUList4.opList05 system.cpu1.fuPool.FUList4.opList06 system.cpu1.fuPool.FUList4.opList07 system.cpu1.fuPool.FUList4.opList08 system.cpu1.fuPool.FUList4.opList09 system.cpu1.fuPool.FUList4.opList10 system.cpu1.fuPool.FUList4.opList11 system.cpu1.fuPool.FUList4.opList12 system.cpu1.fuPool.FUList4.opList13 system.cpu1.fuPool.FUList4.opList14 system.cpu1.fuPool.FUList4.opList15 system.cpu1.fuPool.FUList4.opList16 system.cpu1.fuPool.FUList4.opList17 system.cpu1.fuPool.FUList4.opList18 system.cpu1.fuPool.FUList4.opList19 system.cpu1.fuPool.FUList4.opList20 system.cpu1.fuPool.FUList4.opList21 system.cpu1.fuPool.FUList4.opList22 system.cpu1.fuPool.FUList4.opList23 system.cpu1.fuPool.FUList4.opList24 system.cpu1.fuPool.FUList4.opList25 1013 1014[system.cpu1.fuPool.FUList4.opList00] 1015type=OpDesc 1016eventq_index=0 1017opClass=SimdAdd 1018opLat=4 1019pipelined=true 1020 1021[system.cpu1.fuPool.FUList4.opList01] 1022type=OpDesc 1023eventq_index=0 1024opClass=SimdAddAcc 1025opLat=4 1026pipelined=true 1027 1028[system.cpu1.fuPool.FUList4.opList02] 1029type=OpDesc 1030eventq_index=0 1031opClass=SimdAlu 1032opLat=4 1033pipelined=true 1034 1035[system.cpu1.fuPool.FUList4.opList03] 1036type=OpDesc 1037eventq_index=0 1038opClass=SimdCmp 1039opLat=4 1040pipelined=true 1041 1042[system.cpu1.fuPool.FUList4.opList04] 1043type=OpDesc 1044eventq_index=0 1045opClass=SimdCvt 1046opLat=3 1047pipelined=true 1048 1049[system.cpu1.fuPool.FUList4.opList05] 1050type=OpDesc 1051eventq_index=0 1052opClass=SimdMisc 1053opLat=3 1054pipelined=true 1055 1056[system.cpu1.fuPool.FUList4.opList06] 1057type=OpDesc 1058eventq_index=0 1059opClass=SimdMult 1060opLat=5 1061pipelined=true 1062 1063[system.cpu1.fuPool.FUList4.opList07] 1064type=OpDesc 1065eventq_index=0 1066opClass=SimdMultAcc 1067opLat=5 1068pipelined=true 1069 1070[system.cpu1.fuPool.FUList4.opList08] 1071type=OpDesc 1072eventq_index=0 1073opClass=SimdShift 1074opLat=3 1075pipelined=true 1076 1077[system.cpu1.fuPool.FUList4.opList09] 1078type=OpDesc 1079eventq_index=0 1080opClass=SimdShiftAcc 1081opLat=3 1082pipelined=true 1083 1084[system.cpu1.fuPool.FUList4.opList10] 1085type=OpDesc 1086eventq_index=0 1087opClass=SimdSqrt 1088opLat=9 1089pipelined=true 1090 1091[system.cpu1.fuPool.FUList4.opList11] 1092type=OpDesc 1093eventq_index=0 1094opClass=SimdFloatAdd 1095opLat=5 1096pipelined=true 1097 1098[system.cpu1.fuPool.FUList4.opList12] 1099type=OpDesc 1100eventq_index=0 1101opClass=SimdFloatAlu 1102opLat=5 1103pipelined=true 1104 1105[system.cpu1.fuPool.FUList4.opList13] 1106type=OpDesc 1107eventq_index=0 1108opClass=SimdFloatCmp 1109opLat=3 1110pipelined=true 1111 1112[system.cpu1.fuPool.FUList4.opList14] 1113type=OpDesc 1114eventq_index=0 1115opClass=SimdFloatCvt 1116opLat=3 1117pipelined=true 1118 1119[system.cpu1.fuPool.FUList4.opList15] 1120type=OpDesc 1121eventq_index=0 1122opClass=SimdFloatDiv 1123opLat=3 1124pipelined=true 1125 1126[system.cpu1.fuPool.FUList4.opList16] 1127type=OpDesc 1128eventq_index=0 1129opClass=SimdFloatMisc 1130opLat=3 1131pipelined=true 1132 1133[system.cpu1.fuPool.FUList4.opList17] 1134type=OpDesc 1135eventq_index=0 1136opClass=SimdFloatMult 1137opLat=3 1138pipelined=true 1139 1140[system.cpu1.fuPool.FUList4.opList18] 1141type=OpDesc 1142eventq_index=0 1143opClass=SimdFloatMultAcc 1144opLat=1 1145pipelined=true 1146 1147[system.cpu1.fuPool.FUList4.opList19] 1148type=OpDesc 1149eventq_index=0 1150opClass=SimdFloatSqrt 1151opLat=9 1152pipelined=true 1153 1154[system.cpu1.fuPool.FUList4.opList20] 1155type=OpDesc 1156eventq_index=0 1157opClass=FloatAdd 1158opLat=5 1159pipelined=true 1160 1161[system.cpu1.fuPool.FUList4.opList21] 1162type=OpDesc 1163eventq_index=0 1164opClass=FloatCmp 1165opLat=5 1166pipelined=true 1167 1168[system.cpu1.fuPool.FUList4.opList22] 1169type=OpDesc 1170eventq_index=0 1171opClass=FloatCvt 1172opLat=5 1173pipelined=true 1174 1175[system.cpu1.fuPool.FUList4.opList23] 1176type=OpDesc 1177eventq_index=0 1178opClass=FloatDiv 1179opLat=9 1180pipelined=false 1181 1182[system.cpu1.fuPool.FUList4.opList24] 1183type=OpDesc 1184eventq_index=0 1185opClass=FloatSqrt 1186opLat=33 1187pipelined=false 1188 1189[system.cpu1.fuPool.FUList4.opList25] 1190type=OpDesc 1191eventq_index=0 1192opClass=FloatMult 1193opLat=4 1194pipelined=true 1195 1196[system.cpu1.icache] 1197type=Cache 1198children=tags 1199addr_ranges=0:18446744073709551615 1200assoc=2 1201clk_domain=system.cpu_clk_domain 1202clusivity=mostly_incl	1042sys=system 1043port=system.cpu1.toL2Bus.slave[3] 1044 1045[system.cpu1.fuPool] 1046type=FUPool 1047children=FUList0 FUList1 FUList2 FUList3 FUList4 1048FUList=system.cpu1.fuPool.FUList0 system.cpu1.fuPool.FUList1 system.cpu1.fuPool.FUList2 system.cpu1.fuPool.FUList3 system.cpu1.fuPool.FUList4 1049eventq_index=0 1050 1051[system.cpu1.fuPool.FUList0] 1052type=FUDesc 1053children=opList 1054count=2 1055eventq_index=0 1056opList=system.cpu1.fuPool.FUList0.opList 1057 1058[system.cpu1.fuPool.FUList0.opList] 1059type=OpDesc 1060eventq_index=0 1061opClass=IntAlu 1062opLat=1 1063pipelined=true 1064 1065[system.cpu1.fuPool.FUList1] 1066type=FUDesc 1067children=opList0 opList1 opList2 1068count=1 1069eventq_index=0 1070opList=system.cpu1.fuPool.FUList1.opList0 system.cpu1.fuPool.FUList1.opList1 system.cpu1.fuPool.FUList1.opList2 1071 1072[system.cpu1.fuPool.FUList1.opList0] 1073type=OpDesc 1074eventq_index=0 1075opClass=IntMult 1076opLat=3 1077pipelined=true 1078 1079[system.cpu1.fuPool.FUList1.opList1] 1080type=OpDesc 1081eventq_index=0 1082opClass=IntDiv 1083opLat=12 1084pipelined=false 1085 1086[system.cpu1.fuPool.FUList1.opList2] 1087type=OpDesc 1088eventq_index=0 1089opClass=IprAccess 1090opLat=3 1091pipelined=true 1092 1093[system.cpu1.fuPool.FUList2] 1094type=FUDesc 1095children=opList 1096count=1 1097eventq_index=0 1098opList=system.cpu1.fuPool.FUList2.opList 1099 1100[system.cpu1.fuPool.FUList2.opList] 1101type=OpDesc 1102eventq_index=0 1103opClass=MemRead 1104opLat=2 1105pipelined=true 1106 1107[system.cpu1.fuPool.FUList3] 1108type=FUDesc 1109children=opList 1110count=1 1111eventq_index=0 1112opList=system.cpu1.fuPool.FUList3.opList 1113 1114[system.cpu1.fuPool.FUList3.opList] 1115type=OpDesc 1116eventq_index=0 1117opClass=MemWrite 1118opLat=2 1119pipelined=true 1120 1121[system.cpu1.fuPool.FUList4] 1122type=FUDesc 1123children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 1124count=2 1125eventq_index=0 1126opList=system.cpu1.fuPool.FUList4.opList00 system.cpu1.fuPool.FUList4.opList01 system.cpu1.fuPool.FUList4.opList02 system.cpu1.fuPool.FUList4.opList03 system.cpu1.fuPool.FUList4.opList04 system.cpu1.fuPool.FUList4.opList05 system.cpu1.fuPool.FUList4.opList06 system.cpu1.fuPool.FUList4.opList07 system.cpu1.fuPool.FUList4.opList08 system.cpu1.fuPool.FUList4.opList09 system.cpu1.fuPool.FUList4.opList10 system.cpu1.fuPool.FUList4.opList11 system.cpu1.fuPool.FUList4.opList12 system.cpu1.fuPool.FUList4.opList13 system.cpu1.fuPool.FUList4.opList14 system.cpu1.fuPool.FUList4.opList15 system.cpu1.fuPool.FUList4.opList16 system.cpu1.fuPool.FUList4.opList17 system.cpu1.fuPool.FUList4.opList18 system.cpu1.fuPool.FUList4.opList19 system.cpu1.fuPool.FUList4.opList20 system.cpu1.fuPool.FUList4.opList21 system.cpu1.fuPool.FUList4.opList22 system.cpu1.fuPool.FUList4.opList23 system.cpu1.fuPool.FUList4.opList24 system.cpu1.fuPool.FUList4.opList25 1127 1128[system.cpu1.fuPool.FUList4.opList00] 1129type=OpDesc 1130eventq_index=0 1131opClass=SimdAdd 1132opLat=4 1133pipelined=true 1134 1135[system.cpu1.fuPool.FUList4.opList01] 1136type=OpDesc 1137eventq_index=0 1138opClass=SimdAddAcc 1139opLat=4 1140pipelined=true 1141 1142[system.cpu1.fuPool.FUList4.opList02] 1143type=OpDesc 1144eventq_index=0 1145opClass=SimdAlu 1146opLat=4 1147pipelined=true 1148 1149[system.cpu1.fuPool.FUList4.opList03] 1150type=OpDesc 1151eventq_index=0 1152opClass=SimdCmp 1153opLat=4 1154pipelined=true 1155 1156[system.cpu1.fuPool.FUList4.opList04] 1157type=OpDesc 1158eventq_index=0 1159opClass=SimdCvt 1160opLat=3 1161pipelined=true 1162 1163[system.cpu1.fuPool.FUList4.opList05] 1164type=OpDesc 1165eventq_index=0 1166opClass=SimdMisc 1167opLat=3 1168pipelined=true 1169 1170[system.cpu1.fuPool.FUList4.opList06] 1171type=OpDesc 1172eventq_index=0 1173opClass=SimdMult 1174opLat=5 1175pipelined=true 1176 1177[system.cpu1.fuPool.FUList4.opList07] 1178type=OpDesc 1179eventq_index=0 1180opClass=SimdMultAcc 1181opLat=5 1182pipelined=true 1183 1184[system.cpu1.fuPool.FUList4.opList08] 1185type=OpDesc 1186eventq_index=0 1187opClass=SimdShift 1188opLat=3 1189pipelined=true 1190 1191[system.cpu1.fuPool.FUList4.opList09] 1192type=OpDesc 1193eventq_index=0 1194opClass=SimdShiftAcc 1195opLat=3 1196pipelined=true 1197 1198[system.cpu1.fuPool.FUList4.opList10] 1199type=OpDesc 1200eventq_index=0 1201opClass=SimdSqrt 1202opLat=9 1203pipelined=true 1204 1205[system.cpu1.fuPool.FUList4.opList11] 1206type=OpDesc 1207eventq_index=0 1208opClass=SimdFloatAdd 1209opLat=5 1210pipelined=true 1211 1212[system.cpu1.fuPool.FUList4.opList12] 1213type=OpDesc 1214eventq_index=0 1215opClass=SimdFloatAlu 1216opLat=5 1217pipelined=true 1218 1219[system.cpu1.fuPool.FUList4.opList13] 1220type=OpDesc 1221eventq_index=0 1222opClass=SimdFloatCmp 1223opLat=3 1224pipelined=true 1225 1226[system.cpu1.fuPool.FUList4.opList14] 1227type=OpDesc 1228eventq_index=0 1229opClass=SimdFloatCvt 1230opLat=3 1231pipelined=true 1232 1233[system.cpu1.fuPool.FUList4.opList15] 1234type=OpDesc 1235eventq_index=0 1236opClass=SimdFloatDiv 1237opLat=3 1238pipelined=true 1239 1240[system.cpu1.fuPool.FUList4.opList16] 1241type=OpDesc 1242eventq_index=0 1243opClass=SimdFloatMisc 1244opLat=3 1245pipelined=true 1246 1247[system.cpu1.fuPool.FUList4.opList17] 1248type=OpDesc 1249eventq_index=0 1250opClass=SimdFloatMult 1251opLat=3 1252pipelined=true 1253 1254[system.cpu1.fuPool.FUList4.opList18] 1255type=OpDesc 1256eventq_index=0 1257opClass=SimdFloatMultAcc 1258opLat=1 1259pipelined=true 1260 1261[system.cpu1.fuPool.FUList4.opList19] 1262type=OpDesc 1263eventq_index=0 1264opClass=SimdFloatSqrt 1265opLat=9 1266pipelined=true 1267 1268[system.cpu1.fuPool.FUList4.opList20] 1269type=OpDesc 1270eventq_index=0 1271opClass=FloatAdd 1272opLat=5 1273pipelined=true 1274 1275[system.cpu1.fuPool.FUList4.opList21] 1276type=OpDesc 1277eventq_index=0 1278opClass=FloatCmp 1279opLat=5 1280pipelined=true 1281 1282[system.cpu1.fuPool.FUList4.opList22] 1283type=OpDesc 1284eventq_index=0 1285opClass=FloatCvt 1286opLat=5 1287pipelined=true 1288 1289[system.cpu1.fuPool.FUList4.opList23] 1290type=OpDesc 1291eventq_index=0 1292opClass=FloatDiv 1293opLat=9 1294pipelined=false 1295 1296[system.cpu1.fuPool.FUList4.opList24] 1297type=OpDesc 1298eventq_index=0 1299opClass=FloatSqrt 1300opLat=33 1301pipelined=false 1302 1303[system.cpu1.fuPool.FUList4.opList25] 1304type=OpDesc 1305eventq_index=0 1306opClass=FloatMult 1307opLat=4 1308pipelined=true 1309 1310[system.cpu1.icache] 1311type=Cache 1312children=tags 1313addr_ranges=0:18446744073709551615 1314assoc=2 1315clk_domain=system.cpu_clk_domain 1316clusivity=mostly_incl
	1317default_p_state=UNDEFINED
1203demand_mshr_reserve=1 1204eventq_index=0	1318demand_mshr_reserve=1 1319eventq_index=0
1205forward_snoops=false
1206hit_latency=1 1207is_read_only=true 1208max_miss_count=0 1209mshrs=2	1320hit_latency=1 1321is_read_only=true 1322max_miss_count=0 1323mshrs=2
	1324p_state_clk_gate_bins=20 1325p_state_clk_gate_max=1000000000000 1326p_state_clk_gate_min=1000 1327power_model=Null
1210prefetch_on_access=false 1211prefetcher=Null 1212response_latency=1 1213sequential_access=false 1214size=32768 1215system=system 1216tags=system.cpu1.icache.tags 1217tgts_per_mshr=8 1218write_buffers=8 1219writeback_clean=true 1220cpu_side=system.cpu1.icache_port 1221mem_side=system.cpu1.toL2Bus.slave[0] 1222 1223[system.cpu1.icache.tags] 1224type=LRU 1225assoc=2 1226block_size=64 1227clk_domain=system.cpu_clk_domain	1328prefetch_on_access=false 1329prefetcher=Null 1330response_latency=1 1331sequential_access=false 1332size=32768 1333system=system 1334tags=system.cpu1.icache.tags 1335tgts_per_mshr=8 1336write_buffers=8 1337writeback_clean=true 1338cpu_side=system.cpu1.icache_port 1339mem_side=system.cpu1.toL2Bus.slave[0] 1340 1341[system.cpu1.icache.tags] 1342type=LRU 1343assoc=2 1344block_size=64 1345clk_domain=system.cpu_clk_domain
	1346default_p_state=UNDEFINED
1228eventq_index=0 1229hit_latency=1	1347eventq_index=0 1348hit_latency=1
	1349p_state_clk_gate_bins=20 1350p_state_clk_gate_max=1000000000000 1351p_state_clk_gate_min=1000 1352power_model=Null
1230sequential_access=false 1231size=32768 1232 1233[system.cpu1.interrupts] 1234type=ArmInterrupts 1235eventq_index=0 1236 1237[system.cpu1.isa] 1238type=ArmISA 1239decoderFlavour=Generic 1240eventq_index=0 1241fpsid=1090793632 1242id_aa64afr0_el1=0 1243id_aa64afr1_el1=0 1244id_aa64dfr0_el1=1052678 1245id_aa64dfr1_el1=0 1246id_aa64isar0_el1=0 1247id_aa64isar1_el1=0 1248id_aa64mmfr0_el1=15728642 1249id_aa64mmfr1_el1=0 1250id_aa64pfr0_el1=17 1251id_aa64pfr1_el1=0 1252id_isar0=34607377 1253id_isar1=34677009 1254id_isar2=555950401 1255id_isar3=17899825 1256id_isar4=268501314 1257id_isar5=0 1258id_mmfr0=270536963 1259id_mmfr1=0 1260id_mmfr2=19070976 1261id_mmfr3=34611729 1262id_pfr0=49 1263id_pfr1=4113 1264midr=1091551472 1265pmu=Null 1266system=system 1267 1268[system.cpu1.istage2_mmu] 1269type=ArmStage2MMU 1270children=stage2_tlb 1271eventq_index=0 1272stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb 1273sys=system 1274tlb=system.cpu1.itb 1275 1276[system.cpu1.istage2_mmu.stage2_tlb] 1277type=ArmTLB 1278children=walker 1279eventq_index=0 1280is_stage2=true 1281size=32 1282walker=system.cpu1.istage2_mmu.stage2_tlb.walker 1283 1284[system.cpu1.istage2_mmu.stage2_tlb.walker] 1285type=ArmTableWalker 1286clk_domain=system.cpu_clk_domain	1353sequential_access=false 1354size=32768 1355 1356[system.cpu1.interrupts] 1357type=ArmInterrupts 1358eventq_index=0 1359 1360[system.cpu1.isa] 1361type=ArmISA 1362decoderFlavour=Generic 1363eventq_index=0 1364fpsid=1090793632 1365id_aa64afr0_el1=0 1366id_aa64afr1_el1=0 1367id_aa64dfr0_el1=1052678 1368id_aa64dfr1_el1=0 1369id_aa64isar0_el1=0 1370id_aa64isar1_el1=0 1371id_aa64mmfr0_el1=15728642 1372id_aa64mmfr1_el1=0 1373id_aa64pfr0_el1=17 1374id_aa64pfr1_el1=0 1375id_isar0=34607377 1376id_isar1=34677009 1377id_isar2=555950401 1378id_isar3=17899825 1379id_isar4=268501314 1380id_isar5=0 1381id_mmfr0=270536963 1382id_mmfr1=0 1383id_mmfr2=19070976 1384id_mmfr3=34611729 1385id_pfr0=49 1386id_pfr1=4113 1387midr=1091551472 1388pmu=Null 1389system=system 1390 1391[system.cpu1.istage2_mmu] 1392type=ArmStage2MMU 1393children=stage2_tlb 1394eventq_index=0 1395stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb 1396sys=system 1397tlb=system.cpu1.itb 1398 1399[system.cpu1.istage2_mmu.stage2_tlb] 1400type=ArmTLB 1401children=walker 1402eventq_index=0 1403is_stage2=true 1404size=32 1405walker=system.cpu1.istage2_mmu.stage2_tlb.walker 1406 1407[system.cpu1.istage2_mmu.stage2_tlb.walker] 1408type=ArmTableWalker 1409clk_domain=system.cpu_clk_domain
	1410default_p_state=UNDEFINED
1287eventq_index=0 1288is_stage2=true 1289num_squash_per_cycle=2	1411eventq_index=0 1412is_stage2=true 1413num_squash_per_cycle=2
	1414p_state_clk_gate_bins=20 1415p_state_clk_gate_max=1000000000000 1416p_state_clk_gate_min=1000 1417power_model=Null
1290sys=system 1291 1292[system.cpu1.itb] 1293type=ArmTLB 1294children=walker 1295eventq_index=0 1296is_stage2=false 1297size=64 1298walker=system.cpu1.itb.walker 1299 1300[system.cpu1.itb.walker] 1301type=ArmTableWalker 1302clk_domain=system.cpu_clk_domain	1418sys=system 1419 1420[system.cpu1.itb] 1421type=ArmTLB 1422children=walker 1423eventq_index=0 1424is_stage2=false 1425size=64 1426walker=system.cpu1.itb.walker 1427 1428[system.cpu1.itb.walker] 1429type=ArmTableWalker 1430clk_domain=system.cpu_clk_domain
	1431default_p_state=UNDEFINED
1303eventq_index=0 1304is_stage2=false 1305num_squash_per_cycle=2	1432eventq_index=0 1433is_stage2=false 1434num_squash_per_cycle=2
	1435p_state_clk_gate_bins=20 1436p_state_clk_gate_max=1000000000000 1437p_state_clk_gate_min=1000 1438power_model=Null
1306sys=system 1307port=system.cpu1.toL2Bus.slave[2] 1308 1309[system.cpu1.l2cache] 1310type=Cache 1311children=prefetcher tags 1312addr_ranges=0:18446744073709551615 1313assoc=16 1314clk_domain=system.cpu_clk_domain 1315clusivity=mostly_excl	1439sys=system 1440port=system.cpu1.toL2Bus.slave[2] 1441 1442[system.cpu1.l2cache] 1443type=Cache 1444children=prefetcher tags 1445addr_ranges=0:18446744073709551615 1446assoc=16 1447clk_domain=system.cpu_clk_domain 1448clusivity=mostly_excl
	1449default_p_state=UNDEFINED
1316demand_mshr_reserve=1 1317eventq_index=0	1450demand_mshr_reserve=1 1451eventq_index=0
1318forward_snoops=true
1319hit_latency=12 1320is_read_only=false 1321max_miss_count=0 1322mshrs=16	1452hit_latency=12 1453is_read_only=false 1454max_miss_count=0 1455mshrs=16
	1456p_state_clk_gate_bins=20 1457p_state_clk_gate_max=1000000000000 1458p_state_clk_gate_min=1000 1459power_model=Null
1323prefetch_on_access=true 1324prefetcher=system.cpu1.l2cache.prefetcher 1325response_latency=12 1326sequential_access=false 1327size=1048576 1328system=system 1329tags=system.cpu1.l2cache.tags 1330tgts_per_mshr=8 1331write_buffers=8 1332writeback_clean=false 1333cpu_side=system.cpu1.toL2Bus.master[0] 1334mem_side=system.toL2Bus.slave[1] 1335 1336[system.cpu1.l2cache.prefetcher] 1337type=StridePrefetcher 1338cache_snoop=false 1339clk_domain=system.cpu_clk_domain	1460prefetch_on_access=true 1461prefetcher=system.cpu1.l2cache.prefetcher 1462response_latency=12 1463sequential_access=false 1464size=1048576 1465system=system 1466tags=system.cpu1.l2cache.tags 1467tgts_per_mshr=8 1468write_buffers=8 1469writeback_clean=false 1470cpu_side=system.cpu1.toL2Bus.master[0] 1471mem_side=system.toL2Bus.slave[1] 1472 1473[system.cpu1.l2cache.prefetcher] 1474type=StridePrefetcher 1475cache_snoop=false 1476clk_domain=system.cpu_clk_domain
	1477default_p_state=UNDEFINED
1340degree=8 1341eventq_index=0 1342latency=1 1343max_conf=7 1344min_conf=0 1345on_data=true 1346on_inst=true 1347on_miss=false 1348on_read=true 1349on_write=true	1478degree=8 1479eventq_index=0 1480latency=1 1481max_conf=7 1482min_conf=0 1483on_data=true 1484on_inst=true 1485on_miss=false 1486on_read=true 1487on_write=true
	1488p_state_clk_gate_bins=20 1489p_state_clk_gate_max=1000000000000 1490p_state_clk_gate_min=1000 1491power_model=Null
1350queue_filter=true 1351queue_size=32 1352queue_squash=true 1353start_conf=4 1354sys=system 1355table_assoc=4 1356table_sets=16 1357tag_prefetch=true 1358thresh_conf=4 1359use_master_id=true 1360 1361[system.cpu1.l2cache.tags] 1362type=RandomRepl 1363assoc=16 1364block_size=64 1365clk_domain=system.cpu_clk_domain	1492queue_filter=true 1493queue_size=32 1494queue_squash=true 1495start_conf=4 1496sys=system 1497table_assoc=4 1498table_sets=16 1499tag_prefetch=true 1500thresh_conf=4 1501use_master_id=true 1502 1503[system.cpu1.l2cache.tags] 1504type=RandomRepl 1505assoc=16 1506block_size=64 1507clk_domain=system.cpu_clk_domain
	1508default_p_state=UNDEFINED
1366eventq_index=0 1367hit_latency=12	1509eventq_index=0 1510hit_latency=12
	1511p_state_clk_gate_bins=20 1512p_state_clk_gate_max=1000000000000 1513p_state_clk_gate_min=1000 1514power_model=Null
1368sequential_access=false 1369size=1048576 1370 1371[system.cpu1.toL2Bus] 1372type=CoherentXBar 1373children=snoop_filter 1374clk_domain=system.cpu_clk_domain	1515sequential_access=false 1516size=1048576 1517 1518[system.cpu1.toL2Bus] 1519type=CoherentXBar 1520children=snoop_filter 1521clk_domain=system.cpu_clk_domain
	1522default_p_state=UNDEFINED
1375eventq_index=0 1376forward_latency=0 1377frontend_latency=1	1523eventq_index=0 1524forward_latency=0 1525frontend_latency=1
	1526p_state_clk_gate_bins=20 1527p_state_clk_gate_max=1000000000000 1528p_state_clk_gate_min=1000 1529point_of_coherency=false 1530power_model=Null
1378response_latency=1 1379snoop_filter=system.cpu1.toL2Bus.snoop_filter 1380snoop_response_latency=1 1381system=system 1382use_default_range=false 1383width=32 1384master=system.cpu1.l2cache.cpu_side 1385slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port 1386 1387[system.cpu1.toL2Bus.snoop_filter] 1388type=SnoopFilter 1389eventq_index=0 1390lookup_latency=0 1391max_capacity=8388608 1392system=system 1393 1394[system.cpu1.tracer] 1395type=ExeTracer 1396eventq_index=0 1397 1398[system.cpu_clk_domain] 1399type=SrcClockDomain 1400clock=500 1401domain_id=-1 1402eventq_index=0 1403init_perf_level=0 1404voltage_domain=system.voltage_domain 1405 1406[system.dvfs_handler] 1407type=DVFSHandler 1408domains= 1409enable=false 1410eventq_index=0 1411sys_clk_domain=system.clk_domain 1412transition_latency=100000000 1413 1414[system.intrctrl] 1415type=IntrControl 1416eventq_index=0 1417sys=system 1418 1419[system.iobus] 1420type=NoncoherentXBar 1421clk_domain=system.clk_domain	1531response_latency=1 1532snoop_filter=system.cpu1.toL2Bus.snoop_filter 1533snoop_response_latency=1 1534system=system 1535use_default_range=false 1536width=32 1537master=system.cpu1.l2cache.cpu_side 1538slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port 1539 1540[system.cpu1.toL2Bus.snoop_filter] 1541type=SnoopFilter 1542eventq_index=0 1543lookup_latency=0 1544max_capacity=8388608 1545system=system 1546 1547[system.cpu1.tracer] 1548type=ExeTracer 1549eventq_index=0 1550 1551[system.cpu_clk_domain] 1552type=SrcClockDomain 1553clock=500 1554domain_id=-1 1555eventq_index=0 1556init_perf_level=0 1557voltage_domain=system.voltage_domain 1558 1559[system.dvfs_handler] 1560type=DVFSHandler 1561domains= 1562enable=false 1563eventq_index=0 1564sys_clk_domain=system.clk_domain 1565transition_latency=100000000 1566 1567[system.intrctrl] 1568type=IntrControl 1569eventq_index=0 1570sys=system 1571 1572[system.iobus] 1573type=NoncoherentXBar 1574clk_domain=system.clk_domain
	1575default_p_state=UNDEFINED
1422eventq_index=0 1423forward_latency=1 1424frontend_latency=2	1576eventq_index=0 1577forward_latency=1 1578frontend_latency=2
	1579p_state_clk_gate_bins=20 1580p_state_clk_gate_max=1000000000000 1581p_state_clk_gate_min=1000 1582power_model=Null
1425response_latency=2 1426use_default_range=false 1427width=16 1428master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side 1429slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 1430 1431[system.iocache] 1432type=Cache 1433children=tags 1434addr_ranges=2147483648:2415919103 1435assoc=8 1436clk_domain=system.clk_domain 1437clusivity=mostly_incl	1583response_latency=2 1584use_default_range=false 1585width=16 1586master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side 1587slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma 1588 1589[system.iocache] 1590type=Cache 1591children=tags 1592addr_ranges=2147483648:2415919103 1593assoc=8 1594clk_domain=system.clk_domain 1595clusivity=mostly_incl
	1596default_p_state=UNDEFINED
1438demand_mshr_reserve=1 1439eventq_index=0	1597demand_mshr_reserve=1 1598eventq_index=0
1440forward_snoops=false
1441hit_latency=50 1442is_read_only=false 1443max_miss_count=0 1444mshrs=20	1599hit_latency=50 1600is_read_only=false 1601max_miss_count=0 1602mshrs=20
	1603p_state_clk_gate_bins=20 1604p_state_clk_gate_max=1000000000000 1605p_state_clk_gate_min=1000 1606power_model=Null
1445prefetch_on_access=false 1446prefetcher=Null 1447response_latency=50 1448sequential_access=false 1449size=1024 1450system=system 1451tags=system.iocache.tags 1452tgts_per_mshr=12 1453write_buffers=8 1454writeback_clean=false 1455cpu_side=system.iobus.master[25] 1456mem_side=system.membus.slave[3] 1457 1458[system.iocache.tags] 1459type=LRU 1460assoc=8 1461block_size=64 1462clk_domain=system.clk_domain	1607prefetch_on_access=false 1608prefetcher=Null 1609response_latency=50 1610sequential_access=false 1611size=1024 1612system=system 1613tags=system.iocache.tags 1614tgts_per_mshr=12 1615write_buffers=8 1616writeback_clean=false 1617cpu_side=system.iobus.master[25] 1618mem_side=system.membus.slave[3] 1619 1620[system.iocache.tags] 1621type=LRU 1622assoc=8 1623block_size=64 1624clk_domain=system.clk_domain
	1625default_p_state=UNDEFINED
1463eventq_index=0 1464hit_latency=50	1626eventq_index=0 1627hit_latency=50
	1628p_state_clk_gate_bins=20 1629p_state_clk_gate_max=1000000000000 1630p_state_clk_gate_min=1000 1631power_model=Null
1465sequential_access=false 1466size=1024 1467 1468[system.l2c] 1469type=Cache 1470children=tags 1471addr_ranges=0:18446744073709551615 1472assoc=8 1473clk_domain=system.cpu_clk_domain 1474clusivity=mostly_incl	1632sequential_access=false 1633size=1024 1634 1635[system.l2c] 1636type=Cache 1637children=tags 1638addr_ranges=0:18446744073709551615 1639assoc=8 1640clk_domain=system.cpu_clk_domain 1641clusivity=mostly_incl
	1642default_p_state=UNDEFINED
1475demand_mshr_reserve=1 1476eventq_index=0	1643demand_mshr_reserve=1 1644eventq_index=0
1477forward_snoops=true
1478hit_latency=20 1479is_read_only=false 1480max_miss_count=0 1481mshrs=20	1645hit_latency=20 1646is_read_only=false 1647max_miss_count=0 1648mshrs=20
	1649p_state_clk_gate_bins=20 1650p_state_clk_gate_max=1000000000000 1651p_state_clk_gate_min=1000 1652power_model=Null
1482prefetch_on_access=false 1483prefetcher=Null 1484response_latency=20 1485sequential_access=false 1486size=4194304 1487system=system 1488tags=system.l2c.tags 1489tgts_per_mshr=12 1490write_buffers=8 1491writeback_clean=false 1492cpu_side=system.toL2Bus.master[0] 1493mem_side=system.membus.slave[2] 1494 1495[system.l2c.tags] 1496type=LRU 1497assoc=8 1498block_size=64 1499clk_domain=system.cpu_clk_domain	1653prefetch_on_access=false 1654prefetcher=Null 1655response_latency=20 1656sequential_access=false 1657size=4194304 1658system=system 1659tags=system.l2c.tags 1660tgts_per_mshr=12 1661write_buffers=8 1662writeback_clean=false 1663cpu_side=system.toL2Bus.master[0] 1664mem_side=system.membus.slave[2] 1665 1666[system.l2c.tags] 1667type=LRU 1668assoc=8 1669block_size=64 1670clk_domain=system.cpu_clk_domain
	1671default_p_state=UNDEFINED
1500eventq_index=0 1501hit_latency=20	1672eventq_index=0 1673hit_latency=20
	1674p_state_clk_gate_bins=20 1675p_state_clk_gate_max=1000000000000 1676p_state_clk_gate_min=1000 1677power_model=Null
1502sequential_access=false 1503size=4194304 1504 1505[system.membus] 1506type=CoherentXBar	1678sequential_access=false 1679size=4194304 1680 1681[system.membus] 1682type=CoherentXBar
1507children=badaddr_responder	1683children=badaddr_responder snoop_filter
1508clk_domain=system.clk_domain	1684clk_domain=system.clk_domain
	1685default_p_state=UNDEFINED
1509eventq_index=0 1510forward_latency=4 1511frontend_latency=3	1686eventq_index=0 1687forward_latency=4 1688frontend_latency=3
	1689p_state_clk_gate_bins=20 1690p_state_clk_gate_max=1000000000000 1691p_state_clk_gate_min=1000 1692point_of_coherency=true 1693power_model=Null
1512response_latency=2	1694response_latency=2
1513snoop_filter=Null	1695snoop_filter=system.membus.snoop_filter
1514snoop_response_latency=4 1515system=system 1516use_default_range=false 1517width=16 1518default=system.membus.badaddr_responder.pio 1519master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port 1520slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side 1521 1522[system.membus.badaddr_responder] 1523type=IsaFake 1524clk_domain=system.clk_domain	1696snoop_response_latency=4 1697system=system 1698use_default_range=false 1699width=16 1700default=system.membus.badaddr_responder.pio 1701master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port 1702slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side 1703 1704[system.membus.badaddr_responder] 1705type=IsaFake 1706clk_domain=system.clk_domain
	1707default_p_state=UNDEFINED
1525eventq_index=0 1526fake_mem=false	1708eventq_index=0 1709fake_mem=false
	1710p_state_clk_gate_bins=20 1711p_state_clk_gate_max=1000000000000 1712p_state_clk_gate_min=1000
1527pio_addr=0 1528pio_latency=100000 1529pio_size=8	1713pio_addr=0 1714pio_latency=100000 1715pio_size=8
	1716power_model=Null
1530ret_bad_addr=true 1531ret_data16=65535 1532ret_data32=4294967295 1533ret_data64=18446744073709551615 1534ret_data8=255 1535system=system 1536update_data=false 1537warn_access=warn 1538pio=system.membus.default 1539	1717ret_bad_addr=true 1718ret_data16=65535 1719ret_data32=4294967295 1720ret_data64=18446744073709551615 1721ret_data8=255 1722system=system 1723update_data=false 1724warn_access=warn 1725pio=system.membus.default 1726
	1727[system.membus.snoop_filter] 1728type=SnoopFilter 1729eventq_index=0 1730lookup_latency=1 1731max_capacity=8388608 1732system=system 1733
1540[system.physmem] 1541type=DRAMCtrl 1542IDD0=0.075000 1543IDD02=0.000000 1544IDD2N=0.050000 1545IDD2N2=0.000000 1546IDD2P0=0.000000 1547IDD2P02=0.000000 1548IDD2P1=0.000000 1549IDD2P12=0.000000 1550IDD3N=0.057000 1551IDD3N2=0.000000 1552IDD3P0=0.000000 1553IDD3P02=0.000000 1554IDD3P1=0.000000 1555IDD3P12=0.000000 1556IDD4R=0.187000 1557IDD4R2=0.000000 1558IDD4W=0.165000 1559IDD4W2=0.000000 1560IDD5=0.220000 1561IDD52=0.000000 1562IDD6=0.000000 1563IDD62=0.000000 1564VDD=1.500000 1565VDD2=0.000000 1566activation_limit=4 1567addr_mapping=RoRaBaCoCh 1568bank_groups_per_rank=0 1569banks_per_rank=8 1570burst_length=8 1571channels=1 1572clk_domain=system.clk_domain 1573conf_table_reported=true	1734[system.physmem] 1735type=DRAMCtrl 1736IDD0=0.075000 1737IDD02=0.000000 1738IDD2N=0.050000 1739IDD2N2=0.000000 1740IDD2P0=0.000000 1741IDD2P02=0.000000 1742IDD2P1=0.000000 1743IDD2P12=0.000000 1744IDD3N=0.057000 1745IDD3N2=0.000000 1746IDD3P0=0.000000 1747IDD3P02=0.000000 1748IDD3P1=0.000000 1749IDD3P12=0.000000 1750IDD4R=0.187000 1751IDD4R2=0.000000 1752IDD4W=0.165000 1753IDD4W2=0.000000 1754IDD5=0.220000 1755IDD52=0.000000 1756IDD6=0.000000 1757IDD62=0.000000 1758VDD=1.500000 1759VDD2=0.000000 1760activation_limit=4 1761addr_mapping=RoRaBaCoCh 1762bank_groups_per_rank=0 1763banks_per_rank=8 1764burst_length=8 1765channels=1 1766clk_domain=system.clk_domain 1767conf_table_reported=true
	1768default_p_state=UNDEFINED
1574device_bus_width=8 1575device_rowbuffer_size=1024 1576device_size=536870912 1577devices_per_rank=8 1578dll=true 1579eventq_index=0 1580in_addr_map=true 1581max_accesses_per_row=16 1582mem_sched_policy=frfcfs 1583min_writes_per_switch=16 1584null=false	1769device_bus_width=8 1770device_rowbuffer_size=1024 1771device_size=536870912 1772devices_per_rank=8 1773dll=true 1774eventq_index=0 1775in_addr_map=true 1776max_accesses_per_row=16 1777mem_sched_policy=frfcfs 1778min_writes_per_switch=16 1779null=false
	1780p_state_clk_gate_bins=20 1781p_state_clk_gate_max=1000000000000 1782p_state_clk_gate_min=1000
1585page_policy=open_adaptive	1783page_policy=open_adaptive
	1784power_model=Null
1586range=2147483648:2415919103 1587ranks_per_channel=2 1588read_buffer_size=32 1589static_backend_latency=10000 1590static_frontend_latency=10000 1591tBURST=5000 1592tCCD_L=0 1593tCK=1250 1594tCL=13750 1595tCS=2500 1596tRAS=35000 1597tRCD=13750 1598tREFI=7800000 1599tRFC=260000 1600tRP=13750 1601tRRD=6000 1602tRRD_L=0 1603tRTP=7500 1604tRTW=2500 1605tWR=15000 1606tWTR=7500 1607tXAW=30000 1608tXP=0 1609tXPDLL=0 1610tXS=0 1611tXSDLL=0 1612write_buffer_size=64 1613write_high_thresh_perc=85 1614write_low_thresh_perc=50 1615port=system.membus.master[5] 1616 1617[system.realview] 1618type=RealView 1619children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake 1620eventq_index=0 1621intrctrl=system.intrctrl 1622system=system 1623 1624[system.realview.aaci_fake] 1625type=AmbaFake 1626amba_id=0 1627clk_domain=system.clk_domain	1785range=2147483648:2415919103 1786ranks_per_channel=2 1787read_buffer_size=32 1788static_backend_latency=10000 1789static_frontend_latency=10000 1790tBURST=5000 1791tCCD_L=0 1792tCK=1250 1793tCL=13750 1794tCS=2500 1795tRAS=35000 1796tRCD=13750 1797tREFI=7800000 1798tRFC=260000 1799tRP=13750 1800tRRD=6000 1801tRRD_L=0 1802tRTP=7500 1803tRTW=2500 1804tWR=15000 1805tWTR=7500 1806tXAW=30000 1807tXP=0 1808tXPDLL=0 1809tXS=0 1810tXSDLL=0 1811write_buffer_size=64 1812write_high_thresh_perc=85 1813write_low_thresh_perc=50 1814port=system.membus.master[5] 1815 1816[system.realview] 1817type=RealView 1818children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake 1819eventq_index=0 1820intrctrl=system.intrctrl 1821system=system 1822 1823[system.realview.aaci_fake] 1824type=AmbaFake 1825amba_id=0 1826clk_domain=system.clk_domain
	1827default_p_state=UNDEFINED
1628eventq_index=0 1629ignore_access=false	1828eventq_index=0 1829ignore_access=false
	1830p_state_clk_gate_bins=20 1831p_state_clk_gate_max=1000000000000 1832p_state_clk_gate_min=1000
1630pio_addr=470024192 1631pio_latency=100000	1833pio_addr=470024192 1834pio_latency=100000
	1835power_model=Null
1632system=system 1633pio=system.iobus.master[18] 1634 1635[system.realview.cf_ctrl] 1636type=IdeController 1637BAR0=471465984 1638BAR0LegacyIO=true 1639BAR0Size=256 1640BAR1=471466240 1641BAR1LegacyIO=true 1642BAR1Size=4096 1643BAR2=1 1644BAR2LegacyIO=false 1645BAR2Size=8 1646BAR3=1 1647BAR3LegacyIO=false 1648BAR3Size=4 1649BAR4=1 1650BAR4LegacyIO=false 1651BAR4Size=16 1652BAR5=1 1653BAR5LegacyIO=false 1654BAR5Size=0 1655BIST=0 1656CacheLineSize=0 1657CapabilityPtr=0 1658CardbusCIS=0 1659ClassCode=1 1660Command=1 1661DeviceID=28945 1662ExpansionROM=0 1663HeaderType=0 1664InterruptLine=31 1665InterruptPin=1 1666LatencyTimer=0 1667LegacyIOBase=0 1668MSICAPBaseOffset=0 1669MSICAPCapId=0 1670MSICAPMaskBits=0 1671MSICAPMsgAddr=0 1672MSICAPMsgCtrl=0 1673MSICAPMsgData=0 1674MSICAPMsgUpperAddr=0 1675MSICAPNextCapability=0 1676MSICAPPendingBits=0 1677MSIXCAPBaseOffset=0 1678MSIXCAPCapId=0 1679MSIXCAPNextCapability=0 1680MSIXMsgCtrl=0 1681MSIXPbaOffset=0 1682MSIXTableOffset=0 1683MaximumLatency=0 1684MinimumGrant=0 1685PMCAPBaseOffset=0 1686PMCAPCapId=0 1687PMCAPCapabilities=0 1688PMCAPCtrlStatus=0 1689PMCAPNextCapability=0 1690PXCAPBaseOffset=0 1691PXCAPCapId=0 1692PXCAPCapabilities=0 1693PXCAPDevCap2=0 1694PXCAPDevCapabilities=0 1695PXCAPDevCtrl=0 1696PXCAPDevCtrl2=0 1697PXCAPDevStatus=0 1698PXCAPLinkCap=0 1699PXCAPLinkCtrl=0 1700PXCAPLinkStatus=0 1701PXCAPNextCapability=0 1702ProgIF=133 1703Revision=0 1704Status=640 1705SubClassCode=1 1706SubsystemID=0 1707SubsystemVendorID=0 1708VendorID=32902 1709clk_domain=system.clk_domain 1710config_latency=20000 1711ctrl_offset=2	1836system=system 1837pio=system.iobus.master[18] 1838 1839[system.realview.cf_ctrl] 1840type=IdeController 1841BAR0=471465984 1842BAR0LegacyIO=true 1843BAR0Size=256 1844BAR1=471466240 1845BAR1LegacyIO=true 1846BAR1Size=4096 1847BAR2=1 1848BAR2LegacyIO=false 1849BAR2Size=8 1850BAR3=1 1851BAR3LegacyIO=false 1852BAR3Size=4 1853BAR4=1 1854BAR4LegacyIO=false 1855BAR4Size=16 1856BAR5=1 1857BAR5LegacyIO=false 1858BAR5Size=0 1859BIST=0 1860CacheLineSize=0 1861CapabilityPtr=0 1862CardbusCIS=0 1863ClassCode=1 1864Command=1 1865DeviceID=28945 1866ExpansionROM=0 1867HeaderType=0 1868InterruptLine=31 1869InterruptPin=1 1870LatencyTimer=0 1871LegacyIOBase=0 1872MSICAPBaseOffset=0 1873MSICAPCapId=0 1874MSICAPMaskBits=0 1875MSICAPMsgAddr=0 1876MSICAPMsgCtrl=0 1877MSICAPMsgData=0 1878MSICAPMsgUpperAddr=0 1879MSICAPNextCapability=0 1880MSICAPPendingBits=0 1881MSIXCAPBaseOffset=0 1882MSIXCAPCapId=0 1883MSIXCAPNextCapability=0 1884MSIXMsgCtrl=0 1885MSIXPbaOffset=0 1886MSIXTableOffset=0 1887MaximumLatency=0 1888MinimumGrant=0 1889PMCAPBaseOffset=0 1890PMCAPCapId=0 1891PMCAPCapabilities=0 1892PMCAPCtrlStatus=0 1893PMCAPNextCapability=0 1894PXCAPBaseOffset=0 1895PXCAPCapId=0 1896PXCAPCapabilities=0 1897PXCAPDevCap2=0 1898PXCAPDevCapabilities=0 1899PXCAPDevCtrl=0 1900PXCAPDevCtrl2=0 1901PXCAPDevStatus=0 1902PXCAPLinkCap=0 1903PXCAPLinkCtrl=0 1904PXCAPLinkStatus=0 1905PXCAPNextCapability=0 1906ProgIF=133 1907Revision=0 1908Status=640 1909SubClassCode=1 1910SubsystemID=0 1911SubsystemVendorID=0 1912VendorID=32902 1913clk_domain=system.clk_domain 1914config_latency=20000 1915ctrl_offset=2
	1916default_p_state=UNDEFINED
1712disks= 1713eventq_index=0 1714host=system.realview.pci_host 1715io_shift=2	1917disks= 1918eventq_index=0 1919host=system.realview.pci_host 1920io_shift=2
	1921p_state_clk_gate_bins=20 1922p_state_clk_gate_max=1000000000000 1923p_state_clk_gate_min=1000
1716pci_bus=2 1717pci_dev=0 1718pci_func=0 1719pio_latency=30000	1924pci_bus=2 1925pci_dev=0 1926pci_func=0 1927pio_latency=30000
	1928power_model=Null
1720system=system 1721dma=system.iobus.slave[2] 1722pio=system.iobus.master[9] 1723 1724[system.realview.clcd] 1725type=Pl111 1726amba_id=1315089 1727clk_domain=system.clk_domain	1929system=system 1930dma=system.iobus.slave[2] 1931pio=system.iobus.master[9] 1932 1933[system.realview.clcd] 1934type=Pl111 1935amba_id=1315089 1936clk_domain=system.clk_domain
	1937default_p_state=UNDEFINED
1728enable_capture=true 1729eventq_index=0 1730gic=system.realview.gic 1731int_num=46	1938enable_capture=true 1939eventq_index=0 1940gic=system.realview.gic 1941int_num=46
	1942p_state_clk_gate_bins=20 1943p_state_clk_gate_max=1000000000000 1944p_state_clk_gate_min=1000
1732pio_addr=471793664 1733pio_latency=10000 1734pixel_clock=41667	1945pio_addr=471793664 1946pio_latency=10000 1947pixel_clock=41667
	1948power_model=Null
1735system=system 1736vnc=system.vncserver 1737dma=system.iobus.slave[1] 1738pio=system.iobus.master[5] 1739 1740[system.realview.dcc] 1741type=SubSystem 1742children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys 1743eventq_index=0	1949system=system 1950vnc=system.vncserver 1951dma=system.iobus.slave[1] 1952pio=system.iobus.master[5] 1953 1954[system.realview.dcc] 1955type=SubSystem 1956children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys 1957eventq_index=0
	1958thermal_domain=Null
1744 1745[system.realview.dcc.osc_cpu] 1746type=RealViewOsc 1747dcc=0 1748device=0 1749eventq_index=0 1750freq=16667 1751parent=system.realview.realview_io 1752position=0 1753site=1 1754voltage_domain=system.voltage_domain 1755 1756[system.realview.dcc.osc_ddr] 1757type=RealViewOsc 1758dcc=0 1759device=8 1760eventq_index=0 1761freq=25000 1762parent=system.realview.realview_io 1763position=0 1764site=1 1765voltage_domain=system.voltage_domain 1766 1767[system.realview.dcc.osc_hsbm] 1768type=RealViewOsc 1769dcc=0 1770device=4 1771eventq_index=0 1772freq=25000 1773parent=system.realview.realview_io 1774position=0 1775site=1 1776voltage_domain=system.voltage_domain 1777 1778[system.realview.dcc.osc_pxl] 1779type=RealViewOsc 1780dcc=0 1781device=5 1782eventq_index=0 1783freq=42105 1784parent=system.realview.realview_io 1785position=0 1786site=1 1787voltage_domain=system.voltage_domain 1788 1789[system.realview.dcc.osc_smb] 1790type=RealViewOsc 1791dcc=0 1792device=6 1793eventq_index=0 1794freq=20000 1795parent=system.realview.realview_io 1796position=0 1797site=1 1798voltage_domain=system.voltage_domain 1799 1800[system.realview.dcc.osc_sys] 1801type=RealViewOsc 1802dcc=0 1803device=7 1804eventq_index=0 1805freq=16667 1806parent=system.realview.realview_io 1807position=0 1808site=1 1809voltage_domain=system.voltage_domain 1810 1811[system.realview.energy_ctrl] 1812type=EnergyCtrl 1813clk_domain=system.clk_domain	1959 1960[system.realview.dcc.osc_cpu] 1961type=RealViewOsc 1962dcc=0 1963device=0 1964eventq_index=0 1965freq=16667 1966parent=system.realview.realview_io 1967position=0 1968site=1 1969voltage_domain=system.voltage_domain 1970 1971[system.realview.dcc.osc_ddr] 1972type=RealViewOsc 1973dcc=0 1974device=8 1975eventq_index=0 1976freq=25000 1977parent=system.realview.realview_io 1978position=0 1979site=1 1980voltage_domain=system.voltage_domain 1981 1982[system.realview.dcc.osc_hsbm] 1983type=RealViewOsc 1984dcc=0 1985device=4 1986eventq_index=0 1987freq=25000 1988parent=system.realview.realview_io 1989position=0 1990site=1 1991voltage_domain=system.voltage_domain 1992 1993[system.realview.dcc.osc_pxl] 1994type=RealViewOsc 1995dcc=0 1996device=5 1997eventq_index=0 1998freq=42105 1999parent=system.realview.realview_io 2000position=0 2001site=1 2002voltage_domain=system.voltage_domain 2003 2004[system.realview.dcc.osc_smb] 2005type=RealViewOsc 2006dcc=0 2007device=6 2008eventq_index=0 2009freq=20000 2010parent=system.realview.realview_io 2011position=0 2012site=1 2013voltage_domain=system.voltage_domain 2014 2015[system.realview.dcc.osc_sys] 2016type=RealViewOsc 2017dcc=0 2018device=7 2019eventq_index=0 2020freq=16667 2021parent=system.realview.realview_io 2022position=0 2023site=1 2024voltage_domain=system.voltage_domain 2025 2026[system.realview.energy_ctrl] 2027type=EnergyCtrl 2028clk_domain=system.clk_domain
	2029default_p_state=UNDEFINED
1814dvfs_handler=system.dvfs_handler 1815eventq_index=0	2030dvfs_handler=system.dvfs_handler 2031eventq_index=0
	2032p_state_clk_gate_bins=20 2033p_state_clk_gate_max=1000000000000 2034p_state_clk_gate_min=1000
1816pio_addr=470286336 1817pio_latency=100000	2035pio_addr=470286336 2036pio_latency=100000
	2037power_model=Null
1818system=system 1819pio=system.iobus.master[22] 1820 1821[system.realview.ethernet] 1822type=IGbE 1823BAR0=0 1824BAR0LegacyIO=false 1825BAR0Size=131072 1826BAR1=0 1827BAR1LegacyIO=false 1828BAR1Size=0 1829BAR2=0 1830BAR2LegacyIO=false 1831BAR2Size=0 1832BAR3=0 1833BAR3LegacyIO=false 1834BAR3Size=0 1835BAR4=0 1836BAR4LegacyIO=false 1837BAR4Size=0 1838BAR5=0 1839BAR5LegacyIO=false 1840BAR5Size=0 1841BIST=0 1842CacheLineSize=0 1843CapabilityPtr=0 1844CardbusCIS=0 1845ClassCode=2 1846Command=0 1847DeviceID=4213 1848ExpansionROM=0 1849HeaderType=0 1850InterruptLine=1 1851InterruptPin=1 1852LatencyTimer=0 1853LegacyIOBase=0 1854MSICAPBaseOffset=0 1855MSICAPCapId=0 1856MSICAPMaskBits=0 1857MSICAPMsgAddr=0 1858MSICAPMsgCtrl=0 1859MSICAPMsgData=0 1860MSICAPMsgUpperAddr=0 1861MSICAPNextCapability=0 1862MSICAPPendingBits=0 1863MSIXCAPBaseOffset=0 1864MSIXCAPCapId=0 1865MSIXCAPNextCapability=0 1866MSIXMsgCtrl=0 1867MSIXPbaOffset=0 1868MSIXTableOffset=0 1869MaximumLatency=0 1870MinimumGrant=255 1871PMCAPBaseOffset=0 1872PMCAPCapId=0 1873PMCAPCapabilities=0 1874PMCAPCtrlStatus=0 1875PMCAPNextCapability=0 1876PXCAPBaseOffset=0 1877PXCAPCapId=0 1878PXCAPCapabilities=0 1879PXCAPDevCap2=0 1880PXCAPDevCapabilities=0 1881PXCAPDevCtrl=0 1882PXCAPDevCtrl2=0 1883PXCAPDevStatus=0 1884PXCAPLinkCap=0 1885PXCAPLinkCtrl=0 1886PXCAPLinkStatus=0 1887PXCAPNextCapability=0 1888ProgIF=0 1889Revision=0 1890Status=0 1891SubClassCode=0 1892SubsystemID=4104 1893SubsystemVendorID=32902 1894VendorID=32902 1895clk_domain=system.clk_domain 1896config_latency=20000	2038system=system 2039pio=system.iobus.master[22] 2040 2041[system.realview.ethernet] 2042type=IGbE 2043BAR0=0 2044BAR0LegacyIO=false 2045BAR0Size=131072 2046BAR1=0 2047BAR1LegacyIO=false 2048BAR1Size=0 2049BAR2=0 2050BAR2LegacyIO=false 2051BAR2Size=0 2052BAR3=0 2053BAR3LegacyIO=false 2054BAR3Size=0 2055BAR4=0 2056BAR4LegacyIO=false 2057BAR4Size=0 2058BAR5=0 2059BAR5LegacyIO=false 2060BAR5Size=0 2061BIST=0 2062CacheLineSize=0 2063CapabilityPtr=0 2064CardbusCIS=0 2065ClassCode=2 2066Command=0 2067DeviceID=4213 2068ExpansionROM=0 2069HeaderType=0 2070InterruptLine=1 2071InterruptPin=1 2072LatencyTimer=0 2073LegacyIOBase=0 2074MSICAPBaseOffset=0 2075MSICAPCapId=0 2076MSICAPMaskBits=0 2077MSICAPMsgAddr=0 2078MSICAPMsgCtrl=0 2079MSICAPMsgData=0 2080MSICAPMsgUpperAddr=0 2081MSICAPNextCapability=0 2082MSICAPPendingBits=0 2083MSIXCAPBaseOffset=0 2084MSIXCAPCapId=0 2085MSIXCAPNextCapability=0 2086MSIXMsgCtrl=0 2087MSIXPbaOffset=0 2088MSIXTableOffset=0 2089MaximumLatency=0 2090MinimumGrant=255 2091PMCAPBaseOffset=0 2092PMCAPCapId=0 2093PMCAPCapabilities=0 2094PMCAPCtrlStatus=0 2095PMCAPNextCapability=0 2096PXCAPBaseOffset=0 2097PXCAPCapId=0 2098PXCAPCapabilities=0 2099PXCAPDevCap2=0 2100PXCAPDevCapabilities=0 2101PXCAPDevCtrl=0 2102PXCAPDevCtrl2=0 2103PXCAPDevStatus=0 2104PXCAPLinkCap=0 2105PXCAPLinkCtrl=0 2106PXCAPLinkStatus=0 2107PXCAPNextCapability=0 2108ProgIF=0 2109Revision=0 2110Status=0 2111SubClassCode=0 2112SubsystemID=4104 2113SubsystemVendorID=32902 2114VendorID=32902 2115clk_domain=system.clk_domain 2116config_latency=20000
	2117default_p_state=UNDEFINED
1897eventq_index=0 1898fetch_comp_delay=10000 1899fetch_delay=10000 1900hardware_address=00:90:00:00:00:01 1901host=system.realview.pci_host	2118eventq_index=0 2119fetch_comp_delay=10000 2120fetch_delay=10000 2121hardware_address=00:90:00:00:00:01 2122host=system.realview.pci_host
	2123p_state_clk_gate_bins=20 2124p_state_clk_gate_max=1000000000000 2125p_state_clk_gate_min=1000
1902pci_bus=0 1903pci_dev=0 1904pci_func=0 1905phy_epid=896 1906phy_pid=680 1907pio_latency=30000	2126pci_bus=0 2127pci_dev=0 2128pci_func=0 2129phy_epid=896 2130phy_pid=680 2131pio_latency=30000
	2132power_model=Null
1908rx_desc_cache_size=64 1909rx_fifo_size=393216 1910rx_write_delay=0 1911system=system 1912tx_desc_cache_size=64 1913tx_fifo_size=393216 1914tx_read_delay=0 1915wb_comp_delay=10000 1916wb_delay=10000 1917dma=system.iobus.slave[4] 1918pio=system.iobus.master[24] 1919 1920[system.realview.generic_timer] 1921type=GenericTimer 1922eventq_index=0 1923gic=system.realview.gic 1924int_phys=29 1925int_virt=27 1926system=system 1927 1928[system.realview.gic] 1929type=Pl390 1930clk_domain=system.clk_domain 1931cpu_addr=738205696 1932cpu_pio_delay=10000	2133rx_desc_cache_size=64 2134rx_fifo_size=393216 2135rx_write_delay=0 2136system=system 2137tx_desc_cache_size=64 2138tx_fifo_size=393216 2139tx_read_delay=0 2140wb_comp_delay=10000 2141wb_delay=10000 2142dma=system.iobus.slave[4] 2143pio=system.iobus.master[24] 2144 2145[system.realview.generic_timer] 2146type=GenericTimer 2147eventq_index=0 2148gic=system.realview.gic 2149int_phys=29 2150int_virt=27 2151system=system 2152 2153[system.realview.gic] 2154type=Pl390 2155clk_domain=system.clk_domain 2156cpu_addr=738205696 2157cpu_pio_delay=10000
	2158default_p_state=UNDEFINED
1933dist_addr=738201600 1934dist_pio_delay=10000 1935eventq_index=0	2159dist_addr=738201600 2160dist_pio_delay=10000 2161eventq_index=0
	2162gem5_extensions=true
1936int_latency=10000 1937it_lines=128	2163int_latency=10000 2164it_lines=128
	2165p_state_clk_gate_bins=20 2166p_state_clk_gate_max=1000000000000 2167p_state_clk_gate_min=1000
1938platform=system.realview	2168platform=system.realview
	2169power_model=Null
1939system=system 1940pio=system.membus.master[2] 1941 1942[system.realview.hdlcd] 1943type=HDLcd 1944amba_id=1314816 1945clk_domain=system.clk_domain	2170system=system 2171pio=system.membus.master[2] 2172 2173[system.realview.hdlcd] 2174type=HDLcd 2175amba_id=1314816 2176clk_domain=system.clk_domain
	2177default_p_state=UNDEFINED
1946enable_capture=true 1947eventq_index=0 1948gic=system.realview.gic 1949int_num=117	2178enable_capture=true 2179eventq_index=0 2180gic=system.realview.gic 2181int_num=117
	2182p_state_clk_gate_bins=20 2183p_state_clk_gate_max=1000000000000 2184p_state_clk_gate_min=1000
1950pio_addr=721420288 1951pio_latency=10000 1952pixel_buffer_size=2048 1953pixel_chunk=32	2185pio_addr=721420288 2186pio_latency=10000 2187pixel_buffer_size=2048 2188pixel_chunk=32
	2189power_model=Null
1954pxl_clk=system.realview.dcc.osc_pxl 1955system=system 1956vnc=system.vncserver 1957workaround_dma_line_count=true 1958workaround_swap_rb=true 1959dma=system.membus.slave[0] 1960pio=system.iobus.master[6] 1961 1962[system.realview.ide] 1963type=IdeController 1964BAR0=1 1965BAR0LegacyIO=false 1966BAR0Size=8 1967BAR1=1 1968BAR1LegacyIO=false 1969BAR1Size=4 1970BAR2=1 1971BAR2LegacyIO=false 1972BAR2Size=8 1973BAR3=1 1974BAR3LegacyIO=false 1975BAR3Size=4 1976BAR4=1 1977BAR4LegacyIO=false 1978BAR4Size=16 1979BAR5=1 1980BAR5LegacyIO=false 1981BAR5Size=0 1982BIST=0 1983CacheLineSize=0 1984CapabilityPtr=0 1985CardbusCIS=0 1986ClassCode=1 1987Command=0 1988DeviceID=28945 1989ExpansionROM=0 1990HeaderType=0 1991InterruptLine=2 1992InterruptPin=2 1993LatencyTimer=0 1994LegacyIOBase=0 1995MSICAPBaseOffset=0 1996MSICAPCapId=0 1997MSICAPMaskBits=0 1998MSICAPMsgAddr=0 1999MSICAPMsgCtrl=0 2000MSICAPMsgData=0 2001MSICAPMsgUpperAddr=0 2002MSICAPNextCapability=0 2003MSICAPPendingBits=0 2004MSIXCAPBaseOffset=0 2005MSIXCAPCapId=0 2006MSIXCAPNextCapability=0 2007MSIXMsgCtrl=0 2008MSIXPbaOffset=0 2009MSIXTableOffset=0 2010MaximumLatency=0 2011MinimumGrant=0 2012PMCAPBaseOffset=0 2013PMCAPCapId=0 2014PMCAPCapabilities=0 2015PMCAPCtrlStatus=0 2016PMCAPNextCapability=0 2017PXCAPBaseOffset=0 2018PXCAPCapId=0 2019PXCAPCapabilities=0 2020PXCAPDevCap2=0 2021PXCAPDevCapabilities=0 2022PXCAPDevCtrl=0 2023PXCAPDevCtrl2=0 2024PXCAPDevStatus=0 2025PXCAPLinkCap=0 2026PXCAPLinkCtrl=0 2027PXCAPLinkStatus=0 2028PXCAPNextCapability=0 2029ProgIF=133 2030Revision=0 2031Status=640 2032SubClassCode=1 2033SubsystemID=0 2034SubsystemVendorID=0 2035VendorID=32902 2036clk_domain=system.clk_domain 2037config_latency=20000 2038ctrl_offset=0	2190pxl_clk=system.realview.dcc.osc_pxl 2191system=system 2192vnc=system.vncserver 2193workaround_dma_line_count=true 2194workaround_swap_rb=true 2195dma=system.membus.slave[0] 2196pio=system.iobus.master[6] 2197 2198[system.realview.ide] 2199type=IdeController 2200BAR0=1 2201BAR0LegacyIO=false 2202BAR0Size=8 2203BAR1=1 2204BAR1LegacyIO=false 2205BAR1Size=4 2206BAR2=1 2207BAR2LegacyIO=false 2208BAR2Size=8 2209BAR3=1 2210BAR3LegacyIO=false 2211BAR3Size=4 2212BAR4=1 2213BAR4LegacyIO=false 2214BAR4Size=16 2215BAR5=1 2216BAR5LegacyIO=false 2217BAR5Size=0 2218BIST=0 2219CacheLineSize=0 2220CapabilityPtr=0 2221CardbusCIS=0 2222ClassCode=1 2223Command=0 2224DeviceID=28945 2225ExpansionROM=0 2226HeaderType=0 2227InterruptLine=2 2228InterruptPin=2 2229LatencyTimer=0 2230LegacyIOBase=0 2231MSICAPBaseOffset=0 2232MSICAPCapId=0 2233MSICAPMaskBits=0 2234MSICAPMsgAddr=0 2235MSICAPMsgCtrl=0 2236MSICAPMsgData=0 2237MSICAPMsgUpperAddr=0 2238MSICAPNextCapability=0 2239MSICAPPendingBits=0 2240MSIXCAPBaseOffset=0 2241MSIXCAPCapId=0 2242MSIXCAPNextCapability=0 2243MSIXMsgCtrl=0 2244MSIXPbaOffset=0 2245MSIXTableOffset=0 2246MaximumLatency=0 2247MinimumGrant=0 2248PMCAPBaseOffset=0 2249PMCAPCapId=0 2250PMCAPCapabilities=0 2251PMCAPCtrlStatus=0 2252PMCAPNextCapability=0 2253PXCAPBaseOffset=0 2254PXCAPCapId=0 2255PXCAPCapabilities=0 2256PXCAPDevCap2=0 2257PXCAPDevCapabilities=0 2258PXCAPDevCtrl=0 2259PXCAPDevCtrl2=0 2260PXCAPDevStatus=0 2261PXCAPLinkCap=0 2262PXCAPLinkCtrl=0 2263PXCAPLinkStatus=0 2264PXCAPNextCapability=0 2265ProgIF=133 2266Revision=0 2267Status=640 2268SubClassCode=1 2269SubsystemID=0 2270SubsystemVendorID=0 2271VendorID=32902 2272clk_domain=system.clk_domain 2273config_latency=20000 2274ctrl_offset=0
	2275default_p_state=UNDEFINED
2039disks=system.cf0 2040eventq_index=0 2041host=system.realview.pci_host 2042io_shift=0	2276disks=system.cf0 2277eventq_index=0 2278host=system.realview.pci_host 2279io_shift=0
	2280p_state_clk_gate_bins=20 2281p_state_clk_gate_max=1000000000000 2282p_state_clk_gate_min=1000
2043pci_bus=0 2044pci_dev=1 2045pci_func=0 2046pio_latency=30000	2283pci_bus=0 2284pci_dev=1 2285pci_func=0 2286pio_latency=30000
	2287power_model=Null
2047system=system 2048dma=system.iobus.slave[3] 2049pio=system.iobus.master[23] 2050 2051[system.realview.kmi0] 2052type=Pl050 2053amba_id=1314896 2054clk_domain=system.clk_domain	2288system=system 2289dma=system.iobus.slave[3] 2290pio=system.iobus.master[23] 2291 2292[system.realview.kmi0] 2293type=Pl050 2294amba_id=1314896 2295clk_domain=system.clk_domain
	2296default_p_state=UNDEFINED
2055eventq_index=0 2056gic=system.realview.gic 2057int_delay=1000000 2058int_num=44 2059is_mouse=false	2297eventq_index=0 2298gic=system.realview.gic 2299int_delay=1000000 2300int_num=44 2301is_mouse=false
	2302p_state_clk_gate_bins=20 2303p_state_clk_gate_max=1000000000000 2304p_state_clk_gate_min=1000
2060pio_addr=470155264 2061pio_latency=100000	2305pio_addr=470155264 2306pio_latency=100000
	2307power_model=Null
2062system=system 2063vnc=system.vncserver 2064pio=system.iobus.master[7] 2065 2066[system.realview.kmi1] 2067type=Pl050 2068amba_id=1314896 2069clk_domain=system.clk_domain	2308system=system 2309vnc=system.vncserver 2310pio=system.iobus.master[7] 2311 2312[system.realview.kmi1] 2313type=Pl050 2314amba_id=1314896 2315clk_domain=system.clk_domain
	2316default_p_state=UNDEFINED
2070eventq_index=0 2071gic=system.realview.gic 2072int_delay=1000000 2073int_num=45 2074is_mouse=true	2317eventq_index=0 2318gic=system.realview.gic 2319int_delay=1000000 2320int_num=45 2321is_mouse=true
	2322p_state_clk_gate_bins=20 2323p_state_clk_gate_max=1000000000000 2324p_state_clk_gate_min=1000
2075pio_addr=470220800 2076pio_latency=100000	2325pio_addr=470220800 2326pio_latency=100000
	2327power_model=Null
2077system=system 2078vnc=system.vncserver 2079pio=system.iobus.master[8] 2080 2081[system.realview.l2x0_fake] 2082type=IsaFake 2083clk_domain=system.clk_domain	2328system=system 2329vnc=system.vncserver 2330pio=system.iobus.master[8] 2331 2332[system.realview.l2x0_fake] 2333type=IsaFake 2334clk_domain=system.clk_domain
	2335default_p_state=UNDEFINED
2084eventq_index=0 2085fake_mem=false	2336eventq_index=0 2337fake_mem=false
	2338p_state_clk_gate_bins=20 2339p_state_clk_gate_max=1000000000000 2340p_state_clk_gate_min=1000
2086pio_addr=739246080 2087pio_latency=100000 2088pio_size=4095	2341pio_addr=739246080 2342pio_latency=100000 2343pio_size=4095
	2344power_model=Null
2089ret_bad_addr=false 2090ret_data16=65535 2091ret_data32=4294967295 2092ret_data64=18446744073709551615 2093ret_data8=255 2094system=system 2095update_data=false 2096warn_access= 2097pio=system.iobus.master[12] 2098 2099[system.realview.lan_fake] 2100type=IsaFake 2101clk_domain=system.clk_domain	2345ret_bad_addr=false 2346ret_data16=65535 2347ret_data32=4294967295 2348ret_data64=18446744073709551615 2349ret_data8=255 2350system=system 2351update_data=false 2352warn_access= 2353pio=system.iobus.master[12] 2354 2355[system.realview.lan_fake] 2356type=IsaFake 2357clk_domain=system.clk_domain
	2358default_p_state=UNDEFINED
2102eventq_index=0 2103fake_mem=false	2359eventq_index=0 2360fake_mem=false
	2361p_state_clk_gate_bins=20 2362p_state_clk_gate_max=1000000000000 2363p_state_clk_gate_min=1000
2104pio_addr=436207616 2105pio_latency=100000 2106pio_size=65535	2364pio_addr=436207616 2365pio_latency=100000 2366pio_size=65535
	2367power_model=Null
2107ret_bad_addr=false 2108ret_data16=65535 2109ret_data32=4294967295 2110ret_data64=18446744073709551615 2111ret_data8=255 2112system=system 2113update_data=false 2114warn_access= 2115pio=system.iobus.master[19] 2116 2117[system.realview.local_cpu_timer] 2118type=CpuLocalTimer 2119clk_domain=system.clk_domain	2368ret_bad_addr=false 2369ret_data16=65535 2370ret_data32=4294967295 2371ret_data64=18446744073709551615 2372ret_data8=255 2373system=system 2374update_data=false 2375warn_access= 2376pio=system.iobus.master[19] 2377 2378[system.realview.local_cpu_timer] 2379type=CpuLocalTimer 2380clk_domain=system.clk_domain
	2381default_p_state=UNDEFINED
2120eventq_index=0 2121gic=system.realview.gic 2122int_num_timer=29 2123int_num_watchdog=30	2382eventq_index=0 2383gic=system.realview.gic 2384int_num_timer=29 2385int_num_watchdog=30
	2386p_state_clk_gate_bins=20 2387p_state_clk_gate_max=1000000000000 2388p_state_clk_gate_min=1000
2124pio_addr=738721792 2125pio_latency=100000	2389pio_addr=738721792 2390pio_latency=100000
	2391power_model=Null
2126system=system 2127pio=system.membus.master[4] 2128 2129[system.realview.mcc] 2130type=SubSystem	2392system=system 2393pio=system.membus.master[4] 2394 2395[system.realview.mcc] 2396type=SubSystem
2131children=osc_clcd osc_mcc osc_peripheral osc_system_bus	2397children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl
2132eventq_index=0	2398eventq_index=0
	2399thermal_domain=Null
2133 2134[system.realview.mcc.osc_clcd] 2135type=RealViewOsc 2136dcc=0 2137device=1 2138eventq_index=0 2139freq=42105 2140parent=system.realview.realview_io 2141position=0 2142site=0 2143voltage_domain=system.voltage_domain 2144 2145[system.realview.mcc.osc_mcc] 2146type=RealViewOsc 2147dcc=0 2148device=0 2149eventq_index=0 2150freq=20000 2151parent=system.realview.realview_io 2152position=0 2153site=0 2154voltage_domain=system.voltage_domain 2155 2156[system.realview.mcc.osc_peripheral] 2157type=RealViewOsc 2158dcc=0 2159device=2 2160eventq_index=0 2161freq=41667 2162parent=system.realview.realview_io 2163position=0 2164site=0 2165voltage_domain=system.voltage_domain 2166 2167[system.realview.mcc.osc_system_bus] 2168type=RealViewOsc 2169dcc=0 2170device=4 2171eventq_index=0 2172freq=41667 2173parent=system.realview.realview_io 2174position=0 2175site=0 2176voltage_domain=system.voltage_domain 2177	2400 2401[system.realview.mcc.osc_clcd] 2402type=RealViewOsc 2403dcc=0 2404device=1 2405eventq_index=0 2406freq=42105 2407parent=system.realview.realview_io 2408position=0 2409site=0 2410voltage_domain=system.voltage_domain 2411 2412[system.realview.mcc.osc_mcc] 2413type=RealViewOsc 2414dcc=0 2415device=0 2416eventq_index=0 2417freq=20000 2418parent=system.realview.realview_io 2419position=0 2420site=0 2421voltage_domain=system.voltage_domain 2422 2423[system.realview.mcc.osc_peripheral] 2424type=RealViewOsc 2425dcc=0 2426device=2 2427eventq_index=0 2428freq=41667 2429parent=system.realview.realview_io 2430position=0 2431site=0 2432voltage_domain=system.voltage_domain 2433 2434[system.realview.mcc.osc_system_bus] 2435type=RealViewOsc 2436dcc=0 2437device=4 2438eventq_index=0 2439freq=41667 2440parent=system.realview.realview_io 2441position=0 2442site=0 2443voltage_domain=system.voltage_domain 2444
	2445[system.realview.mcc.temp_crtl] 2446type=RealViewTemperatureSensor 2447dcc=0 2448device=0 2449eventq_index=0 2450parent=system.realview.realview_io 2451position=0 2452site=0 2453system=system 2454
2178[system.realview.mmc_fake] 2179type=AmbaFake 2180amba_id=0 2181clk_domain=system.clk_domain	2455[system.realview.mmc_fake] 2456type=AmbaFake 2457amba_id=0 2458clk_domain=system.clk_domain
	2459default_p_state=UNDEFINED
2182eventq_index=0 2183ignore_access=false	2460eventq_index=0 2461ignore_access=false
	2462p_state_clk_gate_bins=20 2463p_state_clk_gate_max=1000000000000 2464p_state_clk_gate_min=1000
2184pio_addr=470089728 2185pio_latency=100000	2465pio_addr=470089728 2466pio_latency=100000
	2467power_model=Null
2186system=system 2187pio=system.iobus.master[21] 2188 2189[system.realview.nvmem] 2190type=SimpleMemory 2191bandwidth=73.000000 2192clk_domain=system.clk_domain 2193conf_table_reported=true	2468system=system 2469pio=system.iobus.master[21] 2470 2471[system.realview.nvmem] 2472type=SimpleMemory 2473bandwidth=73.000000 2474clk_domain=system.clk_domain 2475conf_table_reported=true
	2476default_p_state=UNDEFINED
2194eventq_index=0 2195in_addr_map=true 2196latency=30000 2197latency_var=0 2198null=false	2477eventq_index=0 2478in_addr_map=true 2479latency=30000 2480latency_var=0 2481null=false
	2482p_state_clk_gate_bins=20 2483p_state_clk_gate_max=1000000000000 2484p_state_clk_gate_min=1000 2485power_model=Null
2199range=0:67108863 2200port=system.membus.master[1] 2201 2202[system.realview.pci_host] 2203type=GenericPciHost 2204clk_domain=system.clk_domain 2205conf_base=805306368 2206conf_device_bits=12 2207conf_size=268435456	2486range=0:67108863 2487port=system.membus.master[1] 2488 2489[system.realview.pci_host] 2490type=GenericPciHost 2491clk_domain=system.clk_domain 2492conf_base=805306368 2493conf_device_bits=12 2494conf_size=268435456
	2495default_p_state=UNDEFINED
2208eventq_index=0	2496eventq_index=0
	2497p_state_clk_gate_bins=20 2498p_state_clk_gate_max=1000000000000 2499p_state_clk_gate_min=1000
2209pci_dma_base=0 2210pci_mem_base=0 2211pci_pio_base=788529152 2212platform=system.realview	2500pci_dma_base=0 2501pci_mem_base=0 2502pci_pio_base=788529152 2503platform=system.realview
	2504power_model=Null
2213system=system 2214pio=system.iobus.master[2] 2215 2216[system.realview.realview_io] 2217type=RealViewCtrl 2218clk_domain=system.clk_domain	2505system=system 2506pio=system.iobus.master[2] 2507 2508[system.realview.realview_io] 2509type=RealViewCtrl 2510clk_domain=system.clk_domain
	2511default_p_state=UNDEFINED
2219eventq_index=0 2220idreg=35979264	2512eventq_index=0 2513idreg=35979264
	2514p_state_clk_gate_bins=20 2515p_state_clk_gate_max=1000000000000 2516p_state_clk_gate_min=1000
2221pio_addr=469827584 2222pio_latency=100000	2517pio_addr=469827584 2518pio_latency=100000
	2519power_model=Null
2223proc_id0=335544320 2224proc_id1=335544320 2225system=system 2226pio=system.iobus.master[1] 2227 2228[system.realview.rtc] 2229type=PL031 2230amba_id=3412017 2231clk_domain=system.clk_domain	2520proc_id0=335544320 2521proc_id1=335544320 2522system=system 2523pio=system.iobus.master[1] 2524 2525[system.realview.rtc] 2526type=PL031 2527amba_id=3412017 2528clk_domain=system.clk_domain
	2529default_p_state=UNDEFINED
2232eventq_index=0 2233gic=system.realview.gic 2234int_delay=100000 2235int_num=36	2530eventq_index=0 2531gic=system.realview.gic 2532int_delay=100000 2533int_num=36
	2534p_state_clk_gate_bins=20 2535p_state_clk_gate_max=1000000000000 2536p_state_clk_gate_min=1000
2236pio_addr=471269376 2237pio_latency=100000	2537pio_addr=471269376 2538pio_latency=100000
	2539power_model=Null
2238system=system 2239time=Thu Jan 1 00:00:00 2009 2240pio=system.iobus.master[10] 2241 2242[system.realview.sp810_fake] 2243type=AmbaFake 2244amba_id=0 2245clk_domain=system.clk_domain	2540system=system 2541time=Thu Jan 1 00:00:00 2009 2542pio=system.iobus.master[10] 2543 2544[system.realview.sp810_fake] 2545type=AmbaFake 2546amba_id=0 2547clk_domain=system.clk_domain
	2548default_p_state=UNDEFINED
2246eventq_index=0 2247ignore_access=true	2549eventq_index=0 2550ignore_access=true
	2551p_state_clk_gate_bins=20 2552p_state_clk_gate_max=1000000000000 2553p_state_clk_gate_min=1000
2248pio_addr=469893120 2249pio_latency=100000	2554pio_addr=469893120 2555pio_latency=100000
	2556power_model=Null
2250system=system 2251pio=system.iobus.master[16] 2252 2253[system.realview.timer0] 2254type=Sp804 2255amba_id=1316868 2256clk_domain=system.clk_domain 2257clock0=1000000 2258clock1=1000000	2557system=system 2558pio=system.iobus.master[16] 2559 2560[system.realview.timer0] 2561type=Sp804 2562amba_id=1316868 2563clk_domain=system.clk_domain 2564clock0=1000000 2565clock1=1000000
	2566default_p_state=UNDEFINED
2259eventq_index=0 2260gic=system.realview.gic 2261int_num0=34 2262int_num1=34	2567eventq_index=0 2568gic=system.realview.gic 2569int_num0=34 2570int_num1=34
	2571p_state_clk_gate_bins=20 2572p_state_clk_gate_max=1000000000000 2573p_state_clk_gate_min=1000
2263pio_addr=470876160 2264pio_latency=100000	2574pio_addr=470876160 2575pio_latency=100000
	2576power_model=Null
2265system=system 2266pio=system.iobus.master[3] 2267 2268[system.realview.timer1] 2269type=Sp804 2270amba_id=1316868 2271clk_domain=system.clk_domain 2272clock0=1000000 2273clock1=1000000	2577system=system 2578pio=system.iobus.master[3] 2579 2580[system.realview.timer1] 2581type=Sp804 2582amba_id=1316868 2583clk_domain=system.clk_domain 2584clock0=1000000 2585clock1=1000000
	2586default_p_state=UNDEFINED
2274eventq_index=0 2275gic=system.realview.gic 2276int_num0=35 2277int_num1=35	2587eventq_index=0 2588gic=system.realview.gic 2589int_num0=35 2590int_num1=35
	2591p_state_clk_gate_bins=20 2592p_state_clk_gate_max=1000000000000 2593p_state_clk_gate_min=1000
2278pio_addr=470941696 2279pio_latency=100000	2594pio_addr=470941696 2595pio_latency=100000
	2596power_model=Null
2280system=system 2281pio=system.iobus.master[4] 2282 2283[system.realview.uart] 2284type=Pl011 2285clk_domain=system.clk_domain	2597system=system 2598pio=system.iobus.master[4] 2599 2600[system.realview.uart] 2601type=Pl011 2602clk_domain=system.clk_domain
	2603default_p_state=UNDEFINED
2286end_on_eot=false 2287eventq_index=0 2288gic=system.realview.gic 2289int_delay=100000 2290int_num=37	2604end_on_eot=false 2605eventq_index=0 2606gic=system.realview.gic 2607int_delay=100000 2608int_num=37
	2609p_state_clk_gate_bins=20 2610p_state_clk_gate_max=1000000000000 2611p_state_clk_gate_min=1000
2291pio_addr=470351872 2292pio_latency=100000 2293platform=system.realview	2612pio_addr=470351872 2613pio_latency=100000 2614platform=system.realview
	2615power_model=Null
2294system=system 2295terminal=system.terminal 2296pio=system.iobus.master[0] 2297 2298[system.realview.uart1_fake] 2299type=AmbaFake 2300amba_id=0 2301clk_domain=system.clk_domain	2616system=system 2617terminal=system.terminal 2618pio=system.iobus.master[0] 2619 2620[system.realview.uart1_fake] 2621type=AmbaFake 2622amba_id=0 2623clk_domain=system.clk_domain
	2624default_p_state=UNDEFINED
2302eventq_index=0 2303ignore_access=false	2625eventq_index=0 2626ignore_access=false
	2627p_state_clk_gate_bins=20 2628p_state_clk_gate_max=1000000000000 2629p_state_clk_gate_min=1000
2304pio_addr=470417408 2305pio_latency=100000	2630pio_addr=470417408 2631pio_latency=100000
	2632power_model=Null
2306system=system 2307pio=system.iobus.master[13] 2308 2309[system.realview.uart2_fake] 2310type=AmbaFake 2311amba_id=0 2312clk_domain=system.clk_domain	2633system=system 2634pio=system.iobus.master[13] 2635 2636[system.realview.uart2_fake] 2637type=AmbaFake 2638amba_id=0 2639clk_domain=system.clk_domain
	2640default_p_state=UNDEFINED
2313eventq_index=0 2314ignore_access=false	2641eventq_index=0 2642ignore_access=false
	2643p_state_clk_gate_bins=20 2644p_state_clk_gate_max=1000000000000 2645p_state_clk_gate_min=1000
2315pio_addr=470482944 2316pio_latency=100000	2646pio_addr=470482944 2647pio_latency=100000
	2648power_model=Null
2317system=system 2318pio=system.iobus.master[14] 2319 2320[system.realview.uart3_fake] 2321type=AmbaFake 2322amba_id=0 2323clk_domain=system.clk_domain	2649system=system 2650pio=system.iobus.master[14] 2651 2652[system.realview.uart3_fake] 2653type=AmbaFake 2654amba_id=0 2655clk_domain=system.clk_domain
	2656default_p_state=UNDEFINED
2324eventq_index=0 2325ignore_access=false	2657eventq_index=0 2658ignore_access=false
	2659p_state_clk_gate_bins=20 2660p_state_clk_gate_max=1000000000000 2661p_state_clk_gate_min=1000
2326pio_addr=470548480 2327pio_latency=100000	2662pio_addr=470548480 2663pio_latency=100000
	2664power_model=Null
2328system=system 2329pio=system.iobus.master[15] 2330 2331[system.realview.usb_fake] 2332type=IsaFake 2333clk_domain=system.clk_domain	2665system=system 2666pio=system.iobus.master[15] 2667 2668[system.realview.usb_fake] 2669type=IsaFake 2670clk_domain=system.clk_domain
	2671default_p_state=UNDEFINED
2334eventq_index=0 2335fake_mem=false	2672eventq_index=0 2673fake_mem=false
	2674p_state_clk_gate_bins=20 2675p_state_clk_gate_max=1000000000000 2676p_state_clk_gate_min=1000
2336pio_addr=452984832 2337pio_latency=100000 2338pio_size=131071	2677pio_addr=452984832 2678pio_latency=100000 2679pio_size=131071
	2680power_model=Null
2339ret_bad_addr=false 2340ret_data16=65535 2341ret_data32=4294967295 2342ret_data64=18446744073709551615 2343ret_data8=255 2344system=system 2345update_data=false 2346warn_access= 2347pio=system.iobus.master[20] 2348 2349[system.realview.vgic] 2350type=VGic 2351clk_domain=system.clk_domain	2681ret_bad_addr=false 2682ret_data16=65535 2683ret_data32=4294967295 2684ret_data64=18446744073709551615 2685ret_data8=255 2686system=system 2687update_data=false 2688warn_access= 2689pio=system.iobus.master[20] 2690 2691[system.realview.vgic] 2692type=VGic 2693clk_domain=system.clk_domain
	2694default_p_state=UNDEFINED
2352eventq_index=0 2353gic=system.realview.gic 2354hv_addr=738213888	2695eventq_index=0 2696gic=system.realview.gic 2697hv_addr=738213888
	2698p_state_clk_gate_bins=20 2699p_state_clk_gate_max=1000000000000 2700p_state_clk_gate_min=1000
2355pio_delay=10000 2356platform=system.realview	2701pio_delay=10000 2702platform=system.realview
	2703power_model=Null
2357ppint=25 2358system=system 2359vcpu_addr=738222080 2360pio=system.membus.master[3] 2361 2362[system.realview.vram] 2363type=SimpleMemory 2364bandwidth=73.000000 2365clk_domain=system.clk_domain 2366conf_table_reported=false	2704ppint=25 2705system=system 2706vcpu_addr=738222080 2707pio=system.membus.master[3] 2708 2709[system.realview.vram] 2710type=SimpleMemory 2711bandwidth=73.000000 2712clk_domain=system.clk_domain 2713conf_table_reported=false
	2714default_p_state=UNDEFINED
2367eventq_index=0 2368in_addr_map=true 2369latency=30000 2370latency_var=0 2371null=false	2715eventq_index=0 2716in_addr_map=true 2717latency=30000 2718latency_var=0 2719null=false
	2720p_state_clk_gate_bins=20 2721p_state_clk_gate_max=1000000000000 2722p_state_clk_gate_min=1000 2723power_model=Null
2372range=402653184:436207615 2373port=system.iobus.master[11] 2374 2375[system.realview.watchdog_fake] 2376type=AmbaFake 2377amba_id=0 2378clk_domain=system.clk_domain	2724range=402653184:436207615 2725port=system.iobus.master[11] 2726 2727[system.realview.watchdog_fake] 2728type=AmbaFake 2729amba_id=0 2730clk_domain=system.clk_domain
	2731default_p_state=UNDEFINED
2379eventq_index=0 2380ignore_access=false	2732eventq_index=0 2733ignore_access=false
	2734p_state_clk_gate_bins=20 2735p_state_clk_gate_max=1000000000000 2736p_state_clk_gate_min=1000
2381pio_addr=470745088 2382pio_latency=100000	2737pio_addr=470745088 2738pio_latency=100000
	2739power_model=Null
2383system=system 2384pio=system.iobus.master[17] 2385 2386[system.terminal] 2387type=Terminal 2388eventq_index=0 2389intr_control=system.intrctrl 2390number=0 2391output=true 2392port=3456 2393 2394[system.toL2Bus] 2395type=CoherentXBar 2396children=snoop_filter 2397clk_domain=system.cpu_clk_domain	2740system=system 2741pio=system.iobus.master[17] 2742 2743[system.terminal] 2744type=Terminal 2745eventq_index=0 2746intr_control=system.intrctrl 2747number=0 2748output=true 2749port=3456 2750 2751[system.toL2Bus] 2752type=CoherentXBar 2753children=snoop_filter 2754clk_domain=system.cpu_clk_domain
	2755default_p_state=UNDEFINED
2398eventq_index=0 2399forward_latency=0 2400frontend_latency=1	2756eventq_index=0 2757forward_latency=0 2758frontend_latency=1
	2759p_state_clk_gate_bins=20 2760p_state_clk_gate_max=1000000000000 2761p_state_clk_gate_min=1000 2762point_of_coherency=false 2763power_model=Null
2401response_latency=1 2402snoop_filter=system.toL2Bus.snoop_filter 2403snoop_response_latency=1 2404system=system 2405use_default_range=false 2406width=32 2407master=system.l2c.cpu_side 2408slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side 2409 2410[system.toL2Bus.snoop_filter] 2411type=SnoopFilter 2412eventq_index=0 2413lookup_latency=0 2414max_capacity=8388608 2415system=system 2416 2417[system.vncserver] 2418type=VncServer 2419eventq_index=0 2420frame_capture=false 2421number=0 2422port=5900 2423 2424[system.voltage_domain] 2425type=VoltageDomain 2426eventq_index=0 2427voltage=1.000000 2428	2764response_latency=1 2765snoop_filter=system.toL2Bus.snoop_filter 2766snoop_response_latency=1 2767system=system 2768use_default_range=false 2769width=32 2770master=system.l2c.cpu_side 2771slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side 2772 2773[system.toL2Bus.snoop_filter] 2774type=SnoopFilter 2775eventq_index=0 2776lookup_latency=0 2777max_capacity=8388608 2778system=system 2779 2780[system.vncserver] 2781type=VncServer 2782eventq_index=0 2783frame_capture=false 2784number=0 2785port=5900 2786 2787[system.voltage_domain] 2788type=VoltageDomain 2789eventq_index=0 2790voltage=1.000000 2791