| config.ini (11680:b4d943429dc6) | config.ini (11957:90bb43dfc028) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain 14atags_addr=134217728 | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain 14atags_addr=134217728 |
| 15boot_loader=/arm/projectscratch/randd/systems/dist/binaries/boot_emm.arm | 15boot_loader=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/boot_emm.arm |
| 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19default_p_state=UNDEFINED | 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19default_p_state=UNDEFINED |
| 20dtb_filename=/arm/projectscratch/randd/systems/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb | 20dtb_filename=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb |
| 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24exit_on_work_items=false 25flags_addr=469827632 26gic_cpu_addr=738205696 27have_large_asid_64=false 28have_lpae=true 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 | 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24exit_on_work_items=false 25flags_addr=469827632 26gic_cpu_addr=738205696 27have_large_asid_64=false 28have_lpae=true 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 |
| 33kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5 | 33kernel=/usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5 |
| 34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM 38mem_mode=timing 39mem_ranges=2147483648:2415919103:0:0:0:0 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16 45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000 48panic_on_oops=true 49panic_on_panic=true 50phys_addr_range_64=40 51power_model=Null | 34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM 38mem_mode=timing 39mem_ranges=2147483648:2415919103:0:0:0:0 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16 45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000 48panic_on_oops=true 49panic_on_panic=true 50phys_addr_range_64=40 51power_model=Null |
| 52readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh | 52readfile=/usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../halt.sh |
| 53reset_addr_64=0 54symbolfile= 55thermal_components= 56thermal_model=Null 57work_begin_ckpt_count=0 58work_begin_cpu_id_exit=-1 59work_begin_exit_count=0 60work_cpus_ckpt_count=0 --- 33 unchanged lines hidden (view full) --- 94eventq_index=0 95image_file= 96read_only=false 97table_size=65536 98 99[system.cf0.image.child] 100type=RawDiskImage 101eventq_index=0 | 53reset_addr_64=0 54symbolfile= 55thermal_components= 56thermal_model=Null 57work_begin_ckpt_count=0 58work_begin_cpu_id_exit=-1 59work_begin_exit_count=0 60work_cpus_ckpt_count=0 --- 33 unchanged lines hidden (view full) --- 94eventq_index=0 95image_file= 96read_only=false 97table_size=65536 98 99[system.cf0.image.child] 100type=RawDiskImage 101eventq_index=0 |
| 102image_file=/arm/projectscratch/randd/systems/dist/disks/linux-aarch32-ael.img | 102image_file=/usr/local/google/home/gabeblack/gem5/dist/m5/system/disks/linux-aarch32-ael.img |
| 103read_only=true 104 105[system.clk_domain] 106type=SrcClockDomain 107clock=1000 108domain_id=-1 109eventq_index=0 110init_perf_level=0 --- 6 unchanged lines hidden (view full) --- 117LQEntries=16 118LSQCheckLoads=true 119LSQDepCheckShift=0 120SQEntries=16 121SSITSize=1024 122activity=0 123backComSize=5 124branchPred=system.cpu.branchPred | 103read_only=true 104 105[system.clk_domain] 106type=SrcClockDomain 107clock=1000 108domain_id=-1 109eventq_index=0 110init_perf_level=0 --- 6 unchanged lines hidden (view full) --- 117LQEntries=16 118LSQCheckLoads=true 119LSQDepCheckShift=0 120SQEntries=16 121SSITSize=1024 122activity=0 123backComSize=5 124branchPred=system.cpu.branchPred |
| 125cachePorts=200 | 125cacheStorePorts=200 |
| 126checker=Null 127clk_domain=system.cpu_clk_domain 128commitToDecodeDelay=1 129commitToFetchDelay=1 130commitToIEWDelay=1 131commitToRenameDelay=1 132commitWidth=8 133cpu_id=0 --- 59 unchanged lines hidden (view full) --- 193smtLSQThreshold=100 194smtNumFetchingThreads=1 195smtROBPolicy=Partitioned 196smtROBThreshold=100 197socket_id=0 198squashWidth=8 199store_set_clear_period=250000 200switched_out=false | 126checker=Null 127clk_domain=system.cpu_clk_domain 128commitToDecodeDelay=1 129commitToFetchDelay=1 130commitToIEWDelay=1 131commitToRenameDelay=1 132commitWidth=8 133cpu_id=0 --- 59 unchanged lines hidden (view full) --- 193smtLSQThreshold=100 194smtNumFetchingThreads=1 195smtROBPolicy=Partitioned 196smtROBThreshold=100 197socket_id=0 198squashWidth=8 199store_set_clear_period=250000 200switched_out=false |
| 201syscallRetryLatency=10000 |
|
| 201system=system 202tracer=system.cpu.tracer 203trapLatency=13 204wbWidth=8 205workload= 206dcache_port=system.cpu.dcache.cpu_side 207icache_port=system.cpu.icache.cpu_side 208 --- 19 unchanged lines hidden (view full) --- 228 229[system.cpu.dcache] 230type=Cache 231children=tags 232addr_ranges=0:18446744073709551615:0:0:0:0 233assoc=4 234clk_domain=system.cpu_clk_domain 235clusivity=mostly_incl | 202system=system 203tracer=system.cpu.tracer 204trapLatency=13 205wbWidth=8 206workload= 207dcache_port=system.cpu.dcache.cpu_side 208icache_port=system.cpu.icache.cpu_side 209 --- 19 unchanged lines hidden (view full) --- 229 230[system.cpu.dcache] 231type=Cache 232children=tags 233addr_ranges=0:18446744073709551615:0:0:0:0 234assoc=4 235clk_domain=system.cpu_clk_domain 236clusivity=mostly_incl |
| 237data_latency=2 |
|
| 236default_p_state=UNDEFINED 237demand_mshr_reserve=1 238eventq_index=0 | 238default_p_state=UNDEFINED 239demand_mshr_reserve=1 240eventq_index=0 |
| 239hit_latency=2 | |
| 240is_read_only=false 241max_miss_count=0 242mshrs=4 243p_state_clk_gate_bins=20 244p_state_clk_gate_max=1000000000000 245p_state_clk_gate_min=1000 246power_model=Null 247prefetch_on_access=false 248prefetcher=Null 249response_latency=2 250sequential_access=false 251size=32768 252system=system | 241is_read_only=false 242max_miss_count=0 243mshrs=4 244p_state_clk_gate_bins=20 245p_state_clk_gate_max=1000000000000 246p_state_clk_gate_min=1000 247power_model=Null 248prefetch_on_access=false 249prefetcher=Null 250response_latency=2 251sequential_access=false 252size=32768 253system=system |
| 254tag_latency=2 |
|
| 253tags=system.cpu.dcache.tags 254tgts_per_mshr=20 255write_buffers=8 256writeback_clean=false 257cpu_side=system.cpu.dcache_port 258mem_side=system.cpu.toL2Bus.slave[1] 259 260[system.cpu.dcache.tags] 261type=LRU 262assoc=4 263block_size=64 264clk_domain=system.cpu_clk_domain | 255tags=system.cpu.dcache.tags 256tgts_per_mshr=20 257write_buffers=8 258writeback_clean=false 259cpu_side=system.cpu.dcache_port 260mem_side=system.cpu.toL2Bus.slave[1] 261 262[system.cpu.dcache.tags] 263type=LRU 264assoc=4 265block_size=64 266clk_domain=system.cpu_clk_domain |
| 267data_latency=2 |
|
| 265default_p_state=UNDEFINED 266eventq_index=0 | 268default_p_state=UNDEFINED 269eventq_index=0 |
| 267hit_latency=2 | |
| 268p_state_clk_gate_bins=20 269p_state_clk_gate_max=1000000000000 270p_state_clk_gate_min=1000 271power_model=Null 272sequential_access=false 273size=32768 | 270p_state_clk_gate_bins=20 271p_state_clk_gate_max=1000000000000 272p_state_clk_gate_min=1000 273power_model=Null 274sequential_access=false 275size=32768 |
| 276tag_latency=2 |
|
| 274 275[system.cpu.dstage2_mmu] 276type=ArmStage2MMU 277children=stage2_tlb 278eventq_index=0 279stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 280sys=system 281tlb=system.cpu.dtb --- 86 unchanged lines hidden (view full) --- 368type=OpDesc 369eventq_index=0 370opClass=IprAccess 371opLat=3 372pipelined=true 373 374[system.cpu.fuPool.FUList2] 375type=FUDesc | 277 278[system.cpu.dstage2_mmu] 279type=ArmStage2MMU 280children=stage2_tlb 281eventq_index=0 282stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 283sys=system 284tlb=system.cpu.dtb --- 86 unchanged lines hidden (view full) --- 371type=OpDesc 372eventq_index=0 373opClass=IprAccess 374opLat=3 375pipelined=true 376 377[system.cpu.fuPool.FUList2] 378type=FUDesc |
| 376children=opList | 379children=opList0 opList1 |
| 377count=1 378eventq_index=0 | 380count=1 381eventq_index=0 |
| 379opList=system.cpu.fuPool.FUList2.opList | 382opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 |
| 380 | 383 |
| 381[system.cpu.fuPool.FUList2.opList] | 384[system.cpu.fuPool.FUList2.opList0] |
| 382type=OpDesc 383eventq_index=0 384opClass=MemRead 385opLat=2 386pipelined=true 387 | 385type=OpDesc 386eventq_index=0 387opClass=MemRead 388opLat=2 389pipelined=true 390 |
| 391[system.cpu.fuPool.FUList2.opList1] 392type=OpDesc 393eventq_index=0 394opClass=FloatMemRead 395opLat=2 396pipelined=true 397 |
|
| 388[system.cpu.fuPool.FUList3] 389type=FUDesc | 398[system.cpu.fuPool.FUList3] 399type=FUDesc |
| 390children=opList | 400children=opList0 opList1 |
| 391count=1 392eventq_index=0 | 401count=1 402eventq_index=0 |
| 393opList=system.cpu.fuPool.FUList3.opList | 403opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 |
| 394 | 404 |
| 395[system.cpu.fuPool.FUList3.opList] | 405[system.cpu.fuPool.FUList3.opList0] |
| 396type=OpDesc 397eventq_index=0 398opClass=MemWrite 399opLat=2 400pipelined=true 401 | 406type=OpDesc 407eventq_index=0 408opClass=MemWrite 409opLat=2 410pipelined=true 411 |
| 412[system.cpu.fuPool.FUList3.opList1] 413type=OpDesc 414eventq_index=0 415opClass=FloatMemWrite 416opLat=2 417pipelined=true 418 |
|
| 402[system.cpu.fuPool.FUList4] 403type=FUDesc | 419[system.cpu.fuPool.FUList4] 420type=FUDesc |
| 404children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 | 421children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25 opList26 opList27 |
| 405count=2 406eventq_index=0 | 422count=2 423eventq_index=0 |
| 407opList=system.cpu.fuPool.FUList4.opList00 system.cpu.fuPool.FUList4.opList01 system.cpu.fuPool.FUList4.opList02 system.cpu.fuPool.FUList4.opList03 system.cpu.fuPool.FUList4.opList04 system.cpu.fuPool.FUList4.opList05 system.cpu.fuPool.FUList4.opList06 system.cpu.fuPool.FUList4.opList07 system.cpu.fuPool.FUList4.opList08 system.cpu.fuPool.FUList4.opList09 system.cpu.fuPool.FUList4.opList10 system.cpu.fuPool.FUList4.opList11 system.cpu.fuPool.FUList4.opList12 system.cpu.fuPool.FUList4.opList13 system.cpu.fuPool.FUList4.opList14 system.cpu.fuPool.FUList4.opList15 system.cpu.fuPool.FUList4.opList16 system.cpu.fuPool.FUList4.opList17 system.cpu.fuPool.FUList4.opList18 system.cpu.fuPool.FUList4.opList19 system.cpu.fuPool.FUList4.opList20 system.cpu.fuPool.FUList4.opList21 system.cpu.fuPool.FUList4.opList22 system.cpu.fuPool.FUList4.opList23 system.cpu.fuPool.FUList4.opList24 system.cpu.fuPool.FUList4.opList25 | 424opList=system.cpu.fuPool.FUList4.opList00 system.cpu.fuPool.FUList4.opList01 system.cpu.fuPool.FUList4.opList02 system.cpu.fuPool.FUList4.opList03 system.cpu.fuPool.FUList4.opList04 system.cpu.fuPool.FUList4.opList05 system.cpu.fuPool.FUList4.opList06 system.cpu.fuPool.FUList4.opList07 system.cpu.fuPool.FUList4.opList08 system.cpu.fuPool.FUList4.opList09 system.cpu.fuPool.FUList4.opList10 system.cpu.fuPool.FUList4.opList11 system.cpu.fuPool.FUList4.opList12 system.cpu.fuPool.FUList4.opList13 system.cpu.fuPool.FUList4.opList14 system.cpu.fuPool.FUList4.opList15 system.cpu.fuPool.FUList4.opList16 system.cpu.fuPool.FUList4.opList17 system.cpu.fuPool.FUList4.opList18 system.cpu.fuPool.FUList4.opList19 system.cpu.fuPool.FUList4.opList20 system.cpu.fuPool.FUList4.opList21 system.cpu.fuPool.FUList4.opList22 system.cpu.fuPool.FUList4.opList23 system.cpu.fuPool.FUList4.opList24 system.cpu.fuPool.FUList4.opList25 system.cpu.fuPool.FUList4.opList26 system.cpu.fuPool.FUList4.opList27 |
| 408 409[system.cpu.fuPool.FUList4.opList00] 410type=OpDesc 411eventq_index=0 412opClass=SimdAdd 413opLat=4 414pipelined=true 415 --- 115 unchanged lines hidden (view full) --- 531opClass=SimdFloatMult 532opLat=3 533pipelined=true 534 535[system.cpu.fuPool.FUList4.opList18] 536type=OpDesc 537eventq_index=0 538opClass=SimdFloatMultAcc | 425 426[system.cpu.fuPool.FUList4.opList00] 427type=OpDesc 428eventq_index=0 429opClass=SimdAdd 430opLat=4 431pipelined=true 432 --- 115 unchanged lines hidden (view full) --- 548opClass=SimdFloatMult 549opLat=3 550pipelined=true 551 552[system.cpu.fuPool.FUList4.opList18] 553type=OpDesc 554eventq_index=0 555opClass=SimdFloatMultAcc |
| 539opLat=1 | 556opLat=5 |
| 540pipelined=true 541 542[system.cpu.fuPool.FUList4.opList19] 543type=OpDesc 544eventq_index=0 545opClass=SimdFloatSqrt 546opLat=9 547pipelined=true --- 35 unchanged lines hidden (view full) --- 583 584[system.cpu.fuPool.FUList4.opList25] 585type=OpDesc 586eventq_index=0 587opClass=FloatMult 588opLat=4 589pipelined=true 590 | 557pipelined=true 558 559[system.cpu.fuPool.FUList4.opList19] 560type=OpDesc 561eventq_index=0 562opClass=SimdFloatSqrt 563opLat=9 564pipelined=true --- 35 unchanged lines hidden (view full) --- 600 601[system.cpu.fuPool.FUList4.opList25] 602type=OpDesc 603eventq_index=0 604opClass=FloatMult 605opLat=4 606pipelined=true 607 |
| 608[system.cpu.fuPool.FUList4.opList26] 609type=OpDesc 610eventq_index=0 611opClass=FloatMultAcc 612opLat=5 613pipelined=true 614 615[system.cpu.fuPool.FUList4.opList27] 616type=OpDesc 617eventq_index=0 618opClass=FloatMisc 619opLat=3 620pipelined=true 621 |
|
| 591[system.cpu.icache] 592type=Cache 593children=tags 594addr_ranges=0:18446744073709551615:0:0:0:0 595assoc=1 596clk_domain=system.cpu_clk_domain 597clusivity=mostly_incl | 622[system.cpu.icache] 623type=Cache 624children=tags 625addr_ranges=0:18446744073709551615:0:0:0:0 626assoc=1 627clk_domain=system.cpu_clk_domain 628clusivity=mostly_incl |
| 629data_latency=2 |
|
| 598default_p_state=UNDEFINED 599demand_mshr_reserve=1 600eventq_index=0 | 630default_p_state=UNDEFINED 631demand_mshr_reserve=1 632eventq_index=0 |
| 601hit_latency=2 | |
| 602is_read_only=true 603max_miss_count=0 604mshrs=4 605p_state_clk_gate_bins=20 606p_state_clk_gate_max=1000000000000 607p_state_clk_gate_min=1000 608power_model=Null 609prefetch_on_access=false 610prefetcher=Null 611response_latency=2 612sequential_access=false 613size=32768 614system=system | 633is_read_only=true 634max_miss_count=0 635mshrs=4 636p_state_clk_gate_bins=20 637p_state_clk_gate_max=1000000000000 638p_state_clk_gate_min=1000 639power_model=Null 640prefetch_on_access=false 641prefetcher=Null 642response_latency=2 643sequential_access=false 644size=32768 645system=system |
| 646tag_latency=2 |
|
| 615tags=system.cpu.icache.tags 616tgts_per_mshr=20 617write_buffers=8 618writeback_clean=true 619cpu_side=system.cpu.icache_port 620mem_side=system.cpu.toL2Bus.slave[0] 621 622[system.cpu.icache.tags] 623type=LRU 624assoc=1 625block_size=64 626clk_domain=system.cpu_clk_domain | 647tags=system.cpu.icache.tags 648tgts_per_mshr=20 649write_buffers=8 650writeback_clean=true 651cpu_side=system.cpu.icache_port 652mem_side=system.cpu.toL2Bus.slave[0] 653 654[system.cpu.icache.tags] 655type=LRU 656assoc=1 657block_size=64 658clk_domain=system.cpu_clk_domain |
| 659data_latency=2 |
|
| 627default_p_state=UNDEFINED 628eventq_index=0 | 660default_p_state=UNDEFINED 661eventq_index=0 |
| 629hit_latency=2 | |
| 630p_state_clk_gate_bins=20 631p_state_clk_gate_max=1000000000000 632p_state_clk_gate_min=1000 633power_model=Null 634sequential_access=false 635size=32768 | 662p_state_clk_gate_bins=20 663p_state_clk_gate_max=1000000000000 664p_state_clk_gate_min=1000 665power_model=Null 666sequential_access=false 667size=32768 |
| 668tag_latency=2 |
|
| 636 637[system.cpu.interrupts] 638type=ArmInterrupts 639eventq_index=0 640 641[system.cpu.isa] 642type=ArmISA 643decoderFlavour=Generic 644eventq_index=0 645fpsid=1090793632 646id_aa64afr0_el1=0 647id_aa64afr1_el1=0 648id_aa64dfr0_el1=1052678 649id_aa64dfr1_el1=0 650id_aa64isar0_el1=0 651id_aa64isar1_el1=0 652id_aa64mmfr0_el1=15728642 653id_aa64mmfr1_el1=0 | 669 670[system.cpu.interrupts] 671type=ArmInterrupts 672eventq_index=0 673 674[system.cpu.isa] 675type=ArmISA 676decoderFlavour=Generic 677eventq_index=0 678fpsid=1090793632 679id_aa64afr0_el1=0 680id_aa64afr1_el1=0 681id_aa64dfr0_el1=1052678 682id_aa64dfr1_el1=0 683id_aa64isar0_el1=0 684id_aa64isar1_el1=0 685id_aa64mmfr0_el1=15728642 686id_aa64mmfr1_el1=0 |
| 654id_aa64pfr0_el1=34 655id_aa64pfr1_el1=0 | |
| 656id_isar0=34607377 657id_isar1=34677009 658id_isar2=555950401 659id_isar3=17899825 660id_isar4=268501314 661id_isar5=0 662id_mmfr0=270536963 663id_mmfr1=0 664id_mmfr2=19070976 665id_mmfr3=34611729 | 687id_isar0=34607377 688id_isar1=34677009 689id_isar2=555950401 690id_isar3=17899825 691id_isar4=268501314 692id_isar5=0 693id_mmfr0=270536963 694id_mmfr1=0 695id_mmfr2=19070976 696id_mmfr3=34611729 |
| 666id_pfr0=49 667id_pfr1=4113 | |
| 668midr=1091551472 669pmu=Null 670system=system 671 672[system.cpu.istage2_mmu] 673type=ArmStage2MMU 674children=stage2_tlb 675eventq_index=0 --- 46 unchanged lines hidden (view full) --- 722 723[system.cpu.l2cache] 724type=Cache 725children=tags 726addr_ranges=0:18446744073709551615:0:0:0:0 727assoc=8 728clk_domain=system.cpu_clk_domain 729clusivity=mostly_incl | 697midr=1091551472 698pmu=Null 699system=system 700 701[system.cpu.istage2_mmu] 702type=ArmStage2MMU 703children=stage2_tlb 704eventq_index=0 --- 46 unchanged lines hidden (view full) --- 751 752[system.cpu.l2cache] 753type=Cache 754children=tags 755addr_ranges=0:18446744073709551615:0:0:0:0 756assoc=8 757clk_domain=system.cpu_clk_domain 758clusivity=mostly_incl |
| 759data_latency=20 |
|
| 730default_p_state=UNDEFINED 731demand_mshr_reserve=1 732eventq_index=0 | 760default_p_state=UNDEFINED 761demand_mshr_reserve=1 762eventq_index=0 |
| 733hit_latency=20 | |
| 734is_read_only=false 735max_miss_count=0 736mshrs=20 737p_state_clk_gate_bins=20 738p_state_clk_gate_max=1000000000000 739p_state_clk_gate_min=1000 740power_model=Null 741prefetch_on_access=false 742prefetcher=Null 743response_latency=20 744sequential_access=false 745size=4194304 746system=system | 763is_read_only=false 764max_miss_count=0 765mshrs=20 766p_state_clk_gate_bins=20 767p_state_clk_gate_max=1000000000000 768p_state_clk_gate_min=1000 769power_model=Null 770prefetch_on_access=false 771prefetcher=Null 772response_latency=20 773sequential_access=false 774size=4194304 775system=system |
| 776tag_latency=20 |
|
| 747tags=system.cpu.l2cache.tags 748tgts_per_mshr=12 749write_buffers=8 750writeback_clean=false 751cpu_side=system.cpu.toL2Bus.master[0] 752mem_side=system.membus.slave[2] 753 754[system.cpu.l2cache.tags] 755type=LRU 756assoc=8 757block_size=64 758clk_domain=system.cpu_clk_domain | 777tags=system.cpu.l2cache.tags 778tgts_per_mshr=12 779write_buffers=8 780writeback_clean=false 781cpu_side=system.cpu.toL2Bus.master[0] 782mem_side=system.membus.slave[2] 783 784[system.cpu.l2cache.tags] 785type=LRU 786assoc=8 787block_size=64 788clk_domain=system.cpu_clk_domain |
| 789data_latency=20 |
|
| 759default_p_state=UNDEFINED 760eventq_index=0 | 790default_p_state=UNDEFINED 791eventq_index=0 |
| 761hit_latency=20 | |
| 762p_state_clk_gate_bins=20 763p_state_clk_gate_max=1000000000000 764p_state_clk_gate_min=1000 765power_model=Null 766sequential_access=false 767size=4194304 | 792p_state_clk_gate_bins=20 793p_state_clk_gate_max=1000000000000 794p_state_clk_gate_min=1000 795power_model=Null 796sequential_access=false 797size=4194304 |
| 798tag_latency=20 |
|
| 768 769[system.cpu.toL2Bus] 770type=CoherentXBar 771children=snoop_filter 772clk_domain=system.cpu_clk_domain 773default_p_state=UNDEFINED 774eventq_index=0 775forward_latency=0 --- 63 unchanged lines hidden (view full) --- 839 840[system.iocache] 841type=Cache 842children=tags 843addr_ranges=2147483648:2415919103:0:0:0:0 844assoc=8 845clk_domain=system.clk_domain 846clusivity=mostly_incl | 799 800[system.cpu.toL2Bus] 801type=CoherentXBar 802children=snoop_filter 803clk_domain=system.cpu_clk_domain 804default_p_state=UNDEFINED 805eventq_index=0 806forward_latency=0 --- 63 unchanged lines hidden (view full) --- 870 871[system.iocache] 872type=Cache 873children=tags 874addr_ranges=2147483648:2415919103:0:0:0:0 875assoc=8 876clk_domain=system.clk_domain 877clusivity=mostly_incl |
| 878data_latency=50 |
|
| 847default_p_state=UNDEFINED 848demand_mshr_reserve=1 849eventq_index=0 | 879default_p_state=UNDEFINED 880demand_mshr_reserve=1 881eventq_index=0 |
| 850hit_latency=50 | |
| 851is_read_only=false 852max_miss_count=0 853mshrs=20 854p_state_clk_gate_bins=20 855p_state_clk_gate_max=1000000000000 856p_state_clk_gate_min=1000 857power_model=Null 858prefetch_on_access=false 859prefetcher=Null 860response_latency=50 861sequential_access=false 862size=1024 863system=system | 882is_read_only=false 883max_miss_count=0 884mshrs=20 885p_state_clk_gate_bins=20 886p_state_clk_gate_max=1000000000000 887p_state_clk_gate_min=1000 888power_model=Null 889prefetch_on_access=false 890prefetcher=Null 891response_latency=50 892sequential_access=false 893size=1024 894system=system |
| 895tag_latency=50 |
|
| 864tags=system.iocache.tags 865tgts_per_mshr=12 866write_buffers=8 867writeback_clean=false 868cpu_side=system.iobus.master[25] 869mem_side=system.membus.slave[3] 870 871[system.iocache.tags] 872type=LRU 873assoc=8 874block_size=64 875clk_domain=system.clk_domain | 896tags=system.iocache.tags 897tgts_per_mshr=12 898write_buffers=8 899writeback_clean=false 900cpu_side=system.iobus.master[25] 901mem_side=system.membus.slave[3] 902 903[system.iocache.tags] 904type=LRU 905assoc=8 906block_size=64 907clk_domain=system.clk_domain |
| 908data_latency=50 |
|
| 876default_p_state=UNDEFINED 877eventq_index=0 | 909default_p_state=UNDEFINED 910eventq_index=0 |
| 878hit_latency=50 | |
| 879p_state_clk_gate_bins=20 880p_state_clk_gate_max=1000000000000 881p_state_clk_gate_min=1000 882power_model=Null 883sequential_access=false 884size=1024 | 911p_state_clk_gate_bins=20 912p_state_clk_gate_max=1000000000000 913p_state_clk_gate_min=1000 914power_model=Null 915sequential_access=false 916size=1024 |
| 917tag_latency=50 |
|
| 885 886[system.membus] 887type=CoherentXBar 888children=badaddr_responder snoop_filter 889clk_domain=system.clk_domain 890default_p_state=UNDEFINED 891eventq_index=0 892forward_latency=4 --- 1078 unchanged lines hidden --- | 918 919[system.membus] 920type=CoherentXBar 921children=badaddr_responder snoop_filter 922clk_domain=system.clk_domain 923default_p_state=UNDEFINED 924eventq_index=0 925forward_latency=4 --- 1078 unchanged lines hidden --- |