Cross Reference: /gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini

Deleted Added

sdiff udiff text old ( 8983:8800b05e1cb3 ) new ( 9055:38f1926fb599 )

full compact

config.ini (8983:8800b05e1cb3)	config.ini (9055:38f1926fb599)
1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxArmSystem 11children=bridge cf0 cpu intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver 12atags_addr=256 13boot_loader=/dist/m5/system/binaries/boot.arm 14boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1	1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxArmSystem 11children=bridge cf0 cpu intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver 12atags_addr=256 13boot_loader=/dist/m5/system/binaries/boot.arm 14boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
	15early_kernel_symbols=false
15flags_addr=268435504 16gic_cpu_addr=520093952 17init_param=0 18kernel=/dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 19load_addr_mask=268435455 20machine_type=RealView_PBX 21mem_mode=timing	16flags_addr=268435504 17gic_cpu_addr=520093952 18init_param=0 19kernel=/dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 20load_addr_mask=268435455 21machine_type=RealView_PBX 22mem_mode=timing
22memories=system.physmem system.realview.nvmem	23memories=system.realview.nvmem system.physmem
23midr_regval=890224640 24num_work_ids=16 25readfile=tests/halt.sh 26symbolfile= 27work_begin_ckpt_count=0 28work_begin_cpu_id_exit=-1 29work_begin_exit_count=0 30work_cpus_ckpt_count=0 31work_end_ckpt_count=0 32work_end_exit_count=0 33work_item_id=-1 34system_port=system.membus.slave[0] 35 36[system.bridge] 37type=Bridge 38delay=50000 39nack_delay=4000 40ranges=268435456:520093695 1073741824:1610612735 41req_size=16 42resp_size=16 43write_ack=false 44master=system.iobus.slave[0] 45slave=system.membus.master[0] 46 47[system.cf0] 48type=IdeDisk 49children=image 50delay=1000000 51driveID=master 52image=system.cf0.image 53 54[system.cf0.image] 55type=CowDiskImage 56children=child 57child=system.cf0.image.child 58image_file= 59read_only=false 60table_size=65536 61 62[system.cf0.image.child] 63type=RawDiskImage 64image_file=/dist/m5/system/disks/linux-arm-ael.img 65read_only=true 66 67[system.cpu] 68type=DerivO3CPU 69children=dcache dtb fuPool icache interrupts itb tracer 70BTBEntries=4096 71BTBTagSize=16 72LFSTSize=1024 73LQEntries=32 74LSQCheckLoads=true 75LSQDepCheckShift=4 76RASSize=16 77SQEntries=32 78SSITSize=1024 79activity=0 80backComSize=5 81cachePorts=200 82checker=Null 83choiceCtrBits=2 84choicePredictorSize=8192 85clock=500 86commitToDecodeDelay=1 87commitToFetchDelay=1 88commitToIEWDelay=1 89commitToRenameDelay=1 90commitWidth=8 91cpu_id=0 92decodeToFetchDelay=1 93decodeToRenameDelay=1 94decodeWidth=8 95defer_registration=false 96dispatchWidth=8 97do_checkpoint_insts=true 98do_quiesce=true 99do_statistics_insts=true 100dtb=system.cpu.dtb 101fetchToDecodeDelay=1 102fetchTrapLatency=1 103fetchWidth=8 104forwardComSize=5 105fuPool=system.cpu.fuPool 106function_trace=false 107function_trace_start=0 108globalCtrBits=2 109globalHistoryBits=13 110globalPredictorSize=8192 111iewToCommitDelay=1 112iewToDecodeDelay=1 113iewToFetchDelay=1 114iewToRenameDelay=1 115instShiftAmt=2 116interrupts=system.cpu.interrupts 117issueToExecuteDelay=1 118issueWidth=8 119itb=system.cpu.itb 120localCtrBits=2 121localHistoryBits=11 122localHistoryTableSize=2048 123localPredictorSize=2048 124max_insts_all_threads=0 125max_insts_any_thread=0 126max_loads_all_threads=0 127max_loads_any_thread=0 128needsTSO=false 129numIQEntries=64 130numPhysFloatRegs=256 131numPhysIntRegs=256 132numROBEntries=192 133numRobs=1 134numThreads=1 135phase=0 136predType=tournament 137profile=0 138progress_interval=0 139renameToDecodeDelay=1 140renameToFetchDelay=1 141renameToIEWDelay=2 142renameToROBDelay=1 143renameWidth=8 144smtCommitPolicy=RoundRobin 145smtFetchPolicy=SingleThread 146smtIQPolicy=Partitioned 147smtIQThreshold=100 148smtLSQPolicy=Partitioned 149smtLSQThreshold=100 150smtNumFetchingThreads=1 151smtROBPolicy=Partitioned 152smtROBThreshold=100 153squashWidth=8 154store_set_clear_period=250000 155system=system 156tracer=system.cpu.tracer 157trapLatency=13 158wbDepth=1 159wbWidth=8 160workload= 161dcache_port=system.cpu.dcache.cpu_side 162icache_port=system.cpu.icache.cpu_side 163 164[system.cpu.dcache] 165type=BaseCache 166addr_ranges=0:18446744073709551615 167assoc=4 168block_size=64 169forward_snoops=true 170hash_delay=1 171is_top_level=true 172latency=1000 173max_miss_count=0 174mshrs=4 175prefetch_on_access=false 176prefetcher=Null 177prioritizeRequests=false 178repl=Null 179size=32768 180subblock_size=0 181system=system 182tgts_per_mshr=20 183trace_addr=0 184two_queue=false 185write_buffers=8 186cpu_side=system.cpu.dcache_port 187mem_side=system.toL2Bus.slave[1] 188 189[system.cpu.dtb] 190type=ArmTLB 191children=walker 192size=64 193walker=system.cpu.dtb.walker 194 195[system.cpu.dtb.walker] 196type=ArmTableWalker 197max_backoff=100000 198min_backoff=0 199sys=system 200port=system.toL2Bus.slave[3] 201 202[system.cpu.fuPool] 203type=FUPool 204children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 205FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 206 207[system.cpu.fuPool.FUList0] 208type=FUDesc 209children=opList 210count=6 211opList=system.cpu.fuPool.FUList0.opList 212 213[system.cpu.fuPool.FUList0.opList] 214type=OpDesc 215issueLat=1 216opClass=IntAlu 217opLat=1 218 219[system.cpu.fuPool.FUList1] 220type=FUDesc 221children=opList0 opList1 222count=2 223opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 224 225[system.cpu.fuPool.FUList1.opList0] 226type=OpDesc 227issueLat=1 228opClass=IntMult 229opLat=3 230 231[system.cpu.fuPool.FUList1.opList1] 232type=OpDesc 233issueLat=19 234opClass=IntDiv 235opLat=20 236 237[system.cpu.fuPool.FUList2] 238type=FUDesc 239children=opList0 opList1 opList2 240count=4 241opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 242 243[system.cpu.fuPool.FUList2.opList0] 244type=OpDesc 245issueLat=1 246opClass=FloatAdd 247opLat=2 248 249[system.cpu.fuPool.FUList2.opList1] 250type=OpDesc 251issueLat=1 252opClass=FloatCmp 253opLat=2 254 255[system.cpu.fuPool.FUList2.opList2] 256type=OpDesc 257issueLat=1 258opClass=FloatCvt 259opLat=2 260 261[system.cpu.fuPool.FUList3] 262type=FUDesc 263children=opList0 opList1 opList2 264count=2 265opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 266 267[system.cpu.fuPool.FUList3.opList0] 268type=OpDesc 269issueLat=1 270opClass=FloatMult 271opLat=4 272 273[system.cpu.fuPool.FUList3.opList1] 274type=OpDesc 275issueLat=12 276opClass=FloatDiv 277opLat=12 278 279[system.cpu.fuPool.FUList3.opList2] 280type=OpDesc 281issueLat=24 282opClass=FloatSqrt 283opLat=24 284 285[system.cpu.fuPool.FUList4] 286type=FUDesc 287children=opList 288count=0 289opList=system.cpu.fuPool.FUList4.opList 290 291[system.cpu.fuPool.FUList4.opList] 292type=OpDesc 293issueLat=1 294opClass=MemRead 295opLat=1 296 297[system.cpu.fuPool.FUList5] 298type=FUDesc 299children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 300count=4 301opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 302 303[system.cpu.fuPool.FUList5.opList00] 304type=OpDesc 305issueLat=1 306opClass=SimdAdd 307opLat=1 308 309[system.cpu.fuPool.FUList5.opList01] 310type=OpDesc 311issueLat=1 312opClass=SimdAddAcc 313opLat=1 314 315[system.cpu.fuPool.FUList5.opList02] 316type=OpDesc 317issueLat=1 318opClass=SimdAlu 319opLat=1 320 321[system.cpu.fuPool.FUList5.opList03] 322type=OpDesc 323issueLat=1 324opClass=SimdCmp 325opLat=1 326 327[system.cpu.fuPool.FUList5.opList04] 328type=OpDesc 329issueLat=1 330opClass=SimdCvt 331opLat=1 332 333[system.cpu.fuPool.FUList5.opList05] 334type=OpDesc 335issueLat=1 336opClass=SimdMisc 337opLat=1 338 339[system.cpu.fuPool.FUList5.opList06] 340type=OpDesc 341issueLat=1 342opClass=SimdMult 343opLat=1 344 345[system.cpu.fuPool.FUList5.opList07] 346type=OpDesc 347issueLat=1 348opClass=SimdMultAcc 349opLat=1 350 351[system.cpu.fuPool.FUList5.opList08] 352type=OpDesc 353issueLat=1 354opClass=SimdShift 355opLat=1 356 357[system.cpu.fuPool.FUList5.opList09] 358type=OpDesc 359issueLat=1 360opClass=SimdShiftAcc 361opLat=1 362 363[system.cpu.fuPool.FUList5.opList10] 364type=OpDesc 365issueLat=1 366opClass=SimdSqrt 367opLat=1 368 369[system.cpu.fuPool.FUList5.opList11] 370type=OpDesc 371issueLat=1 372opClass=SimdFloatAdd 373opLat=1 374 375[system.cpu.fuPool.FUList5.opList12] 376type=OpDesc 377issueLat=1 378opClass=SimdFloatAlu 379opLat=1 380 381[system.cpu.fuPool.FUList5.opList13] 382type=OpDesc 383issueLat=1 384opClass=SimdFloatCmp 385opLat=1 386 387[system.cpu.fuPool.FUList5.opList14] 388type=OpDesc 389issueLat=1 390opClass=SimdFloatCvt 391opLat=1 392 393[system.cpu.fuPool.FUList5.opList15] 394type=OpDesc 395issueLat=1 396opClass=SimdFloatDiv 397opLat=1 398 399[system.cpu.fuPool.FUList5.opList16] 400type=OpDesc 401issueLat=1 402opClass=SimdFloatMisc 403opLat=1 404 405[system.cpu.fuPool.FUList5.opList17] 406type=OpDesc 407issueLat=1 408opClass=SimdFloatMult 409opLat=1 410 411[system.cpu.fuPool.FUList5.opList18] 412type=OpDesc 413issueLat=1 414opClass=SimdFloatMultAcc 415opLat=1 416 417[system.cpu.fuPool.FUList5.opList19] 418type=OpDesc 419issueLat=1 420opClass=SimdFloatSqrt 421opLat=1 422 423[system.cpu.fuPool.FUList6] 424type=FUDesc 425children=opList 426count=0 427opList=system.cpu.fuPool.FUList6.opList 428 429[system.cpu.fuPool.FUList6.opList] 430type=OpDesc 431issueLat=1 432opClass=MemWrite 433opLat=1 434 435[system.cpu.fuPool.FUList7] 436type=FUDesc 437children=opList0 opList1 438count=4 439opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 440 441[system.cpu.fuPool.FUList7.opList0] 442type=OpDesc 443issueLat=1 444opClass=MemRead 445opLat=1 446 447[system.cpu.fuPool.FUList7.opList1] 448type=OpDesc 449issueLat=1 450opClass=MemWrite 451opLat=1 452 453[system.cpu.fuPool.FUList8] 454type=FUDesc 455children=opList 456count=1 457opList=system.cpu.fuPool.FUList8.opList 458 459[system.cpu.fuPool.FUList8.opList] 460type=OpDesc 461issueLat=3 462opClass=IprAccess 463opLat=3 464 465[system.cpu.icache] 466type=BaseCache 467addr_ranges=0:18446744073709551615 468assoc=1 469block_size=64 470forward_snoops=true 471hash_delay=1 472is_top_level=true 473latency=1000 474max_miss_count=0 475mshrs=4 476prefetch_on_access=false 477prefetcher=Null 478prioritizeRequests=false 479repl=Null 480size=32768 481subblock_size=0 482system=system 483tgts_per_mshr=20 484trace_addr=0 485two_queue=false 486write_buffers=8 487cpu_side=system.cpu.icache_port 488mem_side=system.toL2Bus.slave[0] 489 490[system.cpu.interrupts] 491type=ArmInterrupts 492 493[system.cpu.itb] 494type=ArmTLB 495children=walker 496size=64 497walker=system.cpu.itb.walker 498 499[system.cpu.itb.walker] 500type=ArmTableWalker 501max_backoff=100000 502min_backoff=0 503sys=system 504port=system.toL2Bus.slave[2] 505 506[system.cpu.tracer] 507type=ExeTracer 508 509[system.intrctrl] 510type=IntrControl 511sys=system 512 513[system.iobus]	24midr_regval=890224640 25num_work_ids=16 26readfile=tests/halt.sh 27symbolfile= 28work_begin_ckpt_count=0 29work_begin_cpu_id_exit=-1 30work_begin_exit_count=0 31work_cpus_ckpt_count=0 32work_end_ckpt_count=0 33work_end_exit_count=0 34work_item_id=-1 35system_port=system.membus.slave[0] 36 37[system.bridge] 38type=Bridge 39delay=50000 40nack_delay=4000 41ranges=268435456:520093695 1073741824:1610612735 42req_size=16 43resp_size=16 44write_ack=false 45master=system.iobus.slave[0] 46slave=system.membus.master[0] 47 48[system.cf0] 49type=IdeDisk 50children=image 51delay=1000000 52driveID=master 53image=system.cf0.image 54 55[system.cf0.image] 56type=CowDiskImage 57children=child 58child=system.cf0.image.child 59image_file= 60read_only=false 61table_size=65536 62 63[system.cf0.image.child] 64type=RawDiskImage 65image_file=/dist/m5/system/disks/linux-arm-ael.img 66read_only=true 67 68[system.cpu] 69type=DerivO3CPU 70children=dcache dtb fuPool icache interrupts itb tracer 71BTBEntries=4096 72BTBTagSize=16 73LFSTSize=1024 74LQEntries=32 75LSQCheckLoads=true 76LSQDepCheckShift=4 77RASSize=16 78SQEntries=32 79SSITSize=1024 80activity=0 81backComSize=5 82cachePorts=200 83checker=Null 84choiceCtrBits=2 85choicePredictorSize=8192 86clock=500 87commitToDecodeDelay=1 88commitToFetchDelay=1 89commitToIEWDelay=1 90commitToRenameDelay=1 91commitWidth=8 92cpu_id=0 93decodeToFetchDelay=1 94decodeToRenameDelay=1 95decodeWidth=8 96defer_registration=false 97dispatchWidth=8 98do_checkpoint_insts=true 99do_quiesce=true 100do_statistics_insts=true 101dtb=system.cpu.dtb 102fetchToDecodeDelay=1 103fetchTrapLatency=1 104fetchWidth=8 105forwardComSize=5 106fuPool=system.cpu.fuPool 107function_trace=false 108function_trace_start=0 109globalCtrBits=2 110globalHistoryBits=13 111globalPredictorSize=8192 112iewToCommitDelay=1 113iewToDecodeDelay=1 114iewToFetchDelay=1 115iewToRenameDelay=1 116instShiftAmt=2 117interrupts=system.cpu.interrupts 118issueToExecuteDelay=1 119issueWidth=8 120itb=system.cpu.itb 121localCtrBits=2 122localHistoryBits=11 123localHistoryTableSize=2048 124localPredictorSize=2048 125max_insts_all_threads=0 126max_insts_any_thread=0 127max_loads_all_threads=0 128max_loads_any_thread=0 129needsTSO=false 130numIQEntries=64 131numPhysFloatRegs=256 132numPhysIntRegs=256 133numROBEntries=192 134numRobs=1 135numThreads=1 136phase=0 137predType=tournament 138profile=0 139progress_interval=0 140renameToDecodeDelay=1 141renameToFetchDelay=1 142renameToIEWDelay=2 143renameToROBDelay=1 144renameWidth=8 145smtCommitPolicy=RoundRobin 146smtFetchPolicy=SingleThread 147smtIQPolicy=Partitioned 148smtIQThreshold=100 149smtLSQPolicy=Partitioned 150smtLSQThreshold=100 151smtNumFetchingThreads=1 152smtROBPolicy=Partitioned 153smtROBThreshold=100 154squashWidth=8 155store_set_clear_period=250000 156system=system 157tracer=system.cpu.tracer 158trapLatency=13 159wbDepth=1 160wbWidth=8 161workload= 162dcache_port=system.cpu.dcache.cpu_side 163icache_port=system.cpu.icache.cpu_side 164 165[system.cpu.dcache] 166type=BaseCache 167addr_ranges=0:18446744073709551615 168assoc=4 169block_size=64 170forward_snoops=true 171hash_delay=1 172is_top_level=true 173latency=1000 174max_miss_count=0 175mshrs=4 176prefetch_on_access=false 177prefetcher=Null 178prioritizeRequests=false 179repl=Null 180size=32768 181subblock_size=0 182system=system 183tgts_per_mshr=20 184trace_addr=0 185two_queue=false 186write_buffers=8 187cpu_side=system.cpu.dcache_port 188mem_side=system.toL2Bus.slave[1] 189 190[system.cpu.dtb] 191type=ArmTLB 192children=walker 193size=64 194walker=system.cpu.dtb.walker 195 196[system.cpu.dtb.walker] 197type=ArmTableWalker 198max_backoff=100000 199min_backoff=0 200sys=system 201port=system.toL2Bus.slave[3] 202 203[system.cpu.fuPool] 204type=FUPool 205children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 206FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 207 208[system.cpu.fuPool.FUList0] 209type=FUDesc 210children=opList 211count=6 212opList=system.cpu.fuPool.FUList0.opList 213 214[system.cpu.fuPool.FUList0.opList] 215type=OpDesc 216issueLat=1 217opClass=IntAlu 218opLat=1 219 220[system.cpu.fuPool.FUList1] 221type=FUDesc 222children=opList0 opList1 223count=2 224opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 225 226[system.cpu.fuPool.FUList1.opList0] 227type=OpDesc 228issueLat=1 229opClass=IntMult 230opLat=3 231 232[system.cpu.fuPool.FUList1.opList1] 233type=OpDesc 234issueLat=19 235opClass=IntDiv 236opLat=20 237 238[system.cpu.fuPool.FUList2] 239type=FUDesc 240children=opList0 opList1 opList2 241count=4 242opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 243 244[system.cpu.fuPool.FUList2.opList0] 245type=OpDesc 246issueLat=1 247opClass=FloatAdd 248opLat=2 249 250[system.cpu.fuPool.FUList2.opList1] 251type=OpDesc 252issueLat=1 253opClass=FloatCmp 254opLat=2 255 256[system.cpu.fuPool.FUList2.opList2] 257type=OpDesc 258issueLat=1 259opClass=FloatCvt 260opLat=2 261 262[system.cpu.fuPool.FUList3] 263type=FUDesc 264children=opList0 opList1 opList2 265count=2 266opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 267 268[system.cpu.fuPool.FUList3.opList0] 269type=OpDesc 270issueLat=1 271opClass=FloatMult 272opLat=4 273 274[system.cpu.fuPool.FUList3.opList1] 275type=OpDesc 276issueLat=12 277opClass=FloatDiv 278opLat=12 279 280[system.cpu.fuPool.FUList3.opList2] 281type=OpDesc 282issueLat=24 283opClass=FloatSqrt 284opLat=24 285 286[system.cpu.fuPool.FUList4] 287type=FUDesc 288children=opList 289count=0 290opList=system.cpu.fuPool.FUList4.opList 291 292[system.cpu.fuPool.FUList4.opList] 293type=OpDesc 294issueLat=1 295opClass=MemRead 296opLat=1 297 298[system.cpu.fuPool.FUList5] 299type=FUDesc 300children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 301count=4 302opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 303 304[system.cpu.fuPool.FUList5.opList00] 305type=OpDesc 306issueLat=1 307opClass=SimdAdd 308opLat=1 309 310[system.cpu.fuPool.FUList5.opList01] 311type=OpDesc 312issueLat=1 313opClass=SimdAddAcc 314opLat=1 315 316[system.cpu.fuPool.FUList5.opList02] 317type=OpDesc 318issueLat=1 319opClass=SimdAlu 320opLat=1 321 322[system.cpu.fuPool.FUList5.opList03] 323type=OpDesc 324issueLat=1 325opClass=SimdCmp 326opLat=1 327 328[system.cpu.fuPool.FUList5.opList04] 329type=OpDesc 330issueLat=1 331opClass=SimdCvt 332opLat=1 333 334[system.cpu.fuPool.FUList5.opList05] 335type=OpDesc 336issueLat=1 337opClass=SimdMisc 338opLat=1 339 340[system.cpu.fuPool.FUList5.opList06] 341type=OpDesc 342issueLat=1 343opClass=SimdMult 344opLat=1 345 346[system.cpu.fuPool.FUList5.opList07] 347type=OpDesc 348issueLat=1 349opClass=SimdMultAcc 350opLat=1 351 352[system.cpu.fuPool.FUList5.opList08] 353type=OpDesc 354issueLat=1 355opClass=SimdShift 356opLat=1 357 358[system.cpu.fuPool.FUList5.opList09] 359type=OpDesc 360issueLat=1 361opClass=SimdShiftAcc 362opLat=1 363 364[system.cpu.fuPool.FUList5.opList10] 365type=OpDesc 366issueLat=1 367opClass=SimdSqrt 368opLat=1 369 370[system.cpu.fuPool.FUList5.opList11] 371type=OpDesc 372issueLat=1 373opClass=SimdFloatAdd 374opLat=1 375 376[system.cpu.fuPool.FUList5.opList12] 377type=OpDesc 378issueLat=1 379opClass=SimdFloatAlu 380opLat=1 381 382[system.cpu.fuPool.FUList5.opList13] 383type=OpDesc 384issueLat=1 385opClass=SimdFloatCmp 386opLat=1 387 388[system.cpu.fuPool.FUList5.opList14] 389type=OpDesc 390issueLat=1 391opClass=SimdFloatCvt 392opLat=1 393 394[system.cpu.fuPool.FUList5.opList15] 395type=OpDesc 396issueLat=1 397opClass=SimdFloatDiv 398opLat=1 399 400[system.cpu.fuPool.FUList5.opList16] 401type=OpDesc 402issueLat=1 403opClass=SimdFloatMisc 404opLat=1 405 406[system.cpu.fuPool.FUList5.opList17] 407type=OpDesc 408issueLat=1 409opClass=SimdFloatMult 410opLat=1 411 412[system.cpu.fuPool.FUList5.opList18] 413type=OpDesc 414issueLat=1 415opClass=SimdFloatMultAcc 416opLat=1 417 418[system.cpu.fuPool.FUList5.opList19] 419type=OpDesc 420issueLat=1 421opClass=SimdFloatSqrt 422opLat=1 423 424[system.cpu.fuPool.FUList6] 425type=FUDesc 426children=opList 427count=0 428opList=system.cpu.fuPool.FUList6.opList 429 430[system.cpu.fuPool.FUList6.opList] 431type=OpDesc 432issueLat=1 433opClass=MemWrite 434opLat=1 435 436[system.cpu.fuPool.FUList7] 437type=FUDesc 438children=opList0 opList1 439count=4 440opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 441 442[system.cpu.fuPool.FUList7.opList0] 443type=OpDesc 444issueLat=1 445opClass=MemRead 446opLat=1 447 448[system.cpu.fuPool.FUList7.opList1] 449type=OpDesc 450issueLat=1 451opClass=MemWrite 452opLat=1 453 454[system.cpu.fuPool.FUList8] 455type=FUDesc 456children=opList 457count=1 458opList=system.cpu.fuPool.FUList8.opList 459 460[system.cpu.fuPool.FUList8.opList] 461type=OpDesc 462issueLat=3 463opClass=IprAccess 464opLat=3 465 466[system.cpu.icache] 467type=BaseCache 468addr_ranges=0:18446744073709551615 469assoc=1 470block_size=64 471forward_snoops=true 472hash_delay=1 473is_top_level=true 474latency=1000 475max_miss_count=0 476mshrs=4 477prefetch_on_access=false 478prefetcher=Null 479prioritizeRequests=false 480repl=Null 481size=32768 482subblock_size=0 483system=system 484tgts_per_mshr=20 485trace_addr=0 486two_queue=false 487write_buffers=8 488cpu_side=system.cpu.icache_port 489mem_side=system.toL2Bus.slave[0] 490 491[system.cpu.interrupts] 492type=ArmInterrupts 493 494[system.cpu.itb] 495type=ArmTLB 496children=walker 497size=64 498walker=system.cpu.itb.walker 499 500[system.cpu.itb.walker] 501type=ArmTableWalker 502max_backoff=100000 503min_backoff=0 504sys=system 505port=system.toL2Bus.slave[2] 506 507[system.cpu.tracer] 508type=ExeTracer 509 510[system.intrctrl] 511type=IntrControl 512sys=system 513 514[system.iobus]
514type=Bus	515type=NoncoherentBus
515block_size=64	516block_size=64
516bus_id=0
517clock=1000 518header_cycles=1 519use_default_range=false 520width=64 521master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 522slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 523 524[system.iocache] 525type=BaseCache 526addr_ranges=0:268435455 527assoc=8 528block_size=64 529forward_snoops=false 530hash_delay=1 531is_top_level=false 532latency=50000 533max_miss_count=0 534mshrs=20 535prefetch_on_access=false 536prefetcher=Null 537prioritizeRequests=false 538repl=Null 539size=1024 540subblock_size=0 541system=system 542tgts_per_mshr=12 543trace_addr=0 544two_queue=false 545write_buffers=8 546cpu_side=system.iobus.master[25] 547mem_side=system.membus.slave[1] 548 549[system.l2c] 550type=BaseCache 551addr_ranges=0:18446744073709551615 552assoc=8 553block_size=64 554forward_snoops=true 555hash_delay=1 556is_top_level=false 557latency=10000 558max_miss_count=0 559mshrs=92 560prefetch_on_access=false 561prefetcher=Null 562prioritizeRequests=false 563repl=Null 564size=4194304 565subblock_size=0 566system=system 567tgts_per_mshr=16 568trace_addr=0 569two_queue=false 570write_buffers=8 571cpu_side=system.toL2Bus.master[0] 572mem_side=system.membus.slave[2] 573 574[system.membus]	517clock=1000 518header_cycles=1 519use_default_range=false 520width=64 521master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 522slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 523 524[system.iocache] 525type=BaseCache 526addr_ranges=0:268435455 527assoc=8 528block_size=64 529forward_snoops=false 530hash_delay=1 531is_top_level=false 532latency=50000 533max_miss_count=0 534mshrs=20 535prefetch_on_access=false 536prefetcher=Null 537prioritizeRequests=false 538repl=Null 539size=1024 540subblock_size=0 541system=system 542tgts_per_mshr=12 543trace_addr=0 544two_queue=false 545write_buffers=8 546cpu_side=system.iobus.master[25] 547mem_side=system.membus.slave[1] 548 549[system.l2c] 550type=BaseCache 551addr_ranges=0:18446744073709551615 552assoc=8 553block_size=64 554forward_snoops=true 555hash_delay=1 556is_top_level=false 557latency=10000 558max_miss_count=0 559mshrs=92 560prefetch_on_access=false 561prefetcher=Null 562prioritizeRequests=false 563repl=Null 564size=4194304 565subblock_size=0 566system=system 567tgts_per_mshr=16 568trace_addr=0 569two_queue=false 570write_buffers=8 571cpu_side=system.toL2Bus.master[0] 572mem_side=system.membus.slave[2] 573 574[system.membus]
575type=Bus	575type=CoherentBus
576children=badaddr_responder 577block_size=64	576children=badaddr_responder 577block_size=64
578bus_id=1
579clock=1000 580header_cycles=1 581use_default_range=false 582width=64 583default=system.membus.badaddr_responder.pio 584master=system.bridge.slave system.realview.nvmem.port[0] system.physmem.port[0] system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio 585slave=system.system_port system.iocache.mem_side system.l2c.mem_side 586 587[system.membus.badaddr_responder] 588type=IsaFake 589fake_mem=false 590pio_addr=0 591pio_latency=1000 592pio_size=8 593ret_bad_addr=true 594ret_data16=65535 595ret_data32=4294967295 596ret_data64=18446744073709551615 597ret_data8=255 598system=system 599update_data=false 600warn_access=warn 601pio=system.membus.default 602 603[system.physmem] 604type=SimpleMemory 605conf_table_reported=true 606file= 607in_addr_map=true 608latency=30000 609latency_var=0 610null=false 611range=0:134217727 612zero=false 613port=system.membus.master[2] 614 615[system.realview] 616type=RealView 617children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 618intrctrl=system.intrctrl 619max_mem_size=268435456 620mem_start_addr=0 621pci_cfg_base=0 622system=system 623 624[system.realview.a9scu] 625type=A9SCU 626pio_addr=520093696 627pio_latency=1000 628system=system 629pio=system.membus.master[5] 630 631[system.realview.aaci_fake] 632type=AmbaFake 633amba_id=0 634ignore_access=false 635pio_addr=268451840 636pio_latency=1000 637system=system 638pio=system.iobus.master[21] 639 640[system.realview.cf_ctrl] 641type=IdeController 642BAR0=402653184 643BAR0LegacyIO=true 644BAR0Size=16 645BAR1=402653440 646BAR1LegacyIO=true 647BAR1Size=1 648BAR2=1 649BAR2LegacyIO=false 650BAR2Size=8 651BAR3=1 652BAR3LegacyIO=false 653BAR3Size=4 654BAR4=1 655BAR4LegacyIO=false 656BAR4Size=16 657BAR5=1 658BAR5LegacyIO=false 659BAR5Size=0 660BIST=0 661CacheLineSize=0 662CardbusCIS=0 663ClassCode=1 664Command=1 665DeviceID=28945 666ExpansionROM=0 667HeaderType=0 668InterruptLine=31 669InterruptPin=1 670LatencyTimer=0 671MaximumLatency=0 672MinimumGrant=0 673ProgIF=133 674Revision=0 675Status=640 676SubClassCode=1 677SubsystemID=0 678SubsystemVendorID=0 679VendorID=32902 680config_latency=20000 681ctrl_offset=2 682disks=system.cf0 683io_shift=1 684max_backoff_delay=10000000 685min_backoff_delay=4000 686pci_bus=2 687pci_dev=7 688pci_func=0 689pio_latency=1000 690platform=system.realview 691system=system 692config=system.iobus.master[8] 693dma=system.iobus.slave[2] 694pio=system.iobus.master[7] 695 696[system.realview.clcd] 697type=Pl111 698amba_id=1315089 699clock=41667 700gic=system.realview.gic 701int_num=55 702max_backoff_delay=10000000 703min_backoff_delay=4000 704pio_addr=268566528 705pio_latency=10000 706system=system 707vnc=system.vncserver 708dma=system.iobus.slave[1] 709pio=system.iobus.master[4] 710 711[system.realview.dmac_fake] 712type=AmbaFake 713amba_id=0 714ignore_access=false 715pio_addr=268632064 716pio_latency=1000 717system=system 718pio=system.iobus.master[9] 719 720[system.realview.flash_fake] 721type=IsaFake 722fake_mem=true 723pio_addr=1073741824 724pio_latency=1000 725pio_size=536870912 726ret_bad_addr=false 727ret_data16=65535 728ret_data32=4294967295 729ret_data64=18446744073709551615 730ret_data8=255 731system=system 732update_data=false 733warn_access= 734pio=system.iobus.master[24] 735 736[system.realview.gic] 737type=Gic 738cpu_addr=520093952 739cpu_pio_delay=10000 740dist_addr=520097792 741dist_pio_delay=10000 742int_latency=10000 743it_lines=128 744platform=system.realview 745system=system 746pio=system.membus.master[3] 747 748[system.realview.gpio0_fake] 749type=AmbaFake 750amba_id=0 751ignore_access=false 752pio_addr=268513280 753pio_latency=1000 754system=system 755pio=system.iobus.master[16] 756 757[system.realview.gpio1_fake] 758type=AmbaFake 759amba_id=0 760ignore_access=false 761pio_addr=268517376 762pio_latency=1000 763system=system 764pio=system.iobus.master[17] 765 766[system.realview.gpio2_fake] 767type=AmbaFake 768amba_id=0 769ignore_access=false 770pio_addr=268521472 771pio_latency=1000 772system=system 773pio=system.iobus.master[18] 774 775[system.realview.kmi0] 776type=Pl050 777amba_id=1314896 778gic=system.realview.gic 779int_delay=1000000 780int_num=52 781is_mouse=false 782pio_addr=268460032 783pio_latency=1000 784system=system 785vnc=system.vncserver 786pio=system.iobus.master[5] 787 788[system.realview.kmi1] 789type=Pl050 790amba_id=1314896 791gic=system.realview.gic 792int_delay=1000000 793int_num=53 794is_mouse=true 795pio_addr=268464128 796pio_latency=1000 797system=system 798vnc=system.vncserver 799pio=system.iobus.master[6] 800 801[system.realview.l2x0_fake] 802type=IsaFake 803fake_mem=false 804pio_addr=520101888 805pio_latency=1000 806pio_size=4095 807ret_bad_addr=false 808ret_data16=65535 809ret_data32=4294967295 810ret_data64=18446744073709551615 811ret_data8=255 812system=system 813update_data=false 814warn_access= 815pio=system.membus.master[4] 816 817[system.realview.local_cpu_timer] 818type=CpuLocalTimer 819clock=1000 820gic=system.realview.gic 821int_num_timer=29 822int_num_watchdog=30 823pio_addr=520095232 824pio_latency=1000 825system=system 826pio=system.membus.master[6] 827 828[system.realview.mmc_fake] 829type=AmbaFake 830amba_id=0 831ignore_access=false 832pio_addr=268455936 833pio_latency=1000 834system=system 835pio=system.iobus.master[22] 836 837[system.realview.nvmem] 838type=SimpleMemory 839conf_table_reported=false 840file= 841in_addr_map=true 842latency=30000 843latency_var=0 844null=false 845range=2147483648:2214592511 846zero=true 847port=system.membus.master[1] 848 849[system.realview.realview_io] 850type=RealViewCtrl 851idreg=0 852pio_addr=268435456 853pio_latency=1000 854proc_id0=201326592 855proc_id1=201327138 856system=system 857pio=system.iobus.master[1] 858 859[system.realview.rtc] 860type=PL031 861amba_id=3412017 862gic=system.realview.gic 863int_delay=100000 864int_num=42 865pio_addr=268529664 866pio_latency=1000 867system=system 868time=Thu Jan 1 00:00:00 2009 869pio=system.iobus.master[23] 870 871[system.realview.sci_fake] 872type=AmbaFake 873amba_id=0 874ignore_access=false 875pio_addr=268492800 876pio_latency=1000 877system=system 878pio=system.iobus.master[20] 879 880[system.realview.smc_fake] 881type=AmbaFake 882amba_id=0 883ignore_access=false 884pio_addr=269357056 885pio_latency=1000 886system=system 887pio=system.iobus.master[13] 888 889[system.realview.sp810_fake] 890type=AmbaFake 891amba_id=0 892ignore_access=true 893pio_addr=268439552 894pio_latency=1000 895system=system 896pio=system.iobus.master[14] 897 898[system.realview.ssp_fake] 899type=AmbaFake 900amba_id=0 901ignore_access=false 902pio_addr=268488704 903pio_latency=1000 904system=system 905pio=system.iobus.master[19] 906 907[system.realview.timer0] 908type=Sp804 909amba_id=1316868 910clock0=1000000 911clock1=1000000 912gic=system.realview.gic 913int_num0=36 914int_num1=36 915pio_addr=268505088 916pio_latency=1000 917system=system 918pio=system.iobus.master[2] 919 920[system.realview.timer1] 921type=Sp804 922amba_id=1316868 923clock0=1000000 924clock1=1000000 925gic=system.realview.gic 926int_num0=37 927int_num1=37 928pio_addr=268509184 929pio_latency=1000 930system=system 931pio=system.iobus.master[3] 932 933[system.realview.uart] 934type=Pl011 935end_on_eot=false 936gic=system.realview.gic 937int_delay=100000 938int_num=44 939pio_addr=268472320 940pio_latency=1000 941platform=system.realview 942system=system 943terminal=system.terminal 944pio=system.iobus.master[0] 945 946[system.realview.uart1_fake] 947type=AmbaFake 948amba_id=0 949ignore_access=false 950pio_addr=268476416 951pio_latency=1000 952system=system 953pio=system.iobus.master[10] 954 955[system.realview.uart2_fake] 956type=AmbaFake 957amba_id=0 958ignore_access=false 959pio_addr=268480512 960pio_latency=1000 961system=system 962pio=system.iobus.master[11] 963 964[system.realview.uart3_fake] 965type=AmbaFake 966amba_id=0 967ignore_access=false 968pio_addr=268484608 969pio_latency=1000 970system=system 971pio=system.iobus.master[12] 972 973[system.realview.watchdog_fake] 974type=AmbaFake 975amba_id=0 976ignore_access=false 977pio_addr=268500992 978pio_latency=1000 979system=system 980pio=system.iobus.master[15] 981 982[system.terminal] 983type=Terminal 984intr_control=system.intrctrl 985number=0 986output=true 987port=3456 988 989[system.toL2Bus]	578clock=1000 579header_cycles=1 580use_default_range=false 581width=64 582default=system.membus.badaddr_responder.pio 583master=system.bridge.slave system.realview.nvmem.port[0] system.physmem.port[0] system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio 584slave=system.system_port system.iocache.mem_side system.l2c.mem_side 585 586[system.membus.badaddr_responder] 587type=IsaFake 588fake_mem=false 589pio_addr=0 590pio_latency=1000 591pio_size=8 592ret_bad_addr=true 593ret_data16=65535 594ret_data32=4294967295 595ret_data64=18446744073709551615 596ret_data8=255 597system=system 598update_data=false 599warn_access=warn 600pio=system.membus.default 601 602[system.physmem] 603type=SimpleMemory 604conf_table_reported=true 605file= 606in_addr_map=true 607latency=30000 608latency_var=0 609null=false 610range=0:134217727 611zero=false 612port=system.membus.master[2] 613 614[system.realview] 615type=RealView 616children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 617intrctrl=system.intrctrl 618max_mem_size=268435456 619mem_start_addr=0 620pci_cfg_base=0 621system=system 622 623[system.realview.a9scu] 624type=A9SCU 625pio_addr=520093696 626pio_latency=1000 627system=system 628pio=system.membus.master[5] 629 630[system.realview.aaci_fake] 631type=AmbaFake 632amba_id=0 633ignore_access=false 634pio_addr=268451840 635pio_latency=1000 636system=system 637pio=system.iobus.master[21] 638 639[system.realview.cf_ctrl] 640type=IdeController 641BAR0=402653184 642BAR0LegacyIO=true 643BAR0Size=16 644BAR1=402653440 645BAR1LegacyIO=true 646BAR1Size=1 647BAR2=1 648BAR2LegacyIO=false 649BAR2Size=8 650BAR3=1 651BAR3LegacyIO=false 652BAR3Size=4 653BAR4=1 654BAR4LegacyIO=false 655BAR4Size=16 656BAR5=1 657BAR5LegacyIO=false 658BAR5Size=0 659BIST=0 660CacheLineSize=0 661CardbusCIS=0 662ClassCode=1 663Command=1 664DeviceID=28945 665ExpansionROM=0 666HeaderType=0 667InterruptLine=31 668InterruptPin=1 669LatencyTimer=0 670MaximumLatency=0 671MinimumGrant=0 672ProgIF=133 673Revision=0 674Status=640 675SubClassCode=1 676SubsystemID=0 677SubsystemVendorID=0 678VendorID=32902 679config_latency=20000 680ctrl_offset=2 681disks=system.cf0 682io_shift=1 683max_backoff_delay=10000000 684min_backoff_delay=4000 685pci_bus=2 686pci_dev=7 687pci_func=0 688pio_latency=1000 689platform=system.realview 690system=system 691config=system.iobus.master[8] 692dma=system.iobus.slave[2] 693pio=system.iobus.master[7] 694 695[system.realview.clcd] 696type=Pl111 697amba_id=1315089 698clock=41667 699gic=system.realview.gic 700int_num=55 701max_backoff_delay=10000000 702min_backoff_delay=4000 703pio_addr=268566528 704pio_latency=10000 705system=system 706vnc=system.vncserver 707dma=system.iobus.slave[1] 708pio=system.iobus.master[4] 709 710[system.realview.dmac_fake] 711type=AmbaFake 712amba_id=0 713ignore_access=false 714pio_addr=268632064 715pio_latency=1000 716system=system 717pio=system.iobus.master[9] 718 719[system.realview.flash_fake] 720type=IsaFake 721fake_mem=true 722pio_addr=1073741824 723pio_latency=1000 724pio_size=536870912 725ret_bad_addr=false 726ret_data16=65535 727ret_data32=4294967295 728ret_data64=18446744073709551615 729ret_data8=255 730system=system 731update_data=false 732warn_access= 733pio=system.iobus.master[24] 734 735[system.realview.gic] 736type=Gic 737cpu_addr=520093952 738cpu_pio_delay=10000 739dist_addr=520097792 740dist_pio_delay=10000 741int_latency=10000 742it_lines=128 743platform=system.realview 744system=system 745pio=system.membus.master[3] 746 747[system.realview.gpio0_fake] 748type=AmbaFake 749amba_id=0 750ignore_access=false 751pio_addr=268513280 752pio_latency=1000 753system=system 754pio=system.iobus.master[16] 755 756[system.realview.gpio1_fake] 757type=AmbaFake 758amba_id=0 759ignore_access=false 760pio_addr=268517376 761pio_latency=1000 762system=system 763pio=system.iobus.master[17] 764 765[system.realview.gpio2_fake] 766type=AmbaFake 767amba_id=0 768ignore_access=false 769pio_addr=268521472 770pio_latency=1000 771system=system 772pio=system.iobus.master[18] 773 774[system.realview.kmi0] 775type=Pl050 776amba_id=1314896 777gic=system.realview.gic 778int_delay=1000000 779int_num=52 780is_mouse=false 781pio_addr=268460032 782pio_latency=1000 783system=system 784vnc=system.vncserver 785pio=system.iobus.master[5] 786 787[system.realview.kmi1] 788type=Pl050 789amba_id=1314896 790gic=system.realview.gic 791int_delay=1000000 792int_num=53 793is_mouse=true 794pio_addr=268464128 795pio_latency=1000 796system=system 797vnc=system.vncserver 798pio=system.iobus.master[6] 799 800[system.realview.l2x0_fake] 801type=IsaFake 802fake_mem=false 803pio_addr=520101888 804pio_latency=1000 805pio_size=4095 806ret_bad_addr=false 807ret_data16=65535 808ret_data32=4294967295 809ret_data64=18446744073709551615 810ret_data8=255 811system=system 812update_data=false 813warn_access= 814pio=system.membus.master[4] 815 816[system.realview.local_cpu_timer] 817type=CpuLocalTimer 818clock=1000 819gic=system.realview.gic 820int_num_timer=29 821int_num_watchdog=30 822pio_addr=520095232 823pio_latency=1000 824system=system 825pio=system.membus.master[6] 826 827[system.realview.mmc_fake] 828type=AmbaFake 829amba_id=0 830ignore_access=false 831pio_addr=268455936 832pio_latency=1000 833system=system 834pio=system.iobus.master[22] 835 836[system.realview.nvmem] 837type=SimpleMemory 838conf_table_reported=false 839file= 840in_addr_map=true 841latency=30000 842latency_var=0 843null=false 844range=2147483648:2214592511 845zero=true 846port=system.membus.master[1] 847 848[system.realview.realview_io] 849type=RealViewCtrl 850idreg=0 851pio_addr=268435456 852pio_latency=1000 853proc_id0=201326592 854proc_id1=201327138 855system=system 856pio=system.iobus.master[1] 857 858[system.realview.rtc] 859type=PL031 860amba_id=3412017 861gic=system.realview.gic 862int_delay=100000 863int_num=42 864pio_addr=268529664 865pio_latency=1000 866system=system 867time=Thu Jan 1 00:00:00 2009 868pio=system.iobus.master[23] 869 870[system.realview.sci_fake] 871type=AmbaFake 872amba_id=0 873ignore_access=false 874pio_addr=268492800 875pio_latency=1000 876system=system 877pio=system.iobus.master[20] 878 879[system.realview.smc_fake] 880type=AmbaFake 881amba_id=0 882ignore_access=false 883pio_addr=269357056 884pio_latency=1000 885system=system 886pio=system.iobus.master[13] 887 888[system.realview.sp810_fake] 889type=AmbaFake 890amba_id=0 891ignore_access=true 892pio_addr=268439552 893pio_latency=1000 894system=system 895pio=system.iobus.master[14] 896 897[system.realview.ssp_fake] 898type=AmbaFake 899amba_id=0 900ignore_access=false 901pio_addr=268488704 902pio_latency=1000 903system=system 904pio=system.iobus.master[19] 905 906[system.realview.timer0] 907type=Sp804 908amba_id=1316868 909clock0=1000000 910clock1=1000000 911gic=system.realview.gic 912int_num0=36 913int_num1=36 914pio_addr=268505088 915pio_latency=1000 916system=system 917pio=system.iobus.master[2] 918 919[system.realview.timer1] 920type=Sp804 921amba_id=1316868 922clock0=1000000 923clock1=1000000 924gic=system.realview.gic 925int_num0=37 926int_num1=37 927pio_addr=268509184 928pio_latency=1000 929system=system 930pio=system.iobus.master[3] 931 932[system.realview.uart] 933type=Pl011 934end_on_eot=false 935gic=system.realview.gic 936int_delay=100000 937int_num=44 938pio_addr=268472320 939pio_latency=1000 940platform=system.realview 941system=system 942terminal=system.terminal 943pio=system.iobus.master[0] 944 945[system.realview.uart1_fake] 946type=AmbaFake 947amba_id=0 948ignore_access=false 949pio_addr=268476416 950pio_latency=1000 951system=system 952pio=system.iobus.master[10] 953 954[system.realview.uart2_fake] 955type=AmbaFake 956amba_id=0 957ignore_access=false 958pio_addr=268480512 959pio_latency=1000 960system=system 961pio=system.iobus.master[11] 962 963[system.realview.uart3_fake] 964type=AmbaFake 965amba_id=0 966ignore_access=false 967pio_addr=268484608 968pio_latency=1000 969system=system 970pio=system.iobus.master[12] 971 972[system.realview.watchdog_fake] 973type=AmbaFake 974amba_id=0 975ignore_access=false 976pio_addr=268500992 977pio_latency=1000 978system=system 979pio=system.iobus.master[15] 980 981[system.terminal] 982type=Terminal 983intr_control=system.intrctrl 984number=0 985output=true 986port=3456 987 988[system.toL2Bus]
990type=Bus	989type=CoherentBus
991block_size=64	990block_size=64
992bus_id=0
993clock=1000 994header_cycles=1 995use_default_range=false 996width=64 997master=system.l2c.cpu_side 998slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 999 1000[system.vncserver] 1001type=VncServer 1002frame_capture=false 1003number=0 1004port=5900 1005	991clock=1000 992header_cycles=1 993use_default_range=false 994width=64 995master=system.l2c.cpu_side 996slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 997 998[system.vncserver] 999type=VncServer 1000frame_capture=false 1001number=0 1002port=5900 1003