Cross Reference: /gem5/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini

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config.ini (10038:7eccd14e2610)	config.ini (10242:cb4e86c17767)
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu cpu_clk_domain intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain 14atags_addr=256	1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu cpu_clk_domain intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain 14atags_addr=256
15boot_loader=/dist/binaries/boot.arm 16boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1	15boot_loader=/home/stever/m5/m5_system_2.0b3/binaries/boot.arm 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
17boot_release_addr=65528 18cache_line_size=64 19clk_domain=system.clk_domain 20dtb_filename= 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24flags_addr=268435504 25gic_cpu_addr=520093952 26have_generic_timer=false 27have_large_asid_64=false 28have_lpae=false 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0	17boot_release_addr=65528 18cache_line_size=64 19clk_domain=system.clk_domain 20dtb_filename= 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24flags_addr=268435504 25gic_cpu_addr=520093952 26have_generic_timer=false 27have_large_asid_64=false 28have_lpae=false 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0
33kernel=/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8	33kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux.arm.smp.fb.2.6.38.8
34load_addr_mask=268435455 35load_offset=0 36machine_type=RealView_PBX 37mem_mode=timing 38mem_ranges=0:134217727 39memories=system.physmem system.realview.nvmem 40multi_proc=true 41num_work_ids=16 42panic_on_oops=true 43panic_on_panic=true 44phys_addr_range_64=40	34load_addr_mask=268435455 35load_offset=0 36machine_type=RealView_PBX 37mem_mode=timing 38mem_ranges=0:134217727 39memories=system.physmem system.realview.nvmem 40multi_proc=true 41num_work_ids=16 42panic_on_oops=true 43panic_on_panic=true 44phys_addr_range_64=40
45readfile=tests/halt.sh	45readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
46reset_addr_64=0 47symbolfile= 48work_begin_ckpt_count=0 49work_begin_cpu_id_exit=-1 50work_begin_exit_count=0 51work_cpus_ckpt_count=0 52work_end_ckpt_count=0 53work_end_exit_count=0 54work_item_id=-1 55system_port=system.membus.slave[0] 56 57[system.bridge] 58type=Bridge 59clk_domain=system.clk_domain 60delay=50000 61eventq_index=0 62ranges=268435456:520093695 1073741824:1610612735 63req_size=16 64resp_size=16 65master=system.iobus.slave[0] 66slave=system.membus.master[0] 67 68[system.cf0] 69type=IdeDisk 70children=image 71delay=1000000 72driveID=master 73eventq_index=0 74image=system.cf0.image 75 76[system.cf0.image] 77type=CowDiskImage 78children=child 79child=system.cf0.image.child 80eventq_index=0 81image_file= 82read_only=false 83table_size=65536 84 85[system.cf0.image.child] 86type=RawDiskImage 87eventq_index=0	46reset_addr_64=0 47symbolfile= 48work_begin_ckpt_count=0 49work_begin_cpu_id_exit=-1 50work_begin_exit_count=0 51work_cpus_ckpt_count=0 52work_end_ckpt_count=0 53work_end_exit_count=0 54work_item_id=-1 55system_port=system.membus.slave[0] 56 57[system.bridge] 58type=Bridge 59clk_domain=system.clk_domain 60delay=50000 61eventq_index=0 62ranges=268435456:520093695 1073741824:1610612735 63req_size=16 64resp_size=16 65master=system.iobus.slave[0] 66slave=system.membus.master[0] 67 68[system.cf0] 69type=IdeDisk 70children=image 71delay=1000000 72driveID=master 73eventq_index=0 74image=system.cf0.image 75 76[system.cf0.image] 77type=CowDiskImage 78children=child 79child=system.cf0.image.child 80eventq_index=0 81image_file= 82read_only=false 83table_size=65536 84 85[system.cf0.image.child] 86type=RawDiskImage 87eventq_index=0
88image_file=/dist/disks/linux-arm-ael.img	88image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-arm-ael.img
89read_only=true 90 91[system.clk_domain] 92type=SrcClockDomain 93clock=1000 94eventq_index=0 95voltage_domain=system.voltage_domain 96 97[system.cpu] 98type=DerivO3CPU 99children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 100LFSTSize=1024 101LQEntries=32 102LSQCheckLoads=true 103LSQDepCheckShift=4 104SQEntries=32 105SSITSize=1024 106activity=0 107backComSize=5 108branchPred=system.cpu.branchPred 109cachePorts=200 110checker=Null 111clk_domain=system.cpu_clk_domain 112commitToDecodeDelay=1 113commitToFetchDelay=1 114commitToIEWDelay=1 115commitToRenameDelay=1 116commitWidth=8 117cpu_id=0 118decodeToFetchDelay=1 119decodeToRenameDelay=1 120decodeWidth=8 121dispatchWidth=8 122do_checkpoint_insts=true 123do_quiesce=true 124do_statistics_insts=true 125dstage2_mmu=system.cpu.dstage2_mmu 126dtb=system.cpu.dtb 127eventq_index=0 128fetchBufferSize=64 129fetchToDecodeDelay=1 130fetchTrapLatency=1 131fetchWidth=8 132forwardComSize=5 133fuPool=system.cpu.fuPool 134function_trace=false 135function_trace_start=0 136iewToCommitDelay=1 137iewToDecodeDelay=1 138iewToFetchDelay=1 139iewToRenameDelay=1 140interrupts=system.cpu.interrupts 141isa=system.cpu.isa 142issueToExecuteDelay=1 143issueWidth=8 144istage2_mmu=system.cpu.istage2_mmu 145itb=system.cpu.itb 146max_insts_all_threads=0 147max_insts_any_thread=0 148max_loads_all_threads=0 149max_loads_any_thread=0 150needsTSO=false 151numIQEntries=64 152numPhysCCRegs=0 153numPhysFloatRegs=256 154numPhysIntRegs=256 155numROBEntries=192 156numRobs=1 157numThreads=1 158profile=0 159progress_interval=0 160renameToDecodeDelay=1 161renameToFetchDelay=1 162renameToIEWDelay=2 163renameToROBDelay=1 164renameWidth=8 165simpoint_start_insts= 166smtCommitPolicy=RoundRobin 167smtFetchPolicy=SingleThread 168smtIQPolicy=Partitioned 169smtIQThreshold=100 170smtLSQPolicy=Partitioned 171smtLSQThreshold=100 172smtNumFetchingThreads=1 173smtROBPolicy=Partitioned 174smtROBThreshold=100	89read_only=true 90 91[system.clk_domain] 92type=SrcClockDomain 93clock=1000 94eventq_index=0 95voltage_domain=system.voltage_domain 96 97[system.cpu] 98type=DerivO3CPU 99children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer 100LFSTSize=1024 101LQEntries=32 102LSQCheckLoads=true 103LSQDepCheckShift=4 104SQEntries=32 105SSITSize=1024 106activity=0 107backComSize=5 108branchPred=system.cpu.branchPred 109cachePorts=200 110checker=Null 111clk_domain=system.cpu_clk_domain 112commitToDecodeDelay=1 113commitToFetchDelay=1 114commitToIEWDelay=1 115commitToRenameDelay=1 116commitWidth=8 117cpu_id=0 118decodeToFetchDelay=1 119decodeToRenameDelay=1 120decodeWidth=8 121dispatchWidth=8 122do_checkpoint_insts=true 123do_quiesce=true 124do_statistics_insts=true 125dstage2_mmu=system.cpu.dstage2_mmu 126dtb=system.cpu.dtb 127eventq_index=0 128fetchBufferSize=64 129fetchToDecodeDelay=1 130fetchTrapLatency=1 131fetchWidth=8 132forwardComSize=5 133fuPool=system.cpu.fuPool 134function_trace=false 135function_trace_start=0 136iewToCommitDelay=1 137iewToDecodeDelay=1 138iewToFetchDelay=1 139iewToRenameDelay=1 140interrupts=system.cpu.interrupts 141isa=system.cpu.isa 142issueToExecuteDelay=1 143issueWidth=8 144istage2_mmu=system.cpu.istage2_mmu 145itb=system.cpu.itb 146max_insts_all_threads=0 147max_insts_any_thread=0 148max_loads_all_threads=0 149max_loads_any_thread=0 150needsTSO=false 151numIQEntries=64 152numPhysCCRegs=0 153numPhysFloatRegs=256 154numPhysIntRegs=256 155numROBEntries=192 156numRobs=1 157numThreads=1 158profile=0 159progress_interval=0 160renameToDecodeDelay=1 161renameToFetchDelay=1 162renameToIEWDelay=2 163renameToROBDelay=1 164renameWidth=8 165simpoint_start_insts= 166smtCommitPolicy=RoundRobin 167smtFetchPolicy=SingleThread 168smtIQPolicy=Partitioned 169smtIQThreshold=100 170smtLSQPolicy=Partitioned 171smtLSQThreshold=100 172smtNumFetchingThreads=1 173smtROBPolicy=Partitioned 174smtROBThreshold=100
	175socket_id=0
175squashWidth=8 176store_set_clear_period=250000 177switched_out=false 178system=system 179tracer=system.cpu.tracer 180trapLatency=13 181wbDepth=1 182wbWidth=8 183workload= 184dcache_port=system.cpu.dcache.cpu_side 185icache_port=system.cpu.icache.cpu_side 186 187[system.cpu.branchPred] 188type=BranchPredictor 189BTBEntries=4096 190BTBTagSize=16 191RASSize=16 192choiceCtrBits=2 193choicePredictorSize=8192 194eventq_index=0 195globalCtrBits=2 196globalPredictorSize=8192 197instShiftAmt=2 198localCtrBits=2 199localHistoryTableSize=2048 200localPredictorSize=2048 201numThreads=1 202predType=tournament 203 204[system.cpu.dcache] 205type=BaseCache 206children=tags 207addr_ranges=0:18446744073709551615 208assoc=4 209clk_domain=system.cpu_clk_domain 210eventq_index=0 211forward_snoops=true 212hit_latency=2 213is_top_level=true 214max_miss_count=0 215mshrs=4 216prefetch_on_access=false 217prefetcher=Null 218response_latency=2 219sequential_access=false 220size=32768 221system=system 222tags=system.cpu.dcache.tags 223tgts_per_mshr=20 224two_queue=false 225write_buffers=8 226cpu_side=system.cpu.dcache_port 227mem_side=system.cpu.toL2Bus.slave[1] 228 229[system.cpu.dcache.tags] 230type=LRU 231assoc=4 232block_size=64 233clk_domain=system.cpu_clk_domain 234eventq_index=0 235hit_latency=2 236sequential_access=false 237size=32768 238 239[system.cpu.dstage2_mmu] 240type=ArmStage2MMU 241children=stage2_tlb 242eventq_index=0 243stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 244tlb=system.cpu.dtb 245 246[system.cpu.dstage2_mmu.stage2_tlb] 247type=ArmTLB 248children=walker 249eventq_index=0 250is_stage2=true 251size=32 252walker=system.cpu.dstage2_mmu.stage2_tlb.walker 253 254[system.cpu.dstage2_mmu.stage2_tlb.walker] 255type=ArmTableWalker 256clk_domain=system.cpu_clk_domain 257eventq_index=0 258is_stage2=true 259num_squash_per_cycle=2 260sys=system 261port=system.cpu.toL2Bus.slave[5] 262 263[system.cpu.dtb] 264type=ArmTLB 265children=walker 266eventq_index=0 267is_stage2=false 268size=64 269walker=system.cpu.dtb.walker 270 271[system.cpu.dtb.walker] 272type=ArmTableWalker 273clk_domain=system.cpu_clk_domain 274eventq_index=0 275is_stage2=false 276num_squash_per_cycle=2 277sys=system 278port=system.cpu.toL2Bus.slave[3] 279 280[system.cpu.fuPool] 281type=FUPool 282children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 283FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 284eventq_index=0 285 286[system.cpu.fuPool.FUList0] 287type=FUDesc 288children=opList 289count=6 290eventq_index=0 291opList=system.cpu.fuPool.FUList0.opList 292 293[system.cpu.fuPool.FUList0.opList] 294type=OpDesc 295eventq_index=0 296issueLat=1 297opClass=IntAlu 298opLat=1 299 300[system.cpu.fuPool.FUList1] 301type=FUDesc 302children=opList0 opList1 303count=2 304eventq_index=0 305opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 306 307[system.cpu.fuPool.FUList1.opList0] 308type=OpDesc 309eventq_index=0 310issueLat=1 311opClass=IntMult 312opLat=3 313 314[system.cpu.fuPool.FUList1.opList1] 315type=OpDesc 316eventq_index=0 317issueLat=19 318opClass=IntDiv 319opLat=20 320 321[system.cpu.fuPool.FUList2] 322type=FUDesc 323children=opList0 opList1 opList2 324count=4 325eventq_index=0 326opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 327 328[system.cpu.fuPool.FUList2.opList0] 329type=OpDesc 330eventq_index=0 331issueLat=1 332opClass=FloatAdd 333opLat=2 334 335[system.cpu.fuPool.FUList2.opList1] 336type=OpDesc 337eventq_index=0 338issueLat=1 339opClass=FloatCmp 340opLat=2 341 342[system.cpu.fuPool.FUList2.opList2] 343type=OpDesc 344eventq_index=0 345issueLat=1 346opClass=FloatCvt 347opLat=2 348 349[system.cpu.fuPool.FUList3] 350type=FUDesc 351children=opList0 opList1 opList2 352count=2 353eventq_index=0 354opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 355 356[system.cpu.fuPool.FUList3.opList0] 357type=OpDesc 358eventq_index=0 359issueLat=1 360opClass=FloatMult 361opLat=4 362 363[system.cpu.fuPool.FUList3.opList1] 364type=OpDesc 365eventq_index=0 366issueLat=12 367opClass=FloatDiv 368opLat=12 369 370[system.cpu.fuPool.FUList3.opList2] 371type=OpDesc 372eventq_index=0 373issueLat=24 374opClass=FloatSqrt 375opLat=24 376 377[system.cpu.fuPool.FUList4] 378type=FUDesc 379children=opList 380count=0 381eventq_index=0 382opList=system.cpu.fuPool.FUList4.opList 383 384[system.cpu.fuPool.FUList4.opList] 385type=OpDesc 386eventq_index=0 387issueLat=1 388opClass=MemRead 389opLat=1 390 391[system.cpu.fuPool.FUList5] 392type=FUDesc 393children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 394count=4 395eventq_index=0 396opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 397 398[system.cpu.fuPool.FUList5.opList00] 399type=OpDesc 400eventq_index=0 401issueLat=1 402opClass=SimdAdd 403opLat=1 404 405[system.cpu.fuPool.FUList5.opList01] 406type=OpDesc 407eventq_index=0 408issueLat=1 409opClass=SimdAddAcc 410opLat=1 411 412[system.cpu.fuPool.FUList5.opList02] 413type=OpDesc 414eventq_index=0 415issueLat=1 416opClass=SimdAlu 417opLat=1 418 419[system.cpu.fuPool.FUList5.opList03] 420type=OpDesc 421eventq_index=0 422issueLat=1 423opClass=SimdCmp 424opLat=1 425 426[system.cpu.fuPool.FUList5.opList04] 427type=OpDesc 428eventq_index=0 429issueLat=1 430opClass=SimdCvt 431opLat=1 432 433[system.cpu.fuPool.FUList5.opList05] 434type=OpDesc 435eventq_index=0 436issueLat=1 437opClass=SimdMisc 438opLat=1 439 440[system.cpu.fuPool.FUList5.opList06] 441type=OpDesc 442eventq_index=0 443issueLat=1 444opClass=SimdMult 445opLat=1 446 447[system.cpu.fuPool.FUList5.opList07] 448type=OpDesc 449eventq_index=0 450issueLat=1 451opClass=SimdMultAcc 452opLat=1 453 454[system.cpu.fuPool.FUList5.opList08] 455type=OpDesc 456eventq_index=0 457issueLat=1 458opClass=SimdShift 459opLat=1 460 461[system.cpu.fuPool.FUList5.opList09] 462type=OpDesc 463eventq_index=0 464issueLat=1 465opClass=SimdShiftAcc 466opLat=1 467 468[system.cpu.fuPool.FUList5.opList10] 469type=OpDesc 470eventq_index=0 471issueLat=1 472opClass=SimdSqrt 473opLat=1 474 475[system.cpu.fuPool.FUList5.opList11] 476type=OpDesc 477eventq_index=0 478issueLat=1 479opClass=SimdFloatAdd 480opLat=1 481 482[system.cpu.fuPool.FUList5.opList12] 483type=OpDesc 484eventq_index=0 485issueLat=1 486opClass=SimdFloatAlu 487opLat=1 488 489[system.cpu.fuPool.FUList5.opList13] 490type=OpDesc 491eventq_index=0 492issueLat=1 493opClass=SimdFloatCmp 494opLat=1 495 496[system.cpu.fuPool.FUList5.opList14] 497type=OpDesc 498eventq_index=0 499issueLat=1 500opClass=SimdFloatCvt 501opLat=1 502 503[system.cpu.fuPool.FUList5.opList15] 504type=OpDesc 505eventq_index=0 506issueLat=1 507opClass=SimdFloatDiv 508opLat=1 509 510[system.cpu.fuPool.FUList5.opList16] 511type=OpDesc 512eventq_index=0 513issueLat=1 514opClass=SimdFloatMisc 515opLat=1 516 517[system.cpu.fuPool.FUList5.opList17] 518type=OpDesc 519eventq_index=0 520issueLat=1 521opClass=SimdFloatMult 522opLat=1 523 524[system.cpu.fuPool.FUList5.opList18] 525type=OpDesc 526eventq_index=0 527issueLat=1 528opClass=SimdFloatMultAcc 529opLat=1 530 531[system.cpu.fuPool.FUList5.opList19] 532type=OpDesc 533eventq_index=0 534issueLat=1 535opClass=SimdFloatSqrt 536opLat=1 537 538[system.cpu.fuPool.FUList6] 539type=FUDesc 540children=opList 541count=0 542eventq_index=0 543opList=system.cpu.fuPool.FUList6.opList 544 545[system.cpu.fuPool.FUList6.opList] 546type=OpDesc 547eventq_index=0 548issueLat=1 549opClass=MemWrite 550opLat=1 551 552[system.cpu.fuPool.FUList7] 553type=FUDesc 554children=opList0 opList1 555count=4 556eventq_index=0 557opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 558 559[system.cpu.fuPool.FUList7.opList0] 560type=OpDesc 561eventq_index=0 562issueLat=1 563opClass=MemRead 564opLat=1 565 566[system.cpu.fuPool.FUList7.opList1] 567type=OpDesc 568eventq_index=0 569issueLat=1 570opClass=MemWrite 571opLat=1 572 573[system.cpu.fuPool.FUList8] 574type=FUDesc 575children=opList 576count=1 577eventq_index=0 578opList=system.cpu.fuPool.FUList8.opList 579 580[system.cpu.fuPool.FUList8.opList] 581type=OpDesc 582eventq_index=0 583issueLat=3 584opClass=IprAccess 585opLat=3 586 587[system.cpu.icache] 588type=BaseCache 589children=tags 590addr_ranges=0:18446744073709551615 591assoc=1 592clk_domain=system.cpu_clk_domain 593eventq_index=0 594forward_snoops=true 595hit_latency=2 596is_top_level=true 597max_miss_count=0 598mshrs=4 599prefetch_on_access=false 600prefetcher=Null 601response_latency=2 602sequential_access=false 603size=32768 604system=system 605tags=system.cpu.icache.tags 606tgts_per_mshr=20 607two_queue=false 608write_buffers=8 609cpu_side=system.cpu.icache_port 610mem_side=system.cpu.toL2Bus.slave[0] 611 612[system.cpu.icache.tags] 613type=LRU 614assoc=1 615block_size=64 616clk_domain=system.cpu_clk_domain 617eventq_index=0 618hit_latency=2 619sequential_access=false 620size=32768 621 622[system.cpu.interrupts] 623type=ArmInterrupts 624eventq_index=0 625 626[system.cpu.isa] 627type=ArmISA 628eventq_index=0 629fpsid=1090793632 630id_aa64afr0_el1=0 631id_aa64afr1_el1=0 632id_aa64dfr0_el1=1052678 633id_aa64dfr1_el1=0 634id_aa64isar0_el1=0 635id_aa64isar1_el1=0 636id_aa64mmfr0_el1=15728642 637id_aa64mmfr1_el1=0 638id_aa64pfr0_el1=17 639id_aa64pfr1_el1=0 640id_isar0=34607377 641id_isar1=34677009 642id_isar2=555950401 643id_isar3=17899825 644id_isar4=268501314 645id_isar5=0 646id_mmfr0=270536963 647id_mmfr1=0 648id_mmfr2=19070976 649id_mmfr3=34611729 650id_pfr0=49 651id_pfr1=4113 652midr=1091551472 653system=system 654 655[system.cpu.istage2_mmu] 656type=ArmStage2MMU 657children=stage2_tlb 658eventq_index=0 659stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 660tlb=system.cpu.itb 661 662[system.cpu.istage2_mmu.stage2_tlb] 663type=ArmTLB 664children=walker 665eventq_index=0 666is_stage2=true 667size=32 668walker=system.cpu.istage2_mmu.stage2_tlb.walker 669 670[system.cpu.istage2_mmu.stage2_tlb.walker] 671type=ArmTableWalker 672clk_domain=system.cpu_clk_domain 673eventq_index=0 674is_stage2=true 675num_squash_per_cycle=2 676sys=system 677port=system.cpu.toL2Bus.slave[4] 678 679[system.cpu.itb] 680type=ArmTLB 681children=walker 682eventq_index=0 683is_stage2=false 684size=64 685walker=system.cpu.itb.walker 686 687[system.cpu.itb.walker] 688type=ArmTableWalker 689clk_domain=system.cpu_clk_domain 690eventq_index=0 691is_stage2=false 692num_squash_per_cycle=2 693sys=system 694port=system.cpu.toL2Bus.slave[2] 695 696[system.cpu.l2cache] 697type=BaseCache 698children=tags 699addr_ranges=0:18446744073709551615 700assoc=8 701clk_domain=system.cpu_clk_domain 702eventq_index=0 703forward_snoops=true 704hit_latency=20 705is_top_level=false 706max_miss_count=0 707mshrs=20 708prefetch_on_access=false 709prefetcher=Null 710response_latency=20 711sequential_access=false 712size=4194304 713system=system 714tags=system.cpu.l2cache.tags 715tgts_per_mshr=12 716two_queue=false 717write_buffers=8 718cpu_side=system.cpu.toL2Bus.master[0] 719mem_side=system.membus.slave[1] 720 721[system.cpu.l2cache.tags] 722type=LRU 723assoc=8 724block_size=64 725clk_domain=system.cpu_clk_domain 726eventq_index=0 727hit_latency=20 728sequential_access=false 729size=4194304 730 731[system.cpu.toL2Bus] 732type=CoherentBus 733clk_domain=system.cpu_clk_domain 734eventq_index=0 735header_cycles=1 736system=system 737use_default_range=false 738width=32 739master=system.cpu.l2cache.cpu_side 740slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port 741 742[system.cpu.tracer] 743type=ExeTracer 744eventq_index=0 745 746[system.cpu_clk_domain] 747type=SrcClockDomain 748clock=500 749eventq_index=0 750voltage_domain=system.voltage_domain 751 752[system.intrctrl] 753type=IntrControl 754eventq_index=0 755sys=system 756 757[system.iobus] 758type=NoncoherentBus 759clk_domain=system.clk_domain 760eventq_index=0 761header_cycles=1 762use_default_range=false 763width=8 764master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 765slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 766 767[system.iocache] 768type=BaseCache 769children=tags 770addr_ranges=0:134217727 771assoc=8 772clk_domain=system.clk_domain 773eventq_index=0 774forward_snoops=false 775hit_latency=50 776is_top_level=true 777max_miss_count=0 778mshrs=20 779prefetch_on_access=false 780prefetcher=Null 781response_latency=50 782sequential_access=false 783size=1024 784system=system 785tags=system.iocache.tags 786tgts_per_mshr=12 787two_queue=false 788write_buffers=8 789cpu_side=system.iobus.master[25] 790mem_side=system.membus.slave[2] 791 792[system.iocache.tags] 793type=LRU 794assoc=8 795block_size=64 796clk_domain=system.clk_domain 797eventq_index=0 798hit_latency=50 799sequential_access=false 800size=1024 801 802[system.membus] 803type=CoherentBus 804children=badaddr_responder 805clk_domain=system.clk_domain 806eventq_index=0 807header_cycles=1 808system=system 809use_default_range=false 810width=8 811default=system.membus.badaddr_responder.pio 812master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port 813slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 814 815[system.membus.badaddr_responder] 816type=IsaFake 817clk_domain=system.clk_domain 818eventq_index=0 819fake_mem=false 820pio_addr=0 821pio_latency=100000 822pio_size=8 823ret_bad_addr=true 824ret_data16=65535 825ret_data32=4294967295 826ret_data64=18446744073709551615 827ret_data8=255 828system=system 829update_data=false 830warn_access=warn 831pio=system.membus.default 832 833[system.physmem]	176squashWidth=8 177store_set_clear_period=250000 178switched_out=false 179system=system 180tracer=system.cpu.tracer 181trapLatency=13 182wbDepth=1 183wbWidth=8 184workload= 185dcache_port=system.cpu.dcache.cpu_side 186icache_port=system.cpu.icache.cpu_side 187 188[system.cpu.branchPred] 189type=BranchPredictor 190BTBEntries=4096 191BTBTagSize=16 192RASSize=16 193choiceCtrBits=2 194choicePredictorSize=8192 195eventq_index=0 196globalCtrBits=2 197globalPredictorSize=8192 198instShiftAmt=2 199localCtrBits=2 200localHistoryTableSize=2048 201localPredictorSize=2048 202numThreads=1 203predType=tournament 204 205[system.cpu.dcache] 206type=BaseCache 207children=tags 208addr_ranges=0:18446744073709551615 209assoc=4 210clk_domain=system.cpu_clk_domain 211eventq_index=0 212forward_snoops=true 213hit_latency=2 214is_top_level=true 215max_miss_count=0 216mshrs=4 217prefetch_on_access=false 218prefetcher=Null 219response_latency=2 220sequential_access=false 221size=32768 222system=system 223tags=system.cpu.dcache.tags 224tgts_per_mshr=20 225two_queue=false 226write_buffers=8 227cpu_side=system.cpu.dcache_port 228mem_side=system.cpu.toL2Bus.slave[1] 229 230[system.cpu.dcache.tags] 231type=LRU 232assoc=4 233block_size=64 234clk_domain=system.cpu_clk_domain 235eventq_index=0 236hit_latency=2 237sequential_access=false 238size=32768 239 240[system.cpu.dstage2_mmu] 241type=ArmStage2MMU 242children=stage2_tlb 243eventq_index=0 244stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 245tlb=system.cpu.dtb 246 247[system.cpu.dstage2_mmu.stage2_tlb] 248type=ArmTLB 249children=walker 250eventq_index=0 251is_stage2=true 252size=32 253walker=system.cpu.dstage2_mmu.stage2_tlb.walker 254 255[system.cpu.dstage2_mmu.stage2_tlb.walker] 256type=ArmTableWalker 257clk_domain=system.cpu_clk_domain 258eventq_index=0 259is_stage2=true 260num_squash_per_cycle=2 261sys=system 262port=system.cpu.toL2Bus.slave[5] 263 264[system.cpu.dtb] 265type=ArmTLB 266children=walker 267eventq_index=0 268is_stage2=false 269size=64 270walker=system.cpu.dtb.walker 271 272[system.cpu.dtb.walker] 273type=ArmTableWalker 274clk_domain=system.cpu_clk_domain 275eventq_index=0 276is_stage2=false 277num_squash_per_cycle=2 278sys=system 279port=system.cpu.toL2Bus.slave[3] 280 281[system.cpu.fuPool] 282type=FUPool 283children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 284FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 285eventq_index=0 286 287[system.cpu.fuPool.FUList0] 288type=FUDesc 289children=opList 290count=6 291eventq_index=0 292opList=system.cpu.fuPool.FUList0.opList 293 294[system.cpu.fuPool.FUList0.opList] 295type=OpDesc 296eventq_index=0 297issueLat=1 298opClass=IntAlu 299opLat=1 300 301[system.cpu.fuPool.FUList1] 302type=FUDesc 303children=opList0 opList1 304count=2 305eventq_index=0 306opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 307 308[system.cpu.fuPool.FUList1.opList0] 309type=OpDesc 310eventq_index=0 311issueLat=1 312opClass=IntMult 313opLat=3 314 315[system.cpu.fuPool.FUList1.opList1] 316type=OpDesc 317eventq_index=0 318issueLat=19 319opClass=IntDiv 320opLat=20 321 322[system.cpu.fuPool.FUList2] 323type=FUDesc 324children=opList0 opList1 opList2 325count=4 326eventq_index=0 327opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 328 329[system.cpu.fuPool.FUList2.opList0] 330type=OpDesc 331eventq_index=0 332issueLat=1 333opClass=FloatAdd 334opLat=2 335 336[system.cpu.fuPool.FUList2.opList1] 337type=OpDesc 338eventq_index=0 339issueLat=1 340opClass=FloatCmp 341opLat=2 342 343[system.cpu.fuPool.FUList2.opList2] 344type=OpDesc 345eventq_index=0 346issueLat=1 347opClass=FloatCvt 348opLat=2 349 350[system.cpu.fuPool.FUList3] 351type=FUDesc 352children=opList0 opList1 opList2 353count=2 354eventq_index=0 355opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 356 357[system.cpu.fuPool.FUList3.opList0] 358type=OpDesc 359eventq_index=0 360issueLat=1 361opClass=FloatMult 362opLat=4 363 364[system.cpu.fuPool.FUList3.opList1] 365type=OpDesc 366eventq_index=0 367issueLat=12 368opClass=FloatDiv 369opLat=12 370 371[system.cpu.fuPool.FUList3.opList2] 372type=OpDesc 373eventq_index=0 374issueLat=24 375opClass=FloatSqrt 376opLat=24 377 378[system.cpu.fuPool.FUList4] 379type=FUDesc 380children=opList 381count=0 382eventq_index=0 383opList=system.cpu.fuPool.FUList4.opList 384 385[system.cpu.fuPool.FUList4.opList] 386type=OpDesc 387eventq_index=0 388issueLat=1 389opClass=MemRead 390opLat=1 391 392[system.cpu.fuPool.FUList5] 393type=FUDesc 394children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 395count=4 396eventq_index=0 397opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19 398 399[system.cpu.fuPool.FUList5.opList00] 400type=OpDesc 401eventq_index=0 402issueLat=1 403opClass=SimdAdd 404opLat=1 405 406[system.cpu.fuPool.FUList5.opList01] 407type=OpDesc 408eventq_index=0 409issueLat=1 410opClass=SimdAddAcc 411opLat=1 412 413[system.cpu.fuPool.FUList5.opList02] 414type=OpDesc 415eventq_index=0 416issueLat=1 417opClass=SimdAlu 418opLat=1 419 420[system.cpu.fuPool.FUList5.opList03] 421type=OpDesc 422eventq_index=0 423issueLat=1 424opClass=SimdCmp 425opLat=1 426 427[system.cpu.fuPool.FUList5.opList04] 428type=OpDesc 429eventq_index=0 430issueLat=1 431opClass=SimdCvt 432opLat=1 433 434[system.cpu.fuPool.FUList5.opList05] 435type=OpDesc 436eventq_index=0 437issueLat=1 438opClass=SimdMisc 439opLat=1 440 441[system.cpu.fuPool.FUList5.opList06] 442type=OpDesc 443eventq_index=0 444issueLat=1 445opClass=SimdMult 446opLat=1 447 448[system.cpu.fuPool.FUList5.opList07] 449type=OpDesc 450eventq_index=0 451issueLat=1 452opClass=SimdMultAcc 453opLat=1 454 455[system.cpu.fuPool.FUList5.opList08] 456type=OpDesc 457eventq_index=0 458issueLat=1 459opClass=SimdShift 460opLat=1 461 462[system.cpu.fuPool.FUList5.opList09] 463type=OpDesc 464eventq_index=0 465issueLat=1 466opClass=SimdShiftAcc 467opLat=1 468 469[system.cpu.fuPool.FUList5.opList10] 470type=OpDesc 471eventq_index=0 472issueLat=1 473opClass=SimdSqrt 474opLat=1 475 476[system.cpu.fuPool.FUList5.opList11] 477type=OpDesc 478eventq_index=0 479issueLat=1 480opClass=SimdFloatAdd 481opLat=1 482 483[system.cpu.fuPool.FUList5.opList12] 484type=OpDesc 485eventq_index=0 486issueLat=1 487opClass=SimdFloatAlu 488opLat=1 489 490[system.cpu.fuPool.FUList5.opList13] 491type=OpDesc 492eventq_index=0 493issueLat=1 494opClass=SimdFloatCmp 495opLat=1 496 497[system.cpu.fuPool.FUList5.opList14] 498type=OpDesc 499eventq_index=0 500issueLat=1 501opClass=SimdFloatCvt 502opLat=1 503 504[system.cpu.fuPool.FUList5.opList15] 505type=OpDesc 506eventq_index=0 507issueLat=1 508opClass=SimdFloatDiv 509opLat=1 510 511[system.cpu.fuPool.FUList5.opList16] 512type=OpDesc 513eventq_index=0 514issueLat=1 515opClass=SimdFloatMisc 516opLat=1 517 518[system.cpu.fuPool.FUList5.opList17] 519type=OpDesc 520eventq_index=0 521issueLat=1 522opClass=SimdFloatMult 523opLat=1 524 525[system.cpu.fuPool.FUList5.opList18] 526type=OpDesc 527eventq_index=0 528issueLat=1 529opClass=SimdFloatMultAcc 530opLat=1 531 532[system.cpu.fuPool.FUList5.opList19] 533type=OpDesc 534eventq_index=0 535issueLat=1 536opClass=SimdFloatSqrt 537opLat=1 538 539[system.cpu.fuPool.FUList6] 540type=FUDesc 541children=opList 542count=0 543eventq_index=0 544opList=system.cpu.fuPool.FUList6.opList 545 546[system.cpu.fuPool.FUList6.opList] 547type=OpDesc 548eventq_index=0 549issueLat=1 550opClass=MemWrite 551opLat=1 552 553[system.cpu.fuPool.FUList7] 554type=FUDesc 555children=opList0 opList1 556count=4 557eventq_index=0 558opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 559 560[system.cpu.fuPool.FUList7.opList0] 561type=OpDesc 562eventq_index=0 563issueLat=1 564opClass=MemRead 565opLat=1 566 567[system.cpu.fuPool.FUList7.opList1] 568type=OpDesc 569eventq_index=0 570issueLat=1 571opClass=MemWrite 572opLat=1 573 574[system.cpu.fuPool.FUList8] 575type=FUDesc 576children=opList 577count=1 578eventq_index=0 579opList=system.cpu.fuPool.FUList8.opList 580 581[system.cpu.fuPool.FUList8.opList] 582type=OpDesc 583eventq_index=0 584issueLat=3 585opClass=IprAccess 586opLat=3 587 588[system.cpu.icache] 589type=BaseCache 590children=tags 591addr_ranges=0:18446744073709551615 592assoc=1 593clk_domain=system.cpu_clk_domain 594eventq_index=0 595forward_snoops=true 596hit_latency=2 597is_top_level=true 598max_miss_count=0 599mshrs=4 600prefetch_on_access=false 601prefetcher=Null 602response_latency=2 603sequential_access=false 604size=32768 605system=system 606tags=system.cpu.icache.tags 607tgts_per_mshr=20 608two_queue=false 609write_buffers=8 610cpu_side=system.cpu.icache_port 611mem_side=system.cpu.toL2Bus.slave[0] 612 613[system.cpu.icache.tags] 614type=LRU 615assoc=1 616block_size=64 617clk_domain=system.cpu_clk_domain 618eventq_index=0 619hit_latency=2 620sequential_access=false 621size=32768 622 623[system.cpu.interrupts] 624type=ArmInterrupts 625eventq_index=0 626 627[system.cpu.isa] 628type=ArmISA 629eventq_index=0 630fpsid=1090793632 631id_aa64afr0_el1=0 632id_aa64afr1_el1=0 633id_aa64dfr0_el1=1052678 634id_aa64dfr1_el1=0 635id_aa64isar0_el1=0 636id_aa64isar1_el1=0 637id_aa64mmfr0_el1=15728642 638id_aa64mmfr1_el1=0 639id_aa64pfr0_el1=17 640id_aa64pfr1_el1=0 641id_isar0=34607377 642id_isar1=34677009 643id_isar2=555950401 644id_isar3=17899825 645id_isar4=268501314 646id_isar5=0 647id_mmfr0=270536963 648id_mmfr1=0 649id_mmfr2=19070976 650id_mmfr3=34611729 651id_pfr0=49 652id_pfr1=4113 653midr=1091551472 654system=system 655 656[system.cpu.istage2_mmu] 657type=ArmStage2MMU 658children=stage2_tlb 659eventq_index=0 660stage2_tlb=system.cpu.istage2_mmu.stage2_tlb 661tlb=system.cpu.itb 662 663[system.cpu.istage2_mmu.stage2_tlb] 664type=ArmTLB 665children=walker 666eventq_index=0 667is_stage2=true 668size=32 669walker=system.cpu.istage2_mmu.stage2_tlb.walker 670 671[system.cpu.istage2_mmu.stage2_tlb.walker] 672type=ArmTableWalker 673clk_domain=system.cpu_clk_domain 674eventq_index=0 675is_stage2=true 676num_squash_per_cycle=2 677sys=system 678port=system.cpu.toL2Bus.slave[4] 679 680[system.cpu.itb] 681type=ArmTLB 682children=walker 683eventq_index=0 684is_stage2=false 685size=64 686walker=system.cpu.itb.walker 687 688[system.cpu.itb.walker] 689type=ArmTableWalker 690clk_domain=system.cpu_clk_domain 691eventq_index=0 692is_stage2=false 693num_squash_per_cycle=2 694sys=system 695port=system.cpu.toL2Bus.slave[2] 696 697[system.cpu.l2cache] 698type=BaseCache 699children=tags 700addr_ranges=0:18446744073709551615 701assoc=8 702clk_domain=system.cpu_clk_domain 703eventq_index=0 704forward_snoops=true 705hit_latency=20 706is_top_level=false 707max_miss_count=0 708mshrs=20 709prefetch_on_access=false 710prefetcher=Null 711response_latency=20 712sequential_access=false 713size=4194304 714system=system 715tags=system.cpu.l2cache.tags 716tgts_per_mshr=12 717two_queue=false 718write_buffers=8 719cpu_side=system.cpu.toL2Bus.master[0] 720mem_side=system.membus.slave[1] 721 722[system.cpu.l2cache.tags] 723type=LRU 724assoc=8 725block_size=64 726clk_domain=system.cpu_clk_domain 727eventq_index=0 728hit_latency=20 729sequential_access=false 730size=4194304 731 732[system.cpu.toL2Bus] 733type=CoherentBus 734clk_domain=system.cpu_clk_domain 735eventq_index=0 736header_cycles=1 737system=system 738use_default_range=false 739width=32 740master=system.cpu.l2cache.cpu_side 741slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port 742 743[system.cpu.tracer] 744type=ExeTracer 745eventq_index=0 746 747[system.cpu_clk_domain] 748type=SrcClockDomain 749clock=500 750eventq_index=0 751voltage_domain=system.voltage_domain 752 753[system.intrctrl] 754type=IntrControl 755eventq_index=0 756sys=system 757 758[system.iobus] 759type=NoncoherentBus 760clk_domain=system.clk_domain 761eventq_index=0 762header_cycles=1 763use_default_range=false 764width=8 765master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 766slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 767 768[system.iocache] 769type=BaseCache 770children=tags 771addr_ranges=0:134217727 772assoc=8 773clk_domain=system.clk_domain 774eventq_index=0 775forward_snoops=false 776hit_latency=50 777is_top_level=true 778max_miss_count=0 779mshrs=20 780prefetch_on_access=false 781prefetcher=Null 782response_latency=50 783sequential_access=false 784size=1024 785system=system 786tags=system.iocache.tags 787tgts_per_mshr=12 788two_queue=false 789write_buffers=8 790cpu_side=system.iobus.master[25] 791mem_side=system.membus.slave[2] 792 793[system.iocache.tags] 794type=LRU 795assoc=8 796block_size=64 797clk_domain=system.clk_domain 798eventq_index=0 799hit_latency=50 800sequential_access=false 801size=1024 802 803[system.membus] 804type=CoherentBus 805children=badaddr_responder 806clk_domain=system.clk_domain 807eventq_index=0 808header_cycles=1 809system=system 810use_default_range=false 811width=8 812default=system.membus.badaddr_responder.pio 813master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port 814slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 815 816[system.membus.badaddr_responder] 817type=IsaFake 818clk_domain=system.clk_domain 819eventq_index=0 820fake_mem=false 821pio_addr=0 822pio_latency=100000 823pio_size=8 824ret_bad_addr=true 825ret_data16=65535 826ret_data32=4294967295 827ret_data64=18446744073709551615 828ret_data8=255 829system=system 830update_data=false 831warn_access=warn 832pio=system.membus.default 833 834[system.physmem]
834type=SimpleDRAM	835type=DRAMCtrl
835activation_limit=4	836activation_limit=4
836addr_mapping=RaBaChCo	837addr_mapping=RoRaBaChCo
837banks_per_rank=8 838burst_length=8 839channels=1 840clk_domain=system.clk_domain 841conf_table_reported=true 842device_bus_width=8 843device_rowbuffer_size=1024 844devices_per_rank=8 845eventq_index=0 846in_addr_map=true	838banks_per_rank=8 839burst_length=8 840channels=1 841clk_domain=system.clk_domain 842conf_table_reported=true 843device_bus_width=8 844device_rowbuffer_size=1024 845devices_per_rank=8 846eventq_index=0 847in_addr_map=true
	848max_accesses_per_row=16
847mem_sched_policy=frfcfs	849mem_sched_policy=frfcfs
	850min_writes_per_switch=16
848null=false	851null=false
849page_policy=open	852page_policy=open_adaptive
850range=0:134217727 851ranks_per_channel=2 852read_buffer_size=32 853static_backend_latency=10000 854static_frontend_latency=10000 855tBURST=5000	853range=0:134217727 854ranks_per_channel=2 855read_buffer_size=32 856static_backend_latency=10000 857static_frontend_latency=10000 858tBURST=5000
	859tCK=1250
856tCL=13750 857tRAS=35000 858tRCD=13750 859tREFI=7800000	860tCL=13750 861tRAS=35000 862tRCD=13750 863tREFI=7800000
860tRFC=300000	864tRFC=260000
861tRP=13750	865tRP=13750
862tRRD=6250	866tRRD=6000 867tRTP=7500 868tRTW=2500 869tWR=15000
863tWTR=7500	870tWTR=7500
864tXAW=40000 865write_buffer_size=32 866write_high_thresh_perc=70 867write_low_thresh_perc=0	871tXAW=30000 872write_buffer_size=64 873write_high_thresh_perc=85 874write_low_thresh_perc=50
868port=system.membus.master[6] 869 870[system.realview] 871type=RealView 872children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 873eventq_index=0 874intrctrl=system.intrctrl 875max_mem_size=268435456 876mem_start_addr=0 877pci_cfg_base=0 878system=system 879 880[system.realview.a9scu] 881type=A9SCU 882clk_domain=system.clk_domain 883eventq_index=0 884pio_addr=520093696 885pio_latency=100000 886system=system 887pio=system.membus.master[4] 888 889[system.realview.aaci_fake] 890type=AmbaFake 891amba_id=0 892clk_domain=system.clk_domain 893eventq_index=0 894ignore_access=false 895pio_addr=268451840 896pio_latency=100000 897system=system 898pio=system.iobus.master[21] 899 900[system.realview.cf_ctrl] 901type=IdeController 902BAR0=402653184 903BAR0LegacyIO=true 904BAR0Size=16 905BAR1=402653440 906BAR1LegacyIO=true 907BAR1Size=1 908BAR2=1 909BAR2LegacyIO=false 910BAR2Size=8 911BAR3=1 912BAR3LegacyIO=false 913BAR3Size=4 914BAR4=1 915BAR4LegacyIO=false 916BAR4Size=16 917BAR5=1 918BAR5LegacyIO=false 919BAR5Size=0 920BIST=0 921CacheLineSize=0 922CapabilityPtr=0 923CardbusCIS=0 924ClassCode=1 925Command=1 926DeviceID=28945 927ExpansionROM=0 928HeaderType=0 929InterruptLine=31 930InterruptPin=1 931LatencyTimer=0 932MSICAPBaseOffset=0 933MSICAPCapId=0 934MSICAPMaskBits=0 935MSICAPMsgAddr=0 936MSICAPMsgCtrl=0 937MSICAPMsgData=0 938MSICAPMsgUpperAddr=0 939MSICAPNextCapability=0 940MSICAPPendingBits=0 941MSIXCAPBaseOffset=0 942MSIXCAPCapId=0 943MSIXCAPNextCapability=0 944MSIXMsgCtrl=0 945MSIXPbaOffset=0 946MSIXTableOffset=0 947MaximumLatency=0 948MinimumGrant=0 949PMCAPBaseOffset=0 950PMCAPCapId=0 951PMCAPCapabilities=0 952PMCAPCtrlStatus=0 953PMCAPNextCapability=0 954PXCAPBaseOffset=0 955PXCAPCapId=0 956PXCAPCapabilities=0 957PXCAPDevCap2=0 958PXCAPDevCapabilities=0 959PXCAPDevCtrl=0 960PXCAPDevCtrl2=0 961PXCAPDevStatus=0 962PXCAPLinkCap=0 963PXCAPLinkCtrl=0 964PXCAPLinkStatus=0 965PXCAPNextCapability=0 966ProgIF=133 967Revision=0 968Status=640 969SubClassCode=1 970SubsystemID=0 971SubsystemVendorID=0 972VendorID=32902 973clk_domain=system.clk_domain 974config_latency=20000 975ctrl_offset=2 976disks=system.cf0 977eventq_index=0 978io_shift=1 979pci_bus=2 980pci_dev=7 981pci_func=0 982pio_latency=30000 983platform=system.realview 984system=system 985config=system.iobus.master[8] 986dma=system.iobus.slave[2] 987pio=system.iobus.master[7] 988 989[system.realview.clcd] 990type=Pl111 991amba_id=1315089 992clk_domain=system.clk_domain 993enable_capture=true 994eventq_index=0 995gic=system.realview.gic 996int_num=55 997pio_addr=268566528 998pio_latency=10000 999pixel_clock=41667 1000system=system 1001vnc=system.vncserver 1002dma=system.iobus.slave[1] 1003pio=system.iobus.master[4] 1004 1005[system.realview.dmac_fake] 1006type=AmbaFake 1007amba_id=0 1008clk_domain=system.clk_domain 1009eventq_index=0 1010ignore_access=false 1011pio_addr=268632064 1012pio_latency=100000 1013system=system 1014pio=system.iobus.master[9] 1015 1016[system.realview.flash_fake] 1017type=IsaFake 1018clk_domain=system.clk_domain 1019eventq_index=0 1020fake_mem=true 1021pio_addr=1073741824 1022pio_latency=100000 1023pio_size=536870912 1024ret_bad_addr=false 1025ret_data16=65535 1026ret_data32=4294967295 1027ret_data64=18446744073709551615 1028ret_data8=255 1029system=system 1030update_data=false 1031warn_access= 1032pio=system.iobus.master[24] 1033 1034[system.realview.gic] 1035type=Pl390 1036clk_domain=system.clk_domain 1037cpu_addr=520093952 1038cpu_pio_delay=10000 1039dist_addr=520097792 1040dist_pio_delay=10000 1041eventq_index=0 1042int_latency=10000 1043it_lines=128 1044msix_addr=0 1045platform=system.realview 1046system=system 1047pio=system.membus.master[2] 1048 1049[system.realview.gpio0_fake] 1050type=AmbaFake 1051amba_id=0 1052clk_domain=system.clk_domain 1053eventq_index=0 1054ignore_access=false 1055pio_addr=268513280 1056pio_latency=100000 1057system=system 1058pio=system.iobus.master[16] 1059 1060[system.realview.gpio1_fake] 1061type=AmbaFake 1062amba_id=0 1063clk_domain=system.clk_domain 1064eventq_index=0 1065ignore_access=false 1066pio_addr=268517376 1067pio_latency=100000 1068system=system 1069pio=system.iobus.master[17] 1070 1071[system.realview.gpio2_fake] 1072type=AmbaFake 1073amba_id=0 1074clk_domain=system.clk_domain 1075eventq_index=0 1076ignore_access=false 1077pio_addr=268521472 1078pio_latency=100000 1079system=system 1080pio=system.iobus.master[18] 1081 1082[system.realview.kmi0] 1083type=Pl050 1084amba_id=1314896 1085clk_domain=system.clk_domain 1086eventq_index=0 1087gic=system.realview.gic 1088int_delay=1000000 1089int_num=52 1090is_mouse=false 1091pio_addr=268460032 1092pio_latency=100000 1093system=system 1094vnc=system.vncserver 1095pio=system.iobus.master[5] 1096 1097[system.realview.kmi1] 1098type=Pl050 1099amba_id=1314896 1100clk_domain=system.clk_domain 1101eventq_index=0 1102gic=system.realview.gic 1103int_delay=1000000 1104int_num=53 1105is_mouse=true 1106pio_addr=268464128 1107pio_latency=100000 1108system=system 1109vnc=system.vncserver 1110pio=system.iobus.master[6] 1111 1112[system.realview.l2x0_fake] 1113type=IsaFake 1114clk_domain=system.clk_domain 1115eventq_index=0 1116fake_mem=false 1117pio_addr=520101888 1118pio_latency=100000 1119pio_size=4095 1120ret_bad_addr=false 1121ret_data16=65535 1122ret_data32=4294967295 1123ret_data64=18446744073709551615 1124ret_data8=255 1125system=system 1126update_data=false 1127warn_access= 1128pio=system.membus.master[3] 1129 1130[system.realview.local_cpu_timer] 1131type=CpuLocalTimer 1132clk_domain=system.clk_domain 1133eventq_index=0 1134gic=system.realview.gic 1135int_num_timer=29 1136int_num_watchdog=30 1137pio_addr=520095232 1138pio_latency=100000 1139system=system 1140pio=system.membus.master[5] 1141 1142[system.realview.mmc_fake] 1143type=AmbaFake 1144amba_id=0 1145clk_domain=system.clk_domain 1146eventq_index=0 1147ignore_access=false 1148pio_addr=268455936 1149pio_latency=100000 1150system=system 1151pio=system.iobus.master[22] 1152 1153[system.realview.nvmem] 1154type=SimpleMemory 1155bandwidth=73.000000 1156clk_domain=system.clk_domain 1157conf_table_reported=false 1158eventq_index=0 1159in_addr_map=true 1160latency=30000 1161latency_var=0 1162null=false 1163range=2147483648:2214592511 1164port=system.membus.master[1] 1165 1166[system.realview.realview_io] 1167type=RealViewCtrl 1168clk_domain=system.clk_domain 1169eventq_index=0 1170idreg=0 1171pio_addr=268435456 1172pio_latency=100000 1173proc_id0=201326592 1174proc_id1=201327138 1175system=system 1176pio=system.iobus.master[1] 1177 1178[system.realview.rtc] 1179type=PL031 1180amba_id=3412017 1181clk_domain=system.clk_domain 1182eventq_index=0 1183gic=system.realview.gic 1184int_delay=100000 1185int_num=42 1186pio_addr=268529664 1187pio_latency=100000 1188system=system 1189time=Thu Jan 1 00:00:00 2009 1190pio=system.iobus.master[23] 1191 1192[system.realview.sci_fake] 1193type=AmbaFake 1194amba_id=0 1195clk_domain=system.clk_domain 1196eventq_index=0 1197ignore_access=false 1198pio_addr=268492800 1199pio_latency=100000 1200system=system 1201pio=system.iobus.master[20] 1202 1203[system.realview.smc_fake] 1204type=AmbaFake 1205amba_id=0 1206clk_domain=system.clk_domain 1207eventq_index=0 1208ignore_access=false 1209pio_addr=269357056 1210pio_latency=100000 1211system=system 1212pio=system.iobus.master[13] 1213 1214[system.realview.sp810_fake] 1215type=AmbaFake 1216amba_id=0 1217clk_domain=system.clk_domain 1218eventq_index=0 1219ignore_access=true 1220pio_addr=268439552 1221pio_latency=100000 1222system=system 1223pio=system.iobus.master[14] 1224 1225[system.realview.ssp_fake] 1226type=AmbaFake 1227amba_id=0 1228clk_domain=system.clk_domain 1229eventq_index=0 1230ignore_access=false 1231pio_addr=268488704 1232pio_latency=100000 1233system=system 1234pio=system.iobus.master[19] 1235 1236[system.realview.timer0] 1237type=Sp804 1238amba_id=1316868 1239clk_domain=system.clk_domain 1240clock0=1000000 1241clock1=1000000 1242eventq_index=0 1243gic=system.realview.gic 1244int_num0=36 1245int_num1=36 1246pio_addr=268505088 1247pio_latency=100000 1248system=system 1249pio=system.iobus.master[2] 1250 1251[system.realview.timer1] 1252type=Sp804 1253amba_id=1316868 1254clk_domain=system.clk_domain 1255clock0=1000000 1256clock1=1000000 1257eventq_index=0 1258gic=system.realview.gic 1259int_num0=37 1260int_num1=37 1261pio_addr=268509184 1262pio_latency=100000 1263system=system 1264pio=system.iobus.master[3] 1265 1266[system.realview.uart] 1267type=Pl011 1268clk_domain=system.clk_domain 1269end_on_eot=false 1270eventq_index=0 1271gic=system.realview.gic 1272int_delay=100000 1273int_num=44 1274pio_addr=268472320 1275pio_latency=100000 1276platform=system.realview 1277system=system 1278terminal=system.terminal 1279pio=system.iobus.master[0] 1280 1281[system.realview.uart1_fake] 1282type=AmbaFake 1283amba_id=0 1284clk_domain=system.clk_domain 1285eventq_index=0 1286ignore_access=false 1287pio_addr=268476416 1288pio_latency=100000 1289system=system 1290pio=system.iobus.master[10] 1291 1292[system.realview.uart2_fake] 1293type=AmbaFake 1294amba_id=0 1295clk_domain=system.clk_domain 1296eventq_index=0 1297ignore_access=false 1298pio_addr=268480512 1299pio_latency=100000 1300system=system 1301pio=system.iobus.master[11] 1302 1303[system.realview.uart3_fake] 1304type=AmbaFake 1305amba_id=0 1306clk_domain=system.clk_domain 1307eventq_index=0 1308ignore_access=false 1309pio_addr=268484608 1310pio_latency=100000 1311system=system 1312pio=system.iobus.master[12] 1313 1314[system.realview.watchdog_fake] 1315type=AmbaFake 1316amba_id=0 1317clk_domain=system.clk_domain 1318eventq_index=0 1319ignore_access=false 1320pio_addr=268500992 1321pio_latency=100000 1322system=system 1323pio=system.iobus.master[15] 1324 1325[system.terminal] 1326type=Terminal 1327eventq_index=0 1328intr_control=system.intrctrl 1329number=0 1330output=true 1331port=3456 1332 1333[system.vncserver] 1334type=VncServer 1335eventq_index=0 1336frame_capture=false 1337number=0 1338port=5900 1339 1340[system.voltage_domain] 1341type=VoltageDomain 1342eventq_index=0 1343voltage=1.000000 1344	875port=system.membus.master[6] 876 877[system.realview] 878type=RealView 879children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 880eventq_index=0 881intrctrl=system.intrctrl 882max_mem_size=268435456 883mem_start_addr=0 884pci_cfg_base=0 885system=system 886 887[system.realview.a9scu] 888type=A9SCU 889clk_domain=system.clk_domain 890eventq_index=0 891pio_addr=520093696 892pio_latency=100000 893system=system 894pio=system.membus.master[4] 895 896[system.realview.aaci_fake] 897type=AmbaFake 898amba_id=0 899clk_domain=system.clk_domain 900eventq_index=0 901ignore_access=false 902pio_addr=268451840 903pio_latency=100000 904system=system 905pio=system.iobus.master[21] 906 907[system.realview.cf_ctrl] 908type=IdeController 909BAR0=402653184 910BAR0LegacyIO=true 911BAR0Size=16 912BAR1=402653440 913BAR1LegacyIO=true 914BAR1Size=1 915BAR2=1 916BAR2LegacyIO=false 917BAR2Size=8 918BAR3=1 919BAR3LegacyIO=false 920BAR3Size=4 921BAR4=1 922BAR4LegacyIO=false 923BAR4Size=16 924BAR5=1 925BAR5LegacyIO=false 926BAR5Size=0 927BIST=0 928CacheLineSize=0 929CapabilityPtr=0 930CardbusCIS=0 931ClassCode=1 932Command=1 933DeviceID=28945 934ExpansionROM=0 935HeaderType=0 936InterruptLine=31 937InterruptPin=1 938LatencyTimer=0 939MSICAPBaseOffset=0 940MSICAPCapId=0 941MSICAPMaskBits=0 942MSICAPMsgAddr=0 943MSICAPMsgCtrl=0 944MSICAPMsgData=0 945MSICAPMsgUpperAddr=0 946MSICAPNextCapability=0 947MSICAPPendingBits=0 948MSIXCAPBaseOffset=0 949MSIXCAPCapId=0 950MSIXCAPNextCapability=0 951MSIXMsgCtrl=0 952MSIXPbaOffset=0 953MSIXTableOffset=0 954MaximumLatency=0 955MinimumGrant=0 956PMCAPBaseOffset=0 957PMCAPCapId=0 958PMCAPCapabilities=0 959PMCAPCtrlStatus=0 960PMCAPNextCapability=0 961PXCAPBaseOffset=0 962PXCAPCapId=0 963PXCAPCapabilities=0 964PXCAPDevCap2=0 965PXCAPDevCapabilities=0 966PXCAPDevCtrl=0 967PXCAPDevCtrl2=0 968PXCAPDevStatus=0 969PXCAPLinkCap=0 970PXCAPLinkCtrl=0 971PXCAPLinkStatus=0 972PXCAPNextCapability=0 973ProgIF=133 974Revision=0 975Status=640 976SubClassCode=1 977SubsystemID=0 978SubsystemVendorID=0 979VendorID=32902 980clk_domain=system.clk_domain 981config_latency=20000 982ctrl_offset=2 983disks=system.cf0 984eventq_index=0 985io_shift=1 986pci_bus=2 987pci_dev=7 988pci_func=0 989pio_latency=30000 990platform=system.realview 991system=system 992config=system.iobus.master[8] 993dma=system.iobus.slave[2] 994pio=system.iobus.master[7] 995 996[system.realview.clcd] 997type=Pl111 998amba_id=1315089 999clk_domain=system.clk_domain 1000enable_capture=true 1001eventq_index=0 1002gic=system.realview.gic 1003int_num=55 1004pio_addr=268566528 1005pio_latency=10000 1006pixel_clock=41667 1007system=system 1008vnc=system.vncserver 1009dma=system.iobus.slave[1] 1010pio=system.iobus.master[4] 1011 1012[system.realview.dmac_fake] 1013type=AmbaFake 1014amba_id=0 1015clk_domain=system.clk_domain 1016eventq_index=0 1017ignore_access=false 1018pio_addr=268632064 1019pio_latency=100000 1020system=system 1021pio=system.iobus.master[9] 1022 1023[system.realview.flash_fake] 1024type=IsaFake 1025clk_domain=system.clk_domain 1026eventq_index=0 1027fake_mem=true 1028pio_addr=1073741824 1029pio_latency=100000 1030pio_size=536870912 1031ret_bad_addr=false 1032ret_data16=65535 1033ret_data32=4294967295 1034ret_data64=18446744073709551615 1035ret_data8=255 1036system=system 1037update_data=false 1038warn_access= 1039pio=system.iobus.master[24] 1040 1041[system.realview.gic] 1042type=Pl390 1043clk_domain=system.clk_domain 1044cpu_addr=520093952 1045cpu_pio_delay=10000 1046dist_addr=520097792 1047dist_pio_delay=10000 1048eventq_index=0 1049int_latency=10000 1050it_lines=128 1051msix_addr=0 1052platform=system.realview 1053system=system 1054pio=system.membus.master[2] 1055 1056[system.realview.gpio0_fake] 1057type=AmbaFake 1058amba_id=0 1059clk_domain=system.clk_domain 1060eventq_index=0 1061ignore_access=false 1062pio_addr=268513280 1063pio_latency=100000 1064system=system 1065pio=system.iobus.master[16] 1066 1067[system.realview.gpio1_fake] 1068type=AmbaFake 1069amba_id=0 1070clk_domain=system.clk_domain 1071eventq_index=0 1072ignore_access=false 1073pio_addr=268517376 1074pio_latency=100000 1075system=system 1076pio=system.iobus.master[17] 1077 1078[system.realview.gpio2_fake] 1079type=AmbaFake 1080amba_id=0 1081clk_domain=system.clk_domain 1082eventq_index=0 1083ignore_access=false 1084pio_addr=268521472 1085pio_latency=100000 1086system=system 1087pio=system.iobus.master[18] 1088 1089[system.realview.kmi0] 1090type=Pl050 1091amba_id=1314896 1092clk_domain=system.clk_domain 1093eventq_index=0 1094gic=system.realview.gic 1095int_delay=1000000 1096int_num=52 1097is_mouse=false 1098pio_addr=268460032 1099pio_latency=100000 1100system=system 1101vnc=system.vncserver 1102pio=system.iobus.master[5] 1103 1104[system.realview.kmi1] 1105type=Pl050 1106amba_id=1314896 1107clk_domain=system.clk_domain 1108eventq_index=0 1109gic=system.realview.gic 1110int_delay=1000000 1111int_num=53 1112is_mouse=true 1113pio_addr=268464128 1114pio_latency=100000 1115system=system 1116vnc=system.vncserver 1117pio=system.iobus.master[6] 1118 1119[system.realview.l2x0_fake] 1120type=IsaFake 1121clk_domain=system.clk_domain 1122eventq_index=0 1123fake_mem=false 1124pio_addr=520101888 1125pio_latency=100000 1126pio_size=4095 1127ret_bad_addr=false 1128ret_data16=65535 1129ret_data32=4294967295 1130ret_data64=18446744073709551615 1131ret_data8=255 1132system=system 1133update_data=false 1134warn_access= 1135pio=system.membus.master[3] 1136 1137[system.realview.local_cpu_timer] 1138type=CpuLocalTimer 1139clk_domain=system.clk_domain 1140eventq_index=0 1141gic=system.realview.gic 1142int_num_timer=29 1143int_num_watchdog=30 1144pio_addr=520095232 1145pio_latency=100000 1146system=system 1147pio=system.membus.master[5] 1148 1149[system.realview.mmc_fake] 1150type=AmbaFake 1151amba_id=0 1152clk_domain=system.clk_domain 1153eventq_index=0 1154ignore_access=false 1155pio_addr=268455936 1156pio_latency=100000 1157system=system 1158pio=system.iobus.master[22] 1159 1160[system.realview.nvmem] 1161type=SimpleMemory 1162bandwidth=73.000000 1163clk_domain=system.clk_domain 1164conf_table_reported=false 1165eventq_index=0 1166in_addr_map=true 1167latency=30000 1168latency_var=0 1169null=false 1170range=2147483648:2214592511 1171port=system.membus.master[1] 1172 1173[system.realview.realview_io] 1174type=RealViewCtrl 1175clk_domain=system.clk_domain 1176eventq_index=0 1177idreg=0 1178pio_addr=268435456 1179pio_latency=100000 1180proc_id0=201326592 1181proc_id1=201327138 1182system=system 1183pio=system.iobus.master[1] 1184 1185[system.realview.rtc] 1186type=PL031 1187amba_id=3412017 1188clk_domain=system.clk_domain 1189eventq_index=0 1190gic=system.realview.gic 1191int_delay=100000 1192int_num=42 1193pio_addr=268529664 1194pio_latency=100000 1195system=system 1196time=Thu Jan 1 00:00:00 2009 1197pio=system.iobus.master[23] 1198 1199[system.realview.sci_fake] 1200type=AmbaFake 1201amba_id=0 1202clk_domain=system.clk_domain 1203eventq_index=0 1204ignore_access=false 1205pio_addr=268492800 1206pio_latency=100000 1207system=system 1208pio=system.iobus.master[20] 1209 1210[system.realview.smc_fake] 1211type=AmbaFake 1212amba_id=0 1213clk_domain=system.clk_domain 1214eventq_index=0 1215ignore_access=false 1216pio_addr=269357056 1217pio_latency=100000 1218system=system 1219pio=system.iobus.master[13] 1220 1221[system.realview.sp810_fake] 1222type=AmbaFake 1223amba_id=0 1224clk_domain=system.clk_domain 1225eventq_index=0 1226ignore_access=true 1227pio_addr=268439552 1228pio_latency=100000 1229system=system 1230pio=system.iobus.master[14] 1231 1232[system.realview.ssp_fake] 1233type=AmbaFake 1234amba_id=0 1235clk_domain=system.clk_domain 1236eventq_index=0 1237ignore_access=false 1238pio_addr=268488704 1239pio_latency=100000 1240system=system 1241pio=system.iobus.master[19] 1242 1243[system.realview.timer0] 1244type=Sp804 1245amba_id=1316868 1246clk_domain=system.clk_domain 1247clock0=1000000 1248clock1=1000000 1249eventq_index=0 1250gic=system.realview.gic 1251int_num0=36 1252int_num1=36 1253pio_addr=268505088 1254pio_latency=100000 1255system=system 1256pio=system.iobus.master[2] 1257 1258[system.realview.timer1] 1259type=Sp804 1260amba_id=1316868 1261clk_domain=system.clk_domain 1262clock0=1000000 1263clock1=1000000 1264eventq_index=0 1265gic=system.realview.gic 1266int_num0=37 1267int_num1=37 1268pio_addr=268509184 1269pio_latency=100000 1270system=system 1271pio=system.iobus.master[3] 1272 1273[system.realview.uart] 1274type=Pl011 1275clk_domain=system.clk_domain 1276end_on_eot=false 1277eventq_index=0 1278gic=system.realview.gic 1279int_delay=100000 1280int_num=44 1281pio_addr=268472320 1282pio_latency=100000 1283platform=system.realview 1284system=system 1285terminal=system.terminal 1286pio=system.iobus.master[0] 1287 1288[system.realview.uart1_fake] 1289type=AmbaFake 1290amba_id=0 1291clk_domain=system.clk_domain 1292eventq_index=0 1293ignore_access=false 1294pio_addr=268476416 1295pio_latency=100000 1296system=system 1297pio=system.iobus.master[10] 1298 1299[system.realview.uart2_fake] 1300type=AmbaFake 1301amba_id=0 1302clk_domain=system.clk_domain 1303eventq_index=0 1304ignore_access=false 1305pio_addr=268480512 1306pio_latency=100000 1307system=system 1308pio=system.iobus.master[11] 1309 1310[system.realview.uart3_fake] 1311type=AmbaFake 1312amba_id=0 1313clk_domain=system.clk_domain 1314eventq_index=0 1315ignore_access=false 1316pio_addr=268484608 1317pio_latency=100000 1318system=system 1319pio=system.iobus.master[12] 1320 1321[system.realview.watchdog_fake] 1322type=AmbaFake 1323amba_id=0 1324clk_domain=system.clk_domain 1325eventq_index=0 1326ignore_access=false 1327pio_addr=268500992 1328pio_latency=100000 1329system=system 1330pio=system.iobus.master[15] 1331 1332[system.terminal] 1333type=Terminal 1334eventq_index=0 1335intr_control=system.intrctrl 1336number=0 1337output=true 1338port=3456 1339 1340[system.vncserver] 1341type=VncServer 1342eventq_index=0 1343frame_capture=false 1344number=0 1345port=5900 1346 1347[system.voltage_domain] 1348type=VoltageDomain 1349eventq_index=0 1350voltage=1.000000 1351