1[root]
2type=Root
3children=system
4full_system=true
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8
9[system]
10type=LinuxArmSystem
11children=bridge cf0 clk_domain cpu cpu_clk_domain intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
12atags_addr=256
13boot_loader=/dist/m5/system/binaries/boot.arm
14boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
15cache_line_size=64
16clk_domain=system.clk_domain
17dtb_filename=False
18early_kernel_symbols=false
19enable_context_switch_stats_dump=false
20flags_addr=268435504
21gic_cpu_addr=520093952
22init_param=0
23kernel=/dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
24load_addr_mask=268435455
25machine_type=RealView_PBX
26mem_mode=timing
27mem_ranges=0:134217727
28memories=system.physmem system.realview.nvmem
29multi_proc=true
30num_work_ids=16
31panic_on_oops=true
--- 8 unchanged lines hidden (view full) ---
40work_end_exit_count=0
41work_item_id=-1
42system_port=system.membus.slave[0]
43
44[system.bridge]
45type=Bridge
46clk_domain=system.clk_domain
47delay=50000
48ranges=268435456:520093695 1073741824:1610612735
49req_size=16
50resp_size=16
51master=system.iobus.slave[0]
52slave=system.membus.master[0]
53
54[system.cf0]
55type=IdeDisk
56children=image
57delay=1000000
58driveID=master
59image=system.cf0.image
60
61[system.cf0.image]
62type=CowDiskImage
63children=child
64child=system.cf0.image.child
65image_file=
66read_only=false
67table_size=65536
68
69[system.cf0.image.child]
70type=RawDiskImage
71image_file=/dist/m5/system/disks/linux-arm-ael.img
72read_only=true
73
74[system.clk_domain]
75type=SrcClockDomain
76clock=1000
77voltage_domain=system.voltage_domain
78
79[system.cpu]
80type=DerivO3CPU
81children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer
82LFSTSize=1024
83LQEntries=32
84LSQCheckLoads=true
--- 15 unchanged lines hidden (view full) ---
100decodeToFetchDelay=1
101decodeToRenameDelay=1
102decodeWidth=8
103dispatchWidth=8
104do_checkpoint_insts=true
105do_quiesce=true
106do_statistics_insts=true
107dtb=system.cpu.dtb
108fetchToDecodeDelay=1
109fetchTrapLatency=1
110fetchWidth=8
111forwardComSize=5
112fuPool=system.cpu.fuPool
113function_trace=false
114function_trace_start=0
115iewToCommitDelay=1
--- 48 unchanged lines hidden (view full) ---
164
165[system.cpu.branchPred]
166type=BranchPredictor
167BTBEntries=4096
168BTBTagSize=16
169RASSize=16
170choiceCtrBits=2
171choicePredictorSize=8192
172globalCtrBits=2
173globalPredictorSize=8192
174instShiftAmt=2
175localCtrBits=2
176localHistoryTableSize=2048
177localPredictorSize=2048
178numThreads=1
179predType=tournament
180
181[system.cpu.dcache]
182type=BaseCache
183children=tags
184addr_ranges=0:18446744073709551615
185assoc=4
186clk_domain=system.cpu_clk_domain
187forward_snoops=true
188hit_latency=2
189is_top_level=true
190max_miss_count=0
191mshrs=4
192prefetch_on_access=false
193prefetcher=Null
194response_latency=2
--- 6 unchanged lines hidden (view full) ---
201cpu_side=system.cpu.dcache_port
202mem_side=system.cpu.toL2Bus.slave[1]
203
204[system.cpu.dcache.tags]
205type=LRU
206assoc=4
207block_size=64
208clk_domain=system.cpu_clk_domain
209hit_latency=2
210size=32768
211
212[system.cpu.dtb]
213type=ArmTLB
214children=walker
215size=64
216walker=system.cpu.dtb.walker
217
218[system.cpu.dtb.walker]
219type=ArmTableWalker
220clk_domain=system.cpu_clk_domain
221num_squash_per_cycle=2
222sys=system
223port=system.cpu.toL2Bus.slave[3]
224
225[system.cpu.fuPool]
226type=FUPool
227children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
228FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
229
230[system.cpu.fuPool.FUList0]
231type=FUDesc
232children=opList
233count=6
234opList=system.cpu.fuPool.FUList0.opList
235
236[system.cpu.fuPool.FUList0.opList]
237type=OpDesc
238issueLat=1
239opClass=IntAlu
240opLat=1
241
242[system.cpu.fuPool.FUList1]
243type=FUDesc
244children=opList0 opList1
245count=2
246opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
247
248[system.cpu.fuPool.FUList1.opList0]
249type=OpDesc
250issueLat=1
251opClass=IntMult
252opLat=3
253
254[system.cpu.fuPool.FUList1.opList1]
255type=OpDesc
256issueLat=19
257opClass=IntDiv
258opLat=20
259
260[system.cpu.fuPool.FUList2]
261type=FUDesc
262children=opList0 opList1 opList2
263count=4
264opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
265
266[system.cpu.fuPool.FUList2.opList0]
267type=OpDesc
268issueLat=1
269opClass=FloatAdd
270opLat=2
271
272[system.cpu.fuPool.FUList2.opList1]
273type=OpDesc
274issueLat=1
275opClass=FloatCmp
276opLat=2
277
278[system.cpu.fuPool.FUList2.opList2]
279type=OpDesc
280issueLat=1
281opClass=FloatCvt
282opLat=2
283
284[system.cpu.fuPool.FUList3]
285type=FUDesc
286children=opList0 opList1 opList2
287count=2
288opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
289
290[system.cpu.fuPool.FUList3.opList0]
291type=OpDesc
292issueLat=1
293opClass=FloatMult
294opLat=4
295
296[system.cpu.fuPool.FUList3.opList1]
297type=OpDesc
298issueLat=12
299opClass=FloatDiv
300opLat=12
301
302[system.cpu.fuPool.FUList3.opList2]
303type=OpDesc
304issueLat=24
305opClass=FloatSqrt
306opLat=24
307
308[system.cpu.fuPool.FUList4]
309type=FUDesc
310children=opList
311count=0
312opList=system.cpu.fuPool.FUList4.opList
313
314[system.cpu.fuPool.FUList4.opList]
315type=OpDesc
316issueLat=1
317opClass=MemRead
318opLat=1
319
320[system.cpu.fuPool.FUList5]
321type=FUDesc
322children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
323count=4
324opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
325
326[system.cpu.fuPool.FUList5.opList00]
327type=OpDesc
328issueLat=1
329opClass=SimdAdd
330opLat=1
331
332[system.cpu.fuPool.FUList5.opList01]
333type=OpDesc
334issueLat=1
335opClass=SimdAddAcc
336opLat=1
337
338[system.cpu.fuPool.FUList5.opList02]
339type=OpDesc
340issueLat=1
341opClass=SimdAlu
342opLat=1
343
344[system.cpu.fuPool.FUList5.opList03]
345type=OpDesc
346issueLat=1
347opClass=SimdCmp
348opLat=1
349
350[system.cpu.fuPool.FUList5.opList04]
351type=OpDesc
352issueLat=1
353opClass=SimdCvt
354opLat=1
355
356[system.cpu.fuPool.FUList5.opList05]
357type=OpDesc
358issueLat=1
359opClass=SimdMisc
360opLat=1
361
362[system.cpu.fuPool.FUList5.opList06]
363type=OpDesc
364issueLat=1
365opClass=SimdMult
366opLat=1
367
368[system.cpu.fuPool.FUList5.opList07]
369type=OpDesc
370issueLat=1
371opClass=SimdMultAcc
372opLat=1
373
374[system.cpu.fuPool.FUList5.opList08]
375type=OpDesc
376issueLat=1
377opClass=SimdShift
378opLat=1
379
380[system.cpu.fuPool.FUList5.opList09]
381type=OpDesc
382issueLat=1
383opClass=SimdShiftAcc
384opLat=1
385
386[system.cpu.fuPool.FUList5.opList10]
387type=OpDesc
388issueLat=1
389opClass=SimdSqrt
390opLat=1
391
392[system.cpu.fuPool.FUList5.opList11]
393type=OpDesc
394issueLat=1
395opClass=SimdFloatAdd
396opLat=1
397
398[system.cpu.fuPool.FUList5.opList12]
399type=OpDesc
400issueLat=1
401opClass=SimdFloatAlu
402opLat=1
403
404[system.cpu.fuPool.FUList5.opList13]
405type=OpDesc
406issueLat=1
407opClass=SimdFloatCmp
408opLat=1
409
410[system.cpu.fuPool.FUList5.opList14]
411type=OpDesc
412issueLat=1
413opClass=SimdFloatCvt
414opLat=1
415
416[system.cpu.fuPool.FUList5.opList15]
417type=OpDesc
418issueLat=1
419opClass=SimdFloatDiv
420opLat=1
421
422[system.cpu.fuPool.FUList5.opList16]
423type=OpDesc
424issueLat=1
425opClass=SimdFloatMisc
426opLat=1
427
428[system.cpu.fuPool.FUList5.opList17]
429type=OpDesc
430issueLat=1
431opClass=SimdFloatMult
432opLat=1
433
434[system.cpu.fuPool.FUList5.opList18]
435type=OpDesc
436issueLat=1
437opClass=SimdFloatMultAcc
438opLat=1
439
440[system.cpu.fuPool.FUList5.opList19]
441type=OpDesc
442issueLat=1
443opClass=SimdFloatSqrt
444opLat=1
445
446[system.cpu.fuPool.FUList6]
447type=FUDesc
448children=opList
449count=0
450opList=system.cpu.fuPool.FUList6.opList
451
452[system.cpu.fuPool.FUList6.opList]
453type=OpDesc
454issueLat=1
455opClass=MemWrite
456opLat=1
457
458[system.cpu.fuPool.FUList7]
459type=FUDesc
460children=opList0 opList1
461count=4
462opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
463
464[system.cpu.fuPool.FUList7.opList0]
465type=OpDesc
466issueLat=1
467opClass=MemRead
468opLat=1
469
470[system.cpu.fuPool.FUList7.opList1]
471type=OpDesc
472issueLat=1
473opClass=MemWrite
474opLat=1
475
476[system.cpu.fuPool.FUList8]
477type=FUDesc
478children=opList
479count=1
480opList=system.cpu.fuPool.FUList8.opList
481
482[system.cpu.fuPool.FUList8.opList]
483type=OpDesc
484issueLat=3
485opClass=IprAccess
486opLat=3
487
488[system.cpu.icache]
489type=BaseCache
490children=tags
491addr_ranges=0:18446744073709551615
492assoc=1
493clk_domain=system.cpu_clk_domain
494forward_snoops=true
495hit_latency=2
496is_top_level=true
497max_miss_count=0
498mshrs=4
499prefetch_on_access=false
500prefetcher=Null
501response_latency=2
--- 6 unchanged lines hidden (view full) ---
508cpu_side=system.cpu.icache_port
509mem_side=system.cpu.toL2Bus.slave[0]
510
511[system.cpu.icache.tags]
512type=LRU
513assoc=1
514block_size=64
515clk_domain=system.cpu_clk_domain
516hit_latency=2
517size=32768
518
519[system.cpu.interrupts]
520type=ArmInterrupts
521
522[system.cpu.isa]
523type=ArmISA
524fpsid=1090793632
525id_isar0=34607377
526id_isar1=34677009
527id_isar2=555950401
528id_isar3=17899825
529id_isar4=268501314
530id_isar5=0
531id_mmfr0=3
532id_mmfr1=0
533id_mmfr2=19070976
534id_mmfr3=4027589137
535id_pfr0=49
536id_pfr1=1
537midr=890224640
538
539[system.cpu.itb]
540type=ArmTLB
541children=walker
542size=64
543walker=system.cpu.itb.walker
544
545[system.cpu.itb.walker]
546type=ArmTableWalker
547clk_domain=system.cpu_clk_domain
548num_squash_per_cycle=2
549sys=system
550port=system.cpu.toL2Bus.slave[2]
551
552[system.cpu.l2cache]
553type=BaseCache
554children=tags
555addr_ranges=0:18446744073709551615
556assoc=8
557clk_domain=system.cpu_clk_domain
558forward_snoops=true
559hit_latency=20
560is_top_level=false
561max_miss_count=0
562mshrs=20
563prefetch_on_access=false
564prefetcher=Null
565response_latency=20
--- 6 unchanged lines hidden (view full) ---
572cpu_side=system.cpu.toL2Bus.master[0]
573mem_side=system.membus.slave[1]
574
575[system.cpu.l2cache.tags]
576type=LRU
577assoc=8
578block_size=64
579clk_domain=system.cpu_clk_domain
580hit_latency=20
581size=4194304
582
583[system.cpu.toL2Bus]
584type=CoherentBus
585clk_domain=system.cpu_clk_domain
586header_cycles=1
587system=system
588use_default_range=false
589width=32
590master=system.cpu.l2cache.cpu_side
591slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
592
593[system.cpu.tracer]
594type=ExeTracer
595
596[system.cpu_clk_domain]
597type=SrcClockDomain
598clock=500
599voltage_domain=system.voltage_domain
600
601[system.intrctrl]
602type=IntrControl
603sys=system
604
605[system.iobus]
606type=NoncoherentBus
607clk_domain=system.clk_domain
608header_cycles=1
609use_default_range=false
610width=8
611master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side
612slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
613
614[system.iocache]
615type=BaseCache
616children=tags
617addr_ranges=0:134217727
618assoc=8
619clk_domain=system.clk_domain
620forward_snoops=false
621hit_latency=50
622is_top_level=true
623max_miss_count=0
624mshrs=20
625prefetch_on_access=false
626prefetcher=Null
627response_latency=50
--- 6 unchanged lines hidden (view full) ---
634cpu_side=system.iobus.master[25]
635mem_side=system.membus.slave[2]
636
637[system.iocache.tags]
638type=LRU
639assoc=8
640block_size=64
641clk_domain=system.clk_domain
642hit_latency=50
643size=1024
644
645[system.membus]
646type=CoherentBus
647children=badaddr_responder
648clk_domain=system.clk_domain
649header_cycles=1
650system=system
651use_default_range=false
652width=8
653default=system.membus.badaddr_responder.pio
654master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
655slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
656
657[system.membus.badaddr_responder]
658type=IsaFake
659clk_domain=system.clk_domain
660fake_mem=false
661pio_addr=0
662pio_latency=100000
663pio_size=8
664ret_bad_addr=true
665ret_data16=65535
666ret_data32=4294967295
667ret_data64=18446744073709551615
--- 10 unchanged lines hidden (view full) ---
678banks_per_rank=8
679burst_length=8
680channels=1
681clk_domain=system.clk_domain
682conf_table_reported=true
683device_bus_width=8
684device_rowbuffer_size=1024
685devices_per_rank=8
686in_addr_map=true
687mem_sched_policy=frfcfs
688null=false
689page_policy=open
690range=0:134217727
691ranks_per_channel=2
692read_buffer_size=32
693static_backend_latency=10000
694static_frontend_latency=10000
695tBURST=5000
696tCL=13750
697tRCD=13750
698tREFI=7800000
699tRFC=300000
700tRP=13750
701tWTR=7500
702tXAW=40000
703write_buffer_size=32
704write_thresh_perc=70
705port=system.membus.master[6]
706
707[system.realview]
708type=RealView
709children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
710intrctrl=system.intrctrl
711max_mem_size=268435456
712mem_start_addr=0
713pci_cfg_base=0
714system=system
715
716[system.realview.a9scu]
717type=A9SCU
718clk_domain=system.clk_domain
719pio_addr=520093696
720pio_latency=100000
721system=system
722pio=system.membus.master[4]
723
724[system.realview.aaci_fake]
725type=AmbaFake
726amba_id=0
727clk_domain=system.clk_domain
728ignore_access=false
729pio_addr=268451840
730pio_latency=100000
731system=system
732pio=system.iobus.master[21]
733
734[system.realview.cf_ctrl]
735type=IdeController
--- 12 unchanged lines hidden (view full) ---
748BAR4=1
749BAR4LegacyIO=false
750BAR4Size=16
751BAR5=1
752BAR5LegacyIO=false
753BAR5Size=0
754BIST=0
755CacheLineSize=0
756CardbusCIS=0
757ClassCode=1
758Command=1
759DeviceID=28945
760ExpansionROM=0
761HeaderType=0
762InterruptLine=31
763InterruptPin=1
764LatencyTimer=0
765MaximumLatency=0
766MinimumGrant=0
767ProgIF=133
768Revision=0
769Status=640
770SubClassCode=1
771SubsystemID=0
772SubsystemVendorID=0
773VendorID=32902
774clk_domain=system.clk_domain
775config_latency=20000
776ctrl_offset=2
777disks=system.cf0
778io_shift=1
779pci_bus=2
780pci_dev=7
781pci_func=0
782pio_latency=30000
783platform=system.realview
784system=system
785config=system.iobus.master[8]
786dma=system.iobus.slave[2]
787pio=system.iobus.master[7]
788
789[system.realview.clcd]
790type=Pl111
791amba_id=1315089
792clk_domain=system.clk_domain
793gic=system.realview.gic
794int_num=55
795pio_addr=268566528
796pio_latency=10000
797pixel_clock=41667
798system=system
799vnc=system.vncserver
800dma=system.iobus.slave[1]
801pio=system.iobus.master[4]
802
803[system.realview.dmac_fake]
804type=AmbaFake
805amba_id=0
806clk_domain=system.clk_domain
807ignore_access=false
808pio_addr=268632064
809pio_latency=100000
810system=system
811pio=system.iobus.master[9]
812
813[system.realview.flash_fake]
814type=IsaFake
815clk_domain=system.clk_domain
816fake_mem=true
817pio_addr=1073741824
818pio_latency=100000
819pio_size=536870912
820ret_bad_addr=false
821ret_data16=65535
822ret_data32=4294967295
823ret_data64=18446744073709551615
--- 5 unchanged lines hidden (view full) ---
829
830[system.realview.gic]
831type=Pl390
832clk_domain=system.clk_domain
833cpu_addr=520093952
834cpu_pio_delay=10000
835dist_addr=520097792
836dist_pio_delay=10000
837int_latency=10000
838it_lines=128
839platform=system.realview
840system=system
841pio=system.membus.master[2]
842
843[system.realview.gpio0_fake]
844type=AmbaFake
845amba_id=0
846clk_domain=system.clk_domain
847ignore_access=false
848pio_addr=268513280
849pio_latency=100000
850system=system
851pio=system.iobus.master[16]
852
853[system.realview.gpio1_fake]
854type=AmbaFake
855amba_id=0
856clk_domain=system.clk_domain
857ignore_access=false
858pio_addr=268517376
859pio_latency=100000
860system=system
861pio=system.iobus.master[17]
862
863[system.realview.gpio2_fake]
864type=AmbaFake
865amba_id=0
866clk_domain=system.clk_domain
867ignore_access=false
868pio_addr=268521472
869pio_latency=100000
870system=system
871pio=system.iobus.master[18]
872
873[system.realview.kmi0]
874type=Pl050
875amba_id=1314896
876clk_domain=system.clk_domain
877gic=system.realview.gic
878int_delay=1000000
879int_num=52
880is_mouse=false
881pio_addr=268460032
882pio_latency=100000
883system=system
884vnc=system.vncserver
885pio=system.iobus.master[5]
886
887[system.realview.kmi1]
888type=Pl050
889amba_id=1314896
890clk_domain=system.clk_domain
891gic=system.realview.gic
892int_delay=1000000
893int_num=53
894is_mouse=true
895pio_addr=268464128
896pio_latency=100000
897system=system
898vnc=system.vncserver
899pio=system.iobus.master[6]
900
901[system.realview.l2x0_fake]
902type=IsaFake
903clk_domain=system.clk_domain
904fake_mem=false
905pio_addr=520101888
906pio_latency=100000
907pio_size=4095
908ret_bad_addr=false
909ret_data16=65535
910ret_data32=4294967295
911ret_data64=18446744073709551615
912ret_data8=255
913system=system
914update_data=false
915warn_access=
916pio=system.membus.master[3]
917
918[system.realview.local_cpu_timer]
919type=CpuLocalTimer
920clk_domain=system.clk_domain
921gic=system.realview.gic
922int_num_timer=29
923int_num_watchdog=30
924pio_addr=520095232
925pio_latency=100000
926system=system
927pio=system.membus.master[5]
928
929[system.realview.mmc_fake]
930type=AmbaFake
931amba_id=0
932clk_domain=system.clk_domain
933ignore_access=false
934pio_addr=268455936
935pio_latency=100000
936system=system
937pio=system.iobus.master[22]
938
939[system.realview.nvmem]
940type=SimpleMemory
941bandwidth=73.000000
942clk_domain=system.clk_domain
943conf_table_reported=false
944in_addr_map=true
945latency=30000
946latency_var=0
947null=false
948range=2147483648:2214592511
949port=system.membus.master[1]
950
951[system.realview.realview_io]
952type=RealViewCtrl
953clk_domain=system.clk_domain
954idreg=0
955pio_addr=268435456
956pio_latency=100000
957proc_id0=201326592
958proc_id1=201327138
959system=system
960pio=system.iobus.master[1]
961
962[system.realview.rtc]
963type=PL031
964amba_id=3412017
965clk_domain=system.clk_domain
966gic=system.realview.gic
967int_delay=100000
968int_num=42
969pio_addr=268529664
970pio_latency=100000
971system=system
972time=Thu Jan 1 00:00:00 2009
973pio=system.iobus.master[23]
974
975[system.realview.sci_fake]
976type=AmbaFake
977amba_id=0
978clk_domain=system.clk_domain
979ignore_access=false
980pio_addr=268492800
981pio_latency=100000
982system=system
983pio=system.iobus.master[20]
984
985[system.realview.smc_fake]
986type=AmbaFake
987amba_id=0
988clk_domain=system.clk_domain
989ignore_access=false
990pio_addr=269357056
991pio_latency=100000
992system=system
993pio=system.iobus.master[13]
994
995[system.realview.sp810_fake]
996type=AmbaFake
997amba_id=0
998clk_domain=system.clk_domain
999ignore_access=true
1000pio_addr=268439552
1001pio_latency=100000
1002system=system
1003pio=system.iobus.master[14]
1004
1005[system.realview.ssp_fake]
1006type=AmbaFake
1007amba_id=0
1008clk_domain=system.clk_domain
1009ignore_access=false
1010pio_addr=268488704
1011pio_latency=100000
1012system=system
1013pio=system.iobus.master[19]
1014
1015[system.realview.timer0]
1016type=Sp804
1017amba_id=1316868
1018clk_domain=system.clk_domain
1019clock0=1000000
1020clock1=1000000
1021gic=system.realview.gic
1022int_num0=36
1023int_num1=36
1024pio_addr=268505088
1025pio_latency=100000
1026system=system
1027pio=system.iobus.master[2]
1028
1029[system.realview.timer1]
1030type=Sp804
1031amba_id=1316868
1032clk_domain=system.clk_domain
1033clock0=1000000
1034clock1=1000000
1035gic=system.realview.gic
1036int_num0=37
1037int_num1=37
1038pio_addr=268509184
1039pio_latency=100000
1040system=system
1041pio=system.iobus.master[3]
1042
1043[system.realview.uart]
1044type=Pl011
1045clk_domain=system.clk_domain
1046end_on_eot=false
1047gic=system.realview.gic
1048int_delay=100000
1049int_num=44
1050pio_addr=268472320
1051pio_latency=100000
1052platform=system.realview
1053system=system
1054terminal=system.terminal
1055pio=system.iobus.master[0]
1056
1057[system.realview.uart1_fake]
1058type=AmbaFake
1059amba_id=0
1060clk_domain=system.clk_domain
1061ignore_access=false
1062pio_addr=268476416
1063pio_latency=100000
1064system=system
1065pio=system.iobus.master[10]
1066
1067[system.realview.uart2_fake]
1068type=AmbaFake
1069amba_id=0
1070clk_domain=system.clk_domain
1071ignore_access=false
1072pio_addr=268480512
1073pio_latency=100000
1074system=system
1075pio=system.iobus.master[11]
1076
1077[system.realview.uart3_fake]
1078type=AmbaFake
1079amba_id=0
1080clk_domain=system.clk_domain
1081ignore_access=false
1082pio_addr=268484608
1083pio_latency=100000
1084system=system
1085pio=system.iobus.master[12]
1086
1087[system.realview.watchdog_fake]
1088type=AmbaFake
1089amba_id=0
1090clk_domain=system.clk_domain
1091ignore_access=false
1092pio_addr=268500992
1093pio_latency=100000
1094system=system
1095pio=system.iobus.master[15]
1096
1097[system.terminal]
1098type=Terminal
1099intr_control=system.intrctrl
1100number=0
1101output=true
1102port=3456
1103
1104[system.vncserver]
1105type=VncServer
1106frame_capture=false
1107number=0
1108port=5900
1109
1110[system.voltage_domain]
1111type=VoltageDomain
1112voltage=1.000000
1113
2type=Root
3children=system
4full_system=true
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8
9[system]
10type=LinuxArmSystem
11children=bridge cf0 clk_domain cpu cpu_clk_domain intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
12atags_addr=256
13boot_loader=/dist/m5/system/binaries/boot.arm
14boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
15cache_line_size=64
16clk_domain=system.clk_domain
17dtb_filename=False
18early_kernel_symbols=false
19enable_context_switch_stats_dump=false
20flags_addr=268435504
21gic_cpu_addr=520093952
22init_param=0
23kernel=/dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
24load_addr_mask=268435455
25machine_type=RealView_PBX
26mem_mode=timing
27mem_ranges=0:134217727
28memories=system.physmem system.realview.nvmem
29multi_proc=true
30num_work_ids=16
31panic_on_oops=true
--- 8 unchanged lines hidden (view full) ---
40work_end_exit_count=0
41work_item_id=-1
42system_port=system.membus.slave[0]
43
44[system.bridge]
45type=Bridge
46clk_domain=system.clk_domain
47delay=50000
48ranges=268435456:520093695 1073741824:1610612735
49req_size=16
50resp_size=16
51master=system.iobus.slave[0]
52slave=system.membus.master[0]
53
54[system.cf0]
55type=IdeDisk
56children=image
57delay=1000000
58driveID=master
59image=system.cf0.image
60
61[system.cf0.image]
62type=CowDiskImage
63children=child
64child=system.cf0.image.child
65image_file=
66read_only=false
67table_size=65536
68
69[system.cf0.image.child]
70type=RawDiskImage
71image_file=/dist/m5/system/disks/linux-arm-ael.img
72read_only=true
73
74[system.clk_domain]
75type=SrcClockDomain
76clock=1000
77voltage_domain=system.voltage_domain
78
79[system.cpu]
80type=DerivO3CPU
81children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer
82LFSTSize=1024
83LQEntries=32
84LSQCheckLoads=true
--- 15 unchanged lines hidden (view full) ---
100decodeToFetchDelay=1
101decodeToRenameDelay=1
102decodeWidth=8
103dispatchWidth=8
104do_checkpoint_insts=true
105do_quiesce=true
106do_statistics_insts=true
107dtb=system.cpu.dtb
108fetchToDecodeDelay=1
109fetchTrapLatency=1
110fetchWidth=8
111forwardComSize=5
112fuPool=system.cpu.fuPool
113function_trace=false
114function_trace_start=0
115iewToCommitDelay=1
--- 48 unchanged lines hidden (view full) ---
164
165[system.cpu.branchPred]
166type=BranchPredictor
167BTBEntries=4096
168BTBTagSize=16
169RASSize=16
170choiceCtrBits=2
171choicePredictorSize=8192
172globalCtrBits=2
173globalPredictorSize=8192
174instShiftAmt=2
175localCtrBits=2
176localHistoryTableSize=2048
177localPredictorSize=2048
178numThreads=1
179predType=tournament
180
181[system.cpu.dcache]
182type=BaseCache
183children=tags
184addr_ranges=0:18446744073709551615
185assoc=4
186clk_domain=system.cpu_clk_domain
187forward_snoops=true
188hit_latency=2
189is_top_level=true
190max_miss_count=0
191mshrs=4
192prefetch_on_access=false
193prefetcher=Null
194response_latency=2
--- 6 unchanged lines hidden (view full) ---
201cpu_side=system.cpu.dcache_port
202mem_side=system.cpu.toL2Bus.slave[1]
203
204[system.cpu.dcache.tags]
205type=LRU
206assoc=4
207block_size=64
208clk_domain=system.cpu_clk_domain
209hit_latency=2
210size=32768
211
212[system.cpu.dtb]
213type=ArmTLB
214children=walker
215size=64
216walker=system.cpu.dtb.walker
217
218[system.cpu.dtb.walker]
219type=ArmTableWalker
220clk_domain=system.cpu_clk_domain
221num_squash_per_cycle=2
222sys=system
223port=system.cpu.toL2Bus.slave[3]
224
225[system.cpu.fuPool]
226type=FUPool
227children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
228FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
229
230[system.cpu.fuPool.FUList0]
231type=FUDesc
232children=opList
233count=6
234opList=system.cpu.fuPool.FUList0.opList
235
236[system.cpu.fuPool.FUList0.opList]
237type=OpDesc
238issueLat=1
239opClass=IntAlu
240opLat=1
241
242[system.cpu.fuPool.FUList1]
243type=FUDesc
244children=opList0 opList1
245count=2
246opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
247
248[system.cpu.fuPool.FUList1.opList0]
249type=OpDesc
250issueLat=1
251opClass=IntMult
252opLat=3
253
254[system.cpu.fuPool.FUList1.opList1]
255type=OpDesc
256issueLat=19
257opClass=IntDiv
258opLat=20
259
260[system.cpu.fuPool.FUList2]
261type=FUDesc
262children=opList0 opList1 opList2
263count=4
264opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
265
266[system.cpu.fuPool.FUList2.opList0]
267type=OpDesc
268issueLat=1
269opClass=FloatAdd
270opLat=2
271
272[system.cpu.fuPool.FUList2.opList1]
273type=OpDesc
274issueLat=1
275opClass=FloatCmp
276opLat=2
277
278[system.cpu.fuPool.FUList2.opList2]
279type=OpDesc
280issueLat=1
281opClass=FloatCvt
282opLat=2
283
284[system.cpu.fuPool.FUList3]
285type=FUDesc
286children=opList0 opList1 opList2
287count=2
288opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
289
290[system.cpu.fuPool.FUList3.opList0]
291type=OpDesc
292issueLat=1
293opClass=FloatMult
294opLat=4
295
296[system.cpu.fuPool.FUList3.opList1]
297type=OpDesc
298issueLat=12
299opClass=FloatDiv
300opLat=12
301
302[system.cpu.fuPool.FUList3.opList2]
303type=OpDesc
304issueLat=24
305opClass=FloatSqrt
306opLat=24
307
308[system.cpu.fuPool.FUList4]
309type=FUDesc
310children=opList
311count=0
312opList=system.cpu.fuPool.FUList4.opList
313
314[system.cpu.fuPool.FUList4.opList]
315type=OpDesc
316issueLat=1
317opClass=MemRead
318opLat=1
319
320[system.cpu.fuPool.FUList5]
321type=FUDesc
322children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
323count=4
324opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
325
326[system.cpu.fuPool.FUList5.opList00]
327type=OpDesc
328issueLat=1
329opClass=SimdAdd
330opLat=1
331
332[system.cpu.fuPool.FUList5.opList01]
333type=OpDesc
334issueLat=1
335opClass=SimdAddAcc
336opLat=1
337
338[system.cpu.fuPool.FUList5.opList02]
339type=OpDesc
340issueLat=1
341opClass=SimdAlu
342opLat=1
343
344[system.cpu.fuPool.FUList5.opList03]
345type=OpDesc
346issueLat=1
347opClass=SimdCmp
348opLat=1
349
350[system.cpu.fuPool.FUList5.opList04]
351type=OpDesc
352issueLat=1
353opClass=SimdCvt
354opLat=1
355
356[system.cpu.fuPool.FUList5.opList05]
357type=OpDesc
358issueLat=1
359opClass=SimdMisc
360opLat=1
361
362[system.cpu.fuPool.FUList5.opList06]
363type=OpDesc
364issueLat=1
365opClass=SimdMult
366opLat=1
367
368[system.cpu.fuPool.FUList5.opList07]
369type=OpDesc
370issueLat=1
371opClass=SimdMultAcc
372opLat=1
373
374[system.cpu.fuPool.FUList5.opList08]
375type=OpDesc
376issueLat=1
377opClass=SimdShift
378opLat=1
379
380[system.cpu.fuPool.FUList5.opList09]
381type=OpDesc
382issueLat=1
383opClass=SimdShiftAcc
384opLat=1
385
386[system.cpu.fuPool.FUList5.opList10]
387type=OpDesc
388issueLat=1
389opClass=SimdSqrt
390opLat=1
391
392[system.cpu.fuPool.FUList5.opList11]
393type=OpDesc
394issueLat=1
395opClass=SimdFloatAdd
396opLat=1
397
398[system.cpu.fuPool.FUList5.opList12]
399type=OpDesc
400issueLat=1
401opClass=SimdFloatAlu
402opLat=1
403
404[system.cpu.fuPool.FUList5.opList13]
405type=OpDesc
406issueLat=1
407opClass=SimdFloatCmp
408opLat=1
409
410[system.cpu.fuPool.FUList5.opList14]
411type=OpDesc
412issueLat=1
413opClass=SimdFloatCvt
414opLat=1
415
416[system.cpu.fuPool.FUList5.opList15]
417type=OpDesc
418issueLat=1
419opClass=SimdFloatDiv
420opLat=1
421
422[system.cpu.fuPool.FUList5.opList16]
423type=OpDesc
424issueLat=1
425opClass=SimdFloatMisc
426opLat=1
427
428[system.cpu.fuPool.FUList5.opList17]
429type=OpDesc
430issueLat=1
431opClass=SimdFloatMult
432opLat=1
433
434[system.cpu.fuPool.FUList5.opList18]
435type=OpDesc
436issueLat=1
437opClass=SimdFloatMultAcc
438opLat=1
439
440[system.cpu.fuPool.FUList5.opList19]
441type=OpDesc
442issueLat=1
443opClass=SimdFloatSqrt
444opLat=1
445
446[system.cpu.fuPool.FUList6]
447type=FUDesc
448children=opList
449count=0
450opList=system.cpu.fuPool.FUList6.opList
451
452[system.cpu.fuPool.FUList6.opList]
453type=OpDesc
454issueLat=1
455opClass=MemWrite
456opLat=1
457
458[system.cpu.fuPool.FUList7]
459type=FUDesc
460children=opList0 opList1
461count=4
462opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
463
464[system.cpu.fuPool.FUList7.opList0]
465type=OpDesc
466issueLat=1
467opClass=MemRead
468opLat=1
469
470[system.cpu.fuPool.FUList7.opList1]
471type=OpDesc
472issueLat=1
473opClass=MemWrite
474opLat=1
475
476[system.cpu.fuPool.FUList8]
477type=FUDesc
478children=opList
479count=1
480opList=system.cpu.fuPool.FUList8.opList
481
482[system.cpu.fuPool.FUList8.opList]
483type=OpDesc
484issueLat=3
485opClass=IprAccess
486opLat=3
487
488[system.cpu.icache]
489type=BaseCache
490children=tags
491addr_ranges=0:18446744073709551615
492assoc=1
493clk_domain=system.cpu_clk_domain
494forward_snoops=true
495hit_latency=2
496is_top_level=true
497max_miss_count=0
498mshrs=4
499prefetch_on_access=false
500prefetcher=Null
501response_latency=2
--- 6 unchanged lines hidden (view full) ---
508cpu_side=system.cpu.icache_port
509mem_side=system.cpu.toL2Bus.slave[0]
510
511[system.cpu.icache.tags]
512type=LRU
513assoc=1
514block_size=64
515clk_domain=system.cpu_clk_domain
516hit_latency=2
517size=32768
518
519[system.cpu.interrupts]
520type=ArmInterrupts
521
522[system.cpu.isa]
523type=ArmISA
524fpsid=1090793632
525id_isar0=34607377
526id_isar1=34677009
527id_isar2=555950401
528id_isar3=17899825
529id_isar4=268501314
530id_isar5=0
531id_mmfr0=3
532id_mmfr1=0
533id_mmfr2=19070976
534id_mmfr3=4027589137
535id_pfr0=49
536id_pfr1=1
537midr=890224640
538
539[system.cpu.itb]
540type=ArmTLB
541children=walker
542size=64
543walker=system.cpu.itb.walker
544
545[system.cpu.itb.walker]
546type=ArmTableWalker
547clk_domain=system.cpu_clk_domain
548num_squash_per_cycle=2
549sys=system
550port=system.cpu.toL2Bus.slave[2]
551
552[system.cpu.l2cache]
553type=BaseCache
554children=tags
555addr_ranges=0:18446744073709551615
556assoc=8
557clk_domain=system.cpu_clk_domain
558forward_snoops=true
559hit_latency=20
560is_top_level=false
561max_miss_count=0
562mshrs=20
563prefetch_on_access=false
564prefetcher=Null
565response_latency=20
--- 6 unchanged lines hidden (view full) ---
572cpu_side=system.cpu.toL2Bus.master[0]
573mem_side=system.membus.slave[1]
574
575[system.cpu.l2cache.tags]
576type=LRU
577assoc=8
578block_size=64
579clk_domain=system.cpu_clk_domain
580hit_latency=20
581size=4194304
582
583[system.cpu.toL2Bus]
584type=CoherentBus
585clk_domain=system.cpu_clk_domain
586header_cycles=1
587system=system
588use_default_range=false
589width=32
590master=system.cpu.l2cache.cpu_side
591slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
592
593[system.cpu.tracer]
594type=ExeTracer
595
596[system.cpu_clk_domain]
597type=SrcClockDomain
598clock=500
599voltage_domain=system.voltage_domain
600
601[system.intrctrl]
602type=IntrControl
603sys=system
604
605[system.iobus]
606type=NoncoherentBus
607clk_domain=system.clk_domain
608header_cycles=1
609use_default_range=false
610width=8
611master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side
612slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
613
614[system.iocache]
615type=BaseCache
616children=tags
617addr_ranges=0:134217727
618assoc=8
619clk_domain=system.clk_domain
620forward_snoops=false
621hit_latency=50
622is_top_level=true
623max_miss_count=0
624mshrs=20
625prefetch_on_access=false
626prefetcher=Null
627response_latency=50
--- 6 unchanged lines hidden (view full) ---
634cpu_side=system.iobus.master[25]
635mem_side=system.membus.slave[2]
636
637[system.iocache.tags]
638type=LRU
639assoc=8
640block_size=64
641clk_domain=system.clk_domain
642hit_latency=50
643size=1024
644
645[system.membus]
646type=CoherentBus
647children=badaddr_responder
648clk_domain=system.clk_domain
649header_cycles=1
650system=system
651use_default_range=false
652width=8
653default=system.membus.badaddr_responder.pio
654master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
655slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
656
657[system.membus.badaddr_responder]
658type=IsaFake
659clk_domain=system.clk_domain
660fake_mem=false
661pio_addr=0
662pio_latency=100000
663pio_size=8
664ret_bad_addr=true
665ret_data16=65535
666ret_data32=4294967295
667ret_data64=18446744073709551615
--- 10 unchanged lines hidden (view full) ---
678banks_per_rank=8
679burst_length=8
680channels=1
681clk_domain=system.clk_domain
682conf_table_reported=true
683device_bus_width=8
684device_rowbuffer_size=1024
685devices_per_rank=8
686in_addr_map=true
687mem_sched_policy=frfcfs
688null=false
689page_policy=open
690range=0:134217727
691ranks_per_channel=2
692read_buffer_size=32
693static_backend_latency=10000
694static_frontend_latency=10000
695tBURST=5000
696tCL=13750
697tRCD=13750
698tREFI=7800000
699tRFC=300000
700tRP=13750
701tWTR=7500
702tXAW=40000
703write_buffer_size=32
704write_thresh_perc=70
705port=system.membus.master[6]
706
707[system.realview]
708type=RealView
709children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
710intrctrl=system.intrctrl
711max_mem_size=268435456
712mem_start_addr=0
713pci_cfg_base=0
714system=system
715
716[system.realview.a9scu]
717type=A9SCU
718clk_domain=system.clk_domain
719pio_addr=520093696
720pio_latency=100000
721system=system
722pio=system.membus.master[4]
723
724[system.realview.aaci_fake]
725type=AmbaFake
726amba_id=0
727clk_domain=system.clk_domain
728ignore_access=false
729pio_addr=268451840
730pio_latency=100000
731system=system
732pio=system.iobus.master[21]
733
734[system.realview.cf_ctrl]
735type=IdeController
--- 12 unchanged lines hidden (view full) ---
748BAR4=1
749BAR4LegacyIO=false
750BAR4Size=16
751BAR5=1
752BAR5LegacyIO=false
753BAR5Size=0
754BIST=0
755CacheLineSize=0
756CardbusCIS=0
757ClassCode=1
758Command=1
759DeviceID=28945
760ExpansionROM=0
761HeaderType=0
762InterruptLine=31
763InterruptPin=1
764LatencyTimer=0
765MaximumLatency=0
766MinimumGrant=0
767ProgIF=133
768Revision=0
769Status=640
770SubClassCode=1
771SubsystemID=0
772SubsystemVendorID=0
773VendorID=32902
774clk_domain=system.clk_domain
775config_latency=20000
776ctrl_offset=2
777disks=system.cf0
778io_shift=1
779pci_bus=2
780pci_dev=7
781pci_func=0
782pio_latency=30000
783platform=system.realview
784system=system
785config=system.iobus.master[8]
786dma=system.iobus.slave[2]
787pio=system.iobus.master[7]
788
789[system.realview.clcd]
790type=Pl111
791amba_id=1315089
792clk_domain=system.clk_domain
793gic=system.realview.gic
794int_num=55
795pio_addr=268566528
796pio_latency=10000
797pixel_clock=41667
798system=system
799vnc=system.vncserver
800dma=system.iobus.slave[1]
801pio=system.iobus.master[4]
802
803[system.realview.dmac_fake]
804type=AmbaFake
805amba_id=0
806clk_domain=system.clk_domain
807ignore_access=false
808pio_addr=268632064
809pio_latency=100000
810system=system
811pio=system.iobus.master[9]
812
813[system.realview.flash_fake]
814type=IsaFake
815clk_domain=system.clk_domain
816fake_mem=true
817pio_addr=1073741824
818pio_latency=100000
819pio_size=536870912
820ret_bad_addr=false
821ret_data16=65535
822ret_data32=4294967295
823ret_data64=18446744073709551615
--- 5 unchanged lines hidden (view full) ---
829
830[system.realview.gic]
831type=Pl390
832clk_domain=system.clk_domain
833cpu_addr=520093952
834cpu_pio_delay=10000
835dist_addr=520097792
836dist_pio_delay=10000
837int_latency=10000
838it_lines=128
839platform=system.realview
840system=system
841pio=system.membus.master[2]
842
843[system.realview.gpio0_fake]
844type=AmbaFake
845amba_id=0
846clk_domain=system.clk_domain
847ignore_access=false
848pio_addr=268513280
849pio_latency=100000
850system=system
851pio=system.iobus.master[16]
852
853[system.realview.gpio1_fake]
854type=AmbaFake
855amba_id=0
856clk_domain=system.clk_domain
857ignore_access=false
858pio_addr=268517376
859pio_latency=100000
860system=system
861pio=system.iobus.master[17]
862
863[system.realview.gpio2_fake]
864type=AmbaFake
865amba_id=0
866clk_domain=system.clk_domain
867ignore_access=false
868pio_addr=268521472
869pio_latency=100000
870system=system
871pio=system.iobus.master[18]
872
873[system.realview.kmi0]
874type=Pl050
875amba_id=1314896
876clk_domain=system.clk_domain
877gic=system.realview.gic
878int_delay=1000000
879int_num=52
880is_mouse=false
881pio_addr=268460032
882pio_latency=100000
883system=system
884vnc=system.vncserver
885pio=system.iobus.master[5]
886
887[system.realview.kmi1]
888type=Pl050
889amba_id=1314896
890clk_domain=system.clk_domain
891gic=system.realview.gic
892int_delay=1000000
893int_num=53
894is_mouse=true
895pio_addr=268464128
896pio_latency=100000
897system=system
898vnc=system.vncserver
899pio=system.iobus.master[6]
900
901[system.realview.l2x0_fake]
902type=IsaFake
903clk_domain=system.clk_domain
904fake_mem=false
905pio_addr=520101888
906pio_latency=100000
907pio_size=4095
908ret_bad_addr=false
909ret_data16=65535
910ret_data32=4294967295
911ret_data64=18446744073709551615
912ret_data8=255
913system=system
914update_data=false
915warn_access=
916pio=system.membus.master[3]
917
918[system.realview.local_cpu_timer]
919type=CpuLocalTimer
920clk_domain=system.clk_domain
921gic=system.realview.gic
922int_num_timer=29
923int_num_watchdog=30
924pio_addr=520095232
925pio_latency=100000
926system=system
927pio=system.membus.master[5]
928
929[system.realview.mmc_fake]
930type=AmbaFake
931amba_id=0
932clk_domain=system.clk_domain
933ignore_access=false
934pio_addr=268455936
935pio_latency=100000
936system=system
937pio=system.iobus.master[22]
938
939[system.realview.nvmem]
940type=SimpleMemory
941bandwidth=73.000000
942clk_domain=system.clk_domain
943conf_table_reported=false
944in_addr_map=true
945latency=30000
946latency_var=0
947null=false
948range=2147483648:2214592511
949port=system.membus.master[1]
950
951[system.realview.realview_io]
952type=RealViewCtrl
953clk_domain=system.clk_domain
954idreg=0
955pio_addr=268435456
956pio_latency=100000
957proc_id0=201326592
958proc_id1=201327138
959system=system
960pio=system.iobus.master[1]
961
962[system.realview.rtc]
963type=PL031
964amba_id=3412017
965clk_domain=system.clk_domain
966gic=system.realview.gic
967int_delay=100000
968int_num=42
969pio_addr=268529664
970pio_latency=100000
971system=system
972time=Thu Jan 1 00:00:00 2009
973pio=system.iobus.master[23]
974
975[system.realview.sci_fake]
976type=AmbaFake
977amba_id=0
978clk_domain=system.clk_domain
979ignore_access=false
980pio_addr=268492800
981pio_latency=100000
982system=system
983pio=system.iobus.master[20]
984
985[system.realview.smc_fake]
986type=AmbaFake
987amba_id=0
988clk_domain=system.clk_domain
989ignore_access=false
990pio_addr=269357056
991pio_latency=100000
992system=system
993pio=system.iobus.master[13]
994
995[system.realview.sp810_fake]
996type=AmbaFake
997amba_id=0
998clk_domain=system.clk_domain
999ignore_access=true
1000pio_addr=268439552
1001pio_latency=100000
1002system=system
1003pio=system.iobus.master[14]
1004
1005[system.realview.ssp_fake]
1006type=AmbaFake
1007amba_id=0
1008clk_domain=system.clk_domain
1009ignore_access=false
1010pio_addr=268488704
1011pio_latency=100000
1012system=system
1013pio=system.iobus.master[19]
1014
1015[system.realview.timer0]
1016type=Sp804
1017amba_id=1316868
1018clk_domain=system.clk_domain
1019clock0=1000000
1020clock1=1000000
1021gic=system.realview.gic
1022int_num0=36
1023int_num1=36
1024pio_addr=268505088
1025pio_latency=100000
1026system=system
1027pio=system.iobus.master[2]
1028
1029[system.realview.timer1]
1030type=Sp804
1031amba_id=1316868
1032clk_domain=system.clk_domain
1033clock0=1000000
1034clock1=1000000
1035gic=system.realview.gic
1036int_num0=37
1037int_num1=37
1038pio_addr=268509184
1039pio_latency=100000
1040system=system
1041pio=system.iobus.master[3]
1042
1043[system.realview.uart]
1044type=Pl011
1045clk_domain=system.clk_domain
1046end_on_eot=false
1047gic=system.realview.gic
1048int_delay=100000
1049int_num=44
1050pio_addr=268472320
1051pio_latency=100000
1052platform=system.realview
1053system=system
1054terminal=system.terminal
1055pio=system.iobus.master[0]
1056
1057[system.realview.uart1_fake]
1058type=AmbaFake
1059amba_id=0
1060clk_domain=system.clk_domain
1061ignore_access=false
1062pio_addr=268476416
1063pio_latency=100000
1064system=system
1065pio=system.iobus.master[10]
1066
1067[system.realview.uart2_fake]
1068type=AmbaFake
1069amba_id=0
1070clk_domain=system.clk_domain
1071ignore_access=false
1072pio_addr=268480512
1073pio_latency=100000
1074system=system
1075pio=system.iobus.master[11]
1076
1077[system.realview.uart3_fake]
1078type=AmbaFake
1079amba_id=0
1080clk_domain=system.clk_domain
1081ignore_access=false
1082pio_addr=268484608
1083pio_latency=100000
1084system=system
1085pio=system.iobus.master[12]
1086
1087[system.realview.watchdog_fake]
1088type=AmbaFake
1089amba_id=0
1090clk_domain=system.clk_domain
1091ignore_access=false
1092pio_addr=268500992
1093pio_latency=100000
1094system=system
1095pio=system.iobus.master[15]
1096
1097[system.terminal]
1098type=Terminal
1099intr_control=system.intrctrl
1100number=0
1101output=true
1102port=3456
1103
1104[system.vncserver]
1105type=VncServer
1106frame_capture=false
1107number=0
1108port=5900
1109
1110[system.voltage_domain]
1111type=VoltageDomain
1112voltage=1.000000
1113